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TWI320581B - Qfn substrate processing method - Google Patents

Qfn substrate processing method

Info

Publication number
TWI320581B
TWI320581B TW093104341A TW93104341A TWI320581B TW I320581 B TWI320581 B TW I320581B TW 093104341 A TW093104341 A TW 093104341A TW 93104341 A TW93104341 A TW 93104341A TW I320581 B TWI320581 B TW I320581B
Authority
TW
Taiwan
Prior art keywords
processing method
substrate processing
qfn substrate
qfn
substrate
Prior art date
Application number
TW093104341A
Other languages
English (en)
Other versions
TW200512817A (en
Inventor
Kazuma Sekiya
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of TW200512817A publication Critical patent/TW200512817A/zh
Application granted granted Critical
Publication of TWI320581B publication Critical patent/TWI320581B/zh

Links

Classifications

    • E—FIXED CONSTRUCTIONS
    • E04—BUILDING
    • E04B—GENERAL BUILDING CONSTRUCTIONS; WALLS, e.g. PARTITIONS; ROOFS; FLOORS; CEILINGS; INSULATION OR OTHER PROTECTION OF BUILDINGS
    • E04B5/00—Floors; Floor construction with regard to insulation; Connections specially adapted therefor
    • E04B5/02—Load-carrying floor structures formed substantially of prefabricated units
    • E04B5/023—Separate connecting devices for prefabricated floor-slabs
    • E—FIXED CONSTRUCTIONS
    • E04—BUILDING
    • E04B—GENERAL BUILDING CONSTRUCTIONS; WALLS, e.g. PARTITIONS; ROOFS; FLOORS; CEILINGS; INSULATION OR OTHER PROTECTION OF BUILDINGS
    • E04B5/00—Floors; Floor construction with regard to insulation; Connections specially adapted therefor
    • E04B5/02—Load-carrying floor structures formed substantially of prefabricated units
    • E04B5/10—Load-carrying floor structures formed substantially of prefabricated units with metal beams or girders, e.g. with steel lattice girders

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Dicing (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW093104341A 2003-02-26 2004-02-20 Qfn substrate processing method TWI320581B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003049078A JP2004259936A (ja) 2003-02-26 2003-02-26 Ｑｆｎ基板の処理方法

Publications (2)

Publication Number Publication Date
TW200512817A TW200512817A (en) 2005-04-01
TWI320581B true TWI320581B (en) 2010-02-11

Family

ID=33114872

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093104341A TWI320581B (en) 2003-02-26 2004-02-20 Qfn substrate processing method

Country Status (4)

Country Link
JP (1) JP2004259936A (zh)
KR (1) KR100981864B1 (zh)
MY (1) MY147723A (zh)
TW (1) TWI320581B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6274926B2 (ja) 2014-03-17 2018-02-07 株式会社ディスコ 切削方法
JP2018181899A (ja) * 2017-04-04 2018-11-15 株式会社ディスコ 板状被加工物の加工方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3660861B2 (ja) * 2000-08-18 2005-06-15 株式会社ルネサステクノロジ 半導体装置の製造方法
JP2002184795A (ja) * 2000-12-14 2002-06-28 Hitachi Ltd 半導体装置の製造方法
JP4004755B2 (ja) * 2001-07-17 2007-11-07 シャープ株式会社 半導体パッケージの製造方法および半導体パッケージ

Also Published As

Publication number Publication date
MY147723A (en) 2013-01-15
TW200512817A (en) 2005-04-01
JP2004259936A (ja) 2004-09-16
KR20040076601A (ko) 2004-09-01
KR100981864B1 (ko) 2010-09-13

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Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent