TWI316751B - Improved thermal isolation for an active-sidewall phase change memory cell - Google Patents
Improved thermal isolation for an active-sidewall phase change memory cell Download PDFInfo
- Publication number
- TWI316751B TWI316751B TW095133934A TW95133934A TWI316751B TW I316751 B TWI316751 B TW I316751B TW 095133934 A TW095133934 A TW 095133934A TW 95133934 A TW95133934 A TW 95133934A TW I316751 B TWI316751 B TW I316751B
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- TW
- Taiwan
- Prior art keywords
- phase change
- layer
- electrode
- dielectric
- phase
- Prior art date
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
- H10N70/8265—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices on sidewalls of dielectric structures, e.g. mesa-shaped or cup-shaped devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8413—Electrodes adapted for resistive heating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/861—Thermal details
- H10N70/8616—Thermal insulation means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
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1316751 —« 九、發明說明： 【相關申請案資料】 本案於2005年11月21曰申請美國暫時性專利申請，該申請 案之申請案號為60/738,882,發明名稱為對一主動側壁相變化記憶 體細胞改善熱絕緣的結構及方法。 【聯合研究合約之當事人】 鲁飞細約國際商業機械公司、台灣旺宏國際股份有限公司及德國英 飛凌技術公她fmecm Teehnologies A.G)係柄合研究合約之當 事人。 田 【發明所屬之技術領域】 本發明係_轉發記賊元件，_是關於朗相變化記 體材料的此種記憶元件及其製造方法。 11 μ 【先前技術】 ,丨"外日日久项巾菇晶性。雷射脈衝用於續 ，以在娜之間切換及在相變化後讀取材料二： Γ，相也變為基礎的記顏㈣，如韻⑽材料及其類似 硫屬化物(Chalcogenide)材料廣泛用於讀寫光碟片。這 有至>-種_相，通常為非晶及f 〜、 -，.以在這些狀態之間切換及在相於讀 質 ^ .......... 變狀態 特性 其可 5 1316751 極於此相變化記憶細胞的兩側，且金屬電極的大小相當於此相變 化構件的大小。如此的電極會構成熱導體，金屬的高導熱性會很 快將熱帶離此相變化材料。因為此相變化的產生係、由熱的結果， 此熱傳導效應會造成需要更高的電流，才能產生所預期的相變化。 一種解決此熱傳導效應問題的方式可見於美國專 ，發明名稱為，，自動鮮娜_絕緣之奈米等級硫 Λ Γ式隨機存取記憶體_)”，其中揭露一絕緣此 結構及其製造過程是非常複雜的，然而仍無法達到 此3己憶兀件内的最小電流通過。 因☆此’必财發展績供記_細聽财著小財以及低重 級3此Γ必須解決熱傳導問題，且其製造方法必須符 的嚴職程改變異規範。更需要提供一結 冓及方法，可以同時適用於同—晶片中週邊電路的製造。 【發明内容】 元件本包發」月=目的為提供一種有敎善熱絕緣之記憶體元件。此 平=3= 包括第—電極和第二電極元件，大致上是 最包=4^側壁子元件隔離且有著互些接觸，其，該電極堆 表面接觸，包括與該第一電極和4者電電極堆疊側 並覆蓋該記憶體元件，其中該介電填充材 =鄰近於__件之漱，且財朗_ 7 ：1316751 【實施方式】 以下搭配第1圖至第6圖來詳細說明本發明之纟士構斑方法。 發明内容說明章節目的並非在於定義本發明。本發^係由申請^ 利範圍所定義。舉凡本發明之實施例、特徵、觀點及優點等將可 透過下列說明申請專利範圍及所附圖式獲得充分瞭解。 本發明的一般環境，就如先前技藝一般，是如第丨圖所示的記 憶體元素10。如此處可示以及業界所熟知，一記憶細胞係一電路 • 元件設計用來保存一電荷或是一狀態以指示一單一位元之一給定 邏輯位階。記憶細胞通常安排成陣列，如，電腦中的隨機存取記 憶體。在某些記’It細軸’―記憶元素魏實際儲存電荷或是狀 態的功能。在一傳統的隨機存取記憶體細胞，如，一電容器指示 此細胞之邏輯位階，其完全充電狀態表示一邏輯 其完全放電狀態表示-邏輯〇,或低準位。科^準位而 如圖中所示，此記憶元素10包含兩個電極12和14，由一絕緣 層16所分隔。一相變化材料薄膜18，將會於之後詳細描述，橋接 •=二電極’其上有一介電材料19。此電極的排列會決定此元件的 幾何形狀，所以，舉例而言，此相變化材料形成此電極結構的一 側壁。其他結構或許或造成—垂直的電極結構，本發明可適用於 其他結構。帛i圖可以進一步注意到僅是功能性的介紹，因此其 他傳統結構的細節被忽略。 流入第-電極12的操作電流，標示為Iin，跟著箭頭進入此相 變2材料’流出方向標示為I〇ut，導致此元件中央的溫度上升。當 此溫度超過一相變化所需時，此相變化材料的一區段2〇發生相二 化。此相變化材料的溫度會決定何種效果產生，所以電流的選擇 8 1316751 使用取此元素狀11 一低電流為了感測目的而 相變化之，陶_度_低於― 變化第：元圖二rD圖顯示本發明的實施例。每-圖均顯示此相 j疋素10延著AA方向的剖面，以便簡易明瞭。圖中的共 同凡件為相變化材料薄膜18，和介電材料19。 此外，&喃實關皆有著—熱絕緣元件22介於相變化材料 /膜與介，材料之間。此絕緣元件的組成(及其描述的技術)在其下 所描述之每-實施例中均有不同’但均是提供將相變化材料薄膜 ””電材料之間的熱絕緣之用。因此，熱會被限制在相變化材料 之内’讀有f許羯好處。第―，因為會防止熱自相變化材料 擴散出去’此種5^會減少產生相變化所需的熱能，因此減少每 -設置或重置操作所需的電流。在此同時，此相變化材料元件内 剩餘的熱可以減少傳導至記憶断助其他部分的熱，即導致此 二件的生命週期延長。對於—完整積體電路内的記憶元件數目而 。對於1GB讀元件至少有八十億個元件為例，所以應該可以 明瞭這熱減少的效應是很重大的。 此相變化材料18可以選自一組最好包含硫屬化物 (Chalcogenide)材料的族群之中。硫屬化物材料包括具氧(〇)、硫 (S)、硒(Se)及碲(Te)四個化學週期表上％族之一部份元素中任何 一個組成。硫屬化物包括硫屬化物族群與多個帶正電元素或取代 基之化合物。硫屬化物合金包括硫屬化物與其他如過渡金屬材料 之組合。硫屬化物通常包含一種或一種以上選自元素週期表第六 攔之其他元素，例如鍺(Ge)及錫(Sn)。通常，硫屬化物合金包括含 ；1316751 有銻(Sb)，鎵(Ga) ’銦(In)及銀(Ag)其中一種或多種之組合。許多 以相變化為主之記憶體材料已經被揭露於技術文獻中，包括Ga/Sb， In/Sb, In/Se, Sb/Te, Ge/Te, Ge/Sb/Te, In/Sb/Te, Ga/Se/Te, Sn/Sb/Te, In/Sb/Ge，Ag/In/Sb/Te，Ge/Sn/Sb/Te，Ge/Sb/Se/Te 及 Te/Ge/Sb/S 之合 金。在Ge/Sb/Te合金族群裡，有許多的合金組成可以使用。組成 的特徵在於TeaGebSb1()(Ka+b) ’其中a及b代表佔構成元素總原子數 的原子百分比。有一位研究人員指出最有用的合金為化在已經沉 積之材料内的平均濃度遠低於70%，典型低於約6〇°/。且一般低到 # 約23%而高到約58%Te ’最佳為約48%到58%Te。Ge的濃度超過 約5%，平均材料内的Ge濃度從約8%到約3〇%，一般保持低於 5〇°/。。最佳地，Ge的濃度從約8%到約4〇%。組成内其餘的主要 構成元素為Sb ° (Ovshinsky ‘112專利第1〇_11欄）。特別被其他研 究人員肯定的合金包括Ge2Sb2Te5, GeSb2Te4及GeSb4Te7(Noboru Ya^mda，“Ge-Sb-Te相變化光碟片在高資料速度紀錄上的可能 性SPIEv.31〇9，pp. 28-37(1997)。更一般而言，過渡金屬，例如鉻 (Cr)，鐵(Fe)，鎳，鈮，鈀(pd)，鉑(pt)及混合物或合金可 ❿與Ge/Sb/Te形成一可程式絕緣性質之相變化合金。有用之記憶體 材料的特定實姆參考〇vshinky，m第ιμΐ3欄所述，該揭露内 容在此以參考方式併入本案。 j目變化合金能在此細社動通道區軸依其位置順序於材料 為般非aa狀之第—結構狀態與為__般結晶固體狀態之第二結 態之間切換。這些相變化合金至少是雙向穩定⑼嫌)。在此 ^非晶係指相f沒有秩序之結構，比單晶更無秩序，具有可被 κψ/之特徵’例如^結晶狀態更高的電絲性。在此所稱之結晶 指相#有秩序的結構，比非晶結構更有秩序，具有可被偵測 ：1316751 式在不同可麵測狀態切換以跨越完全非晶及完全 光譜。受到非晶及結晶相之間變化影響的其他材 順序’自由電子密度及活化能。材料可以轉換至 :=t;r至二個或更多的固態相’以提供介於完全非晶 ^；：；B 〇 ^
相變化材料可以藉由施加電脈衝從一相狀態變化成另一相狀 態:已經觀察出—較練高振幅脈衝容易使相變化材料變成一般 非晶狀態’―般稱作為重設脈衝。較長較低振幅脈衝容易使相^ 化材料變成-通常結晶祕’―般稱作為程式脈衝。較短較長振 幅脈衝内的能麵高到使結晶結構之繼_，並且短到足以避 免原子重新排成結晶狀態。適合脈衝之狀況可以依照經驗法則判 斷’不需要過多的實驗’而能找出適_特定的相變化材料及 元件結構之條件。下顺龍’機化材料稱為GST，應了解其 他類型相變化材料也可以使用。用以實施在此所述之電腦記憶體 的材料為Ge2Sb2Te5。 其他可程式電阻記憶材料也可以使用於本發明的其他實施例 中’包括N型攙雜相變化材料(GST)，GexSbb，或是其他可用不同 結晶相變化來決定電阻值；PrxCayMn〇3，PrSrMn〇，Zr〇x或其他 可用電子脈衝來改變電阻狀態；TCqN，PCBM，TCNQ_peBM， =u_T〇^ ’ Ag-TCNQ ’ C60-TCNQ ’ TCNQ 中攙雜其他金屬，或 是其他任何高分子材料有著可用電子脈衝來控制的雙相穩定或多 重向穩定之電阻狀態。 第2A圖中之元件藉由提供一絕緣室鄰近於此相變化元件來使 ：1316751 用此熱絕緣元件22。可以被輕易了解’一良好之真空可以阻絕各 種形式(除了熱輻射)的熱傳導，大幅減少熱自此相變化材料流出。 雖然要達到一完美的真空是十分困難的，本發明之結構提供一真 空室及其方法來達到一低惠嚴環度私限制反應氣體。如之後的描 述，此相變化材料之厚度係介於10奈米到50奈米之間，最好是 30奈米（即自此元件長軸橫切方向量測）。此真空室的厚度可介於 10奈米到30奈米之間，最好是20奈米。此結構會在以下詳細的 製程描述後變的更具體化。 ，如第2B圖中替代實施例所示，一絕緣室24被包括，但是一密 封層24被加入此相變化元件之上。在一低氣壓環境中，某些相變 化材料具有自此相變化薄膜擴散到低氣壓環境中的傾向。此傾向 可藉由增加一具有與相變化材料較佳附著力且具有良好擴散阻障 作用的薄材料層。最好是ΑΙΑ ’氧化矽，氮化矽，或是ro〇2。 此密封層24的厚度可介於5奈米到20奈米之間，最好是1〇奈米。 假如一特定用途對於形成一絕緣室有著困難，則可以使用如第 2C圖所示的結構，利用一熱阻障層23來取代絕緣室仍可以獲得 φ 本發明之優點。此阻障層係一額外的層次，具有與絕緣室相同的 厚度(介於10奈米到30奈米之間，最好是2〇奈米）。此材料的特 性須要有較低的熱傳導係數，結合有較低的介電係數(通常稱為 l〇w-k)。最好是使用一高分子材料或是其他業界所習知的有機材所 作為此用途。 a 此熱絕緣材料之代表物質可包括具矽(Si)、碳(C)、氧(0)、氟(F) 及氫(Η)等組合者。做為熱絕緣覆蓋層之熱絕緣材料例如包括氧化 矽(Si〇2)、SiCOH、聚醯胺及氟碳聚合物。若是氧化矽是作為熱絕 緣覆蓋層之熱絕緣材料的話，則此熱絕緣材料應該具有低於氧化 12 .1316751 销導熱性，或是小於aG14J/em*deg K*See。許錢介電係數 料有著低於氧化矽的介電係數，也是合適的熱絕緣物質。其他。 作為熱絕緣覆蓋層之材料的實例包括氟氧化矽、倍半氧矽= (silsesquioxane)、聚環婦醚 ^p〇fyaryiene ether)、對二甲笨聚體 (parylene)、氟聚合物、氟化無定型碳、類鑽石碳、多孔性氧化石夕一 介多孔(meS0p0r0us)氧化麥、多孔性倍半氧矽烷、多孔性聚亞醯胺 及多孔性環烯醚。在其他具體實施例裡，熱絕緣結構包括一位於 ^電填充部分内橫跨橋段以提供熱絕緣作用之填充閘極空隙。二 • 單層或多層可以作為提供熱絕緣及電絕緣之用。 卫’' 第2D圖中的實施例係結合以上所述的例子，具有一密封層μ介 於此相變化元件與-熱阻障層23之間。先前關於兩著功用日上以及 尺寸上的描述在此實施例中均可適用。 一根據本發明實施例中如何製造一相變化記憶元件之製作流 程圖，自第3圖開始顯示。為了簡明起見，圖示中僅顯減相= 化兀件及其相關特徵，並沒有顯示第i圖中的電極及其相關結構。 可以明瞭的是，電滅難相變倾構兩者結合構成本發明實施 鲁例的-部份，熟知此記憶人士均能輕易明瞭如何將本發明所教示 的特徵運用於傳統的製程與技術之中。 根據本發明實關巾如何製造-相變化記憶元件之製作流程 圖，自-基板102開始’最好是二氧切的形式或是其他介電填 充材料具有良好_和低介祕料雜。在此基板之上形成一 相變化材料1〇4區塊以及-介電填充材料1〇6。這些區塊可以個別 的形成，或是此介電材料已經存在。在後者的情況下 ，一洞穴可 以於此介電材料和相變化材料_成。為業界所熟知傳統的沈積 技術，可以適用於此層。 13 ：1316751
此熱絕緣元件最好是利用光阻及傳統的微影製程所形成。此製 程顯示於第4圖中，其中一钱刻幕罩108經過沈積、曝光然後除 去此光阻物質所形成。 第5A圖顯示此微影製程之結果。利用光阻所構成的幕罩，一 選擇性姓刻可以除去此相變化材料至基板的高度，僅留下薄膜18 ，電極結構接觸且形成一洞穴14〇。最好是利用乾式非等向蝕刻， 最好是一離子反應式蝕刻(R正)技術。在蝕刻之後，除去剩餘的光 阻物質。 假如一密封層24被使用，此層於蝕刻步驟之後沈積，如第5B 圖所示。最好使用-順形沈積，此步驟必須被仔細控制以使沈積 厚度小於敝14〇的—半寬度’所以敢可以延伸在相變化材料 的整個長度，以節省密封層在洞穴底部的厚度。 第/A圖中所示的相變化記憶元件被完成於第6a圖藉由沈積 -覆盍層110哺蓋整個由第5A圖所定義的絕緣室22之上。此 層最好是二氧化料是其齡電填充。此處最好是使用—非 ^沈積’以減少進人此絕緣室中的介電材料112。此覆蓋層的厚 j大於此絕緣㈣寬度，亦可減少進人此絕緣室中的材料。此 須於—低氣壓的環境下進行，如同業界熟知的賴或是其 =技術-般，因此可以確保絕緣室的内壁係處於—低氣壓的環境 亦是實行如第6A圖所示的 有著一阻障層24的結構，在此步驟 步驟。 (分:ίίί 圖和第％圖用一熱絕緣材料來取代此絕緣室 其上;，錢程僅有與 + Π疋在6A/6B的沈積步驟之前增 :1316751 加-擴散阻障層沈積的步驟。最好也能對此結構進行平坦化至此 '相變化材料層的高度’使用某些業界所熟知的化學機械研磨技術。 雖然本發明係已參照較佳實施例來加以描述，將為吾人 所暸解的疋本發明創作並未受限於其詳細描述内^。替 換方式及修改樣式係已於先前描述中所建議，並且其他替 換方式及修改樣式將為熟習此項技藝之人士所思及。特別 是，根據本發明之結構與方法，所有具有實質上相同於本 發明之構件結合而達成與本發明實質上相同結果者皆不脫 Φ 離本發明之精神範轉。因此，所有此等替換方式及修改樣 式係意欲落在本發明於隨附申請專利範圍及其均等物所界 定的範疇之中。 【圖式簡單說明】 第1圖係繪示根據先前技藝的一相變化記憶元件之剖面圖； 第2A圖至第2D圖係繪示根據本發明實施例的相變化記憶元 件之剖面圖； φ 第3圖係繪示根據本發明一實施例的製造一相變化記憶元件的 一起始步驟； 第4圖係繪示根據本發明一實施例的製造一相變化記憶元件的 進一步驟； 第5A圖及第5B圖係繪乔根據本發明之一替代實施例的製造 一相變化記憶元件的進一步騨； 第6A圖及第6B圖係繪承根據本發明之一替代實施例的製造 一相變化記憶元件的進一步驊。 15 .1316751 【主要元件符號說明】 ίο:記憶體元件 12、14 :電極 16 :絕緣層 18 :相變化材料 19 :介電層 20 :區段 100 :記憶體元件 22 :熱絕緣元件 23 :熱阻障層 24 :密封層 102 :基板 104 :相變化材料 106 :介電填充材料 108 :蝕刻幕罩 110 :覆蓋層 112 :介電材料 140 :洞穴
Claims (1)
- J316751 申請專利範固 中華冗發明專利申請第095133934號 線之申請專利範圍修正本 中華民國97卓6月22曰送呈 1. 一種記憶體元件，包含·· 一電極堆疊包括一第一電極和一第一 側表面 々罘一電極7G件，大致上是平土曰 的，藉由-絕緣S件隔離且有著互此肋^上疋十土一 · 负者互二接觸，其中該電極堆疊包括 -相變化讀，料—絲面触f 與該第-電極和該第二電極元件電性接觸；以及綱匕括 介電填充材料’環繞並覆蓋該相變化元件，其中該介電填充材 料與該相變化兀件分離，導致該介電填充材料與該相變化元件定 義一鄰近於該相變化元件之洞穴。 2.如申請專利範圍第丨項所述之記憶體元件，其中該洞穴係容納 -熱絕緣材料，有著比該介電填充材料為低的，傳導係數。 3·如申請專利範圍帛1項所狀記憶體元件，其中該相變化元件 包含錯(Ge)、録(Sb)、鎊(Te)之組合。 4. 如申請專利範圍第1項所述之記憶體元件，其中該相變化元件 包括二種或二種以上選自由鍺(Ge)、銻(Sb)、諦(Te)、硒(Se)、銦 ⑽、鈦(Τι)、鎵(Ga)、鉍(Bi)、錫(Sn)、銅(Cu)、纪(Pd)、鉛(Pb)、 銀(Ag)、硫(S)及金(Au)所組成之族群的材料組合。 5. 如申請專利範圍第1項所述之記憶體元件，更包括一阻障層於 該相變化元件之上，以使該相變化元件與該洞穴分離。 17 !316751 6·—種形成一記憶元件之方法，該方法包含： 提供-電極堆疊，包括第—電極 電:堆 = 同電極觸*接觸’且有著與該 升>成一介電填充材料層，鄰近於該相$ 電極堆疊大致相_高度；./她化㈣層，且有著與該 切割-間_分_蝴化材料層無介電軌材料層； 沈積-介電層於該相變化材料層與該介電填充材料層^上，盆 中该沈積材料橋接並封閉該間隙。 〃 7. —種記憶體元件，包含： 一電極堆疊包括一第一電極和一 疊包括-側表面’· 弟—電如件，其中該電極堆 :相變化元件’有著—絲面触電極堆疊織祕觸， 介電填充㈣，職顧蓋該相變 =相變化元件分離，導致該介電填充材料二== 義一鄰近魏相變化元件之洞穴，其倾敢包含 几件疋 —弟-電極和該第二電極元件電性接觸， ·以及 ‘絕緣室。 8· 一&種形成—記憶元件之方法，該方法包含： 提供一電極堆疊，包括第一電極 堆疊包括—側表面; 电位和弟—電極碰，財該電極 形成—相變化材料層’與該_堆疊侧表面接觸，且有著與該 18 ,1316751 電極堆疊大致相同的高度；以及 形成一介電填充材料層’鄰近於該相變化材料層，且有著與該 電極堆疊大致相同的高度； 切割一間隙以分離該相變化材料層與該介電填充材料層； 沈積一介電層於該相變化材料層與該介電填充材料層之上，其 中該沈積介電層橋接並封閉該間隙以形成一絕緣室。 9. 如申請專利範圍第8項所述之方法，更包括於該沈積一介 ® 電層的步驟之前沈積一密封層於該相變化材料層之上。 10. 如申請專利範圍第9項所述之方法，其中該密封層係利用 順形沈積形成。 11·如申請專利範圍第8項所述之方法’其中該介電層係利用 扑順形沈積形成。 • 12.如申請專利範圍第8項所述之方法，其中該介電層的厚声 係大於該絕緣室的寬度。 人 19
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-
2006
- 2006-01-24 US US11/338,211 patent/US7507986B2/en active Active
- 2006-09-13 TW TW095133934A patent/TWI316751B/zh active
- 2006-10-20 CN CN200610136026A patent/CN100593865C/zh active Active
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| Publication number | Publication date |
|---|---|
| TW200721455A (en) | 2007-06-01 |
| US7507986B2 (en) | 2009-03-24 |
| CN1971961A (zh) | 2007-05-30 |
| CN100593865C (zh) | 2010-03-10 |
| US20070115794A1 (en) | 2007-05-24 |
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