TWI310265B - Gain amplifier with dc offset cancellation circuit - Google Patents
Gain amplifier with dc offset cancellation circuit Download PDFInfo
- Publication number
- TWI310265B TWI310265B TW092116063A TW92116063A TWI310265B TW I310265 B TWI310265 B TW I310265B TW 092116063 A TW092116063 A TW 092116063A TW 92116063 A TW92116063 A TW 92116063A TW I310265 B TWI310265 B TW I310265B
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- output
- gain amplifier
- amplifier
- input
- offset
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- 230000005669 field effect Effects 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000001914 filtration Methods 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 10
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 description 7
- 238000004088 simulation Methods 0.000 description 7
- 238000004891 communication Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 229910001922 gold oxide Inorganic materials 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000013316 zoning Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
- H03G1/007—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using field-effect transistors [FET]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45744—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
- H03F3/45748—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using a feedback circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
- H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
- H03F3/45973—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
1310265 九、發明說明: 【發明所屬之技術領域】 本發明係關於-種具有快速直流偏移消去(DC 〇ffset Cancellation)線路㈣益放大器,尤其铜於—種應用於數 位通訊系統之快速直流偏移消去(DC 〇ffset Cancellati〇n) 線路的增益放大器。 【先前技術】 在數位通訊系統中,可程式增益放大器是一個不可或缺的 元件’其功帛在於提1%增益以將射頻前端電路所接收到的訊號 放大到適當的大小,來降低基頻類比數位轉換器 (Analog-Digital Converter)動態操作區域(Dynamic Range) 的要求’因此若電路輸入有直流偏移的現象,經過高增益的放 大器後’會使得直流偏移量加大進而造成基頻類比數位轉換器 進入飽和區。今日的中低頻(Low IF)或是零中頻(Zer〇 IF) 接收機架構中,因為混波器的輸入端與本地震盪器(LocM Oscillator)的輸入端之間麵合,而產生自我混波的效應,造 成無法避免的直流偏移,因此需要一個直流偏移消去電路來解 決這個問題。此外,直流偏移效應也廣泛的出現於今日的積體 電路之中,許多高增益的放大器電路設計中,往往會因為製程 或疋元件的不匹配而造成。在此提出的架構可以廣泛的解決此 類的直流偏壓效應,並提供一快速收敛穩定狀態的方法。 1310265 【發明内容】 本發明之主要目的在於提供一具有快速直流偏移消去(Dc Offset Cancellation)線路的增益放大器,其主要係藉由使 用多組回授因子(FeedbackFactor)的方式來縮短收斂時間, 以實現陕速直流偏移消去(DC〇ffsetxanceiia"ti〇n)的目的。 本發明係關於一種具有快速直流偏移消去(DC Offset Cancellation)線路的增益放大器,其包含一增益放大器,其 輸入端係連接至輸人峨源;-麟II,其輸人端係連接至該 增益放大器的輸出端;-主動式類比低通·器,係連接至該 緩衝器的輸出端,係用以將高頻的類比訊號濾除;並輸出至增 m·放大器的輸入端以與輸入訊號相減,俾可達到直流偏壓消除 的目的。 【實施方式】 凊參考第一圖。第一圖為本發明之較佳實施例之具有快速 直洲偏移消去(DC 〇ffset Cancellation)線路的增益放大器 之電路示意圖,係包括一增益放大器1,其輸入端係連接至輸 汛號源1〇 ’俾用以將輸入訊號放大;一緩衝器2,其輸入端 係連接至該增益放大器丨的輸出端;—主動式類比低通滤波器 3係連接至該緩衝器2的輸出端,係用以將高頻的類比訊號 濾除;並輸出負回授至輸入訊號源10的輪出端以與輸入訊號 相減’俾可鋼直流偏壓消除的目的;此主動式類比低通遽波 1310265 器3在本較佳實施例係包括—可變電阻3()放大器3ι,复 連接至可魏阻30的細端,輸出端並輸出以負回授方式連 接至輸入訊號源1G上。1容對32,其係連接至放大器幻 f。另具有-比較器33,此比較器33係與放大器31的輸出 端及參考電展Vref相連,俾用以比較後輸出至可變電阻卯 上。 其運作的原理為-開始使用較低的電阻值,使整個迴路快
速收傲到接近於敎的狀態,接著再切換顺高的電阻值,此 時的直流偏壓已經小到不會將錢附近軌號齡過多,而影 響到接收《的位元錯解(Bitf-rate,ber)。
第-圖係為第―圖中其可變電_實施電路圖,在本實施 例中其可變電阻30係包括四個金氧半場效電晶體4〇、41,、 43(MOSFET);其中兩金氧半場效電晶體4〇、必的間極棚、 連接至比較器(圖中未示)的一輸出端να上,用一接收— 固定的參考電壓(Vrei),另兩金氧半場效電晶體41、42的開 5·、420則連接至比較器(圖中未示)的另一輸出端似上。 =中:金氧半場效電晶體4〇、42的源極姻、421分別連接至 1°°的正輪出端20上;另外兩金氧半場效電晶體4卜43 的源極41卜431則分別連接至缓衝器的負輸出端21處。其中 兩金氧半場效電晶體仙、41的汲極4G2、412係連接至放大器 的負輸入端310處;另兩金氧半場效電晶體42、43的汲極 1310265 422、432則連接至放大器31的正輸入端311處。 以下的模擬結果為依此原理應用於低中頻無線通訊系統 中可程式化增益放大H的設計,麵可程式化增益放大器提供 了約48dB的增益,第三圖為此設計的頻率響應圖,其為回授 低魏波ϋ較高電阻鹤,不同的增域擬結果。第四圖為 健增益時不同溫度的模擬結果。第為回授低賴波器 較低電阻值時’ 48dB增益時不同溫度的模擬結果。第六圖為 直流偏移輸入的測試模擬,當輸入±4〇〇mV的直流偏壓時,此籲 設計的輸出能很快速的反應將其收斂到±5〇mV,並切換到較高 阻抗電阻值使其繼續收斂到穩定狀態。 藉由上述構造,本發明可藉由麵電路實現的低通滤波器 構造’可縮小電路體積;而採用可調整電阻器來控制不同的回 授因子’亦可達到多迴路頻寬的特點來加速整個迴路的收傲, 俾使整個迴路快速的收斂至穩定狀態。 、,’不上所述,充份顯示出本發明具有快速直流偏移消去(沉φ Offset Canceilation)線路的增益放大器在目的及功效上均 深富實施之進步性,極具產業之利用價值,且為目前市面上前 所未見之新發明,完全符合發明專利之要件,爰依法提出申請。 唯以上所述者,僅為本發明之較佳實施例而已,當不能以 之限定本發明所實施之棚。即大凡依本發日种請翻範圍所 作之均等變化與修飾,皆應仍屬於本發明專利涵蓋之範圍内, 1310265 謹請貴審查委員明鑑,並祈惠准,是所至禱。 【圖式簡單說明】
第一圖為本發明較佳實施例之具有具有快速直流偏移消去(DC
Offset Cancellation)線路的增益放大器之電路示意圖;及 第二圖為第一圖中其可變電阻的實施電路圖; 第三圖係為本發明之的頻率響應示意圖; 第四圖為48dB增益時不同溫度的模擬結果示意圖; 第五圖為回授低通濾波器較低電阻值時,48dB增益時不同溫 度的模擬結果示意圖; ι 第六圖為直流偏移輸入的測試模擬示意圖。 【主要元件符號說明】 1增益放大器; 10輸入訊號源; 2緩衝器; 3主動式類比低通濾波器; 3〇可變電阻; 31放大器; 32電容對; 33比較器; 40、4卜42、43金氧半場效電晶體; 400、410、420、430 閘極; 1310265 401、 4Π、42卜 431 源極;及 402、 412、422、432 没極。
10
Claims (1)
1310265 十、申請專利範圍: 1· 一種具有快速直流偏移消去(DC Offset Cancellation)線 路的增益放大器,包含: 一增益放大器,其輸入端係連接至輸入訊號源; —緩衝器,其輸入端係連接至該增益放大器的輸出端;及 一主動式類比低通濾波器,係連接至該緩衝器的輸出端,係 用以將高頻的類比訊號濾除;並輸出至增益放大器的輸入 端以與輸入訊號相減,俾可達到直流偏壓消除的目的,其 中該主動式類比低通滤波器係包括一可變電阻;一放大芎 連接至可變電阻的輸出端其輸出端並輸出負回授至輸入訊 號源上;-電容對連接至放大器上;及一比較器,該比較 器的其中一輸入端係與放大器的輸出端相連,另一輸入端 則連接至-參考電壓肋比較後輸出至可變電阻上。 2. 如申請專利範圍第丨項之具有快速直流偏移消去(dc俯奶 CanCeilati〇n)線路的增益放大器,其中該可變電阻係包括 數個金氧半場效電晶體(M0SFET)。 3. 如申請專利範圍第2項之具有快速直流偏移消去㈨附奶 CanCellatlQn)線路的增益放大器,射該等金氧半場效電 晶體的難係連接至該比細輪㈣上;該等金氧半場效 電晶體的源極分別連接至緩衝器的 嗤妨士盟ΛΑΜ 别出j^上’沒極則輸出 連接至放大糾輪出端處,俾以控制輪出的電壓。
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092116063A TWI310265B (en) | 2003-06-13 | 2003-06-13 | Gain amplifier with dc offset cancellation circuit |
| US10/687,657 US6903593B2 (en) | 2003-06-13 | 2003-10-20 | Gain amplifier with DC offset cancellation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092116063A TWI310265B (en) | 2003-06-13 | 2003-06-13 | Gain amplifier with dc offset cancellation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200428764A TW200428764A (en) | 2004-12-16 |
| TWI310265B true TWI310265B (en) | 2009-05-21 |
Family
ID=33509834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092116063A TWI310265B (en) | 2003-06-13 | 2003-06-13 | Gain amplifier with dc offset cancellation circuit |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6903593B2 (zh) |
| TW (1) | TWI310265B (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8521884B2 (en) | 2010-12-15 | 2013-08-27 | Industrial Technology Research Institute | Network system and method of address resolution |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7349465B2 (en) * | 2003-11-21 | 2008-03-25 | Analog Devices, Inc. | Line interface system |
| KR100555571B1 (ko) * | 2004-09-07 | 2006-03-03 | 삼성전자주식회사 | 반도체 장치의 송신기 |
| DE102004052174B4 (de) * | 2004-10-27 | 2015-03-19 | Xignal Technologies Ag | Verstärkerschaltung, umfassend einen Verstärker mit tiefpassgefilterter Rückkopplung |
| US7560957B2 (en) * | 2005-07-12 | 2009-07-14 | Agere Systems Inc. | High-speed CML circuit design |
| US7532065B2 (en) * | 2005-07-12 | 2009-05-12 | Agere Systems Inc. | Analog amplifier having DC offset cancellation circuit and method of offset cancellation for analog amplifiers |
| US7411446B2 (en) * | 2006-11-09 | 2008-08-12 | Industrial Technology Research Institute | DC offset cancellation circuit |
| TWI342109B (en) * | 2007-01-03 | 2011-05-11 | Realtek Semiconductor Corp | Dc offset calibration apparatus and method |
| TWI336164B (en) * | 2007-01-03 | 2011-01-11 | Realtek Semiconductor Corp | Dc offset calibration apparatus and method for differential signal |
| JP2009071608A (ja) * | 2007-09-13 | 2009-04-02 | Sumitomo Electric Ind Ltd | オフセットキャンセル回路及び差動増幅回路 |
| US7642816B2 (en) * | 2007-10-10 | 2010-01-05 | Industrial Technology Research Institute | Transconductor |
| KR20090122513A (ko) * | 2008-05-26 | 2009-12-01 | (주)에프씨아이 | 무선수신기용 저잡음 디씨 오프셋 제거회로 |
| KR101561951B1 (ko) * | 2009-10-21 | 2015-10-20 | 삼성전자 주식회사 | 휴대 단말기의 전력 소모 제어 방법 및 장치 |
| US8525710B1 (en) * | 2010-03-31 | 2013-09-03 | Cirrus Logic, Inc. | Audio amplifier offset reduction using digital input/output comparisons |
| EP2506443B1 (en) * | 2011-03-31 | 2016-11-30 | Nxp B.V. | Receiver comprising amplifier with Miller effect feedback |
| US8493098B1 (en) * | 2012-03-14 | 2013-07-23 | Honeywell International Inc. | Systems and methods for compensating the input offset voltage of a comparator |
| US9203351B2 (en) | 2013-03-15 | 2015-12-01 | Megachips Corporation | Offset cancellation with minimum noise impact and gain-bandwidth degradation |
| TWI517555B (zh) | 2013-07-17 | 2016-01-11 | 聯詠科技股份有限公司 | 直流漂移消除電路 |
| US9800217B1 (en) * | 2014-02-26 | 2017-10-24 | Marvell International Ltd. | Integrated amplifier system |
| US20200067427A1 (en) * | 2018-08-27 | 2020-02-27 | Massachusetts Institute Of Technology | Charge Controller for Linear Operation of Piezoelectric Actuators |
| US10819297B1 (en) * | 2019-04-29 | 2020-10-27 | Nxp B.V. | Gain stage with offset cancellation circuit for a fixed high-pass pole |
| US20230102288A1 (en) * | 2021-09-29 | 2023-03-30 | Skyworks Solutions, Inc. | Pulse-width modulation audio amplifier having feed forward loop |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08279718A (ja) * | 1995-04-07 | 1996-10-22 | Nec Corp | オフセット除去増幅回路 |
| JP2809150B2 (ja) * | 1995-08-14 | 1998-10-08 | 日本電気株式会社 | 高利得増幅回路 |
| US6288604B1 (en) * | 1998-02-03 | 2001-09-11 | Broadcom Corporation | CMOS amplifier providing automatic offset cancellation |
| JP3968250B2 (ja) * | 2002-02-05 | 2007-08-29 | 富士通株式会社 | Dcオフセットキャンセル回路 |
-
2003
- 2003-06-13 TW TW092116063A patent/TWI310265B/zh not_active IP Right Cessation
- 2003-10-20 US US10/687,657 patent/US6903593B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8521884B2 (en) | 2010-12-15 | 2013-08-27 | Industrial Technology Research Institute | Network system and method of address resolution |
Also Published As
| Publication number | Publication date |
|---|---|
| US20040251947A1 (en) | 2004-12-16 |
| US6903593B2 (en) | 2005-06-07 |
| TW200428764A (en) | 2004-12-16 |
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