TWI394665B - Inkjet chip - Google Patents

Description

Inkjet wafer

This case relates to a wafer, especially an inkjet wafer.

In recent years, with the popularization of personal computers and the continuous development of industrial technology, printing equipment has become an indispensable product in the periphery of personal computers in enterprises or homes, and users have also demanded the efficiency, function and precision of printing equipment. Gradually increasing, it is hoped that the printing equipment can meet the requirements of high printing quality and fast printing speed while minimizing the volume.

In order to print a multi-color printing device, a plurality of ink cartridges are required to be mounted on the carrier of the printing device. Therefore, the volume of the carrier in the horizontal direction tends to increase with the volume of the ink cartridge, and also increases. The moving distance of the bearing seat inside the printing device must also increase the housing space inside the printing device, making it difficult to meet the current trend of miniaturization of electronic products.

In addition, in order to improve the printing speed and print quality, it is necessary to add an ink jet element to an ink jet head of a conventional ink cartridge. Referring to the first figure, it is a schematic circuit diagram of a conventional ink jet element, as shown in the figure. The conventional ink-jet element 1 uses the characteristics of a resistor 11 and a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) to control the ink-jetting action of the ink-jet head, since a single control is conventionally used. The contact 13 controls the manner in which the single ink-jet element 1 operates. Therefore, if the number of the ink-jet elements 1 is to be increased, the control contact potential must be relatively increased, so that the accommodation space of the entire ink-jet wafer needs to be enlarged correspondingly. The volume of enamel will inevitably increase a lot, leading to a dilemma in the quality of printing and the reduction of volume. Moreover, the increase in the number of the ink-jet elements 1 also increases the cost of the process, and the phenomenon that the lines interfere with each other, which reduces the work efficiency, and the printing work takes longer to complete, and the user is invisibly added. Time cost.

Therefore, how to improve the above-mentioned conventional technology and achieve the inkjet element with the least control point control to reduce the cost and reduce the volume of the inkjet wafer is an urgent problem to be solved.

The main purpose of the present invention is to provide an inkjet wafer, which solves the problem that the size of the conventional inkjet wafer is enlarged with the increase of the control contact, and the volume of the inkjet cartridge is increased, the manufacturing cost is high, and the lines are easily interfered with each other. Shortcomings such as phenomena.

Another object of the present invention is to provide an ink jet wafer to achieve the most control of the ink jet element with a minimum of control contacts, thereby reducing the cost and reducing the volume of the ink jet, thereby reducing the efficiency of the ink jet cartridge volume.

In order to achieve the above object, a broader aspect of the present invention is to provide an inkjet wafer suitable for use in a printing apparatus, comprising at least: a plurality of inkjet heating elements; and an inkjet signal generating circuit comprising at least: a counter. And electrically connected to the printing device to receive a counting control signal and a pulse signal of the output of the printing device, and generate a plurality of counting signals according to the counting control signal and the pulse signal; and a decoder, And electrically connected to the counter to receive and decode the plurality of counting signals to generate a plurality of address signals, and select the corresponding inkjet heating elements according to the plurality of address signals.

Some exemplary embodiments embodying the features and advantages of the present invention are described in detail in the following description. It is to be understood that the present invention is capable of various modifications in the various aspects of the present invention, and the description and illustration are in the nature of
Please refer to the second and third figures, which are circuit block diagrams of the inkjet wafer and the printing device of the preferred embodiment of the present invention, respectively, and the circuit block diagram of the inkjet signal generating circuit shown in the second figure of the present invention. In this embodiment, the inkjet wafer 2 is suitable for the printing apparatus 3, and includes at least a plurality of inkjet heating elements 21 and an inkjet signal generating circuit 22 having a counter 221 and a decoder 222. The inkjet heating element 21 can be electrically connected to the printing device 3 to receive the image data P output by the printing device 3. The printing device 3 can be, for example, a printer body, and the inkjet wafer 2 can be disposed on a printing head of a printing cartridge.
In addition, the counter 221 can also be electrically connected to the printing device 3 to receive the counting control signal C _T and the pulse signal C _LK output by the printing device 3, and generate a plurality of signals according to the counting control signal C _T and the pulse signal C _{LK .} The counting signal is electrically connected to the counter 221 to receive and decode the plurality of counting signals to generate a plurality of address signals A ₁ -A _n and according to the plurality of address signals A. _{1 -} A _n selects the corresponding ink jet heating element 21, and after the corresponding ink jet heating element 21 is selected, it is determined whether or not to perform the printing operation based on the image data P.
Referring to the third figure, in some embodiments, the counter 221 can cooperate with each other including, but not limited to, a JK flip-flop, a D flip-flop, a T-reactor, and an RS flip-flop or a group thereof. Achieve the aforementioned effects. In some embodiments, the counter 221 may further include a logic gate, or a logic gate, an inverse logic gate, a reverse logic gate, an inverse or logic gate, a mutual exclusion or logic gate, an anti-mutation or a logic gate or a combination thereof. Group. The counter 221 can have the upper function and the lower function, and the upper function can be counted in an incremental manner, and the lower function can be counted in a decreasing manner, but not limited thereto. As for the switching between the upper function and the lower function, it depends on the enabling or disabling state of the counting control signal.
Please refer to the fourth figure, which is a circuit diagram of the counter shown in the third figure of the present case. In this embodiment, the constituent elements of the counter 221 may include, but are not limited to, a JK flip-flop 2211, a logic gate (And Gate) 2212, and an OR gate 2213. In addition, in this embodiment, the count control signal C _T may include a first count control signal C ₁ and a second count control signal C ₂ , and the counter 221 is in an enabled state and a second count on the first count control signal C ₁ . When the control signal C ₂ is in the disabled state, the function is switched to the upper number function, and when the first counting control signal C ₁ is in the disabled state and the second counting control signal C ₂ is in the enabled state, the function is switched to the lower number function, in this embodiment. In the enable state, the enable state is high, and the disable state is low, but not limited thereto. As shown in the fourth figure, the counter 221 can receive the first count control signal C ₁ , the second count control signal C ₂ and the pulse signal C _LK output by the printing device 3, and control the signal C ₁ according to the first count. The two counting control signals C ₂ and the pulse signal C _LK generate a plurality of counting signals A, B, C, D, , , as well as And will count signals A, B, C, D, , , as well as Transfer to decoder 222 for decoding, wherein, because of the characteristics of JK flip-flop 2211, when counting signal A and One of them is in an enabled state, and the other is in a disabled state. Similarly, counting signal B and , C and And D and There is also the same inverse relationship, and will not be repeated here.
Wherein, the decoder 222 can include and logical gates, or logic gates, inverse logic gates, inverse and logic gates, inverse or logic gates, mutual exclusion or logic gates, anti-mutexes or logic gates or groups thereof And achieve the aforementioned effects.
Please refer to the fifth figure, which is a schematic circuit diagram of the decoder shown in the third figure of the present invention. As shown, the decoder 222 can receive the counting signals A, B, C, D, , , as well as And decoding to generate a plurality of address signals A ₁ -A _n . In this embodiment, the counter 221 is matched with four JK flip-flops 2211 and outputs eight counting signals A, B, C, D, , , as well as To the decoder 222, the decoder 222 can generate sixteen address signals A ₁ -A ₁₆ after decoding and can select the corresponding ink-jet elements 21 according to the address signals A ₁ -A ₁₆ .
Please refer to the sixth figure and the following table 1 and cooperate with the fourth figure and the fifth figure. The sixth figure is the signal-time sequence diagram of the preferred embodiment of the present invention, and the table 1 is the time, the counter output counting signal and the decoder. The output address signal correspondence table. In this embodiment, the counting signals D and A respectively represent the largest and smallest bits of the binary, but are not limited thereto. As shown in Table 1 and FIG. Sixth, when the time T ₁ is the time interval, counting by the first control signal C ₁ into a disabled state and the second counter control signal C ₂ into an enabling state, so that the counter 221 is switched The sub-number function and the counting signals A, B, C, and D are all enabled, that is, represent the binary value 1111. After being decoded by the decoder 222, the output address signal A ₁₆ is enabled, and the remaining address signals are A _{1 -} A ₁₅ are all disabled, so the inkjet heating element 21 corresponding to the address signal A ₁₆ will be selected; when the time is in the time interval of T ₂ , since the counter 221 is still in the lower number function, the counter 221 will make The binary values formed by the counting signals A, B, C and D are decremented, so that the counting signals B, C and D are in the enabled state, and the counting signal A is in the disabled state, that is, the binary value is 1110, which is decoded. After the decoder 222 decodes, the output address signal A ₁₅ is enabled, and the remaining address signals A ₁ -A ₁₄ and A ₁₆ are disabled, so the inkjet heating element 21 corresponding to the address signal A ₁₅ will be selected. Similarly, as shown in Table 1, when the time is at T ₃ -T ₁₅ The interval 222 will select the corresponding address signal A ₁₄ -A _{2 according to} the binary signals represented by the counting signals A, B, C and D output by the counter 221 and the counting signals A, B, C and D. The ink heating element 21 will not be described herein.
Of course, when the time in the time interval T _16, the decoder 222 will select the corresponding address signal A ₁ of the ink jet heating element 21, however, then the output count signals A, B, C and D are in the disabled state, which represents the binary value 0000, so that the first control signal C ₁ count into the count enabled state and the second control signal C ₂ into a disable state, so that the counter 221 and the number of switching-oriented functions. During the time interval T ₁₇ -T ₃₁ , the counter 221 will increment the binary values formed by the counting signals A, B, C and D, and enable the enabling or disabling states of the counting signals A, B, C and D. The time interval T ₁₅ -T ₁ is the same, that is, the same binary value, and the inkjet heating element 21 of the same corresponding address signal A ₂ -A ₁₆ is selected, the principle is the same as the aforementioned decrement, only the reverse operation , will not repeat them here. In this embodiment, it can be seen that, through the inkjet signal generating circuit 22 of the present invention, the inkjet wafer 2 only needs to be electrically connected to the three contacts of the printing device 3, and uses the three contacts to transmit the first count. control signal C _-1, C ₂ second counting control signal and the pulse signal C _LK, sixteen to control the ink jet heating elements 21.
Table 1. Time, counter output count signal and decoder output address signal correspondence table

In summary, the inkjet chip of the present invention mainly causes the counter of the inkjet signal generating circuit to generate a counting signal according to the received counting control signal and the pulse signal, and receives and decodes the counting signal by the decoder to generate an address. The signal, and then the corresponding inkjet heating element is selected according to the address signal, so as to achieve the most control of the inkjet component with the least control contact, thereby reducing the cost and reducing the volume thereof, thereby reducing the effect of the inkjet volume, which is a An invention with industrial value, 提出 apply in accordance with the law.
The present invention has been described in detail by the above-described embodiments, and may be modified by those skilled in the art, without departing from the scope of the appended claims.

1‧‧‧ inkjet components

11‧‧‧resistance

12‧‧‧Gold oxygen half-field effect transistor

13‧‧‧Control contacts

2‧‧‧Inkjet wafer

21‧‧‧Inkjet heating elements

22‧‧‧Inkjet signal generation circuit

221‧‧‧ counter

2211‧‧‧JK flip-flop

2212‧‧‧ and logic gate

2213‧‧‧ or logic gate

222‧‧‧Decoder

3‧‧‧Printing equipment

C _LR ‧‧‧ pulse signal

C _T , C ₁ , C ₂ ‧‧‧ count control signals

A, B, C, D, , , , ‧‧‧Counting signal

A _n , A ₁ , A ₂ , A ₃ , A ₄ , A ₅ , A ₆ , A ₇ , A ₈ , A ₉ , A ₁₀ , A ₁₁ , A ₁₂ , A ₁₃ , A ₁₄ , A ₁₅ , A ₁₆ ‧‧‧ address signal

A _X ‧‧‧Other address signals

P‧‧‧Image data

T, T ₁ , T ₂ , T ₃ , T ₄ , T ₅ , T ₆ , T ₇ , T ₈ , T ₉ , T ₁₀ , T ₁₁ , T ₁₂ , T ₁₃ , T ₁₄ , T ₁₅ , T ₁₆ , T ₁₇ , T ₁₈ , T ₁₉ , T ₂₀ , T ₂₁ , T ₂₂ , T ₂₃ , T ₂₄ , T ₂₅ , T ₂₆ , T ₂₇ , T ₂₈ , T ₂₉ , T ₃₀ , T ₃₁ ‧ ‧ ‧

First figure: It is a schematic circuit diagram of a conventional inkjet element.

Second: It is a block diagram of the circuit of the inkjet wafer and printing device of the preferred embodiment of the present invention.

The third figure is a circuit block diagram of the inkjet signal generating circuit shown in the second figure of the present invention.

Figure 4: This is the circuit diagram of the counter shown in the third figure of this case.

Figure 5: This is the circuit diagram of the decoder shown in the third figure of this case.

Figure 6 is a signal-time map of the preferred embodiment of the present invention.

2‧‧‧Inkjet wafer

21‧‧‧Inkjet heating elements

22‧‧‧Inkjet signal generation circuit

3‧‧‧Printing equipment

C _T ‧‧‧Counting Control Signal

CL _K ‧‧‧ pulse signal

P‧‧‧Image data

Claims (8)

An inkjet wafer suitable for use in a printing apparatus, comprising at least:
a plurality of inkjet heating elements; and an inkjet signal generating circuit comprising at least:
a counter electrically connected to the printing device to receive a counting control signal and a pulse signal of the output of the printing device, and generating a plurality of counting signals according to the counting control signal and the pulse signal; and The decoder is electrically connected to the counter to receive and decode the plurality of counting signals to generate a plurality of address signals, and select the corresponding inkjet heating elements according to the plurality of address signals. The inkjet chip of claim 1, wherein the counter is an up/down counter having an upper number function and a lower number function, and is switched to the enable or disable state of the control signal. Any of the upper number function and the lower number function. The inkjet wafer of claim 2, wherein the upper function is counted in an incremental manner and the lower function is counted in a decreasing manner. The inkjet chip of claim 2, wherein the counting control signal comprises a first counting control signal and a second counting control signal. The inkjet wafer of claim 4, wherein the counter switches to the upper function when the first count control signal is enabled and the second count control signal is disabled. When the first count control signal is disabled and the second count control signal is enabled, the function is switched to the lower number function. The inkjet wafer of claim 1, wherein the counter comprises a JK flip-flop, a D-reactor, a T-reactor, an RS flip-flop or a group thereof. The inkjet wafer of claim 6, wherein the counter further comprises a logic gate, or a logic gate, an inverse logic gate, a reverse logic gate, an inverse logic gate, a mutual exclusion or a logic gate, and an anti-mutation Or logic gates or groups of them. The inkjet wafer of claim 1, wherein the decoder comprises a logic gate, or a logic gate, an inverse logic gate, a reverse logic gate, an inverse logic gate, a mutual exclusion or a logic gate, and an inverse mutual A repulsion or a logic gate or a group of them.