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TWI394255B - Semiconductor device having a trench wire for limiting solder capillary phenomenon - Google Patents

Semiconductor device having a trench wire for limiting solder capillary phenomenon Download PDF

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Publication number
TWI394255B
TWI394255B TW097139408A TW97139408A TWI394255B TW I394255 B TWI394255 B TW I394255B TW 097139408 A TW097139408 A TW 097139408A TW 97139408 A TW97139408 A TW 97139408A TW I394255 B TWI394255 B TW I394255B
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trench
segment
segments
width
groove
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TW097139408A
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TW201015685A (en
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提坎普 約翰
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德州儀器公司
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    • H10W72/536
    • H10W72/5363
    • H10W90/756

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  • Lead Frames For Integrated Circuits (AREA)

Description

具有用以局限焊料毛細現象之溝槽式導線的半導體裝置Semiconductor device having a trench wire for limiting solder capillary phenomenon

本發明大體上係關於半導體裝置領域及製程,且更具體言之,係關於具有導線之表面安裝裝置,該等導線具有用以局限焊料毛細現象之溝槽。SUMMARY OF THE INVENTION The present invention generally relates to the field of semiconductor devices and processes, and more particularly to surface mount devices having wires having trenches for limiting solder capillary phenomena.

半導體裝置之導線框架提供一穩定的支撐墊以將半導體晶片,通常係一積體電路(IC)晶片穩固地定位於一封裝中。從薄(約100至250μm)金屬片製造單件導線框架已係普通實務。因便於製造之原因,共同所選的起初金屬為銅、銅合金、鐵鎳合金(例如所謂的「合金42」)及鋁。該導線框架之所期望形狀係壓印或蝕刻自原始片。The leadframe of the semiconductor device provides a stable support pad to securely position the semiconductor wafer, typically an integrated circuit (IC) wafer, in a package. It is a common practice to manufacture a single piece lead frame from a thin (about 100 to 250 μm) piece of metal. For reasons of ease of manufacture, the initially selected metals are copper, copper alloys, iron-nickel alloys (such as the so-called "alloy 42") and aluminum. The desired shape of the lead frame is stamped or etched from the original sheet.

除該晶片墊外,該導線框架提供複數個導電段以使各種導電體緊密接近該晶片。該等段之內端與該IC表面上的接觸墊之間的剩餘間隙係藉由連接器橋接,通常係將諸如金之薄金屬線個別地接合至該等IC接觸墊及該等導線框架段。In addition to the wafer pad, the leadframe provides a plurality of conductive segments to bring various electrical conductors in close proximity to the wafer. The remaining gap between the inner end of the segments and the contact pads on the surface of the IC is bridged by a connector, typically a thin metal wire such as gold is individually bonded to the IC contact pads and the lead frame segments .

遠離於該IC晶片(「外」端)之該等導線段之端部需要被電氣及機械地連接至諸如印刷電路板之外部電路。此附接通常係藉由習知地使用一鉛/錫合金焊料在高於200℃的回流溫度下焊接予以執行。因此,該外段端部之表面需要具有一適於至外部部件之回流附接之冶金組態。The ends of the wire segments that are remote from the IC chip ("outer" end) need to be electrically and mechanically connected to an external circuit such as a printed circuit board. This attachment is typically performed by conventional soldering using a lead/tin alloy solder at a reflow temperature above 200 °C. Therefore, the surface of the end of the outer section needs to have a metallurgical configuration suitable for reflow attachment to external components.

當由於環境因素,必須使用無鉛焊料時,近來已出現裝配困難,因為此等焊料通常呈現焊料毛細現象問題。當毛細現象出現時,該焊料之大部分,有時幾乎係所有焊料,被表面張力從該焊料區域牽拉至未包括於裝置附接中之導線部分。裝置之上板附接(board attachment)可能因此變得控制不良且不可靠。When lead-free solder must be used due to environmental factors, assembly difficulties have recently appeared, because such solders generally present a problem of solder capillary phenomenon. When a capillary phenomenon occurs, most of the solder, sometimes almost all of the solder, is pulled from the solder area by surface tension to portions of the wire that are not included in the attachment of the device. The board attachment of the device may thus become poorly controlled and unreliable.

最近的其他技術動向已使該裝置附接製程益趨惡化。舉例而言,封裝尺寸及導線長度縮減,提供用於焊料附接之較小表面。接著,使用無鉛焊料之需要將該回流溫度範圍推動為鄰近約260℃,使其更加難以抑制焊料毛細現象。Recent other technology trends have made the device attachment process worse. For example, package size and wire length are reduced to provide a smaller surface for solder attachment. Next, the need to use lead-free solder pushes the reflow temperature range to approximately 260 ° C, making it more difficult to suppress solder capillarity.

此外,市場壓力推動導線框架之成本降低,且因此強調減少用於該導線框架之任何昂貴金屬。對於可能常用於導線框架之任何貴金屬例如金或鈀之量尤係如此。此成本降低可能對該毛細現象問題具有另一有害影響。In addition, market pressures drive the cost reduction of wireframes and therefore emphasize the reduction of any expensive metals used in the wireframe. This is especially true for any precious metal such as gold or palladium that may be commonly used in wireframes. This cost reduction may have another detrimental effect on the capillary phenomenon problem.

申請人認識到需要一種製造具有導線框架結構之表面安裝裝置從而避免任何焊料及任何導線框架材料之焊料毛細現象之風險之低成本但可靠的方法。此外,該方法需要適用於早已處在整修及形成之最終裝配階段的該等裝置,並且適用於仍具有採用具內建防範之導線框架之選項以首先消除毛細現象之威脅之新裝置。當該導線框架及其製造方法為足夠靈活以被應用於不同的半導體產品族及一廣泛的設計及裝配變更範圍,並實現對改良製程良率及裝置可靠性之目的之改良時,具有技術優點。Applicants have recognized a need for a low cost, yet reliable method of fabricating a surface mount device having a leadframe structure to avoid the risk of solder bristle of any solder and any leadframe material. In addition, the method needs to be suitable for such devices that are already in the final assembly stage of refurbishment and formation, and is suitable for new devices that still have the option of using built-in precautioned wire frames to first eliminate the threat of capillary phenomena. Technical advantages when the lead frame and its method of manufacture are flexible enough to be applied to different semiconductor product families and a wide range of design and assembly changes, and to improve the process yield and device reliability .

申請人在提高的溫度下進行一對表面安裝裝置之導線的焊接製程的機械及冶金研究。當液態焊料呈現毛細現象時,基於表面張力,其係藉由毛細管力沿著固態表面下方受到牽拉。申請人意識到提起焊料之工作繼續直至該表面獲得的能量與藉由對抗地心引力來提起焊料質量所需之能量而達到平衡為止。當達到此平衡時,便不具額外的能量來向上牽拉焊料且該毛細現象停止發展。申請人發現可減緩並且停止焊料毛細現象,當焊料呈毛細現象爬上該等導線時,該液態焊料之質量藉由將焊料收集於類似洞穴之陷阱中而局部聚積直至該焊料行為藉由降低溫度及凝固該焊料而完全停止為止。The applicant performs mechanical and metallurgical studies of the welding process of the wires of a pair of surface mount devices at elevated temperatures. When the liquid solder exhibits a capillary phenomenon, it is pulled under the solid surface by capillary force based on the surface tension. Applicant recognizes that the work of lifting the solder continues until the energy obtained by the surface is balanced with the energy required to lift the quality of the solder against gravity. When this balance is reached, there is no additional energy to pull the solder up and the capillary phenomenon ceases to develop. Applicants have discovered that the solder capillary phenomenon can be slowed down and stopped. When the solder creeps up the wires, the quality of the liquid solder is locally accumulated by collecting the solder in a cavity-like trap until the solder acts by lowering the temperature. And the solder is solidified and completely stopped.

本發明之一實施例為一具有一導線框架之封裝的表面安裝半導體裝置,其具有未經該封裝密封之該等導線之外段。該等外段具有一寬度及一長度;便於考慮將該長度構造成五個鄰接部分。該第一部分從該密封近乎水平凸出。該第二部分形成一向下的凸起彎曲。該第三部分向下為近似筆直。該第四部分形成一向上的凹入彎曲。該第五部分為水平筆直。One embodiment of the present invention is a surface mount semiconductor device having a package of lead frames having outer portions of the wires that are not sealed by the package. The outer segments have a width and a length; it is convenient to consider constructing the length into five abutting portions. The first portion projects approximately horizontally from the seal. The second portion forms a downward convex curvature. The third part is approximately straight down. The fourth portion forms an upward concave curve. The fifth part is horizontal and straight.

在本發明之該實施例中,具有一橫跨該寬度之第一溝槽於各段之該第三部分中;此溝槽可位於該底部段表面上,或其可位於該頂部段表面上。在任一情形下,該溝槽較佳係該第一導線部分之該底部表面垂直上方之約2個導線框架的厚度。In this embodiment of the invention, there is a first groove spanning the width in the third portion of each segment; the groove may be located on the surface of the bottom segment, or it may be located on the surface of the top segment . In either case, the trench is preferably a thickness of about two wire frames vertically above the bottom surface of the first wire portion.

該溝槽可具有一具一介於約5與50μm之間的深度之角形輪廓,較佳藉由壓印製成,或其可具有一具有介於約50至125μm之間的深度之近似半圓形的輪廓,較佳藉由蝕刻製成。除該第一溝槽外,一第二溝槽可位於該第二段部分;對於一些裝置,一第三溝槽可位於從第三段部分至第四段部分之過渡區域。The trench may have an angular profile having a depth of between about 5 and 50 μm, preferably by embossing, or it may have an approximate semicircle having a depth of between about 50 and 125 μm. The contour of the shape is preferably made by etching. In addition to the first trench, a second trench can be located in the second segment portion; for some devices, a third trench can be located in the transition region from the third segment portion to the fourth segment portion.

本發明之其他實施例為製造一半導體裝置之方法,其等係藉由在該等導線中產生該等溝槽所採用的技術加以區分。該等溝槽可被壓印或可被蝕刻。對於藉由壓印而產生該等溝槽而言,該方法先提供一金屬導線框架,該導線框架具有一頂部表面與一底部表面、一厚度,及內段與外段。該等外段經組態作為具有一寬度及一長度之導線;其等係藉由屏障桿(dambar)互連。接著,將一半導體晶片裝配在該等內段上,且將該晶片及該等內段圍封在塑膠密封中,保留該等導線為未受圍封。Other embodiments of the present invention are methods of fabricating a semiconductor device that are distinguished by the techniques employed to create the trenches in the wires. The trenches can be stamped or etched. For the creation of such trenches by imprinting, the method first provides a metal leadframe having a top surface and a bottom surface, a thickness, and inner and outer sections. The outer segments are configured as wires having a width and a length; they are interconnected by a barrier. Next, a semiconductor wafer is mounted on the inner segments, and the wafer and the inner segments are enclosed in a plastic seal, leaving the wires unenclosed.

接著,移除該等屏障桿,且橫跨各導線之寬度壓印該等第一溝槽進入該等導線之底部表面或頂部表面。該壓印係與該等屏障桿之移除同時執行或接續該等屏障桿之移除而執行。該等溝槽之輪廓為具有一介於約5與50μm之間的深度之一近似角形。接著,該等導線之長度被形成為五個鄰接部分;一第一部分,其從該密封近乎水平凸出;一第二部分,其形成一向下的凸起彎曲;一第三部分,其向下為近似筆直,其中該第三部分包含該溝槽;一第四部分,其形成一向上的凹入彎曲;及一第五部分,其為水平筆直。該溝槽係定位為於該第五部分之該底部表面垂直上方之約2個導線框架的厚度。The barrier bars are then removed and the first trenches are embossed across the width of the wires into the bottom or top surface of the wires. The embossing is performed simultaneously with the removal of the barrier bars or subsequent removal of the barrier bars. The contours of the grooves have an approximate angular shape with a depth of between about 5 and 50 μm. Then, the length of the wires is formed as five abutting portions; a first portion that protrudes substantially horizontally from the seal; a second portion that forms a downward convex curvature; and a third portion that is downwardly Is approximately straight, wherein the third portion includes the groove; a fourth portion that forms an upward concave curvature; and a fifth portion that is horizontally straight. The trench is positioned to a thickness of about two wire frames vertically above the bottom surface of the fifth portion.

對於藉由蝕刻而產生該等溝槽而言,該方法先提供一具有一頂部表面與一底部表面及一厚度之金屬導線框架,接著形成內段及外段,其中該等外段經組態作為具有一寬度及一長度之導線,且係藉由屏障桿互連。接著,橫跨各導線之寬度蝕刻一第一溝槽,較佳為具有半圓形輪廓且深度介於50與225μm之間。該溝槽可經蝕刻進入該導線框架之底部表面或頂部表面。For the creation of the trenches by etching, the method first provides a metal lead frame having a top surface and a bottom surface and a thickness, and then forming an inner segment and an outer segment, wherein the outer segments are configured As a wire having a width and a length, and interconnected by a barrier bar. Next, a first trench is etched across the width of each of the wires, preferably having a semi-circular profile and a depth between 50 and 225 μm. The trench can be etched into the bottom or top surface of the leadframe.

將一半導體晶片裝配在該等內段上,且將該晶片與該等內段圍封在塑膠密封中,保留該等導線為未受圍封。將屏障桿移除且將該等導線之長度形成為五個鄰接部分:一第一部分,其從該密封近乎水平凸出;一第二部分,其形成一向下的凸起彎曲;一第三部分,其向下為近似筆直,其中該第三部分包含該溝槽;一第四部分,其形成一向上的凹入彎曲;及一第五部分,其為水平筆直。該凹槽係定位為於該第五部分之該底部表面垂直方向之約2個導線框架的厚度。A semiconductor wafer is mounted on the inner segments and the wafer and the inner segments are enclosed in a plastic seal, leaving the wires unenclosed. Removing the barrier rod and forming the length of the wires into five abutting portions: a first portion that protrudes substantially horizontally from the seal; a second portion that forms a downward convex curve; a third portion The downward direction is approximately straight, wherein the third portion includes the groove; a fourth portion that forms an upward concave curvature; and a fifth portion that is horizontally straight. The groove is positioned to a thickness of about two wire frames in a direction perpendicular to the bottom surface of the fifth portion.

當結合附圖考慮以下對本發明之例示性實施例之描述時,藉由本發明之特定實施例代表之技術發展將變得顯而易見。The development of the technology represented by the specific embodiments of the present invention will become apparent when the following description of the exemplary embodiments of the invention is considered.

圖1顯示本發明之一例示性實施例。其描述一般指定為100之半導體裝置之一部分,該裝置屬於表面安裝產品族。此等裝置具有具凸出金屬段101之絕緣封裝120,該等凸出金屬段101為外部封裝120,且因此被稱為外段101。該等外段被成形且使用焊料110而被形成為附接至一基板或板190之表面;圖1所示之形狀一般被稱為「鷗翼(gull-wing)」形狀。在將一表面安裝裝置以焊料焊接至該基板後,易於視覺檢查所有的焊料回流位址以確定無缺陷附接及接觸-這係表面安裝裝置在半導體行業中為何如此受歡迎之一個主要原因。Figure 1 shows an exemplary embodiment of the invention. It describes a portion of a semiconductor device generally designated 100, which belongs to the family of surface mount products. These devices have an insulative package 120 having a raised metal segment 101 that is an outer package 120 and is therefore referred to as an outer segment 101. The outer segments are shaped and formed to attach to the surface of a substrate or plate 190 using solder 110; the shape shown in Figure 1 is generally referred to as a "gull-wing" shape. After soldering a surface mount device to the substrate, it is easy to visually inspect all solder reflow addresses to determine defect free attachment and contact - a major reason why surface mount devices are so popular in the semiconductor industry.

裝置100之金屬部件包含用於將半導體晶片103、金屬外段101及金屬段104穩定地定位於該封裝120(「內」段)內之墊102。內段104及外段101為裝置100之該等導線之部分,且用於使電源、接地及信號緊密接近該等晶片。該等內段104之頂端與該晶片表面上之該等接觸墊105之間的剩餘間隙通常係藉由個別焊接至該等晶片接觸墊與該等導線框架內段之薄線106予以橋接。因此,晶片103係藉由焊線106電氣連接至該等內段104。在裝置裝配程序之初,墊102與段101及104係藉由一金屬框架(未顯示於圖1中)保持在一起,且因此通常稱為原始裝置「導線框架」之部件。此外,在該裝配程序之初,該等段係藉由金屬軌而機械穩定,該等段係如此定位以致其亦可用作抵擋任何塑膠材料被模製製程中所採用的高壓偶然擠出之屏障;因此,此等軌被稱為「屏障桿」。The metal component of device 100 includes pad 102 for stably positioning semiconductor wafer 103, metal outer segment 101, and metal segment 104 within package 120 ("inner" segment). The inner section 104 and the outer section 101 are part of the wires of the device 100 and are used to bring the power, ground and signals into close proximity to the wafers. The remaining gap between the top end of the inner segments 104 and the contact pads 105 on the surface of the wafer is typically bridged by thin wires 106 that are individually soldered to the wafer contact pads and the inner segments of the lead frames. Thus, wafer 103 is electrically connected to the inner segments 104 by bond wires 106. At the beginning of the assembly process, pad 102 and segments 101 and 104 are held together by a metal frame (not shown in Figure 1) and are therefore commonly referred to as components of the original device "wire frame." Moreover, at the beginning of the assembly process, the segments are mechanically stabilized by metal rails that are positioned such that they can also be used to resist any high pressure accidental extrusion of any plastic material used in the molding process. Barriers; therefore, these tracks are called "barrier bars."

因簡易及成本效益製造之原因,從諸如銅、銅的合金、鋁及鐵/鎳合金之薄的平坦金屬片製造單件導線框架已係普通實務。該片之厚度107且因此該等段101及104之通常範圍係介於約100至250μm之間。該導線框架片且因此包含外段101之該等導線具有一頂部表面101a及一底部表面101b。該總的導線框架之所需形狀係蝕刻或壓印自此原始片。以此方式,一包含導線框架之外段之個別導線採用一薄、平坦的長型金屬條形式,該金屬條具有其由設計決定的特定長度及寬度。在圖1之實施例中,裝置100之外段之寬度為相等且被指定為108。寬度108之尺寸可視中心間的段節距而發生很大變化。在各種裝置類型間,該節距可在約1.27至0.15mm內變化。For simple and cost-effective manufacturing, it is common practice to fabricate a single piece of wire frame from a thin flat sheet of metal such as copper, copper, aluminum, and iron/nickel alloy. The thickness of the sheet 107 and thus the normal range of the segments 101 and 104 is between about 100 and 250 μm. The wire frame sheets, and thus the wires comprising the outer segment 101, have a top surface 101a and a bottom surface 101b. The desired shape of the overall leadframe is etched or stamped from this original sheet. In this manner, an individual wire comprising an outer segment of the leadframe is in the form of a thin, flat elongated strip of metal having a particular length and width as determined by design. In the embodiment of FIG. 1, the width of the outer segments of device 100 are equal and designated as 108. The size of the width 108 varies greatly depending on the segment pitch between the centers. The pitch can vary from about 1.27 to 0.15 mm between various device types.

在將該晶片裝配在該導線框架上後,該等所裝配部件較佳係藉由一塑膠模製技術予以密封(「封裝」),結果,圖1顯示,晶片103及內段104被圍封在封裝120中,同時該等外段101仍未受密封。在下一製程步驟中,將該等導線框架保持在一起之金屬框架(未顯示於圖1中)被機械地移除(「修整」)。同時,機械地切除該等段之間的屏障桿(未顯示於圖1中)。在圖1中,在屏障桿原始互連兩個鄰近段處之位置係藉由交叉影線130標記。After the wafer is mounted on the lead frame, the assembled components are preferably sealed ("packaged") by a plastic molding technique. As a result, Figure 1 shows that the wafer 103 and the inner segment 104 are enclosed. In the package 120, the outer segments 101 are still unsealed at the same time. In the next process step, the metal frame (not shown in Figure 1) holding the wire frames together is mechanically removed ("trimming"). At the same time, the barrier bars between the segments are mechanically removed (not shown in Figure 1). In Figure 1, the position at the two adjacent segments of the barrier bar original interconnect is marked by cross hatch 130.

在修整製程後,但較佳在相同機器中,執行一「形成」製程,其中該裝置之外段長度被壓成一特定形狀使得該等外段可用作該裝置之電導線且將該裝置互連至外部部件。圖1顯示根據本發明之形成製程之結果,其將該等外段之長度構造成五個鄰接部分。After the trimming process, but preferably in the same machine, a "forming" process is performed in which the length of the outer segment of the device is pressed into a particular shape such that the outer segments can be used as electrical conductors for the device and the device is Connect to external parts. Figure 1 shows the results of a forming process in accordance with the present invention which constructs the length of the outer segments into five contiguous portions.

指定為141之該第一部分從該密封120近乎水平凸出並且延伸至該屏障桿所處之位置。部分141之長度可在約50至370μm內變化。在該第二部分142中,該段形成一向下的凸起彎曲;該第二部分較佳具有一介於約250與1250μm之間的長度。The first portion designated 141 protrudes approximately horizontally from the seal 120 and extends to a position where the barrier bar is located. The length of portion 141 can vary from about 50 to 370 [mu]m. In the second portion 142, the segment forms a downward convex curvature; the second portion preferably has a length of between about 250 and 1250 μm.

該第三部分143為近似筆直且係向下定向。該部分長度可發生很大變化,因為其主要決定封裝120與該附接基板之距離。對於許多裝置,部分143之長度係介於約250與1250μm之間或超過其。該第四部分144形成一向上的凹入彎曲。其較部分142更為彎曲;其較佳長度係介於約250與1000μm之間。該第五部分145為水平筆直;其長度可發生很大變化,但較佳係在約500至1500μm之範圍內。The third portion 143 is approximately straight and oriented downward. The length of the portion can vary widely as it primarily determines the distance of the package 120 from the attached substrate. For many devices, the length of portion 143 is between about 250 and 1250 μm or exceeds it. The fourth portion 144 forms an upward concave curve. It is more curved than portion 142; its preferred length is between about 250 and 1000 μm. The fifth portion 145 is horizontally straight; its length can vary widely, but is preferably in the range of about 500 to 1500 μm.

段101之部分145及144原被包括在裝置100至基板190之焊料附接中。為了有助於焊料110之流動,較佳的係以一金屬層提供於部分145及144之至少表面101b上,該金屬層對錫底焊料具有親合力。較佳的金屬層包含隨後加上一外部鈀層之鎳,或隨後加上一外部金層之鎳。Portions 145 and 144 of segment 101 were originally included in the solder attachment of device 100 to substrate 190. In order to facilitate the flow of the solder 110, a metal layer is preferably provided on at least the surface 101b of the portions 145 and 144 which have an affinity for the tin-solder solder. The preferred metal layer comprises nickel followed by an external palladium layer or a nickel of an external gold layer.

另一方面,當段部分143且尤其段142及141係受焊料覆蓋時,可發現焊料毛細現象之有害影響。焊料從部分145及144被牽拉走,使得需要將其用於附接之處缺失焊料;其沿接近封裝120之該等部分積聚,其在此處完全無用。On the other hand, when the segment portion 143 and especially the segments 142 and 141 are covered by solder, the detrimental effect of the solder capillary phenomenon can be found. The solder is pulled away from portions 145 and 144 such that it needs to be used to attach solder where it is missing; it accumulates near the portions of package 120, which is completely useless here.

在開始焊接製程不久後,與液態焊料一起使用之助焊劑(flux)使一薄膜沿一導線段之表面形成,濕潤該段表面。在該毛細現象過程中,需要能量以對抗地心引力向上牽拉一定量之焊料(通常基於具有一7.3g‧cm-3 密度之錫),同時表面能量係藉由消耗濕潤表面之助焊劑膜之一部分而釋放。在該過程初期,所釋放能量占主導地位;然而,隨著對焊料向上之進行,提起該積聚的焊料質量所需的能量接近該釋放能量,最終達到相等量。本發明之段溝槽用作聚積所需焊料質量之位置以勝過該毛細現象過程。在許多裝配應用中,該焊料保持液態之時間間隔為短暫,使得在溫度再次下降及焊料凝固之前,由該等溝槽導致的毛細現象過程之減慢已足以抑制任何有害毛細現象的作用。Shortly after the start of the soldering process, a flux used with the liquid solder forms a film along the surface of a wire segment that wets the surface of the segment. During this capillary phenomenon, energy is required to pull a certain amount of solder against the gravity (usually based on tin having a density of 7.3 g ‧ cm -3 ) while the surface energy is consumed by the flux film consuming the wet surface Released as part of it. At the beginning of the process, the released energy predominates; however, as the solder progresses upward, the energy required to lift the accumulated solder mass is close to the released energy, eventually reaching an equal amount. The segment trenches of the present invention serve to accumulate the location of the desired solder mass to outperform the capillary phenomenon process. In many assembly applications, the solder is kept in a liquid state for a short period of time such that the slowing down of the capillary phenomenon caused by the grooves is sufficient to suppress any detrimental capillary phenomenon before the temperature drops again and the solder solidifies.

為避免焊料毛細現象,圖1顯示具有橫跨該段寬度108之至少一溝槽之各導線101。類似地,在圖2之實施例中,各導線101具有橫跨段寬度108之至少一溝槽。在圖1中,第一溝槽151a係位於該第三段部分143中;該位置之更具體特徵在於該溝槽中心線。溝槽151a具有一深度及一輪廓;在圖1中,溝槽151a之深度係自底部表面101b延伸進入該段金屬。類似地,在圖2中,第一溝槽151b係位於該第三段部分143中;該位置之更具體特徵在於溝槽中心線。溝槽151b具有一深度及一輪廓,其中該深度係自頂部表面101a延伸進入該段金屬。To avoid solder capillary phenomenon, Figure 1 shows conductors 101 having at least one trench across the width 108 of the segment. Similarly, in the embodiment of FIG. 2, each of the wires 101 has at least one groove that spans the width 108 of the segment. In FIG. 1, a first trench 151a is located in the third segment portion 143; a more specific feature of the location is the trench centerline. The trench 151a has a depth and a profile; in Figure 1, the depth of the trench 151a extends from the bottom surface 101b into the segment of metal. Similarly, in Figure 2, a first trench 151b is located in the third segment portion 143; a more specific feature of this location is the trench centerline. The groove 151b has a depth and a profile, wherein the depth extends from the top surface 101a into the segment of metal.

溝槽151a及151b之中心線延伸橫跨寬度108,該中心線與該等段邊緣垂直。較佳的係該溝槽中心線位於該第五段部分145之該底部表面101b垂直上方之約2個導線框架厚度107處。此位置具有圖1及2中之一距離109。The centerlines of the grooves 151a and 151b extend across a width 108 that is perpendicular to the edges of the segments. Preferably, the groove centerline is located at about two wire frame thicknesses 107 vertically above the bottom surface 101b of the fifth segment portion 145. This position has a distance 109 from one of Figures 1 and 2.

該等溝槽之深度取決於用於產生該等溝槽之方法(參見下文);各方法產生該等溝槽之一特徵輪廓。當該等溝槽係藉由壓印而產生,如較佳係在封裝整修-形成操作中完成時,其具有一近似角形的輪廓。此輪廓之更詳細情形被描述於圖3中。在一角形輪廓之情形下,較佳深度為介於約5與50μm之間,較佳為小於段厚度107的一半。The depth of the grooves depends on the method used to create the grooves (see below); each method produces a characteristic profile of the grooves. When the grooves are created by embossing, as is preferred in the package refurbishing-forming operation, they have an approximately angular profile. A more detailed description of this profile is depicted in Figure 3. In the case of an angular profile, the preferred depth is between about 5 and 50 μm, preferably less than half of the segment thickness 107.

另一方面,當該等溝槽係藉由一蝕刻而產生,如通常係在製造該導線框架之製程中完成時,其具有一近似半圓形的輪廓。此輪廓之更詳細情形被描述於圖4中。在此情形下,較佳的溝槽深度係介於約50與125μm之間,約段厚度107的一半。On the other hand, when the trenches are produced by an etch, as is typically done in the fabrication of the leadframe, it has an approximately semi-circular profile. A more detailed description of this profile is depicted in Figure 4. In this case, the preferred groove depth is between about 50 and 125 [mu]m, about half the thickness of the segment 107.

應指出,在圖2中,焊料111係不僅濕潤段部分144及145之底部表面101b,而且濕潤該頂部表面101a。因此焊料111可藉由從頂部表面101a延伸進入該段金屬之該等溝槽而有效停止。It should be noted that in Fig. 2, the solder 111 not only wets the bottom surface 101b of the segment portions 144 and 145 but also wets the top surface 101a. Thus solder 111 can be effectively stopped by extending from top surface 101a into the trenches of the segment of metal.

如圖1及2顯示,在許多裝置應用中,較佳的係在各段中具有一個以上溝槽以可靠地避免焊料毛細現象;可在無額外成本下製造此等額外溝槽。可慎重選擇該等額外溝槽之位置;作為一實例,在圖1中,一第二溝槽152a係位於該第二段部分142中,約在部分142之凸起彎曲之中間;如同溝槽151a,溝槽152a係製造在該外段之底部表面101b上。對照之下,在圖2中,該第二溝槽152b係製造於該外段之頂部表面101a上。可慎重選擇該第二溝槽之位置,圖2描述溝槽152b係位於該第二部分142中,約在部分142之凸起彎曲之中間。As shown in Figures 1 and 2, in many device applications, it is preferred to have more than one trench in each segment to reliably avoid solder capillary phenomena; such additional trenches can be fabricated without additional cost. The location of the additional trenches can be carefully selected; as an example, in Figure 1, a second trench 152a is located in the second segment portion 142, approximately in the middle of the convex curvature of portion 142; 151a, a groove 152a is formed on the bottom surface 101b of the outer segment. In contrast, in Figure 2, the second trench 152b is fabricated on the top surface 101a of the outer segment. The location of the second trench can be carefully selected. Figure 2 depicts trench 152b in the second portion 142 about midway between the convex curvature of portion 142.

作為一額外溝槽之另一實例,於圖1中之一第三溝槽153a係位於從該外部之第二部分至第三部分之過渡處;但應指出,該第三溝槽之位置係可變通的。如同溝槽151a,溝槽153a係製造在該外段之底部表面101b上。相反地,在圖2中,該第三溝槽153b係製造在該外段之頂部表面101a上。雖然該第三溝槽之位置係可變通的,但圖2描述位於從該外段之第二部分至第三部分之過渡處之溝槽153b。As another example of an additional trench, one of the third trenches 153a in FIG. 1 is located at a transition from the second portion to the third portion of the outer portion; however, it should be noted that the position of the third trench is Flexible. Like the groove 151a, the groove 153a is formed on the bottom surface 101b of the outer section. Conversely, in Figure 2, the third groove 153b is fabricated on the top surface 101a of the outer segment. Although the position of the third groove is flexible, Figure 2 depicts the groove 153b at the transition from the second portion to the third portion of the outer segment.

處在本發明之範圍內的係,可將複數個額外溝槽應用於該等外段,該等溝槽從該底部段表面延伸進入該金屬或從該頂部表面延伸進入該金屬。此外,該等額外溝槽之輪廓可為角形或半圓形。A system within the scope of the present invention can apply a plurality of additional grooves from the surface of the bottom segment into or out of the metal into the metal. Furthermore, the contours of the additional grooves may be angular or semi-circular.

圖3之示意橫截面圖重複圖1之溝槽位置及角形輪廓並且允許與圖4中之半圓形溝槽輪廓之對比。較佳的係在裝置製造之修整-形成封裝步驟中,藉由壓印相對較淺之輪廓而產生圖3之溝槽形狀。該等溝槽因此可被應用於早已存在、幾乎為已完成的產品中。相反地,圖4之該等溝槽形狀較佳係在導線框架製造之早先步驟中,藉由蝕刻相對較深之輪廓而產生。The schematic cross-sectional view of FIG. 3 repeats the groove position and angular profile of FIG. 1 and allows for comparison with the semi-circular groove profile of FIG. Preferably, the groove shape of Figure 3 is produced by embossing a relatively shallow profile during the trim-forming package step of device fabrication. These grooves can therefore be applied to products that are already present, almost completed. Conversely, the trench shapes of Figure 4 are preferably produced in an earlier step in the fabrication of the leadframe by etching a relatively deep profile.

為便於比較,圖3中之角形溝槽之位置與圖1中之角形溝槽之位置相同;亦已對圖3中之該等溝槽給定相應於圖1中之該等溝槽之指定。For ease of comparison, the positions of the angular grooves in FIG. 3 are the same as those of the angular grooves in FIG. 1; the grooves in FIG. 3 have also been assigned corresponding to the grooves in FIG. .

相反地,圖4中之該等半圓形溝槽係處於相應於圖1及3中之該等角形溝槽之位置,但已被給定不同的指定(161a、162a、163a),因為其等不僅具有不同的輪廓,而且係在該製造方法中之不同製程中加以製造(參見下文)。Conversely, the semi-circular grooves in Fig. 4 are at positions corresponding to the equiangular grooves in Figs. 1 and 3, but have been given different designations (161a, 162a, 163a) because of Etc. not only have different profiles, but are also manufactured in different processes in the manufacturing process (see below).

更詳言之,圖1、2及3顯示用於製造具有角形溝槽之半導體裝置之方法,從該底(頂)段表面出發,先提供一金屬導線框架條,該導線框架條具有一頂部表面與一底部表面、一厚度及複數個具有內段與外段之裝配位址。該等外段具有一寬度及一長度,且其等係藉由屏障桿互連。接著提供半導體晶片。More particularly, Figures 1, 2 and 3 illustrate a method for fabricating a semiconductor device having an angular trench from which a metal wire frame strip is provided, the leadframe strip having a top The surface and a bottom surface, a thickness and a plurality of assembly sites having inner and outer segments. The outer segments have a width and a length and are interconnected by a barrier bar. A semiconductor wafer is then provided.

將一半導體晶片裝配(例如,使用一黏合劑)在各裝配位址上並且將其連接至該等內段。接著將該等所裝配晶片及該等內段圍封在塑膠密封中,保留該等外段為未受圍封。接著從該條上使該等位址單一化(例如藉由鋸切)。A semiconductor wafer is assembled (e.g., using an adhesive) at each of the assembly sites and attached to the inner segments. The assembled wafers and the inner segments are then enclosed in a plastic seal, leaving the outer segments unenclosed. The addresses are then singulated from the strip (eg by sawing).

接著,在該導線框架整修機器中移除(藉由沖孔)該等屏障桿。此外,在此機器中,橫跨各導線之寬度壓印一第一溝槽。該壓印工具可使其凹痕進入該等段之底部表面,或進入頂部表面。該溝槽之壓印可與該屏障桿移除同時執行,或接續移除該屏障桿之步驟而執行。該溝槽具有一輪廓(對於該壓印技術較佳為角形)及一深度。對於壓印,該深度較佳為介於約5與50μm之間。此外,該溝槽具有一中心線;如下文所述,該中心線具有一相對該段之底部表面之較佳位置。The barrier bars are then removed (by punching) in the wireframe refurbishing machine. Further, in this machine, a first groove is embossed across the width of each of the wires. The embossing tool can have its indentations enter the bottom surface of the segments or into the top surface. The embossing of the groove can be performed simultaneously with the removal of the barrier bar, or the subsequent steps of removing the barrier bar. The trench has a profile (preferably angular for the imprint technique) and a depth. For embossing, the depth is preferably between about 5 and 50 μm. Additionally, the trench has a centerline; as described below, the centerline has a preferred location relative to the bottom surface of the segment.

在以下製程步驟中,在一形成機器中執行未密封段之形成。將該等外段之長度形成為五個鄰接部分:一第一部分,其從該密封近乎水平凸出;一第二部分,其係以一凸起彎曲向下彎曲;一第三部分,其經定向為向下近似筆直,並且包含溝槽(經壓印進入底段表面或進入該頂段表面);一第四部分,其形成一向上的凹入彎曲及進入一為水平筆直之第五部分之過渡。較佳的係該溝渠中心線位於該第五部分之該底部表面的垂直上方之約2個導線框架厚度。In the following process steps, the formation of an unsealed section is performed in a forming machine. Forming the length of the outer segments into five abutting portions: a first portion that protrudes substantially horizontally from the seal; a second portion that is bent downwardly with a convex bend; a third portion The orientation is approximately straight down and includes a groove (embossed into or into the surface of the top section); a fourth portion that forms an upwardly concave curve and enters a fifth portion that is horizontally straight The transition. Preferably, the centerline of the trench is about two wire frame thicknesses vertically above the bottom surface of the fifth portion.

除了該第一溝槽,相同流程允許製造一第二溝槽、一第三溝槽或更多的溝槽。舉例而言,壓印步驟可包含在該底部表面(或該頂部表面)上且橫跨該段寬度壓印一第二溝槽,其中該第二溝槽較佳係位於該外段之第二部分。此外,壓印步驟可進一步包含在該底部表面(或該頂部表面)上且橫跨該段寬度壓印一第三溝槽,其中該第三溝槽較佳係位於從該外段之該第二部分至該第三部分之過渡處。In addition to the first trench, the same process allows for the fabrication of a second trench, a third trench, or more trenches. For example, the embossing step can include embossing a second trench on the bottom surface (or the top surface) across the width of the segment, wherein the second trench is preferably located in the second portion of the outer segment section. In addition, the embossing step may further include imprinting a third trench on the bottom surface (or the top surface) across the width of the segment, wherein the third trench is preferably located from the outer segment The transition from the second part to the third part.

本發明之另一實施例係一種用於製造一具有半圓形溝槽之半導體裝置之方法,圖4顯示該方法,從該底段表面或頂段表面出發,先提供一具有一頂部表面與一底部表面及一厚度之金屬片。將一導線框架條形成為包含複數個具有導線之裝配位址,該等導線具有內段及外段。該等外段具有一寬度及一長度,且係藉由屏障桿互連。接著,橫跨各外段之寬度蝕刻一第一溝槽,較佳借助於一遮罩。可執行該蝕刻進入該金屬片之底部表面,或進入頂部表面。對於大多數導線框架金屬,該等溝槽具有一近似半圓形的輪廓,且較佳具有一介於約50與125μm之間的深度。該等溝槽進一步具有一中心線;如下文所述,該中心線具有一相對該等段之底部表面之較佳位置。Another embodiment of the present invention is a method for fabricating a semiconductor device having a semi-circular trench, and FIG. 4 shows the method for providing a top surface from the surface of the bottom segment or the surface of the top segment. a bottom surface and a sheet of metal. A wire frame strip is formed to include a plurality of assembly addresses having wires having inner and outer segments. The outer segments have a width and a length and are interconnected by a barrier bar. Next, a first trench is etched across the width of each outer segment, preferably by means of a mask. This etching can be performed into the bottom surface of the metal sheet or into the top surface. For most leadframe metals, the trenches have an approximately semi-circular profile and preferably have a depth of between about 50 and 125 [mu]m. The grooves further have a centerline; as will be described below, the centerline has a preferred location relative to the bottom surface of the segments.

接著提供半導體晶片。將一晶片裝配(例如,藉由使用一黏合劑)在各裝配位址上並且將其連接(例如藉由焊線)至該等內段。接著將該等所裝配晶片及該等內段圍封在塑膠密封中,保留該等外段未受圍封。接著從該條上將該等位址單一化。接著,在一整修機器中移除該等屏障桿,例如藉由沖孔。A semiconductor wafer is then provided. A wafer is assembled (e.g., by using an adhesive) at each of the assembly sites and joined (e.g., by wire bonding) to the inner segments. The assembled wafers and the inner segments are then enclosed in a plastic seal, leaving the outer segments unenclosed. The addresses are then singulated from the strip. The barrier bars are then removed in a refinishing machine, for example by punching.

在以下製程步驟中,在一形成機器中執行未密封段之形成。將該等外段之長度形成為五個鄰接部分:一第一部分,其從該密封近乎水平凸出;一第二部分,其係以一凸起彎曲向下彎曲;一第三部分,其經定向為向下近似筆直,並且包含溝槽(經蝕刻進入底段表面或進入該頂段表面);一第四部分,其形成一向上的凹入彎曲及進入一為水平筆直之第五部分之過渡。較佳的係該溝渠中心線位於該第五部分之該底部表面的垂直上方之約2個導線框架厚度。In the following process steps, the formation of an unsealed section is performed in a forming machine. Forming the length of the outer segments into five abutting portions: a first portion that protrudes substantially horizontally from the seal; a second portion that is bent downwardly with a convex bend; a third portion Oriented to be approximately straight down and include a groove (etched into or into the surface of the top segment); a fourth portion that forms an upward concave bend and enters a fifth portion that is horizontally straight transition. Preferably, the centerline of the trench is about two wire frame thicknesses vertically above the bottom surface of the fifth portion.

除了該第一溝槽,相同流程允許製造一第二溝槽、一第三溝槽或更多的溝槽。舉例而言,蝕刻步驟可包含在該底部表面(或該頂部表面)上且橫跨該段寬度蝕刻一第二溝槽,其中該第二溝槽較佳係位於該外段之第二部分。此外,蝕刻步驟可進一步包含在該底部表面(或該頂部表面)上且橫跨該段寬度蝕刻一第三溝槽,其中該第三溝槽較佳係位於從該外段之該第二部分至該第三部分之過渡處。In addition to the first trench, the same process allows for the fabrication of a second trench, a third trench, or more trenches. For example, the etching step can include etching a second trench over the bottom surface (or the top surface) across the width of the segment, wherein the second trench is preferably located in a second portion of the outer segment. In addition, the etching step may further include etching a third trench on the bottom surface (or the top surface) across the width of the segment, wherein the third trench is preferably located from the second portion of the outer segment To the transition of the third part.

本發明適用於使用任何類型的半導體晶片、分立電路或積體電路之產品,且該半導體晶片之材料可包括矽、鍺化矽、砷化鎵或任何其他用於積體電路製造中之半導體材料或化合物材料。代替一裝配於該密封內之單一晶片,該裝置可採用一晶片堆疊,且該裝配可採用覆晶技術。此外,該晶片裝配位址可係另一材料的金屬。The present invention is applicable to products using any type of semiconductor wafer, discrete circuit or integrated circuit, and the material of the semiconductor wafer may include germanium, antimony telluride, gallium arsenide or any other semiconductor material used in integrated circuit fabrication. Or compound material. Instead of a single wafer mounted within the seal, the device can employ a wafer stack and the assembly can employ flip chip technology. Additionally, the wafer assembly address can be metal of another material.

具有在具有所有或僅一些此等特徵或步驟之例示性實施例之背景下所描述之一或多個該等特徵或步驟之不同組合之實施例旨在涵蓋於本文中。熟習此項技術者將瞭解許多其他實施例及變更亦有可能係在本發明之範圍內。Embodiments having one or more of these various features or combinations of steps described in the context of an exemplary embodiment having all or only some such features or steps are intended to be encompassed herein. It will be apparent to those skilled in the art that many other embodiments and modifications are possible within the scope of the invention.

100...半導體裝置100. . . Semiconductor device

101...段101. . . segment

101a...頂部表面101a. . . Top surface

101b...底部表面101b. . . Bottom surface

102...墊102. . . pad

103...半導體晶片103. . . Semiconductor wafer

104...內段104. . . Inner section

105...接觸墊105. . . Contact pad

106...焊線106. . . Welding wire

107...厚度107. . . thickness

108...寬度108. . . width

109...距離109. . . distance

110...焊料110. . . solder

111...焊料111. . . solder

120...封裝120. . . Package

130...交叉影線130. . . Cross hatch

141...第一部分141. . . first part

142...第二部分142. . . the second part

143...第三部分143. . . the third part

144...第四部分144. . . fourth part

145...第五部分145. . . the fifth part

151a...第一溝槽151a. . . First groove

151b...第一溝槽151b. . . First groove

152a...第二溝槽152a. . . Second groove

152b...第二溝槽152b. . . Second groove

153a...第三溝槽153a. . . Third groove

153b...第三溝槽153b. . . Third groove

161a...溝槽161a. . . Trench

162a...溝槽162a. . . Trench

163a...溝槽163a. . . Trench

190...基板/板190. . . Substrate/board

圖1係一根據本發明之具有若干導線段之表面安裝裝置之一部分之一示意透視圖,該等導線段之特徵為該底部表面上之溝槽;Figure 1 is a schematic perspective view of a portion of a surface mount device having a plurality of wire segments in accordance with the present invention, the wire segments being characterized by grooves in the bottom surface;

圖2係一根據本發明之具有若干導線段之表面安裝裝置之一部分之一示意透視圖,該等導線段之特徵為該頂部表面上之溝;Figure 2 is a schematic perspective view of a portion of a surface mounting device having a plurality of wire segments in accordance with the present invention, the wire segments being characterized by grooves in the top surface;

圖3係一具有若干導線段之表面安裝裝置之一部分之一示意橫截面圖,該等導線段之特徵為在該底部表面上之角形輪廓式溝槽;及Figure 3 is a schematic cross-sectional view of a portion of a surface mount device having a plurality of wire segments, the wire segments being characterized by angular contoured grooves on the bottom surface;

圖4係一具有若干導線段之表面安裝裝置之一部分之一示意橫截面圖,該等導線段之特徵為在該底部表面上之半圓形輪廓式溝槽。Figure 4 is a schematic cross-sectional view of a portion of a surface mount device having a plurality of wire segments characterized by a semi-circular profiled groove on the bottom surface.

100...半導體裝置100. . . Semiconductor device

101...段101. . . segment

101a...頂部表面101a. . . Top surface

101b...底部表面101b. . . Bottom surface

102...墊102. . . pad

103...半導體晶片103. . . Semiconductor wafer

104...內段104. . . Inner section

105...接觸墊105. . . Contact pad

106...焊線106. . . Welding wire

107...厚度107. . . thickness

108...寬度108. . . width

109...距離109. . . distance

110...焊料110. . . solder

120...封裝120. . . Package

130...交叉影線130. . . Cross hatch

141...第一部分141. . . first part

142...第二部分142. . . the second part

143...第三部分143. . . the third part

144...第四部分144. . . fourth part

145...第五部分145. . . the fifth part

151a...第一溝槽151a. . . First groove

152a...第二溝槽152a. . . Second groove

153a...第三溝槽153a. . . Third groove

190...基板/板190. . . Substrate/board

Claims (12)

一種半導體裝置,其包括:一金屬導線框架,其具有一頂部表面與一底部表面、一厚度,及若干內段與外段;一半導體晶片,其係連接至該等內段;該晶片及該等內段被圍封在塑膠密封中,該等外段未受圍封;該等外段具有一寬度及一構造成五個鄰接部分之長度:一第一部分從該密封近乎水平凸出;一第二部分形成一向下的凸起彎曲;一第三部分向下為近似筆直;一第四部分形成一向上的凹入部分;及一第五部分為水平筆直;以及各導線具有橫跨該寬度之一第一溝槽於該第三段中,該溝槽具有一中心線、一深度及一輪廓。 A semiconductor device comprising: a metal lead frame having a top surface and a bottom surface, a thickness, and a plurality of inner and outer segments; a semiconductor wafer coupled to the inner segments; the wafer and the The inner segment is enclosed in a plastic seal, the outer segments are unenclosed; the outer segments have a width and a length configured as five abutting portions: a first portion protrudes substantially horizontally from the seal; The second portion forms a downward convex curvature; a third portion is approximately straight downward; a fourth portion forms an upwardly concave portion; and a fifth portion is horizontally straight; and each of the wires has a width across the width One of the first trenches is in the third segment, the trench having a centerline, a depth, and a contour. 如請求項1之裝置,其中該溝槽係在該導線框架之該底部表面或頂部表面上。 The device of claim 1 wherein the groove is on the bottom or top surface of the lead frame. 如請求項1之裝置,其中該溝槽中心線位於該第五部分之該底部表面的垂直上方之兩個導線框架厚度處。 The apparatus of claim 1, wherein the groove centerline is located at two wire frame thicknesses vertically above the bottom surface of the fifth portion. 如請求項1之裝置,其中該溝槽具有一近似角形的輪廓及一介於5與50 μm之間的深度;或其中該溝槽具有一近似半圓形的輪廓及一介於50與125 μm之間的深度。 The device of claim 1, wherein the trench has an approximately angular profile and a depth between 5 and 50 μm; or wherein the trench has an approximately semi-circular profile and a between 50 and 125 μm The depth between. 如請求項1之裝置,其進一步包含一位於該外段之該第 二部分之第二溝槽。 The device of claim 1, further comprising a first one located in the outer segment The second groove of the two parts. 如請求項1之裝置,其進一步包含一位於從該外段之該第二部分至該第三部分之一過渡處之第三溝槽。 The device of claim 1 further comprising a third trench located at a transition from the second portion of the outer segment to the third portion. 一種用於製造一半導體裝置之方法,該方法包括以下步驟:提供一金屬導線框架條,該導線框架條具有一頂部表面與一底部表面、一厚度,及複數個具有具若干內段與外段之若干導線之裝配位址;該等外段具有一寬度及一長度,且係藉由若干屏障桿互連;將一半導體晶片定位於各裝配位址上且將該晶片連接至該等內段;將該等晶片與該等內段圍封在塑膠密封中,保留該等外段未受圍封;從該條上單一化該等位址;移除該等屏障桿;橫跨各導線之該寬度壓印一第一溝槽,該溝槽具有一中心線、一輪廓及一深度;及將該等外段之該長度形成為五個鄰接部分,該等鄰接部分包括:一第一部分從該密封水平凸出;一第二部分形成一向下的凸起彎曲;一第三部分向下為近似筆直,該第三部分包含該溝槽;一第四部分形成一向上的凹入彎曲;及 一第五部分為水平筆直,藉此該溝槽中心線位於該第五部分之該底部表面垂直上方之兩個導線框架厚度處。 A method for fabricating a semiconductor device, the method comprising the steps of: providing a metal wire frame strip having a top surface and a bottom surface, a thickness, and a plurality of inner and outer segments Mounting addresses of the plurality of wires; the outer segments having a width and a length, and interconnected by a plurality of barrier bars; positioning a semiconductor wafer on each of the mounting sites and connecting the wafer to the inner segments Enclosing the wafers and the inner segments in a plastic seal, leaving the outer segments unenclosed; singulating the addresses from the strip; removing the barrier bars; spanning the wires The width is imprinted with a first groove having a center line, a contour and a depth; and the length of the outer segments is formed as five abutting portions, the abutting portions comprising: a first portion The seal is horizontally convex; a second portion forms a downward convex curvature; a third portion is approximately straight downward, the third portion includes the groove; and a fourth portion forms an upward concave curve; A fifth portion is horizontally straight, whereby the groove centerline is located at two wire frame thicknesses vertically above the bottom surface of the fifth portion. 如請求項7之方法,其中將該溝槽壓印進入該導線框架之該底部表面或頂部表面。 The method of claim 7, wherein the groove is imprinted into the bottom or top surface of the lead frame. 如請求項7之方法,其中該溝槽具有一近似角形的輪廓及一介於5與50 μm之間的深度。 The method of claim 7, wherein the trench has an approximately angular profile and a depth between 5 and 50 μm. 如請求項7之方法,其中該壓印步驟進一步包含在該底部表面或該頂部表面上且橫跨該段寬度壓印一第二溝槽,該第二溝槽經定位為位於該第二外段部分。 The method of claim 7, wherein the embossing step is further included on the bottom surface or the top surface and embossing a second trench across the width of the segment, the second trench being positioned to be located at the second outer Section part. 如請求項7之方法,其中該壓印步驟進一步包含在該底部表面或該頂部表面上且橫跨該段寬度壓印一第三溝槽,該第三溝槽經定位為位於從該外段之該第二部分至該第三部分之一過渡處。 The method of claim 7, wherein the embossing step is further included on the bottom surface or the top surface and embossing a third trench across the width of the segment, the third trench being positioned to be located from the outer segment The second portion is transitioned to one of the third portions. 如請求項7至11中任一項之方法,其中該提供一金屬導線框架之步驟包括提供一具有該頂部表面及一底部表面、一厚度之金屬片;及形成一導線框架條,該導線框架條包含複數個具有具若干內段及外段之若干導線之裝配位址;該等外段具有一寬度及一長度,且係藉由若干屏障桿互連。 The method of any one of claims 7 to 11, wherein the step of providing a metal lead frame comprises providing a metal sheet having the top surface and a bottom surface, a thickness; and forming a lead frame strip, the lead frame The strip includes a plurality of mounting addresses having a plurality of wires having a plurality of inner and outer segments; the outer segments having a width and a length and interconnected by a plurality of barrier bars.
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