TWI392042B - A method for reducing overlay error in a photolithographic process - Google Patents

Description

Method for reducing overlap error in photolithography process

This case further clarifies the advantages of the prior US application number 60/891,360 tentative application filed on February 23, 2007. The present invention relates to the field of integrated circuit fabrication. More precisely, the present invention relates to the measurement of the temperature of the substrate plane during exposure of the substrate during photoresist exposure, and the correlation of temperature and overlay accuracy.

The integrated circuit is generally fabricated in the form of a substrate. Here, the term "integrated circuit" includes those elements on a monolithic semiconductor substrate, such as those of Group IV materials or tantalum or tri-five compounds such as gallium arsenide, or such materials. Mixed into the original. The term encompasses all types of components such as memory and logic and all designs of such components, such as metal oxide semiconductors (MOS) and bipolars. The term also includes applications such as flat panel displays, solar cells, and charge coupled components.

The integrated circuit generally uses a basic process, including depositing a layer, forming a photoresist layer on the layer, exposing and forming a pattern on the photoresist, and then modifying the underlying exposure layer through the photoresist in some manner. The residual photoresist layer is removed after etching, for example by etching the layer. Although this basic process can be adjusted in a number of ways, in the process of creating additional layers on the substrate, the basic process is repeated until the integrated circuit on the substrate is completed.

There is constant pressure to reduce the size of the integrated circuit. This pressure comes from many different sources, such as the desire to have more circuitry in a given space, increase the number of dices in the substrate to increase profits, and reduce power consumption. As the critical integrated circuit size continues to decrease, the problems that must be overcome in the process continue to increase.

For example, one of the problems is the alignment of layers and layers between layers. In the past, proper alignment was only possible by aligning the patterns by creating an appropriate mask set and then focusing on one layer. However, when a new lithography process is introduced and the optical resolution of the extended light is used to expose the photoresist, additional considerations need to be taken into account.

Therefore, what is needed is a system that can overcome the above problems or at least some of them.

The above requirements and other requirements are achieved by a method of reducing overlap errors in a photolithography process by providing a substrate having a permanent layer in which the first pattern is located, photoresist coated on the substrate, and exposing the photoresist For the second pattern, the temperature is measured at a plurality of different first positions on the substrate, the second pattern is formed in the photoresist, and the overlap error between the first pattern and the second pattern is measured at a plurality of different second positions on the substrate. , the relationship between the overlay error and the temperature is obtained at each position on the substrate, the relationship between the overlay error and the temperature is judged, and at least one light micro is adjusted according to the determined relationship. The temperature control method of the shadow process.

In this method, some micro temperature changes of the substrate surface that may affect the overlay error of the process in the photolithography process can be detected and considered or corrected in the process.

In various embodiments of this aspect of the invention, the substrate is a test substrate having a temperature sensor fabricated therein. In some embodiments, the first pattern and the second pattern are the same pattern that is aligned up and down on the substrate. In other embodiments, the first pattern and the second pattern are different patterns. In some embodiments, the permanent layer is an etch layer, at least one of an oxide, a nitride, and a metal material. In some embodiments, the temperature is measured while taking exposure at a known location on the substrate.

In other aspects of the invention, a device is described for establishing a thermal profile during a process, the device having a test substrate containing a temperature sensor, a permanent layer overlying the temperature sensor, and the first graphic being located In the permanent layer. In some embodiments of this aspect of the invention, the temperature sensor is a resistive thermal device, while in other embodiments the temperature sensor is a thermocouple. In some embodiments the permanent layer is an etch layer that is at least one of an oxide, a nitride, and a metal material.

According to an embodiment of the invention, when the temperature is measured at different locations on the substrate, the photoresist pattern is aligned on a test substrate, such as Santa. PROCESS PROBE manufactured by SensArray of Clara, CA. The collected temperature information is suitably used to resolve overlay errors due to temperature disturbances on the substrate plane.

Referring to Figure 1, an embodiment of a system 10 of the present invention, and a substrate 12 are depicted. The substrate includes temperature sensors 14 at various locations on the substrate 12. The actual number and location of the sensors 14 can be determined according to the process to be analyzed, as detailed later. The sensor 14 can be in a different form, such as a resistive thermal element or a thermocouple.

The sensor 14 is monitored by forming an electrical connection between the sensor 14 and the instrument 16. One method of forming such an electrical connection is to bundle the strap 14 with a bundle of straps 18. However, in the preferred embodiment, the sensor 14 attached to the substrate is sealed to the test substrate 12. Thus, in these embodiments, the test substrate 12 is a self-contained, sealed system that wirelessly conducts the collected material without the need for an external band.

The substrate 12 is suitably adjusted, plus a layer 20, which is an oxide or other film, and has a permanently etched pattern, as shown in FIG. The sensor 14 is not shown in Figure 2 but is suitably located below the layer 20. The permanently etched pattern layer 20 in this embodiment comprises a first portion of a two-part overlapping structure. "Permanent" does not mean that there is never a way to remove the layer 20 from the substrate 12. Rather, it means that the layer 20 is not significantly removed, eroded or otherwise altered for normal use of the substrate, as will be detailed later. However, this layer 20 can be appropriately removed by other means. When it is desired to change the pattern of this layer 20, change the materials that make up this layer 20, or be worn or damaged due to prolonged use When this layer 20 is updated, it can be removed.

The second portion of the overlapping structure is a shaped and formed layer of a photoresist 22. The photoresist layer 22 is formed by coating a photoresist 22 on the substrate, softly bakes the photoresist layer 22, exposes the photoresist layer 22, forms a photoresist layer 22, and selectively hard-resistes the photoresist. Layer 22. Forming this may require other methods of using the photoresist layer 22 other than spin coating. For this embodiment, the electrical harness strip 18 is used for electrical connection to the substrate 12.

The temperature is measured at the substrate 12 at various stages of the photoresist process, such as during the exposure process. In this method, thermal data of the substrate 12 can be formed, wherein temperatures at different locations on the substrate 12 can be measured and recorded, coupled to locations where temperature is measured. This information may need to be collected or recorded for many different process steps and many different substrates 12. Alternatively, the sensor can be placed behind the standard substrate, such as on or in the platen or chuck where the standard substrate is located, to produce the temperature data.

After the shaped photoresist layer 22 is formed on the permanent etch layer 20, the overlay error between the permanent etch layer 20 and the formed photoresist layer 22 is measured. The overlay error is the difference between the desired pattern of photoresist layer 22 and the actual pattern of photoresist layer 22. This difference can be measured in many different ways. For example, the pattern of the permanent etch layer 20 may be identical to the pattern of the photoresist layer 22, as shown in FIG. In this case, the difference between the two patterns can be directly measured.

In addition, the pattern of the permanent etch layer 20 may be complementary to the pattern of the photoresist layer 22, wherein the patterns are not identical, but are formed to provide a simple reference. Structures, such as staggered lines, nesting boxes, and other geometric patterns, are shown in the second region 26 of FIG. Therefore, the pattern of the permanent layer etch 20 can be suitably used as a reference for judging the overlay error of the pattern of the photoresist layer 22.

The overlay errors measured at various locations on the substrate 12 are suitably coupled to temperatures measured at the same location or near locations to determine the correlation of the overlay error measured on the substrate 12 with temperature. Although the temperature variation between the locations on the substrate 12 during the process may be very small, the temperature difference on the substrate 12 is still sufficient to cause overlap errors in the photolithography process. Therefore, the correlation between all detected temperatures and overlay errors can be used to adjust the process and instrument to reduce overlap errors in future production processes.

Substrate 12 can be suitably reused by removing photoresist layer 22 and repeating the desired process, such as different process conditions. As previously mentioned, the method of removing the photoresist layer 22 from the substrate 12 is not sufficient to affect the permanent etch layer 20 anyway.

This embodiment can be applied to a variety of different processes. For example, various embodiments of the present invention can be used for the characteristics of an immersion scanner in which a fluid meniscus causes temperature due to evaporation or other effects. Disturbed. Embodiments of the invention are also applicable to dry scanning.

The above description of the preferred embodiments of the invention has been presented for purposes of illustration and description. It is not intended to limit the invention to the forms disclosed. A range of adjustments and changes can be made based on the above. The embodiment was chosen and described in order to provide a description in this way Modifications and changes are interpreted in terms of their breadth within the scope of the patent.

10‧‧‧System

12‧‧‧Substrate

14‧‧‧Sensor

16‧‧‧ instruments

18‧‧‧Belt

20‧‧‧Permanent etching layer

22‧‧‧ photoresist layer

24‧‧‧First area

26‧‧‧Second area

The present invention is further described with reference to the accompanying drawings, in which, 2 is a cross-sectional view of a substrate according to an embodiment of the present invention, including a permanent etch layer and a patterned photoresist layer thereon.

10‧‧‧System

12‧‧‧Substrate

14‧‧‧Sensor

16‧‧‧ instruments

18‧‧‧Belt

Claims (14)

A method for reducing overlap error in a photolithography process, the method comprising the steps of: providing a substrate having a first pattern in one of the permanent layers; coating the substrate on the photoresist; Patterning for exposure of the photoresist and measuring the temperature of the plurality of different first locations on the substrate; developing the photoresist to form the second pattern; measuring the first pattern of the plurality of different second locations on the substrate and The overlap error between the second patterns; the correlation between the overlap error and the temperature is obtained by interactively comparing the positions on the substrate; determining the relationship between the associated overlap error and the temperature; and adjusting at least one photolithography process according to the determined relationship Temperature control method. The method for reducing overlap error in a photolithography process as described in claim 1, wherein the substrate is a test substrate, and a temperature sensor is disposed therein. The method for reducing overlap error in a photolithography process according to claim 1, wherein the first pattern and the second pattern are the same pattern, which are aligned on the substrate and aligned with another pattern. Arranged in the way of the top of a pattern. The method for reducing overlap error in a photolithography process as described in claim 1, wherein the first pattern and the second pattern are different patterns. The method for reducing overlap error in a photolithography process as described in claim 1, wherein the permanent layer is an etch layer and has at least one of an oxide, a nitride or a metal material. The method for reducing overlap error in a photolithography process as described in claim 1, wherein the temperature measurement is performed simultaneously with a known position on the substrate and exposure of a known position on the substrate. A method for reducing overlap error in a photolithography process, the method comprising the steps of: providing a substrate having a permanent layer in which a first pattern is located, wherein the substrate is a test substrate, and a temperature sensor is disposed in the test substrate; the photoresist is coated on the substrate; the second pattern is used for exposure of the photoresist, and the temperature of the plurality of different first positions on the substrate is measured, wherein the temperature is Measuring is performed simultaneously at a known location on the substrate and at the known location on the substrate; developing the photoresist to form the second pattern; Measuring an overlay error between the first pattern and the second pattern on a plurality of different second positions on the substrate; the interaction ratio is obtained by determining the overlap error and the temperature of each position on the substrate; determining the associated overlap error and The relationship between the temperatures; and the temperature control method for adjusting at least one photolithography process in accordance with the relationship judged. The method for reducing the overlay error in the photolithography process, as described in claim 7, wherein the first pattern and the second pattern are the same pattern, which are aligned on the substrate in a pattern. Arrange the top of the other pattern. The method for reducing overlap error in a photolithography process, as described in claim 7, wherein the first pattern and the second pattern are different patterns. The method for reducing overlap error in a photolithography process, as described in claim 7, wherein the permanent layer is an etch layer, at least one of an oxide, a nitride or a metal material. A device for establishing a thermal profile for a manufacturing process, the device comprising: a test substrate provided with a temperature sensor; and a permanent layer stacked on the temperature sensor, the permanent layer being overlapped structure, A first pattern of the first part and a second pattern of the second part are provided. The apparatus for establishing a thermal profile for a manufacturing process as described in claim 11, wherein the temperature sensor comprises at least one of: resistive thermal devices, thermocouples, integrated circuit sense The calibrator and the thermistors. A device for establishing a thermal profile for a manufacturing process as described in claim 11, wherein the test substrate has a flatness and thickness sufficient for producing a tantalum substrate. A device for establishing a thermal profile for a manufacturing process as described in claim 11, wherein the permanent layer is an etch layer, at least one of an oxide, a nitride or a metal material.