TWI387866B - Method for adjusting frequency and electronic apparatus and computer program product using the method - Google Patents

Description

Frequency adjustment method and electronic device and computer program using the same Product

The present invention relates to a power saving technology, and in particular to a frequency adjustment method capable of saving power and an electronic device and a computer program product using the same.

In general, ZigBee is a communication protocol that is used primarily in homes, buildings, or industrial automation and control, consumer electronics, monitors, computer peripherals, and toys. Since the ZigBee device is powered by a battery, power saving is extremely required. Therefore, the ZigBee device will provide a sleep mode on the hardware, that is, when the ZigBee device is in the sleep mode, the hardware in the ZigBee device will be completely stopped or partially stopped, so as to save power consumption. .

As can be seen from the above, the ZigBee device can achieve power saving in the sleep mode. However, when the ZigBee device is woken up, that is, after leaving the sleep mode, the hardware supplied to the ZigBee device must be restored to handle the work that needs to be performed in the ZigBee device in order to allow the ZigBee device to operate normally. As a result, the ZigBee device will not save power consumption after leaving the sleep mode, so how to save power consumption in a timely manner when the ZigBee device is in the non-sleep mode will be an important issue.

The present invention provides a frequency adjustment method and an electronic device and a computer program product using the same, whereby the power consumption of the electronic device can be effectively reduced.

The invention provides a frequency adjustment method suitable for the work scheduling of an immediate system. This frequency adjustment method includes the following steps. First, a plurality of jobs are acquired, and the above work is performed within a preset time, wherein the above work is performed at least once within a preset time. Next, count the number of executions, execution time, and wait time for each job. Then, according to the preset time and the number of executions of the above work, the execution time, and the waiting time, the period and time limit of the above work are calculated. Then, according to the execution time, the period and the time limit of the above work, the algorithm is used to calculate the ideal frequency of each work, and the ideal frequencies of the work are respectively corresponding to the actual frequency and the time pulse segmentation value of the processor of the real-time system. Finally, when performing each job, this is done according to the actual frequency corresponding to this work.

In an embodiment of the invention, the step of calculating an ideal frequency for each job using an algorithm includes the following steps. First, calculate the minimum clock frequency for the above work. Next, the ideal frequency of the above operation is calculated based on the minimum clock frequency of the above operation. Then, according to the priority of the above work, it is judged whether the ideal frequency of the second work with lower priority is less than the ideal frequency of the first work with priority first. Then, if the ideal frequency of the second work is less than the ideal frequency of the first work, the ideal frequency of the second work is adjusted according to the maximum execution time of the second work.

In an embodiment of the present invention, the step of calculating the ideal frequency of the work includes calculating, according to the priority order of the above work, the highest priority work in the priority order, and the ideal frequency of each work is the priority order. The maximum value of the minimum clock frequency of the operations after or equal to their priority order.

In an embodiment of the invention, the step of respectively corresponding to the actual frequency of the operation corresponding to the actual frequency of the processor further comprises: storing each clock segmentation value into a corresponding working clock segmentation value attribute field; When working, the value field of the clock segmentation value field according to the work changes the execution frequency of the processor.

In an embodiment of the invention, the period of each of the above operations is the same as the working time.

In an embodiment of the invention, the period of the above work and the time limit are calculated. Where T is the preset time, f _i is the number of executions of the work, C _i is the execution time of the work, W _i is the waiting time of the work, i is a positive integer greater than or equal to 1, and n is the number of jobs.

In an embodiment of the invention, the step of performing the work at the actual frequency corresponding to the work comprises the following steps. When the operating voltage of the processor of the real-time system and the actual frequency of the processor of the real-time system are adjusted, the actual frequency of the processor of the real-time system is first adjusted, and then the operating voltage of the processor of the real-time system is adjusted. When the operating voltage of the real-time system and the actual frequency of the processor of the real-time system are increased, the operating voltage of the processor of the real-time system is first adjusted, and then the actual frequency of the processor of the real-time system is adjusted.

The invention provides an electronic device comprising a processor, a memory and a power supply unit. After the processor obtains multiple jobs, the above work is performed within a preset time to count the number of executions, execution time, and waiting time of each job, and then according to the preset time, the number of executions of the work, the execution time, and the waiting time. Calculate the period and time limit of the work, and then calculate the ideal frequency of the work based on the execution time, period and time limit of the work, and The ideal frequencies of operation each correspond to the actual frequency of the processor to perform these tasks using these actual frequencies. The memory is coupled to the processor, and stores the number of executions of the work, the execution time, and the waiting period and the working period and time limit. The power supply unit provides an operating power source for the electronic device.

In an embodiment of the invention, the processor further calculates the minimum clock frequency of the operation, and calculates the ideal frequency of the work according to the minimum clock frequency of the work, and then determines the priority after the priority according to the priority of the work. Whether the ideal frequency of the two jobs is less than the ideal frequency of the first work with priority first, and then if the ideal frequency of the second work is less than the ideal frequency of the first work, adjust according to the maximum execution time of the second work The ideal frequency for the second job.

In an embodiment of the present invention, the processor is further calculated according to the priority order of the work, and is sequentially calculated by the highest priority work in the priority order, and the ideal frequency of each work is equal to or equal to the priority order. The maximum value of the minimum clock frequency for the operation of the weight sequence.

In an embodiment of the invention, the processor stores each clock segmentation value into a clock segmentation value attribute field of the corresponding memory, and the processor stores the work according to the memory when performing the work. The clock split value attribute field changes the execution frequency of the processor.

In an embodiment of the invention, the period of each of the above operations is the same as the working time.

In an embodiment of the invention, the period of the above work and the time limit are calculated. Where T is the preset time, f _i is the number of executions of the work, C _i is the execution time of the work, W _i is the waiting time of the work, i is a positive integer greater than or equal to 1, and n is the number of jobs.

In an embodiment of the invention, when the processor has no working process, the electronic device enters a sleep mode.

In an embodiment of the present invention, when the processor performs the operation using the actual frequency, if the actual frequency of the processor and the operating voltage of the processor are to be lowered, the actual frequency of the processor is first adjusted, and then the processor is lowered. The operating voltage, and to increase the actual frequency of the processor and the operating voltage of the processor, first increase the operating voltage of the processor, and then increase the actual frequency of the processor.

The present invention provides a computer program product that performs the following steps via a computer loading program: First, multiple jobs are acquired, and the above work is performed within a preset time, wherein each job is executed at least once within a preset time. Next, count the number of executions, execution time, and wait time for each job. After that, the working period and time limit are calculated according to the preset time and the number of executions of the work, the execution time, and the waiting time. Then, according to the execution time, period and time limit of the work, the algorithm is used to calculate the ideal frequency of each work, and the ideal frequency of the work is respectively corresponding to the actual frequency of the processor of the real-time system. Finally, when performing each job, this is done according to the actual frequency corresponding to this work.

The present invention performs all the work obtained by executing the preset time, and counts the number of executions, the execution time, and the waiting time of these jobs. Then calculate the period and time limit of each work by the above parameters. Next, the above parameters are substituted into an algorithm to calculate the ideal frequency for each job. Rate and determine if you need to adjust the ideal frequency for these jobs. The ideal frequencies for these jobs are then each mapped to the actual frequency of the processor of the instant system. Finally, when performing each job, this is done according to the actual frequency corresponding to this work. Thereby, the invention can effectively reduce the processor frequency of the electronic device, thereby achieving the effect of saving power consumption.

The above described features and advantages of the present invention will be more apparent from the following description.

FIG. 1 is a block diagram of an electronic device according to an embodiment of the invention. 2 is a flow chart of a frequency adjustment method according to an embodiment of the present invention. Referring first to FIG. 1 , the electronic device 100 includes a processor 110 , a memory 120 , and a power supply unit 130 . In this embodiment, the electronic device 100 can be a real-time system, and the processor 110 can be used to process the scheduling of the real-time system, and the battery-powered unit is used, for example, as a ZigBee device. Electronic device. The memory 120 is coupled to the processor 110 for storing an Execution time, an Execution number, a Waiting time, a Period, and a Deadline. . The power supply unit 130 is configured to provide an operating power of the electronic device 100 so that the electronic device 100 can operate normally.

Referring to FIG. 1 and FIG. 2 together, first, in step S201, the processor 110 obtains a plurality of jobs (that is, the electronic device 100 is in a non-sleep mode), and performs work within a preset time, each of which works. This preset time is executed at least once. For convenience of explanation, in this embodiment, The three jobs are taken as an explanation, and the three jobs are represented by T1, T2, and T3, respectively. That is to say, after obtaining the operations T1, T2, and T3, the processor 110 executes the operations T1, T2, and T3 within the preset time T.

In step S203, the processor 110 performs statistics on the number of executions of each job, the execution time, and the waiting time. In this embodiment, the number of executions, the execution time, and the waiting time are represented by fi, Ci, and Wi, respectively, where i is a positive integer greater than or equal to 1. In this embodiment, the execution time Ci is the actual execution time for each operation within the preset time, and the waiting time Wi is the time for each work waiting to be executed, for example, waiting for the user to press a key to perform the corresponding work. time. For example, assuming that the preset time T is 30 milliseconds (ms), and after the operations T1, T2, and T3 are performed in the preset time T, the execution times f ₁ and f _{2 of the} jobs T1, T2, and T3 are obtained. f ₃ is 3 times, 2 times, 1 time respectively; the execution times C ₁ , C ₂ , and C _{3 of the} work T1, T2, and T3 are 5 milliseconds, 2 milliseconds, and 1 millisecond, respectively; waiting times of working T1, T2, and T3 W ₁ , W ₂ , and W ₃ are all 0 seconds.

In step S205, the processor 110 calculates the working period Pi and the time limit Di according to the preset time and the execution number fi of the work, the execution time Ci, and the waiting time Wi. In this embodiment, the period of each work is the same as the time limit, and the period and time limit of the work are calculated. Where T is the preset time, fi is the number of executions of the work, Ci is the execution time of the work, and W _i is the waiting time of the work, where i is a positive integer greater than or equal to 1, and n is the number of jobs. Therefore, the preset time and the number of executions of the work, the execution time, and the waiting time are substituted into the calculation formula. It can be calculated that the periods P1, P2, and P3 of the operations T1, T2, and T3 and the time limits D1, D2, and D3 are 10 milliseconds, 15 milliseconds, and 30 milliseconds, respectively.

Then, in step S207, the processor 110 calculates the ideal frequency of each work by using a preset algorithm according to the execution time, the period and the time limit of the work, and respectively corresponds the ideal frequency of the work to the electronic device 100 (instant system). The actual frequency of the processor 110 is divided into time and pulse values.

In order to enable those skilled in the art to know how to calculate the ideal frequency for each job, an example will be described below. FIG. 3 is a flow chart showing the detailed steps of step S207 of FIG. 2. FIG. 4A is a schematic diagram of a work schedule before the frequency of each work is not adjusted. FIG. 4B is a schematic diagram of the work schedule after the frequency adjustment of each operation according to an embodiment of the present invention. In this embodiment, each job corresponds to a plurality of parameter values, and is an execution time, a period, and a time limit, respectively. Therefore, the parameter values calculated by steps S203 and S205 can be derived, and the parameter values C1, P1, and D1 corresponding to the work T1 are {5*f _max , 10, 10}; and the parameter values C2 and P2 corresponding to the work T2. D2 is {2*f _max , 15, 15}; the parameter values C3, P3, and D3 corresponding to the work T3 are {1*f _max , 30, 30}. In addition, the above f _max is the maximum value of the frequency (that is, the maximum use frequency of the work utilizing processor 110), and the expression C _i *f _{max of} the corresponding parameter C _i is the execution required by f _max The time is C _i and does not mean that C _{i is} multiplied by f _max .

Referring to FIG. 1 , FIG. 3 , FIG. 4A and FIG. 4B , in step S301 , the processor 110 calculates the minimum clock frequency εi of the above operation according to the parameter values, for example, the minimum energy clock frequency. (Energy-Minimizing Clock Frequency). In this embodiment, the minimum clock frequency of each of the above operations is the minimum value of the ratio of the end time of each idle (Idle) to the total execution time of the work before the end of the time limit of each operation in FIG. 4A. The minimum clock frequency of the work. For example, the time limit of the work T1 is 10, and the end time of the idle time is 10, and the time of the operation T1 is 5, therefore, the minimum clock frequency of the work T1 is ε1=min{5/10 }=0.5; the working time of T2 is 15, and the end time of idle time is 10, and the time of operation T2 is 7 (working T1+working T2), therefore, the minimum clock frequency of working T2 Ε2=min{7/10}=0.7; the time limit of the working T3 is 30, and the end time of the idle time is 10, 20, and 30, respectively, and the time of the work T3 is 8 respectively (working T1+) Working T2+ work T3), 15 (working T1*2+ working T2*2+ working T3) and 20 (working T1*3+ working T2*2+ working T3), therefore, the minimum clock frequency of working T3 is ε3=min{8/10 , 15/20, 20/30} = 0.67.

Next, in step S303, the processor 110 calculates the ideal frequency Vi of the above operation according to the respective minimum clock frequencies of the above operations and the priority order of the above operations. In this embodiment, the processor 110 calculates, according to the priority order of the work, the highest priority work in the priority order, and the ideal frequency of each work is in the priority order or equal to its priority order. The maximum value of the minimum clock frequency for the operation.

For example, the priority order of the above work is in order of work T1, work T2, and work T3. Therefore, the processor 110 first performs the calculation of the ideal frequency of the operation T1. When calculating the ideal frequency V1 of the working T1, it is superior. The first power sequence is equal to or equal to the maximum value of the minimum clock frequency of the working T1, that is, V1=max{ε1, ε2, ε3}=max{0.5, 0.7, 0.67}=0.7; when calculating the ideal frequency V2 of the working T2 Time is the maximum value of the minimum clock frequency at or equal to the working T2 after taking the priority order, that is, V2=max{ε2, ε3}=max{0.7, 0.67}=0.7; when calculating the ideal frequency of the working T3 In V3, it is the maximum value of the minimum clock frequency at or equal to the working T3 after taking the priority order, that is, V3=max{ε3}=max{0.67}=0.67.

Then, proceeding to step S305, that is, according to the priority order of the above work, whether the ideal frequency of the second work after the priority order is compared is less than the ideal frequency of the first work of the priority order. For example, the first job is set to work T1 and the second job is set to work T2. Next, the ideal frequency of the first stroke (the ideal frequency V1 of the operation T1) and the second ideal duty frequency (the ideal frequency V2 of the operation T2) are compared. Since the ideal frequency V1 of the working T1 and the ideal frequency V2 of the working T2 are both 0.7, that is, the ideal frequency of the first working is equal to the ideal frequency of the second working, step S307 is performed to replace the ideal frequency of the first working. For the ideal frequency of the second work, and replace the ideal frequency of the second work with the ideal frequency of the third work, wherein the priority order of the third work is after the second work. That is, the ideal frequency of the first job is replaced by the ideal frequency V2 of the operation T2, and the ideal frequency of the second operation is replaced by the ideal frequency V3 of the operation T3.

Next, returning to step S305, it is determined whether the ideal frequency of the second pen operation is less than the ideal frequency of the first pen operation, that is, whether the ideal frequency V3 of the work T3 is less than the ideal frequency V2 of the work T2. Due to T2 The ideal frequency V2 is 0.7, and the ideal frequency V3 of the working T3 is 0.67. Therefore, after comparing the ideal frequency V2 of the working T2 with the ideal frequency V3 of the working T3, it is found that the ideal frequency of the second working is smaller than the ideal of the first working. The frequency, that is, the ideal frequency V3 of the operation T3 is less than the ideal frequency V2 of the operation T2, then proceeds to step S309 to adjust the ideal frequency of the second stroke operation according to the maximum execution time of the second stroke operation.

For example, in the case where the ideal frequencies V1 and V2 of the operations T1 and T2 are both 0.7, the maximum execution time of the operation T3 is the time limit of the operation T3 minus (the total execution time of the work prior to the priority of the work T3 is divided by The priority precedes the ideal frequency of the work of work T3), that is, 30-(5*3+2*2)/0.7=2.857. Next, the ratio of the required time of the operation T3 to the maximum frequency and the maximum execution time after the adjusted frequency is obtained, that is, 1/2.857=0.35, and the value 0.35 is the ideal frequency V3' after the adjustment of the operation T3.

After that, after adjusting the ideal frequency of the second work, that is, the ideal frequency of the work T3, the process proceeds to step S311, that is, whether the ideal frequency of all the work has been compared. In the present embodiment, since the job T3 is already the last job, in step S311, it is judged that all the work has been compared.

Finally, in step S313, the ideal frequencies of T1, T2, and T3 are each corresponding to the actual frequency of the processor 110 of the electronic device 100. In this embodiment, the actual frequency of the processor 110 of the electronic device 100 is controlled by the clock control register CLKCON of the processor 110, and the bit in the pulse control register is 0 to the bit. Element 15, CLKCON[15:0], is related to the clock split value. Therefore, the actual frequency of the processor 110 of the electronic device 100 is 1/(CLKCON+1) of the actual frequency of the original processor, so the actual frequency of the processor 110 of the electronic device 100 may be 1/(0+1) of the maximum used frequency of the processor. ), 1/(2 ⁰ +1), 1/(2 ¹ +1), 1/(2 ² +1), ..., 1/(2 ¹⁵ +1).

Therefore, the ideal frequencies V1, V2, and V3' of the above-described calculated operations T1, T2, and T3 are corresponding to the actual frequencies of the processor 110 of the electronic device 100. For example, the ideal frequency V1=0.7 of the work T1 is between 1/(0+1) and 1/(2 ⁰ +1) of the actual frequency of the processor 110 of the electronic device 100, so the work T1 corresponds to the electronic device 100. The actual frequency of the processor 110 is 1/(0+1)=1, that is, the ideal frequency is corresponding to the smallest of the actual frequencies greater than or equal to the ideal frequency; the ideal frequency of the operation T2 V2=0.7 is between the electronic devices. The actual frequency of the processor 110 of 100 is between 1/(0+1) and 1/(2 ⁰ +1), so the actual frequency of the processor T corresponding to the processor 110 of the electronic device 100 is 1/(0+1)=1; The ideal frequency V3'=0.35 of T3 is between the actual frequency 1/(2 ⁰ +1) to 1/(2 ¹ +1) of the processor 110 of the electronic device 100, so the work T3 corresponds to the processor of the electronic device 100. The actual frequency of 110 is 1/(2 ⁰ +1)=0.5.

In the above step S311, if the work T3 is not the last work, it is determined in step S311 that the ideal frequencies of all the work are not compared. Then, proceeding to step S307, that is, performing an ideal frequency for comparing the work of the priority order again, for example, the ideal frequency of the work T3 and T4, the ideal frequency of the work T4 and T5, etc. until the ideal frequency of all the work is compared. , after going to step S313, the frequency ends. The process of the rate adjustment method. Returning to the operation mode of step S307 and subsequent steps, reference may be made to the above description, and thus no further description is provided herein.

Then, the processor 110 may store the clock split values ^{0, 0} , 1 (ie, 2 ⁰ ) of the operations T1, T2, and T3 into the clock split value attribute fields clkDiv1 and clkDiv2 corresponding to each work in the memory 120. In clkDiv3, when the subsequent operations T1, T2, and T3 are performed, the execution frequency of the processor 110 can be adjusted correspondingly. Thereafter, in step S209, when each job is performed, this operation is performed in accordance with the actual frequency corresponding to the job. That is to say, when the operations T1, T2, and T3 are executed, the processor 110 changes the execution frequency of the processor 110 according to the clock segmentation value attribute field of each working of the memory 120. For example, when the processor 110 performs the operation T1, the processor 110 changes the execution frequency of the processor 110 according to the clock division value 0 recorded by the clock segmentation value attribute field clkDiv1 of the work T1 of the memory 120. To perform the work T1; when the processor 110 performs the work T2, the processor 110 changes the execution of the processor 110 according to the clock split value 0 recorded by the clock split value attribute field clkDiv2 of the work T2 of the memory 120. The frequency is to perform the work T2; when the processor 110 performs the work T3, the processor 110 according to the clock segmentation value 1 (ie, 2 ⁰ ) recorded by the clock segmentation value attribute field clkDiv3 of the work T3 of the memory 120. The execution frequency of the processor 110 is varied to perform the work T3. In this way, since the frequency used by the processor 110 when performing the operation T3 is 0.5 (ie, 1/(2 ⁰ +1)) of the original frequency, the power consumption of the electronic device 100 in the non-sleep mode can be effectively reduced. .

Finally, after the processor 110 finishes the above operations T1, T2, and T3, if there is no other work to be processed, the electronic device 100 can enter the sleep mode to save power consumption.

In addition, if the hardware can support the adjustment of the operating voltage of the processor of the real-time system (electronic device), the operating voltage of the processor of the real-time system can be adjusted while the actual frequency of the processor of the real-time system is modulated, and The modulation mode of the actual frequency and the working voltage is: (1) When the actual frequency and the working voltage are lowered, the actual frequency is first adjusted, and then the operating voltage is adjusted. (2) When the actual frequency and working voltage are raised, first increase the operating voltage and then increase the actual frequency.

The invention further provides a computer program product for performing the above frequency adjustment method. The computer program product is basically composed of a plurality of code segments, and the code segments are loaded into a computer (for example, memory After the body 120) is executed, the steps of the above frequency adjustment method can be completed.

In summary, the present invention performs all the work obtained by executing the preset time, and counts the number of executions, the execution time, and the waiting time of the jobs. Then calculate the period and time limit of each work by the above parameters. Next, the above parameters are substituted into an algorithm to calculate the ideal frequency for each job, and to determine whether it is necessary to adjust the ideal frequency of these operations. The ideal frequencies for these jobs are then each mapped to the actual frequency of the processor of the instant system. Finally, when performing each job, this is done according to the actual frequency corresponding to this work. Thereby, the invention can have Effectively reduce the processor frequency of the electronic device in the non-sleep mode, thereby saving power consumption.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧Electronic devices

110‧‧‧ processor

120‧‧‧ memory

130‧‧‧Power supply unit

S201~S211‧‧‧ steps of the frequency adjustment method according to an embodiment of the present invention

S301~S313‧‧‧Steps in step S207

T1, T2, T3‧‧ work

FIG. 1 is a block diagram of an electronic device according to an embodiment of the invention.

2 is a flow chart of a frequency adjustment method according to an embodiment of the present invention.

FIG. 3 is a flow chart showing the detailed steps of step S207 of FIG. 2.

FIG. 4A is a schematic diagram of a work schedule before the frequency of each work is not adjusted.

FIG. 4B is a schematic diagram of the work schedule after the frequency adjustment of each operation according to an embodiment of the present invention.

S201~S209‧‧‧ steps of the frequency adjustment method according to an embodiment of the present invention

Claims (19)

A frequency adjustment method is applicable to a work schedule of an instant system, the frequency adjustment method includes: obtaining a plurality of jobs, and performing the work within a preset time, wherein each of the work is performed on the preset The time is executed at least once; the number of executions, the execution time, and the waiting time of each of the jobs are counted; and the period and time limit of the work are calculated according to the preset time, the number of executions of the jobs, the execution time, and the waiting time. According to the execution time, the period and the time limit of the work, an algorithm is used to calculate the ideal frequency of each of the work, and the ideal frequencies of the work are respectively corresponding to an actual frequency of the processor of the instant system and a time a pulse split value; and when performing each of the jobs, performing the work according to the actual frequency corresponding to the work, wherein the period and time limit of the work are calculated Where T is the preset time, fi is the number of executions of the jobs, Ci is the execution time of the jobs, Wi is the waiting time for the jobs, i is a positive integer greater than or equal to 1, and n is the work quantity. The frequency adjustment method of claim 1, wherein the calculating the ideal frequency of each of the operations by using the algorithm comprises: calculating a minimum clock frequency of the operations; Calculating the frequency of the work according to the minimum clock frequency of the work; according to the priority of the work, determining whether the ideal frequency of the second work after the priority is less than the priority first The ideal frequency of the first work; and if the ideal frequency of the second work is less than the ideal frequency of the first work, the ideal frequency of the second work is adjusted according to a maximum execution time of the second work. The frequency adjustment method of claim 2, wherein the calculating the ideal frequency of the work comprises: calculating, according to the plurality of priority orders of the work, the work with the highest priority in the priority order And the ideal frequency of each of the jobs is the maximum value of the minimum clock frequency of the operations after taking the priority order at or equal to its priority order. The frequency adjustment method of claim 1, wherein the step of respectively matching the ideal frequencies of the operations to the actual frequencies of the processor further comprises: storing each of the clock segmentation values to Corresponding clock segmentation value attribute field of the work; and when performing the work, the execution frequency of the processor is changed according to the clock segmentation value attribute field of the work. The frequency adjustment method of claim 1, wherein the period of each of the operations is the same as the time limit of the work. The frequency adjustment method of claim 1, wherein the step of performing the work according to the actual frequency corresponding to the work comprises: when lowering an operating voltage of the processor of the instant system and the real-time system At the actual frequency of the processor, after the actual frequency is first lowered, the operating voltage is further reduced; and when the operating voltage of the processor of the instant system is increased and the actual frequency of the processor of the instant system is After the operating voltage is first raised, the actual frequency is increased. An electronic device includes: a processor, after obtaining a plurality of jobs, and performing the work within a preset time, to count the execution times, execution times, and waiting times of each of the jobs, and then according to the pre- Setting the time, execution time, and waiting time of the work, calculating the period and time limit of the work, and then calculating the ideal frequency of the work according to the execution time, the period and the time limit of the work, and The ideal frequencies of the operations respectively correspond to an actual frequency of the processor and a clock split value to perform the work by using the actual frequencies; a memory coupled to the processor to store the number of executions of the jobs And an execution time and a waiting time and a period and a time limit of the work; and a power supply unit providing a working power source of the electronic device, wherein the period and the time limit of the working are calculated Where T is the preset time, fi is the number of executions of the jobs, Ci is the execution time of the jobs, Wi is the waiting time for the jobs, i is a positive integer greater than or equal to 1, and n is the work quantity. The electronic device of claim 7, wherein the processor further calculates a minimum clock frequency of the operations, and calculates a frequency of the working frequency according to the minimum clock frequency of the operations, and then according to The priorities of the work are successively determined whether the ideal frequency of the second work after the priority is less than the ideal frequency of the first work of the first priority, and then the ideal frequency of the second work is less than the ideal frequency. The ideal frequency of the first work, according to a maximum execution time of the second work, adjust the ideal frequency of the second work. The electronic device of claim 8, wherein the processor further calculates, according to the plurality of priority orders of the work, the work with the highest priority in the priority order, and each of the work The ideal frequency is the maximum value of the minimum clock frequency of the operations after taking the priority order at or equal to its priority order. The electronic device of claim 7, wherein the processor stores each clock segmentation value into a clock segmentation value attribute field corresponding to each of the jobs in the memory, and the processor is executing In this operation, the execution frequency of the processor is changed according to the clock segmentation value attribute field of the job stored in the memory. The electronic device of claim 7, wherein each of the working cycles is the same as the working time. The electronic device of claim 7, wherein when the processor is not in operation, the electronic device enters a sleep mode. The electronic device of claim 7, wherein when the processor performs the operations by using the actual frequencies, if the actual frequency of the processor and the operating voltage of the processor are to be lowered, the first adjustment is performed. After lowering the actual frequency of the processor, the operating voltage of the processor is further lowered, and if the actual frequency of the processor and the operating voltage of the processor are to be increased, the operating voltage of the processor is first increased, and then Increase the actual frequency of the processor. A computer program product, the program is loaded via a computer to perform the following steps: obtaining a plurality of jobs, and performing the work within a preset time, wherein each of the jobs is executed at least once within the preset time Calculating the number of executions, execution time, and waiting time of each of the jobs; calculating the period and time limit of the work according to the preset time, the number of executions of the jobs, the execution time, and the waiting time; Execution time, period and time limit, using an algorithm to calculate the ideal frequency of each of the tasks, and correspondingly corresponding frequencies of the operations to an actual frequency and a clock segmentation value of the processor of the instant system; When performing each of the tasks, the work is performed according to the actual frequency corresponding to the work, wherein the period and time limit of the work are calculated as Where T is the preset time, fi is the number of executions of the jobs, Ci is the execution time of the jobs, Wi is the waiting time for the jobs, i is a positive integer greater than or equal to 1, and n is the work quantity. The computer program product of claim 14, wherein the calculating the ideal frequency of each of the operations by using the algorithm comprises: calculating a minimum clock frequency of the operations; and determining a minimum clock according to the operations Frequency, calculating the frequency of the work of the work; according to the priority of the work, determining whether the ideal frequency of the second work after the priority is less than the ideal frequency of the first work of the priority; And if the ideal frequency of the second work is less than the ideal frequency of the first work, the ideal frequency of the second work is adjusted according to a maximum execution time of the second work. The computer program product of claim 15, wherein the calculating the ideal frequency of the work comprises: calculating, according to the plurality of priority orders of the work, the work with the highest priority in the priority order And the ideal frequency of each of the jobs is the maximum value of the minimum clock frequency of the operations after taking the priority order at or equal to its priority order. The computer program product of claim 14, wherein the steps of the actual frequencies of the operations corresponding to the actual frequencies of the processor and the clock splitting values further comprise: And storing each of the clock segmentation values into a corresponding clock segmentation value attribute field of the work; and when performing the work, changing the execution frequency of the processor according to the clock segmentation value attribute field of the work . For example, in the computer program product described in claim 14, wherein the period of each of the jobs is the same as the time limit of the work. The computer program product of claim 14, wherein the step of performing the work according to the actual frequency corresponding to the work comprises: when adjusting a working voltage of the processor of the instant system and the instant system At the actual frequency of the processor, after the actual frequency is first lowered, the operating voltage is further reduced; and when the operating voltage of the processor of the instant system is increased and the actual frequency of the processor of the instant system is After the operating voltage is first raised, the actual frequency is increased.