TWI387270B - Method and apparatus for low complexity digital modulation mapping of adaptive bit-loading systems - Google Patents

Description

Low complexity digital modulation mapping method for adaptive bit element bearer system Device

The present invention relates to a digital modulation technique, and the present invention is particularly directed to a method and apparatus for implementing digital modulation mapping by using the same set of hardware for different number of bearer bits by simple combinational logic.

In a multi-carrier (OFDM) system, especially an OFDM (Orthogonal Frequency Division Multiplexing) system, data bits are modulated to each subcarrier for transmission. Some OFDM systems use ABL (Adaptive Bit-Loading) techniques derived from adaptive subcarrieerr modulation techniques to combat frequency selective fading and color. Colored noise. Each subcarrier uses different modulation mechanisms according to its different SNR (Signal-to-Noise Ratio) conditions, such as BPSK, QPSK, 16-QAM, 64-QAM, 256-QAM, 1024- QAM, etc., where QAM is the abbreviation of Quadrature Amplitude Modulation, and BPSK and QPSK are Quadrature Phase Shift Keying and Binary Phase Shift Keying. Abbreviation for).

ABL technology is beneficial to the system to obtain higher transmission rate, but it will increase the complexity of the system construction such as system FEC (Forward Error Correction), modulation, and SNR estimation.

The above is in the frequency domain according to each subcarrier The SNR is high and low, and different modulation mechanisms are used; in the time domain, the SNR can be different according to the SNR of different time to carry different bit numbers. Traditionally, the modulation mechanism such as QAM is encoded by the multiplexer. (multiplexer) is implemented by means of a lookup table, as shown in FIG. 1 as a symbol mapping table of Power Line Video Transfer Technology (HomePlug AV). However, this method will cause at least the following two problems: 1. The multiplexer needs to use a large amount of hardware resources in hardware implementation, especially when the system needs to implement multiple modulation mechanism combinations, for example, the bit carrier Place the OFDM system.

2. A high complexity or large multiplexer will cause the system to have a large path delay when the signal symbol is modulated to the subcarrier, and the modulation will not be completed within the limited clock cycle. Affect system performance.

The object of the present invention is to provide a low-complexity digital modulation mapping method and apparatus which are different from the traditional look-up table method. The digital modulation mapping method includes: 1. m data bits to be carried The element is transformed into n intermediate values, where n is the maximum number of carryable bits of a modulation symbol, 1≦m≦n.

2. Substituting the above n intermediate values into a formula that can be easily implemented by a simple combinational logic to calculate the mapped signal point.

A further object of the present invention is that for different numbers of bearer bits, the formula and the combination logic are exactly the same to achieve the purpose of saving hardware.

Based on the above and other objects, the present invention discloses a digital modulation mapping method that actually supports 2 ^x 2 ^y -QAM, which can carry x and y bits to the real and imaginary parts of the signal point, respectively, where x and y are positive. Integers can be unequal, and the real and imaginary parts are carried by the same method. Each modulation symbol of the I channel can carry n bits, and the real part of the modulation symbol carries m bits. The digital modulation mapping method includes: (0) using a bit converter to carry m bits to be carried The data bits d _m-1 ~d _{0 are} converted into n intermediate values a _n-1 ~ a ₀ , where d _m-1 ~d ₀ is equal to 0 or 1, and an _n-1 ~ a ₀ is equal to 1, -1 Or 0, n, m are all natural numbers, 1≦m≦n, and the conversion method is: for(i=0;i<n;i++) if(i>=n-m) ai=2d _i-n+m -1 ; else a _i =0; (1) Input a _n-1 ~ a ₀ into a combinatorial logic operator to implement the formula k _n-1 a _n-1 (2 ^n-1 +...+k ₄ a ₄ (2 _{^{4 + k 3 a 3 (2}} 3 + k 2 a 2 (2 2 + k 1 a 1 (2 1 + k 0 a 0)))) ...), to obtain an operation result r, where the system parameter k _n-1 ~ k ₀ A pre-selection equal to 1 or -l determines 2 ⁿ digit modulation mapping schemes.

(2) The shift operator is used to right shift n-m bits to calculate the mapped quadrature amplitude modulation level (QAM level) L _I .

The above and other objects, features and advantages of the present invention will become more <RTIgt; See below.

2 is a diagram of a digital modulation mapping device according to an embodiment of the present invention. As shown in FIG. 2, it includes an arithmetic unit 20 and a shift operator 23, and the arithmetic unit 20 includes a bit converter 21 and a combination logic unit 22. The bit converter 21 converts m data bits d _m-1 to d ₀ to be carried to a symbol into n intermediate values a _n-1 ~ a ₀ , and inputs an _n-1 ~ a ₀ A combinational logic operator 22 to implement the formula k _n-1 a _n-1 (2 ^n-1 +...+k ₄ a ₄ (2 ⁴ +k ₃ a ₃ (2 ³ +k ₂ a ₂ (2 ² +k ₁ a ₁ (2 ¹ + k ₀ a ₀ )))))), the operation result r is obtained, and then the shift operator 23 shifts r right shift n-m bits to calculate the mapped positive Intermittent amplitude modulation level (QAM level) L _I .

In order to make those skilled in the art more aware of the spirit of the present invention, another embodiment will be described to set the preset constants (k ₄ , k ₃ , k ₂ , k ₁ , k ₀ ) to ( 1,1,-1,-1,-1), n is set to 5, and the symbol mapping table of the power line video transmission technology illustrated in FIG. 1 can be easily implemented by using the present invention. Suppose a certain symbol wants to use the 64-QAM digit modulation bearer number m to be 3, and the digit data (d ₂ , d ₁ , d ₀ ) is (0, ₁ , 0), then FIG. 3 illustrates the implementation of the present invention. An example of a digital modulation mapping device designed according to FIG. The arithmetic unit 4411 receives the digital data (d ₂ , d ₁ , d ₀ ), and the bit converter 412 first converts each bit of the digital data (d ₂ , d ₁ , d ₀ ) into a bit, and sets the bit. A bit with a value of 0 is converted to -1. Then the digital data (d ₂ , d ₁ , d ₀ ) is substituted into a ₄ ~ a _{2 in} the order of the most significant bit to the least significant bit, and 0 is substituted into a ₁ ~ a ₀ , that is, (a ₄ , a ₃ , a ₂ a ₁ , a ₀ ) is (-1, ₁ , -1, ₀ , ₀ ).

Next, the arithmetic unit 41 performs a combinational logic operation unit 411 which operates as k _n-1 a _n-1 (2 ^n-1 +...+k ₄ a ₄ (2 ⁴ +k ₃ a ₃ (2 ³ +k ₂ a ₂ (2 ² + k ₁ a ₁ (2 ¹ + k ₀ a ₀ ))))...), the output one operation result r is -28 ₁₀ , which is equivalent to the binary 100100 ₂ .

Finally, the shift operator 42 converts the result r calculated by the digital modulation mapping method by n-m bits to obtain a mapped value, that is, the amplitude level L _{I of the} QAM modulation I channel. In other words, the shift operator 42 shifts the operation result 100100 _{2 by} 2 bits to obtain 1001 ₂ , which is a decimal representation of -7 ₁₀ , and obtains the I channel in the 64-QAM modulated bearer digital data as shown in FIG. 1 . 010 ₂ o'clock mapping value.

Moreover, those of ordinary skill in the art will appreciate that the number n of the highest number of bearers for a digital modulation map does not need to be the same for the values used by the I and Q channels. For example, a person skilled in the art can use 128-QAM digital modulation to carry 4 bits in the I channel and 3 bits in the Q channel.

It is worth mentioning that although the digital modulation mapping method and apparatus have been described in some embodiments in the above embodiments, those skilled in the art should know that the digital data of each vendor is to be mapped. And the design of digital modulation is different, so the application of the present invention is not limited to such a possible type. In other words, as long as the digital data to be mapped is modulated according to the digits, it is in accordance with the spirit of the present invention to calculate the mapping value of the digital modulation through the bit conversion and the combinational logic operation.

Next, an embodiment will be made so that those skilled in the art can easily implement the present invention.

4 is a diagram showing a symbol mapping table in which a digital modulation preset constant (k ₃ , k ₂ , k ₁ , k ₀ ) is (-1, 1, 1, -1) according to an embodiment of the present invention. FIG. 5 is a diagram showing a digital modulation mapping device designed according to the embodiment of FIG. 4 of the present invention.

As shown in FIG. 5, it is assumed that the highest number of bearer bits of the digital modulation map is n, and this embodiment supports 512-QAM modulation, assuming that a certain symbol wants to use the 64-QAM digit modulation bearer number m to be 3 The digital data (d ₂ , d ₁ , d ₀ ) is (0, ₁ , 0). First, the computing device 71 receives the digital data (d ₂ , d ₁ , d ₀ ), and the translating device 712 first converts each bit of the digital data (d ₂ , d ₁ , d ₀ ) into a bit-converted bit. A bit with a value of 0 is converted to -1. The digital data (d ₂ , d ₁ , d ₀ ) is substituted into a ₃ ~ a _{1 in} the order of the most significant bit to the least significant bit, and 0 is substituted into a ₀ , that is, (a ₃ , a ₂ a ₁ , a ₀ ) is (-1, 1, -1, 0).

Next, the arithmetic unit 71 performs a digital encoding operation 711 which is calculated as k ₃ a ₃ (2 ³ + k ₂ a ₂ (2 ² + k ₁ a ₁ (2+k ₀ a ₀ )))), and an operation result r is 10 _{10 .} , equivalent to binary 01010 ₂ .

Finally, the shift operator 72 shifts the operation result 01010 _{2 by} 1 bit to obtain 0101 ₂ , which is the decimal representation of 5 ₁₀ , and obtains the code as shown in FIG. 4 when the 64-QAM modulated received digital data 010 ₂ is obtained. value.

Comparing Fig. 1 with Fig. 4, 64-QAM digital modulation is also used, and the same digital data (d ₂ , d ₁ , d ₀ ) is also received, but the value of the preset constant k is different with the digital modulation. Those with ordinary knowledge can easily get different code values.

In particular, although an embodiment is provided in which the various mapping values of various QAM modulations can be obtained in a bit-mounted OFDM system. However, those of ordinary skill in the art should be aware that digitally modulated QAM is not only applied to OFDM systems, but also to communications systems such as Bluetooth systems and Direct Sequence Spread Spectrum (DSSS) technologies. In addition, although the above The embodiment only cites the coding embodiments of QAM, QPSK, and BPSK. However, those skilled in the art should know that the mapping values of 8-PSK or other kinds of digital modulation can also be implemented by using the present invention, the only difference being that The number of maps is different from the value of the digit preset preset constant k. Therefore, the application of the present invention is not limited to OFDM systems and QAM modulation.

In summary, the present invention uses the bit conversion and the combination logic operation to convert the digital data to be mapped according to the required digits, and calculate the mapping value of the digital modulation, thereby achieving the reduction of the digital data modulation mapping. The purpose of complexity. In the hardware implementation, in addition to reducing the hardware resources required, it can also shorten the signal modulation processing time, reduce the power consumption of the chip, and increase the system performance.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the scope of the present invention, and it is possible to make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

d _n-1 ~d ₀ ‧‧‧ digital data

a _n-1 ~a ₀ ‧‧‧Sequential arrangement of digital data

M‧‧‧digit data bits

n‧‧‧Digital Signature Mapping Maximum Number of Carrying Bits

k _n-1 ~k ₀ ‧‧‧Digital modulation preset constant

R‧‧‧ operation result

L‧‧‧QAM amplitude level

L _I ‧‧‧I channel QAM amplitude level

20, 41, 71‧‧‧ arithmetic devices

32, 42, 72‧‧‧ shift operator

311, 411, 711‧‧‧ digital modulation mapping operations

312, 412, 712‧‧‧ bit conversion device

21‧‧‧ bit converter

22‧‧‧Combined logic operator

23‧‧‧Shift operator

FIG. 1 is a symbol mapping table of a power line video transmission technology.

2 is a diagram of a digital data modulation mapping device according to an embodiment of the present invention.

3 is a diagram of a digital data modulation mapping device designed according to the embodiment of the present invention.

4 is a diagram showing a symbol mapping table in which a digital modulation preset constant (k ₃ , k ₂ , k ₁ , k ₀ ) is (-1.1, 1, -1) according to an embodiment of the present invention.

FIG. 5 illustrates a digital data symbol mapping apparatus designed according to FIG. 4 according to an embodiment of the present invention.

20‧‧‧ arithmetic device

21‧‧‧ bit converter

22‧‧‧Combined logic operator

23‧‧‧Shift operator

Claims (15)

A low complexity digital modulation mapping method, the digital modulation mapping method comprises: (1) converting m data bits to be carried into n intermediate values, where n is a modulation symbol maximum number of bearable bits Where m and n are natural numbers and 1≦m≦n; and (2) substituting the above n intermediate values into a formula that can be easily implemented by a simple combinational logic to calculate a mapped signal point. A digital modulation mapping method that actually supports 2 ^x 2 ^y -QAM, which can carry x and y bits to the real and imaginary parts of the signal point, respectively, where x and y are both positive integers and can be unequal, and the real part The method is the same as the virtual part. Each modulation symbol of the I channel can carry n bits, and the real part of the modulation symbol carries m bits. The digital modulation mapping method includes: (1) using a bit converter to carry m bits to be carried The data bits d _m-1 ~d _{0 are} converted into n intermediate values a _n-1 ~ a ₀ , where d _m-1 ~d ₀ is equal to 0 or 1, and an _n-1 ~ a ₀ is equal to 1, -1 Or 0, n, m are all natural numbers, 1≦m≦n, the conversion method is: (2) Input a _n-1 ~ a ₀ into a combinational logic operator to implement the formula k _n-1 a _n-1 (2 ^n-1 +...+k ₄ a ₄ (2 ⁴ +k ₃ a ₃ (2 ³ + k ₂ a ₂ (2 ² + k ₁ a ₁ (2 ¹ + k ₀ a ₀ )))))), the operation result r is obtained, wherein the system parameters k _n-1 ~ k _{0 are} preselected Equal to 1 or -1, which can determine 2 ⁿ digital modulation mapping schemes. (3) The shift operator is used to right shift nm bits by nm to calculate the mapped quadrature amplitude modulation level (QAM level) L _I . A low complexity digital modulation mapping method comprising: providing a digital encoding operation, the operation of which is as follows: k _n-1 a _n-1 (A ^n-1 +...+k ₄ a ₄ (A ⁴ +k ₃ a ₃ (A ³ +k ₂ a ₂ (A ² +k ₁ a ₁ (A ¹ +k ₀ a ₀ )...), where n is a natural number and A is a real number; a digital data to be encoded Substituting a _n-1 ~ a ₀ ; determining k _n-1 ~ k ₀ according to one-bit modulation; and calculating one of the digital modulation values by the digital coding operation. For example, in the low complexity digital modulation mapping method described in claim 3, the step of "substituting a digital data to be encoded into a _n-1 ~ a ₀ " includes: each bit of the digital data After performing one-bit conversion, the order is substituted into a _n-1 ~ a ₀ according to the order of the most significant bit to the least significant bit, wherein the bit conversion action includes: converting the bit with a bit value of 0 Is -1. The low complexity digital modulation mapping method described in claim 3, wherein the step of "substituting the digital data to be encoded into a _n-1 ~ a ₀ " further comprises: when the bit of the digital data When the number is m and m is less than n, each bit of the digital data is converted into a single element, and then substituted into the a _n-1 ~ a _nm-1 according to the order of the most significant bit to the least significant bit. Substituting 0 into a _nm-2 ~ a ₀ , wherein the bit conversion action includes: converting a bit with a bit value of 0 to -1. The low complexity digital modulation mapping method according to claim 5, wherein the step of "calculating one of the digital modulation values by the digital coding operation" comprises: calculating the result of the digital coding operation, The nm bits are translated to obtain the encoded value. A low complexity digital modulation mapping method as described in claim 3, wherein the digital modulation is changed to a quadrature amplitude modulation. A low complexity digital modulation mapping method as described in claim 5, wherein k _i is one of +1 or -1, i is a natural number, and 0 ≦ i ≦ n-1. The low complexity digital modulation mapping method as described in claim 3, wherein the digital modulation is changed to four phase shift keying modulation or dual phase shift keying modulation. A low complexity digital modulation mapping apparatus comprises: an arithmetic device that receives a digital data and performs a digital encoding operation, the operation of which is as follows: k _n-1 a _n-1 (A ^n-1 +...+k ^{_{4 a 4 (A 4 + k}} 3 a 3 (A 3 + k 2 a 2 (A 2 + k 1 a 1 (A 1 + k 0 a 0) ...), where n is a natural number, A is a real number And outputting an operation result; and a shift operator, shifting the operation result by a displacement value to obtain an encoded value, wherein the number of bits of the digital data is expressed as m, the displacement value is nm, and wherein k _{n -1} ~ k _{0 is} determined by a digit modulation. The low-complexity digital modulation mapping device according to claim 10, further comprising: a translation device coupled to the operation device for converting each bit of the digital data into a one-bit conversion Substituting the order from the most significant bit to the least significant bit, substituting a _n-1 ~ a ₀ , wherein the bit conversion action comprises: converting the bit with the bit value of 0 to -1. The low-complexity digital modulation mapping device according to claim 10, further comprising: a translation device coupled to the operation device for converting each bit of the digital data into a one-bit conversion Substituting the order of the most significant bit to the least significant bit, substituting a _n-1 ~a _nm-1 , and substituting 0 into a _nm-2 ~a ₀ , wherein the bit conversion action includes: setting the bit value The 0 bit is converted to -1. The low complexity digital modulation mapping device of claim 10, wherein the digital modulation is changed to a quadrature amplitude modulation. The low complexity digital modulation mapping device of claim 11, wherein k _i is one of +1 or -1, i is a natural number, and 0 ≦ i ≦ n-1. The low complexity digital modulation mapping device of claim 10, wherein the digital modulation is changed to four phase shift keying modulation or dual phase shift keying modulation.