TWI382660B - Soft-start circuit - Google Patents
Soft-start circuit Download PDFInfo
- Publication number
- TWI382660B TWI382660B TW98111558A TW98111558A TWI382660B TW I382660 B TWI382660 B TW I382660B TW 98111558 A TW98111558 A TW 98111558A TW 98111558 A TW98111558 A TW 98111558A TW I382660 B TWI382660 B TW I382660B
- Authority
- TW
- Taiwan
- Prior art keywords
- current
- voltage
- output
- soft start
- terminal
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 6
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910001922 gold oxide Inorganic materials 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 2
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
- Dc-Dc Converters (AREA)
Description
本發明是有關於一種軟啟動電路,且特別是有關於一種用以產生具有一正值或負值之逐次變化之輸出電壓的軟啟動電路。This invention relates to a soft start circuit and, more particularly, to a soft start circuit for generating a successively varying output voltage having a positive or negative value.
當電子裝置啟動時,為了避免電源啟動時引起的突波電流對電子裝置造成影響,常常在設計上會延長電子裝置電源啟動的時間。如沒有延長啟動時間的軟啟動機制,大量的突波電流將容易使電子裝置的連接介面或是內部元件造成損壞。因此,藉由控制供應電壓的上升率(ramp-up rate),可以達到軟啟動機制的效果,以對電子裝置進行保護。軟啟動電路即是用以提供上述軟啟動機制的電路,然而,在上升過程中,控制每一個電壓層級的準確度以及上升率,決定了軟啟動電路的良劣。傳統的軟啟動電路係藉由使用複數個電阻來達成電壓逐級上升的軟啟動機制。如此的方式在電阻易受溫度影響下,較不理想,因此準確度將不夠精確。When the electronic device is started, in order to avoid the influence of the surge current caused by the power source on the electronic device, the time for starting the power of the electronic device is often extended in design. If there is no soft start mechanism to extend the start-up time, a large amount of surge current will easily cause damage to the connection interface or internal components of the electronic device. Therefore, by controlling the ramp-up rate of the supply voltage, the effect of the soft start mechanism can be achieved to protect the electronic device. The soft start circuit is a circuit for providing the above soft start mechanism. However, in the rising process, controlling the accuracy and rising rate of each voltage level determines the sound of the soft start circuit. A conventional soft-start circuit uses a plurality of resistors to achieve a soft-starting mechanism in which the voltage is stepped up. Such a method is less than ideal when the resistance is susceptible to temperature, so the accuracy will not be accurate enough.
因此,如何設計一個軟啟動電路,在產生具有正值或負值的逐次變化的輸出電壓時,能保有高準確度,乃為此一業界亟待解決的問題。Therefore, how to design a soft-start circuit can maintain high accuracy when generating a continuously varying output voltage with positive or negative values, which is an urgent problem to be solved in the industry.
因此,本發明之一態樣是在提供一種軟啟動電路,包含:輸入級、泵級、第二電阻以及電容。輸入級用以接收輸入電壓,以於第一端點提供參考電流,其中輸入級包含第一電阻,俾使參考電流為輸入電壓及第一電阻之比值;泵級包含N個並聯且各包含電流源以及開關之電流分支,電流源連接於第一端點,開關連接於第二端點,以於開關工作於連接狀態時自電流源傳送電流至第二端點,以及於開關工作於斷開狀態時停止自電流源傳送電流,其中N個開關具有2N 個依序執行之連接模式,以於第二端點產生具有逐次變化之輸出電流,以產生2N 個電流層級;以及第二電阻及電容並聯於第二端點及接地電位間,俾接收輸出電流,於第二端點產生具有逐次變化之輸出電壓,以根據輸出電流及第二電阻之乘積產生2N 個電壓層級。Accordingly, one aspect of the present invention is to provide a soft start circuit comprising: an input stage, a pump stage, a second resistor, and a capacitor. The input stage is configured to receive an input voltage to provide a reference current at the first terminal, wherein the input stage includes a first resistor, and the reference current is a ratio of the input voltage to the first resistance; the pump stage includes N parallels and each includes a current a current branch of the source and the switch, the current source is connected to the first end point, and the switch is connected to the second end point, so that the current is transmitted from the current source to the second end point when the switch operates in the connected state, and the switch operates to be disconnected In the state, the current is stopped from the current source, wherein the N switches have 2 N sequential connection modes to generate a successively varying output current at the second end to generate 2 N current levels; and a second resistor And the capacitor is connected in parallel between the second end point and the ground potential, the output current is received, and the output voltage with successive changes is generated at the second end point to generate 2 N voltage levels according to the product of the output current and the second resistance.
應用本發明之優點係在於藉由具有不同的連接模式之開關的軟啟動電路,逐次且穩定地升高輸出電壓,而輕易地達到上述之目的。The advantage of applying the present invention is that the above-mentioned purpose is easily achieved by sequentially and stably raising the output voltage by a soft start circuit having switches of different connection modes.
請參照第1圖,係為本發明之第一實施例之軟啟動電路1之一示意圖。軟啟動電路1包含輸入級10、泵級12、第二電阻14以及電容16。輸入級10用以接收輸入電壓Vi以於第一端點11提供參考電流101。其中,輸入級10包含第一電阻100,俾使參考電流101之電流值為輸入電壓Vi及第一電阻R1 之比值。意即,如果參考電流101之電流值為Ir,則參考電流101、輸入電壓Vi及第一電阻R1 之關係式可表示為Ir=Vi/R1 。於本實施例中,輸入級10更包含操作放大器102以及N型金氧半電晶體104。其中操作放大器102係實質地接收輸入電壓Vi,以控制N型金氧半電晶體104,進而產生參考電流101。於其他實施例中,係可採用其他電路以產生參考電流101。Please refer to FIG. 1 , which is a schematic diagram of a soft start circuit 1 according to a first embodiment of the present invention. The soft start circuit 1 includes an input stage 10, a pump stage 12, a second resistor 14, and a capacitor 16. The input stage 10 is configured to receive the input voltage Vi to provide a reference current 101 at the first terminal 11 . Wherein a first input stage 10 comprises a resistor 100 to enabling 101 the current value of reference current input voltage Vi and the ratio of the first resistor R 1. That is, if the current value of the reference current 101 is Ir, the relationship between the reference current 101, the input voltage Vi, and the first resistor R 1 can be expressed as Ir=Vi/R 1 . In the present embodiment, the input stage 10 further includes an operational amplifier 102 and an N-type MOS transistor 104. The operational amplifier 102 substantially receives the input voltage Vi to control the N-type MOS transistor 104, thereby generating a reference current 101. In other embodiments, other circuits may be employed to generate the reference current 101.
本實施例之泵級12包含七個並聯且各包含電流源120a以及開關120b之電流分支120。各電流分支120中的電流源120a連接於第一端點11,開關120b連接於第二端點13。當開關120b工作於連接狀態時,電流分支120自電流源120a傳送電流至第二端點13。而當開關120b工作於斷開狀態時,電流分支120停止自電流源120a傳送電流。七個電流分支120共具有七個開關120b,因此七個開關120b具有27 個連接模式。在27 個連接模式依序執行後,將於第二端點13產生具有逐次變化之輸出電流121,以產生27 ,意即128個電流層級的輸出電流121。如果七個開關120b係工作於七個開關120b皆位於斷開狀態的連接模式,則泵級12將不會產生任何的輸出電流121。而如果七個開關120b中,僅具有最小電流值之電流源120a對應之開關120b位於連接狀態,則泵級12將產生最小值的輸出電流121。而如果七個開關120b係工作於七個開關120b皆位於連接狀態的連接模式,則泵級12將產生最大值的輸出電流121。在一實施例中,當參考電流101之電流值係為Ir,七個電流分支120之電流源120a之電流值係分別為Ir/21 、Ir/22 、Ir/23 、...、Ir/27 。則輸出電流121之最大值係為(1/21 +1/22 +1/23 +...+1/27 )*Ir,係為一等於參考電流101之值。須注意的是,於其他實施例中,各電流分支120間的比值係可因應需求而變動。因此,如上所述,當連接模式依序自未產生任何電流的第一個連接模式,切換至產生最大值輸出電流121的最後一個連接模式,則將在第二端點13產生具有逐次變化之輸出電流121。並且,輸出電流121的上升率將可藉由各連接模式間的切換速度來進行精確的調整。於本實施例中,上述之逐次變化係為一正值,使輸出電流121往正的方向逐次增加,然而於其他實施例中,如果所產生的輸出電流121係為一負值,則逐次變化係為負值,使輸出電流121往負的方向逐次增加。而連接模式將依序自未產生任何電流的第一個連接模式,切換至產生最負值的輸出電流121的最後一個連接模式,並在第二端點13產生具有負向逐次變化之輸出電流121。The pump stage 12 of the present embodiment includes seven current branches 120 that are connected in parallel and each including a current source 120a and a switch 120b. Current source 120a in each current branch 120 is coupled to a first terminal 11 and switch 120b is coupled to a second terminal 13. Current branch 120 transfers current from current source 120a to second terminal 13 when switch 120b is operating in the connected state. When the switch 120b is operating in the off state, the current branch 120 stops transmitting current from the current source 120a. The seven current branches 120 have a total of seven switches 120b, so the seven switches 120b have 27 connection modes. After the 27 connection modes are sequentially executed, an output current 121 having a successive change is generated at the second terminal 13 to generate an output current 121 of 27 , that is, 128 current levels. If the seven switches 120b are operating in a connected mode in which all of the seven switches 120b are in the off state, the pump stage 12 will not generate any output current 121. If, among the seven switches 120b, only the switch 120b corresponding to the current source 120a having the smallest current value is in the connected state, the pump stage 12 will generate the minimum output current 121. If the seven switches 120b are operating in a connected mode in which all of the seven switches 120b are in the connected state, the pump stage 12 will produce a maximum output current 121. In one embodiment, when the current value of the reference current 101 is Ir, the current values of the current sources 120a of the seven current branches 120 are Ir/2 1 , Ir/2 2 , Ir/2 3 , ... , Ir/2 7 . Then, the maximum value of the output current 121 is (1/2 1 + 1/2 2 + 1/2 3 + ... + 1/2 7 ) * Ir, which is a value equal to the reference current 101. It should be noted that in other embodiments, the ratio between the current branches 120 may vary depending on the needs. Therefore, as described above, when the connection mode sequentially switches from the first connection mode in which no current is generated to the last connection mode in which the maximum output current 121 is generated, it will be successively changed at the second end point 13. Output current 121. Moreover, the rate of increase of the output current 121 can be accurately adjusted by the switching speed between the connection modes. In this embodiment, the successive changes are a positive value, and the output current 121 is sequentially increased in the positive direction. However, in other embodiments, if the generated output current 121 is a negative value, the successive changes are performed. It is a negative value, and the output current 121 is successively increased in the negative direction. The connection mode will switch from the first connection mode in which no current is generated to the last connection mode in which the most negative output current 121 is generated, and generate an output current having a negative direction successively change at the second terminal 13 121.
第二電阻14及電容16並聯於第二端點13及接地電位GND間,俾接收輸出電流121,以於第二端點13產生具有逐次變化之輸出電壓Vo,以根據輸出電流121及第二電阻14之乘積產生27 個電壓層級。如果輸出電壓之值為Vo、第二電阻14之電阻值為R2 且輸出電流之值為Io,則輸出電壓、第二電阻及輸出電流之關係係為Vo=R2 * Io。當輸出電流121達到如上述之最大值,則輸出電壓係為Vo=R2 * Io=R2 * (1/21 +1/22 +1/23 +...+1/27 )* Ir=R2 * (1/21 +1/22 +1/23 +...+1/27 )* Vi/R1 。須注意的是1/21 +1/22 +1/23 +...+1/27 係為一趨近於1的值,因此上述的關係式可簡化為Vo=Vi* R2 /R1 。當第一及第二電阻100及14具有相同的阻值時,輸出電壓Vo之最大值係為輸入電壓Vi之一近似值。而於其他實施例中,當第二電阻14具有大於第一電阻100之阻值時,所產生之輸出電壓Vo之最大值係大於輸入電壓Vi。因此,輸出電壓Vo係可經由第一及第二電阻100及14阻值比例之設計而進行精確的調整。經由不同的連接模式之切換而產生的輸出電壓Vo以及輸出電流121,提供了精確的軟啟動機制,而使連接於第二端點13,用以接收輸出電壓Vo的一個外部電路18免於遭受突波電流的損害。須注意的是,於前述之負值的輸出電流之實施例中,所對應之輸出電壓亦為一負值,因此將產生具有負向逐次變化之輸出電壓Vo。連接模式將依序自未產生任何電壓的第一個連接模式,切換至產生最負值的輸出電壓Vo的最後一個連接模式,並在第二端點13產生具有負向逐次變化之輸出電壓Vo。The second resistor 14 and the capacitor 16 are connected in parallel between the second terminal 13 and the ground potential GND, and receive the output current 121 to generate a successively varying output voltage Vo at the second terminal 13 to be based on the output current 121 and the second The product of resistors 14 produces 27 voltage levels. If the value of the output voltage is Vo, the resistance value of the second resistor 14 is R 2 , and the value of the output current is Io, the relationship between the output voltage, the second resistance, and the output current is Vo=R 2 * Io. When the output current 121 reaches the maximum value as described above, the output voltage is Vo=R 2 * Io=R 2 * (1/2 1 +1/2 2 +1/2 3 +...+1/2 7 * Ir = R 2 * (1/2 1 + 1/2 2 + 1/2 3 + ... + 1/2 7 ) * Vi / R 1 . It should be noted that 1/2 1 +1/2 2 +1/2 3 +...+1/2 7 is a value close to 1, so the above relationship can be simplified to Vo=Vi * R 2 /R 1 . When the first and second resistors 100 and 14 have the same resistance, the maximum value of the output voltage Vo is an approximation of the input voltage Vi. In other embodiments, when the second resistor 14 has a resistance greater than the resistance of the first resistor 100, the maximum value of the generated output voltage Vo is greater than the input voltage Vi. Therefore, the output voltage Vo can be accurately adjusted through the design of the resistance ratios of the first and second resistors 100 and 14. The output voltage Vo and the output current 121 generated by switching between different connection modes provide an accurate soft start mechanism, so that an external circuit 18 connected to the second terminal 13 for receiving the output voltage Vo is protected from suffering Damage to the surge current. It should be noted that in the embodiment of the negative output current described above, the corresponding output voltage is also a negative value, so that an output voltage Vo having a negative successive change will be generated. The connection mode will sequentially switch from the first connection mode in which no voltage is generated to the last connection mode in which the most negative output voltage Vo is generated, and generate an output voltage Vo having a negative direction successively change at the second terminal 13 .
本實施例中的軟啟動電路藉由自未產生任何電流的第一個連接模式,切換至產生最大值輸出電流的最後一個連接模式,而產生具有逐次變化之輸出電流及輸出電壓,而達到軟啟動機制的效果。泵級中各電流分支所包含之電流源與容易遭受溫度影響的電阻相較之下穩定許多。因此,本實施例中的軟啟動電路提供了具有更精確的電壓、電流層級以及更精確的電壓、電流上升率的軟啟動機制。The soft start circuit in this embodiment switches to the last connection mode that generates the maximum output current by the first connection mode from which no current is generated, and generates the output current and the output voltage with successive changes, and reaches the soft state. The effect of the startup mechanism. The current sources contained in each current branch of the pump stage are much more stable than those susceptible to temperature. Therefore, the soft start circuit in this embodiment provides a soft start mechanism with a more accurate voltage, current level, and more accurate voltage and current rise rates.
請參照第2圖,係為本發明之第二實施例中,軟啟動電路2之示意圖。本實施例中的軟啟動電路2與第一實施例中的軟啟動電路相似,然而,軟啟動電路2更包含一下限電壓模組20實質連接於第二電阻14及該接地電位GND間。其中下限電壓模組20係用以傳送下限電壓Vb至第二端點13,以使第二端點13之電壓係為輸出電壓Vo及下限電壓Vb之總和。須注意的是,本實施例中的下限電壓模組20包含電阻200、操作放大器202以及N型金氧半電晶體204。操作放大器202接收下限電壓Vb以控制N型金氧半電晶體204,以傳送下限電壓Vb至第二端點13。於其他實施例中,係可採用其他種類的電路以達到傳送下限電壓的效果。下限電壓Vb提供了一個額外的電壓,係可使輸出電壓在達到最大值時,使外部電路18接收大於輸入電壓Vo之輸出電壓。下限電壓Vb之電壓值在不同的實施例中,係可因應不同之情況而做調整。Please refer to FIG. 2, which is a schematic diagram of the soft start circuit 2 in the second embodiment of the present invention. The soft start circuit 2 in this embodiment is similar to the soft start circuit in the first embodiment. However, the soft start circuit 2 further includes a lower limit voltage module 20 substantially connected between the second resistor 14 and the ground potential GND. The lower limit voltage module 20 is configured to transmit the lower limit voltage Vb to the second end point 13 such that the voltage of the second end point 13 is the sum of the output voltage Vo and the lower limit voltage Vb. It should be noted that the lower limit voltage module 20 in this embodiment includes a resistor 200, an operational amplifier 202, and an N-type MOS transistor 204. The operational amplifier 202 receives the lower limit voltage Vb to control the N-type MOS transistor 204 to deliver the lower limit voltage Vb to the second terminal 13. In other embodiments, other types of circuitry may be employed to achieve the effect of delivering a lower voltage limit. The lower limit voltage Vb provides an additional voltage that causes the external circuit 18 to receive an output voltage greater than the input voltage Vo when the output voltage reaches a maximum value. The voltage value of the lower limit voltage Vb can be adjusted in different embodiments depending on the situation.
請參照第3圖,係為本發明之第三實施例中,軟啟動電路3之示意圖。本實施例中的軟啟動電路3與第一實施例中的軟啟動電路相似,然而,軟啟動電路3更包含一直接輸出模組30,其中外部電路18係連接於直接輸出模組30。直接輸出模組30係自第二端點13接收輸出電壓Vo,當泵級12之開關120b均工作於連接狀態而使輸出電壓Vo達到最大值時,直接輸出模組30係直接將輸入電壓Vi傳送至外部電路18。須注意的是,第一實施例中的輸出電壓Vo係僅為輸入電壓Vi之近似值,因此,如外部電路18須要精確的電壓準位時,直接輸出模組30係可在軟啟動過程結束後提供精確的電壓準位給外部電路18。更進一步地,本實施例亦可應用於第二實施例中,使當泵級12之開關120b均工作於連接狀態而使輸出電壓Vo達到最大值時,直接輸出模組30係直接將輸入電壓Vi及下限電壓Vb之總和傳送至外部電路18。Please refer to FIG. 3, which is a schematic diagram of the soft start circuit 3 in the third embodiment of the present invention. The soft start circuit 3 in this embodiment is similar to the soft start circuit in the first embodiment. However, the soft start circuit 3 further includes a direct output module 30, wherein the external circuit 18 is connected to the direct output module 30. The direct output module 30 receives the output voltage Vo from the second terminal 13 . When the switch 120b of the pump stage 12 is in the connected state and the output voltage Vo reaches the maximum value, the direct output module 30 directly inputs the input voltage Vi. Transfer to external circuit 18. It should be noted that the output voltage Vo in the first embodiment is only an approximation of the input voltage Vi. Therefore, if the external circuit 18 requires an accurate voltage level, the direct output module 30 can be after the soft start process. An accurate voltage level is provided to the external circuit 18. Furthermore, the present embodiment can also be applied to the second embodiment, so that when the switch 120b of the pump stage 12 is in the connected state and the output voltage Vo reaches the maximum value, the direct output module 30 directly inputs the input voltage. The sum of Vi and the lower limit voltage Vb is transferred to the external circuit 18.
本發明之軟啟動電路可藉由電流源及開關產生具有逐次變化之輸出電壓,以達到具有高精確度及高穩定度之軟啟動機制。更進一步地,輸出電壓之最大值準位可藉由第一及第二電阻間的比值,或是下限電壓之設計來進行調整。並且,直接輸出模組之設計更可維持輸出電壓最大值之精確度。The soft start circuit of the present invention can generate a successively varying output voltage by a current source and a switch to achieve a soft start mechanism with high accuracy and high stability. Furthermore, the maximum value of the output voltage can be adjusted by the ratio between the first and second resistors or the design of the lower voltage. Moreover, the design of the direct output module can maintain the accuracy of the maximum output voltage.
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.
1...軟啟動電路1. . . Soft start circuit
10...輸入級10. . . Input stage
100...第一電阻100. . . First resistance
101...參考電流101. . . Reference current
102...操作放大器102. . . Operational amplifier
104...N型金氧半電晶體104. . . N-type gold oxide semi-transistor
11...第一端點11. . . First endpoint
12...泵級12. . . Pump stage
120...電流分支120. . . Current branch
120a...電流源120a. . . Battery
120b...開關120b. . . switch
121...輸出電流121. . . Output current
13...第二端點13. . . Second endpoint
14...第二電阻14. . . Second resistance
16...電容16. . . capacitance
18...外部電路18. . . External circuit
20...下限電壓模組20. . . Lower limit voltage module
200...電阻200. . . resistance
202...操作放大器202. . . Operational amplifier
204...N型金氧半電晶體204. . . N-type gold oxide semi-transistor
30...直接輸出模組30. . . Direct output module
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood.
第1圖係為本發明之第一實施例之軟啟動電路之示意圖;1 is a schematic diagram of a soft start circuit of a first embodiment of the present invention;
第2圖係為本發明之第二實施例之軟啟動電路之示意圖;以及2 is a schematic diagram of a soft start circuit of a second embodiment of the present invention;
第3圖係為本發明之第三實施例之軟啟動電路之示意圖。Figure 3 is a schematic diagram of a soft start circuit of a third embodiment of the present invention.
1...軟啟動電路1. . . Soft start circuit
10...輸入級10. . . Input stage
100...第一電阻100. . . First resistance
101...參考電流101. . . Reference current
102...操作放大器102. . . Operational amplifier
104...N型金氧半電晶體104. . . N-type gold oxide semi-transistor
11...第一端點11. . . First endpoint
12...泵級12. . . Pump stage
120...電流分支120. . . Current branch
120a...電流源120a. . . Battery
120b...開關120b. . . switch
121...輸出電流121. . . Output current
13...第二端點13. . . Second endpoint
14...第二電阻14. . . Second resistance
16...電容16. . . capacitance
18...外部電路18. . . External circuit
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW98111558A TWI382660B (en) | 2009-04-07 | 2009-04-07 | Soft-start circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW98111558A TWI382660B (en) | 2009-04-07 | 2009-04-07 | Soft-start circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201037968A TW201037968A (en) | 2010-10-16 |
| TWI382660B true TWI382660B (en) | 2013-01-11 |
Family
ID=44856871
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW98111558A TWI382660B (en) | 2009-04-07 | 2009-04-07 | Soft-start circuit |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI382660B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6650179B2 (en) * | 2000-10-06 | 2003-11-18 | Stmicroelectronics S.A. | Integrated error amplifier |
| US20040022078A1 (en) * | 2002-02-19 | 2004-02-05 | Fairchild Semiconductor Corporation | Soft start techniques for control loops that regulate DC/DC converters |
-
2009
- 2009-04-07 TW TW98111558A patent/TWI382660B/en not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6650179B2 (en) * | 2000-10-06 | 2003-11-18 | Stmicroelectronics S.A. | Integrated error amplifier |
| US20040022078A1 (en) * | 2002-02-19 | 2004-02-05 | Fairchild Semiconductor Corporation | Soft start techniques for control loops that regulate DC/DC converters |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201037968A (en) | 2010-10-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI535166B (en) | Voltage regulator with soft-start circuit | |
| US8531851B2 (en) | Start-up circuit and method thereof | |
| JP5823717B2 (en) | Voltage regulator | |
| CN105074603B (en) | Digital soft start with lasting oblique ascension | |
| US8030978B2 (en) | Soft-start circuit | |
| US20130162231A1 (en) | Voltage regulator | |
| CN109412395B (en) | Power supply starting adjusting circuit and power supply circuit | |
| CN104426507A (en) | Semiconductor Device And Current Amount Control Method | |
| KR20150105809A (en) | control circuit including load switch, electronic apparatus including the load switch and controlling method thereof | |
| CN114156852B (en) | Surge current control circuit of LDO linear voltage stabilizer | |
| CN103560665A (en) | DC-DC conversion circuit and DC-DC chip | |
| TWI382660B (en) | Soft-start circuit | |
| TW201308814A (en) | Over voltage protection circuit and electronic system for handling hot plug | |
| CN101728823B (en) | voltage regulator | |
| CN104009503A (en) | Charging circuit and its control circuit and control method | |
| TWI534583B (en) | Low-dropout voltage regulator | |
| JP5369703B2 (en) | Semiconductor integrated circuit for regulator | |
| JP7504050B2 (en) | Shunt Regulator | |
| CN113342115B (en) | LDO circuit | |
| CN108352833A (en) | Burr compensation in electronic circuit | |
| TWI852566B (en) | Constant current charging device | |
| TWI395078B (en) | Shunt regulator | |
| TWI911407B (en) | Shunt regulator | |
| TW201315120A (en) | Charge pump system capable of stabilizing an output voltage | |
| CN105187037B (en) | Pulse width modulation system control method and its error action preventing circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |