TWI379135B - Pixel structure and repair method thereof, display panel and repair method thereof, and electro-optical apparatus and repair method thereof - Google Patents
Pixel structure and repair method thereof, display panel and repair method thereof, and electro-optical apparatus and repair method thereof Download PDFInfo
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- Liquid Crystal (AREA)
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Description
99-6-28 九、發明說明: 【發明所屬之技術領域】 ,B本發明是有關於一種顯示面板及其修補方法,且特 別是有關於一種畫素結構及其修補方法。 【先前技術】 過去陰極射線管(Cathode Ray Tube,CRT)—直獨佔 顯不器市場’然而目為陰極射線管之體積龐大、且有輻 射與消耗能源的議題,無法滿足消費者對於輕、薄、短、 小以及低消耗功率的需求。因此,具有高畫質、空間利 用效率佳、低消耗功率、無輻射等優越特性之薄膜電晶 體液阳顯示斋(Thin Film Transistor-Liquid Crystal Display, TFT-LCD)已逐漸成為市場之主流。 ’ 薄膜電晶體液晶顯示器(TFT_LCD)主要由薄膜電晶 ,陣列基板、彩色濾光陣列基板和液晶層所構成,其中 薄膜電晶體陣列基板是由多個陣列排列之晝素結構所構 成,每一畫素結構係由一薄膜電晶體、一晝素電極(pixd electrode)以及一儲存電容器(st〇mge capacit〇r)所組成。當 晝素結構中的儲存電容器因顆粒或介電層破洞而發生異 常茂漏時,此畫素結構便會成為點瑕疵(d〇t defect)。然 而’若直接報廢吾棄這些有瑕疵的液晶顯示面板,將會 使得製造成本大幅增加一般來說,只依賴改善製程技 術來實現零瑕疲率是非常困難的,因此液晶顯示面板的 瑕疵修補技術變得相當地重要。在習知技術中,液晶顯 示面板的瑕疲修補通常採用雷射熔接(la ser welding)或雷 5 1379135 99-6-28 射切割(laser cutting)等方式進行。以薄膜電晶體液晶顯示 裔(TFT-LCD)為例,雷射炫接或切割的動作通常是在‘薄膜 電晶體陣列(TFTarray)製作完成後進行。然而,由於畫素 結構設計的緣故,並非每一種瑕疵都能快速修復,有些 瑕疵甚至難以修復。 —99-6-28 IX. Description of the invention: [Technical field to which the invention pertains], B The present invention relates to a display panel and a repairing method thereof, and in particular to a pixel structure and a repairing method thereof. [Prior Art] In the past, cathode ray tube (CRT)—straight to dominate the market. However, the cathode ray tube is bulky and has radiation and energy consumption. It cannot satisfy consumers' light and thin. Short, small and low power consumption requirements. Therefore, Thin Film Transistor-Liquid Crystal Display (TFT-LCD), which has high image quality, good space efficiency, low power consumption, and no radiation, has gradually become the mainstream of the market. The thin film transistor liquid crystal display (TFT_LCD) is mainly composed of a thin film electrocrystal, an array substrate, a color filter array substrate and a liquid crystal layer, wherein the thin film transistor array substrate is composed of a plurality of arrays of pixel structures, each of which The pixel structure is composed of a thin film transistor, a pixd electrode, and a storage capacitor (st〇mge capacit〇r). When the storage capacitor in the halogen structure is abnormally leaked due to the breakage of the particles or the dielectric layer, the pixel structure becomes a defect. However, if you directly abandon these defective LCD panels, it will greatly increase the manufacturing cost. Generally speaking, it is very difficult to rely on improving the process technology to achieve zero fatigue rate. Therefore, the liquid crystal display panel is repaired. It has become quite important. In the prior art, the fatigue repair of the liquid crystal display panel is usually performed by means of la ser welding or laser cutting. In the case of a thin film transistor liquid crystal display (TFT-LCD), the action of laser splicing or cutting is usually performed after the fabrication of a thin film transistor array (TFTarray). However, due to the structural design of the pixels, not every flaw can be quickly repaired, and some are even difficult to repair. -
圖1為習知技術冬晝素結構及其修補位置之剖面示 意圖。請參照圖1,習知的畫素結構10〇包括基板u〇、 半導體層120、閘絕錶層130、第一金屬層14〇、介電層 150、第^一金屬層160、保護層170、平坦層18〇以及透 明導電層190。BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing the structure of the winter matsin and its repairing position. Referring to FIG. 1 , the conventional pixel structure 10 includes a substrate u , a semiconductor layer 120 , a gate layer 130 , a first metal layer 14 , a dielectric layer 150 , a first metal layer 160 , and a protective layer 170 . a flat layer 18 〇 and a transparent conductive layer 190.
上述之圖案化的半導體層120位於基板11〇上。閘 絕緣層130覆蓋住圖案化的半導體層12〇。圖案化的第一 金屬層140位於閘絕緣層130上方。介電層150覆蓋住 圖案化的第一金屬層140以及閘絕緣層丨3〇。介電層15〇 與閘絕緣層130具有接觸窗152及接觸窗154,以暴露出 部分半導體層120。圖案化的第二金屬層位於介電層 150,且圖案化的第二金屬層160經由接觸窗152及接觸 窗154與半導體層120電性連接。保護層17〇位於介電 層150及第二金屬層160之上。平坦層180覆蓋住保護 層170 ’且平坦層180與保護層no具有接觸窗172,且 接觸窗172暴露出部分第二金屬層16〇。透明導電層19〇 位於平坦層180之上,且透明導電層190經由接觸窗172 與第二金屬層160電性連接。圖1可知,晝素結構100 中的開關元件為低溫多晶石夕(L〇w TemperatureThe patterned semiconductor layer 120 described above is located on the substrate 11A. The gate insulating layer 130 covers the patterned semiconductor layer 12A. The patterned first metal layer 140 is over the gate insulating layer 130. A dielectric layer 150 covers the patterned first metal layer 140 and the gate insulating layer 丨3〇. The dielectric layer 15A and the gate insulating layer 130 have a contact window 152 and a contact window 154 to expose a portion of the semiconductor layer 120. The patterned second metal layer is located on the dielectric layer 150, and the patterned second metal layer 160 is electrically connected to the semiconductor layer 120 via the contact window 152 and the contact window 154. The protective layer 17 is located above the dielectric layer 150 and the second metal layer 160. The flat layer 180 covers the protective layer 170' and the flat layer 180 and the protective layer no have a contact window 172, and the contact window 172 exposes a portion of the second metal layer 16'. The transparent conductive layer 19 is located above the flat layer 180, and the transparent conductive layer 190 is electrically connected to the second metal layer 160 via the contact window 172. As can be seen from Fig. 1, the switching element in the halogen structure 100 is a low temperature polycrystalline stone (L〇w Temperature
Polycrystalline Silicon,LTPS)頂閘型薄膜電晶體。 6 1379135 99-6-28 當二:二二畫素結構100出現瑕疵時’習知技術 ^ aaZ°^ 作切割,並在虛線框格106的位置熔 接透明導電層190蛊窜人摄α 置格 !9〇直接與第-金屬;^^ 〇,以使透明導電層 常造成熔接成功平坦層18G太厚,時 .^ 因此,如何提昇畫·素結構100 的修補良率,㈣从當前重要課題。 【發明内容】 其閘極會與通道層相連 本發明提供一種晝 接 良率 本發明提供1晝素修補方法,其具有較高的修補 士發明提供-種晝素結構,其配置於一基板上,並 ^ _,描線以及1料線電性連接。晝素結構包括-主 =件以及-晝素電極。主動元件配置於基板上。主動 =件包括-圖案化半導體層、—閘絕緣層、—閘極以及 接觸導體層。間極與掃描線電性連接。閘絕緣層位於 二案化半導體層相極之間。®s化半導體層具有彼此 第j絕緣之-第—半導體區塊以及—第二半導體區塊。 一半導體區塊與閘極相連接。接觸導體層具有一與第 :半,體區塊連接之第一接觸導體區塊以及一與第二半 3區塊連接之第二接觸導魏塊。第二半導體區塊與 '貝料線電性連接。晝素電極與第—接觸導體區塊電性連 接。 7 1379135 99-6-28 ^發明提供_種修補方法,其適於修補—種畫素结 ^晝素結構配置^基板,並與—掃描線以及:資料 、性連接。晝素結構包括-主較件與—晝素電極。 主動元件配置於基板上’且主動元件包括—时化半導 $層、-閘絕緣層、-閘極以及一接觸導體層。閘極盘 知描線電性連接。閘絕緣層位於圖案化半導體層與閑招 之間。接觸導體層具有-連接於畫素電極與圖案化 3 =第一接觸導體區塊以及一連接於資料線與圖 - 導體層之間的第二接觸導體區塊^修補方法包 切斷圖案化半導體層,使圖案化半導體層分為—第 導體區塊以及—第二半導體區塊,以使電性連接於畫素 電極之第-半導體區塊與電性連接於資料線之第二半導 二區塊電性絕緣。然後’將閘極與第一半導體區塊相連 由於本發明之晝素結構具有閘極與第一半導體區塊 相連接的結構,可使閘極經由第一半導體區塊以及第一 接觸導體H塊與晝素電極電性連接,進而使閘極與晝素 電極具有相同的電壓。與習知的晝素結構相比,本&明 之畫素結構在進行修補時,修補位置不會受限於晝素電 極的位置,且本發明將閘極與圖案化半導體層之第—半 導塊連接的難度較低,因此本發明之晝素電極較易 為讓本發明之上述和其他目的、特徵和優點能更明 顯易懂,下文特舉較佳實施例,並配合所附圖式, 細說明如下。 8 1379135 99-6-28 【實施方式】 〔第一實施例〕 圖2A為本發明第一實施例的晝素結 為本發㈣—實_的晝素結構之剖 同=照圖2A及圖2B,本實施例之晝素結構2〇〇配^ 於基板s上,且晝素結構200與掃描線% α及資 DL電性連接。由圖2Β可清楚得知,本實施例之畫辛^ 構200包括-主動元件21〇以及一晝素電極22〇,其中主 動元件210包括一圖案化半導體層212、一閑絕緣声 214、-閘極216以及一接觸導體層218。閘極216與^ 描線SL電性連接。閘絕緣層214位於圖案化半導體層^2 與閘極216之間。此外,接觸導體層218具有一連接於 晝素電極220與圖案化半導體層212之間的第一接觸導 體區塊218D以及一連接於資料線DL與圖案化半導體層 212之間的第二接觸導體區塊218S。換言之,在圖2B中, J一接觸導體區塊2180、第二接觸導體區塊218S以及 資料線DL皆是經由圖案化接觸導體層218後所定義出來 的。此外,第一接觸導體區塊218D亦可稱為汲極,而第 二接觸導體區塊218S亦可稱為源極。 在本實施例中,半導體層212可為單層結構或多層 結構’且其材料可為多晶矽。換言之,主動元件21〇為 多晶石夕薄膜電晶體,但不限於此,亦可使用其它晶格之 材質,如:非晶矽、單晶矽、微晶矽、奈米晶矽、或上 述晶格具有摻雜物之矽化合物、或上述晶格之含鍺矽化 合物、或上述晶系之有機半導體、或其它合適材料、或 9 1379135 99-6-28 上述之組合。閘絕緣層214可為單層結構或多層結構, 且其材料例如是無機材質(如:氧化矽、氮化矽、氮氧化 矽、氧化銘、氧化组、氟梦玻璃(fIu〇rinated 〇xi(Je,FS(})、 或其它材料、或上述之組合)、有機材質(如:如:光阻、 聚丙醯醚(p〇lyaryleneether;PAE)、聚醯類、聚g旨魅、 .聚醇類、聚_、苯並環丁婦(benzocyclbt= BCB) ^ HSQ (hydrogen silsesquioxane) > MSQ(methyl . sihquioxane)、矽氧碳氫化物(SiOC_H)、聚醚類、聚 I 峨、《類、聚_、聚魏類 '聚環氧錄 此外’接觸導體層218可為單層 帛、㈣_、或其它材料、或上述之組合)、或上述之 組合,而開極216可為單層結構或多層結構,且其材質 例如是金、銀、銅、錫、鋁、鉛、鈦、鉬、鉉、鎢、鈮、 铪、鉻、域其他金屬材料、或上述之氮化物、或上述 之氧化物、或上述之合金、導電聚合物、或上述之組合。 了為單層結構或多層結構,且其Polycrystalline Silicon, LTPS) top gate thin film transistor. 6 1379135 99-6-28 When the second: two-two pixel structure 100 appears 瑕疵 'known technology ^ aaZ ° ^ for cutting, and the transparent conductive layer 190 at the position of the dotted frame 610 蛊窜 摄 摄 置 置!9〇 directly with the first metal; ^^ 〇, so that the transparent conductive layer often causes the welding success. The flat layer 18G is too thick, when. ^ Therefore, how to improve the repair rate of the prime structure 100, (4) from the current important issues . SUMMARY OF THE INVENTION The gate is connected to the channel layer. The present invention provides a splicing yield. The present invention provides a sputum repairing method, which has a high-quality patch-providing structure, which is disposed on a substrate. , and ^ _, trace line and 1 material line electrical connection. The halogen structure includes a -main = piece and a halogen element. The active component is disposed on the substrate. The active = component includes a patterned semiconductor layer, a gate insulating layer, a gate, and a contact conductor layer. The interpole is electrically connected to the scan line. The gate insulating layer is located between the phase poles of the second semiconductor layer. The ® s semiconductor layer has a -th semiconductor block and a second semiconductor block insulated from each other. A semiconductor block is connected to the gate. The contact conductor layer has a first contact conductor block connected to the first half, the body block, and a second contact conductive block connected to the second half 3 block. The second semiconductor block is electrically connected to the 'bee feed line. The halogen electrode is electrically connected to the first contact conductor block. 7 1379135 99-6-28 ^Inventive provides a method for repairing, which is suitable for repairing - a pixel structure, a structure, a substrate, and a - scan line and: data, sexual connection. The halogen structure includes a main component and a halogen electrode. The active component is disposed on the substrate ‘and the active component includes a time-inducing semiconductor layer, a gate insulating layer, a gate, and a contact conductor layer. The gate plate is electrically connected to the trace line. The gate insulating layer is located between the patterned semiconductor layer and the idler. The contact conductor layer has a second contact conductor block connected to the pixel electrode and the patterned 3 = first contact conductor block and a connection between the data line and the pattern-conductor layer. a layer, the patterned semiconductor layer is divided into a first conductor block and a second semiconductor block to electrically connect the first semiconductor block electrically connected to the pixel electrode and the second semiconductor half electrically connected to the data line The block is electrically insulated. Then, the gate is connected to the first semiconductor block. Since the halogen structure of the present invention has a structure in which the gate is connected to the first semiconductor block, the gate can be passed through the first semiconductor block and the first contact conductor H block. It is electrically connected to the halogen electrode, so that the gate has the same voltage as the halogen electrode. Compared with the conventional halogen structure, the repaired position of the present & plain pixel structure is not limited by the position of the halogen electrode, and the present invention combines the gate and the patterned semiconductor layer The above-described and other objects, features and advantages of the present invention will become more apparent and obvious. , as detailed below. 8 1379135 99-6-28 [Embodiment] [First Embodiment] FIG. 2A is a cross-sectional view showing the structure of a halogen element of the first embodiment of the present invention (four)-real_= FIG. 2A and FIG. 2B, the halogen structure 2 of the present embodiment is disposed on the substrate s, and the halogen structure 200 is electrically connected to the scan lines %α and DL. It can be clearly seen from FIG. 2 that the drawing device 200 of the present embodiment includes an active device 21A and a halogen electrode 22A, wherein the active device 210 includes a patterned semiconductor layer 212, an idle insulating sound 214, and The gate 216 and a contact conductor layer 218. The gate 216 is electrically connected to the trace SL. The gate insulating layer 214 is located between the patterned semiconductor layer 2 and the gate 216. In addition, the contact conductor layer 218 has a first contact conductor block 218D connected between the pixel electrode 220 and the patterned semiconductor layer 212 and a second contact conductor connected between the data line DL and the patterned semiconductor layer 212. Block 218S. In other words, in Fig. 2B, J-contact conductor block 2180, second contact conductor block 218S, and data line DL are all defined by patterning contact conductor layer 218. In addition, the first contact conductor block 218D may also be referred to as a drain, and the second contact conductor block 218S may also be referred to as a source. In the present embodiment, the semiconductor layer 212 may be a single layer structure or a multilayer structure ' and its material may be polycrystalline germanium. In other words, the active device 21 is a polycrystalline thin film transistor, but is not limited thereto, and other lattice materials such as amorphous germanium, single crystal germanium, microcrystalline germanium, nanocrystalline germanium, or the like may be used. The crystal lattice has a dopant compound, or a lattice-containing cerium compound, or an organic semiconductor of the above crystal system, or other suitable material, or a combination of the above-mentioned 9 1379135 99-6-28. The gate insulating layer 214 may be a single layer structure or a multilayer structure, and the material thereof is, for example, an inorganic material (eg, yttrium oxide, tantalum nitride, ytterbium oxynitride, oxidized sulphur, oxidized group, fluorine dream glass (fIu〇rinated 〇xi ( Je, FS (}), or other materials, or a combination of the above), organic materials (such as: photoresist, polyacrylic ether (PAE), polyfluorene, poly g, charcoal Class, poly-, benzocyclbt = BCB ^ HSQ (hydrogen silsesquioxane) > MSQ (methyl. sihquioxane), hydrogenated hydrocarbon (SiOC_H), polyether, poly-I, "class, The poly-, poly-Wei-type poly-epoxy recording further contact conductor layer 218 may be a single layer of tantalum, (four) _, or other materials, or a combination thereof, or a combination thereof, and the open pole 216 may be a single layer structure or a multilayer structure, and the material thereof is, for example, gold, silver, copper, tin, aluminum, lead, titanium, molybdenum, niobium, tungsten, tantalum, niobium, chromium, other metal materials, or nitrides thereof, or oxides thereof Or the above alloy, conductive polymer, or a combination thereof, is a single layer structure or a multilayer structure, and its
絲鋅氧化物等或上述之組合)、 10 t 〇物、或上述之組合。本實施例是以透明材質之 銦錫,化物作為畫素電極22〇當作實施範例,但不限於 當畫素結構200為穿透式畫素結構時,晝素電極22〇 ,可採用具有透明特性的導電材料來製作。當晝素結構 20〇為反射式晝素結構時,畫素電極220亦可採=具^反 射特性或非透明的導電材料來製作。再者,當晝^結構 2⑽為半穿透半反射式畫素結構時’晝素電極22G亦可同 時採用具有反射特性或非透明的導電材料以及透明導雷 材料來製作。 圖2C為圖2B之畫素結構經過修補後之示意圖。請 參照圖2C,當晝素結構200出現瑕疵而無法正常運作 時,本實施例可先在切割線c處將圖案化半導體層212 切割成兩個彼此分離的第一半導體區塊212a以及第二半 導體區塊212b,以使電性連接於晝素電極220之第一半 導體區塊212a與電性連接於資料線DL之第二半導體區 塊212b電性絕緣。之後,再將閘極216與第一半導體區 塊212a相連接,由圖2C可知,閘極216.與第一半導體 區塊212a的連接處w通常是在閘極216下方。但是必需 說明的是上述步驟,亦可先連接閘極216與第一半導體 區塊212a相連接後,再在切割線c處將圖案化半導體層 212切割成兩個彼此分離的第一半導體區塊212a以及第 二半導體區塊212b,以使電性連接於晝素電極220之第 一半導體區塊212a與電性連接於資料線Dl之第二半導 體區塊212b電性絕緣。此外,在本實施例中,較佳地, 晝素結構200更包括一圖案化保護層27()覆蓋於主動元 1379135 99-6-28 件210上,其中圖案化保護層270具有一開口 Η,且晝 素電極220透過開口 Η與第一半導體區塊212a電性連 接,但不限於此’畫素結構亦可不包含圖案化保護層270。Silk zinc oxide or the like or a combination thereof, 10 t mash, or a combination thereof. In this embodiment, the transparent material of indium tin is used as the pixel electrode 22 〇 as an example, but not limited to when the pixel structure 200 is a transmissive pixel structure, the halogen electrode 22 〇 can be transparent. Made of conductive materials of a characteristic. When the halogen structure 20 is a reflective halogen structure, the pixel electrode 220 can also be fabricated by using a reflective material or a non-transparent conductive material. Further, when the structure 2 (10) is a transflective pixel structure, the germanium electrode 22G can also be formed by using a conductive material having a reflective property or a non-transparent property and a transparent lightning-guide material. 2C is a schematic view of the pixel structure of FIG. 2B after being repaired. Referring to FIG. 2C, when the halogen structure 200 is defective and cannot function normally, the embodiment may first cut the patterned semiconductor layer 212 into two first semiconductor blocks 212a and 212 separated from each other at the cutting line c. The semiconductor block 212b electrically insulates the first semiconductor block 212a electrically connected to the pixel electrode 220 from the second semiconductor block 212b electrically connected to the data line DL. Thereafter, the gate 216 is connected to the first semiconductor block 212a. As can be seen from Fig. 2C, the junction w of the gate 216. and the first semiconductor block 212a is usually below the gate 216. However, it is necessary to explain the above steps. First, after the connection gate 216 is connected to the first semiconductor block 212a, the patterned semiconductor layer 212 is cut into two first semiconductor blocks separated from each other at the dicing line c. The second semiconductor block 212b is electrically insulated from the second semiconductor block 212b electrically connected to the data line D1. In addition, in the embodiment, the halogen structure 200 further includes a patterned protective layer 27 () covering the active element 1379135 99-6-28, wherein the patterned protective layer 270 has an opening. The halogen electrode 220 is electrically connected to the first semiconductor block 212a through the opening ,, but is not limited to the 'pixel structure' or the patterned protective layer 270.
在本實施例中,將圖案化半導體層212切割為第一半 導體區塊212a以及第二半導體區塊212b的方法例如是雷 射切割(laser cutting),如背面雷射切割(即用以切割圖案 化半導體層212之雷射光束從基板S下方入射)、正面雷 射切割(即用以切割圖案化半導體層212之雷射光束從基 板S上方入射)或同時從正面及背面施加雷射切割。另 外’在本實施例中,將閘極216與第一半導體區塊212a 相連接的方法例如是雷射溶接(laser welding),如背面雷射 溶接(即用以熔接閘極216與第一半導體區塊212a之雷 射光束從基板S下方入射)、正面雷射熔接(即用以熔接 閘極216與第一半導體區塊212a之雷射光束從基板S上 方入射)、或同時從正面及背面施加雷射熔接。在其它實 施例中,亦可a.先將閘極212上方之畫素電極22〇切割成 至少一區域(未繪示)與非閘極212上方之晝素電極220之 另一部份(未繪示)分離而電性絕緣,然後,施加如上述之 正面雷射及背面雷射其中至少一者,來貫通該區域上之各 膜層(如:該區域之晝素電極、覆蓋於閘極上方之至少一 層的介電層(未標註)’例如:内層介電層、閘極絕緣層、 圖案化保護層、平坦層等等及圖案化半導體層212之第一 半導體區塊212a與閘極216,然後,再形成另一導 體層於該區域上,來連接圖案化半導體層212之 第一半導體區塊212a與閘極216,但該區域與該 12 1379135 99-6-28 另-區域電性連接、b如a所述之方式但於全 電極220分成二個區域時,將位於閘極212上方之查:啻 極220或連該區域内之各膜層—起移除,移除之方i = 如:侧、雷射_㈣、e.其它方式、或上述之組合。 承上述,本發明亦可將切割圖案化半導體層212Q的 步驟以及連接閘極216與第-半導體區塊212a的步驟對 調,換言之,本發明並不限定前述之切割步驟與連接+ 驟的執行順序。 乂In the embodiment, the method of cutting the patterned semiconductor layer 212 into the first semiconductor block 212a and the second semiconductor block 212b is, for example, laser cutting, such as back laser cutting (ie, cutting the pattern). The laser beam of the semiconductor layer 212 is incident from below the substrate S, the front side laser cut (i.e., the laser beam for cutting the patterned semiconductor layer 212 is incident from above the substrate S) or the laser cut is applied from the front and back sides. In addition, in the present embodiment, the method of connecting the gate 216 to the first semiconductor block 212a is, for example, laser welding, such as back-side laser fusion (ie, for soldering the gate 216 to the first semiconductor). The laser beam of block 212a is incident from below the substrate S, the front laser is fused (ie, the laser beam for fusing the gate 216 and the first semiconductor block 212a is incident from above the substrate S), or both front and back. Apply a laser weld. In other embodiments, the pixel electrode 22 above the gate 212 is first cut into at least one region (not shown) and another portion of the halogen electrode 220 above the non-gate 212 (not Separating and electrically insulating, and then applying at least one of a front laser and a back laser as described above to penetrate each film layer on the region (eg, a halogen electrode of the region, covering the gate) At least one dielectric layer (not labeled) of the layer, for example: an inner dielectric layer, a gate insulating layer, a patterned protective layer, a planar layer, and the like, and the first semiconductor block 212a and the gate of the patterned semiconductor layer 212 216, then forming another conductor layer on the region to connect the first semiconductor block 212a and the gate 216 of the patterned semiconductor layer 212, but the region and the 12 1379135 99-6-28 Sexual connection, b, as described in a, but when the whole electrode 220 is divided into two regions, the bottom of the gate 212 is checked or removed, and the layers in the region are removed and removed. Party i = such as: side, laser _ (four), e. other methods, or a combination of the above. The present invention may also be cut and the step of patterning the semiconductor layer connected to the gate electrode 216 and the second 212Q - 212a of the step of the semiconductor block transfer, in other words, the present invention is not limited to the order of execution of the cutting step of the connecting step qe +.
由圖2C可知,在完成上述的修補動作後,晝素結構 200中的圖案化半導體層212便具有彼此電性絕緣之第一 半導體區塊212a以及第二半導體區塊212b,且閘極216 會透過第一半導體區塊212a以及第一接觸導體區塊 218D與晝素電極220電性連接。As shown in FIG. 2C, after the repair operation described above, the patterned semiconductor layer 212 in the pixel structure 200 has the first semiconductor block 212a and the second semiconductor block 212b electrically insulated from each other, and the gate 216 The pixel electrode 220 is electrically connected to the pixel electrode 220 through the first semiconductor block 212a and the first contact conductor block 218D.
舉例而言,若晝素結構200被應用於液晶顯示面板 中’且液b日顯不面板的顯不模式為正常顯白(normally white)時’畫素結構200在經過上述的修補動作後,可使 液晶顯示面板的點瑕疫(dot defect)被修補為暗點。詳言 之,當晝素結構200被驅動時,與掃描線SL (繪示於圖 2A)連接的閘極216會被施加足以讓第一半導體區塊 212a呈現導通狀態之電壓,此時,晝素電極220便具有 與掃描線SL相同的電壓。若以由於足以讓第一半導體區 塊212a呈現導通狀態之電壓與液晶顯示面板中的共用電 壓(Vcom)之間存在明顯的差異,其中共用電壓被施予在 畫素結構200對向基板的共通電極(未繪示)上為範例, 但不限於此,其中共用電壓被施予在晝素結構200於同 13 1379135 99-6-28 一基板上的共通線(未繪示)上。因此修補後之晝素結 構200上方的液晶層會受到明顯的電場作用,使得顯示 模式為正吊顯白之液B曰顯不面板中,修補後之書素辞構 200所對應到的點(dot)為暗點。當然,若晝素結構2〇〇被 應用於液晶顯示面板中,且液晶顯示面板的顯示模式為 正常顯黑(normally black)時,則其修補後之晝素結構2〇〇 所對應到的點(dot)為亮點。 〔第二實施例〕 圖3A為本發明第二實施例的畫素結構之剖面示意 圖。請參照圖3A,本實施例之晝素結構2〇〇,與第一實施 例之晝素結構200類似,惟二者主要差異之處在於:晝 素結構2GG,中的主動元件21〇,為水平排列之雙閘極薄^ 電晶體(two gate TFT)當作範例,但不限於此,亦可運用For example, if the halogen structure 200 is applied to a liquid crystal display panel and the display mode of the liquid b is not normally white, the pixel structure 200 undergoes the above-mentioned repairing action. The dot defect of the liquid crystal display panel can be repaired to a dark spot. In detail, when the pixel structure 200 is driven, the gate 216 connected to the scan line SL (shown in FIG. 2A) is applied with a voltage sufficient to cause the first semiconductor block 212a to be in an on state. The element electrode 220 has the same voltage as the scanning line SL. If there is a significant difference between a voltage sufficient for the first semiconductor block 212a to assume a conducting state and a common voltage (Vcom) in the liquid crystal display panel, wherein the common voltage is applied to the common substrate of the pixel structure 200 The electrodes (not shown) are exemplified, but are not limited thereto, wherein a common voltage is applied to a common line (not shown) of the halogen structure 200 on a substrate of 13 1379135 99-6-28. Therefore, the liquid crystal layer above the repaired alizarin structure 200 is subjected to a distinct electric field, so that the display mode is a point in which the liquid crystal B is displayed in the panel, and the corrected pixel structure 200 corresponds to the point ( Dot) is a dark spot. Of course, if the halogen structure 2〇〇 is applied to a liquid crystal display panel, and the display mode of the liquid crystal display panel is normally black, the point corresponding to the repaired pixel structure 2〇〇 (dot) is a bright spot. [Second Embodiment] Fig. 3A is a schematic cross-sectional view showing a pixel structure of a second embodiment of the present invention. Referring to FIG. 3A, the halogen structure 2〇〇 of the present embodiment is similar to the halogen structure 200 of the first embodiment, but the main difference between the two is that the active element 21〇 in the halogen structure 2GG is Two gate TFTs are arranged horizontally as an example, but are not limited thereto, and can also be used.
於垂直排列之雙閘極薄膜電晶體,其修補方法亦如 施例所述之方式。 TThe double gate thin film transistor arranged vertically is also repaired in the manner described in the embodiment. T
圖3Β為圖3Α之晝素結構經過修補後之示意圖。於 參照圖3Β’當晝素結構細,出現職而無法正常運^ 時,本實施例可先在切騎C處將圖案化半導體層 切割成兩個彼此分離的第—半導體區塊212&以及第 導體區魂212b,以使電性連接於晝素電極22〇之第 導體區塊212a與電性連接於資料線DL之第二半 塊2Hb電性絕緣。之後,再將閉極驗與第一半導^ 區塊212a相連接,由圖3Β可知,閘極驗與第暮 體區塊212a的連接處W通常是在閘極216&下方。在本 14 1379135 99-6-28 實施例中,將圖案化半導體層212切割為第一半導體區 塊212a以及第二半導體區塊212b的方法例如是雷射切 割,如背面雷射切割及/或正面雷射切割。另外,在本實 施例中,將閘極216a、216b與第一半導體區塊212a相連 接的方法例如是雷射熔接,如正面雷射熔接及/或背面雷 射溶接。而其它合適方式,亦可如上述實施例所述之 式。Fig. 3 is a schematic view showing the structure of the ruthenium structure of Fig. 3 after being repaired. Referring to FIG. 3A, when the structure of the pixel is fine and it is not working properly, the present embodiment can first cut the patterned semiconductor layer into two semiconductor regions 212 & The first conductor region 212b electrically insulates the first conductor block 212a electrically connected to the halogen electrode 22〇 and the second half block 2Hb electrically connected to the data line DL. Thereafter, the closed-pole test is connected to the first semiconductor block 212a. As can be seen from Fig. 3, the junction W between the gate and the second body block 212a is usually below the gate 216 & In the embodiment of the present invention, the method of cutting the patterned semiconductor layer 212 into the first semiconductor block 212a and the second semiconductor block 212b is, for example, laser cutting, such as back laser cutting and/or Frontal laser cutting. Further, in the present embodiment, the method of connecting the gates 216a, 216b to the first semiconductor block 212a is, for example, laser welding, such as frontal laser welding and/or backside laser fusion. Other suitable means may also be as described in the above embodiments.
此外,本發明是以頂閘型之薄膜電晶體為實施範 例,但不限於此,在其它實施例中,亦可使用底閘型之 薄膜電晶體,較佳地,是逆同平面之底閘型結構之薄膜 電晶體,但仍不限於此。In addition, the present invention is a top-gate type thin film transistor as an example, but is not limited thereto. In other embodiments, a bottom gate type thin film transistor may be used, preferably a reverse plane bottom gate. A thin film transistor of a type structure, but is not limited thereto.
值得一提的是,在本實施例中,較佳地,晝素結構 2〇〇’更包括一儲存電容器29〇為例,且其配置於晝素電極 220之下方,其中儲存電容器29〇包括一上電極294以及 下電極292,且下電極292與第一接觸導體區塊218D 電性連接。如圖3A與3B所示,較佳地,下電極292之 組成與圖案化半導體層212之组成相同為例,但不限於 此。換言之’下電極292與圖案化半導體層212較佳地 是由同一薄膜於同一道光罩製程中所製成為例,但不限 於此。另外’較佳地,上電極292之組成與閘極216a、 216b之组成相同為例,但不限於此。換言之,上電極292 與閘極216a、216b較佳地是由同一薄膜於同一道光罩製 程中所製成為例,但不限於此。此外,儲存電容器290 亦可選擇性配置或不配置,依設計上需求,且亦可選擇 性地運用於第一實施例中。 再者,上述實施例是以運用於液晶顯示面板為範 15 99-6-28 99-6-28It is to be noted that, in this embodiment, the memory structure 2 〇〇 ' further includes a storage capacitor 29 〇 as an example, and is disposed under the halogen electrode 220 , wherein the storage capacitor 29 〇 includes An upper electrode 294 and a lower electrode 292 are electrically connected to the first contact conductor block 218D. As shown in Figs. 3A and 3B, preferably, the composition of the lower electrode 292 is the same as that of the patterned semiconductor layer 212, but is not limited thereto. In other words, the lower electrode 292 and the patterned semiconductor layer 212 are preferably made of the same film in the same mask process, but are not limited thereto. Further, preferably, the composition of the upper electrode 292 is the same as the composition of the gates 216a and 216b, but is not limited thereto. In other words, the upper electrode 292 and the gates 216a, 216b are preferably made of the same film in the same mask process, but are not limited thereto. In addition, the storage capacitor 290 can also be selectively or unconfigured, depending on design requirements, and can alternatively be used in the first embodiment. Furthermore, the above embodiment is applied to a liquid crystal display panel as a standard 15 99-6-28 99-6-28
例,但不限於此,亦可使用於有機/無機電激發光顯示面 杈(如··螢光電激發光顯示面板、磷光電激發光顯示面 板、或上述之组合)中。其中,有機電激發光顯示面板 之有機電激發光材料包含小分子發光材料、高分子發光 持料、或上述之組合《液晶顯示面板例如包含:穿透型 藥示.面板、半穿透型顯示面板、反射型顯示面板.、彩色 據光片於主動層上(c〇l〇r filter on array)之顯示面板、 主動層於彩色濾光片上(array on color filter)之顯示面 板、垂直配向型(VA)顯示面板、水平切換型(IPS)顯 示面板、多域垂直配向型(MVA)顯示面板、扭曲向列 型(TN)顯示面板、超扭曲向列型(STN)顯示面板、 圖案垂直配向型(PVA)顯示面板、超級圖案垂直配向 型(S-PVA)顯示面板、先進大視角型(ASV)顯示面 板、邊緣電場切換型(FFS)顯示面板、連續焰火狀排 列型(CPA)顯示面板、轴對稱排列微胞型(ASM)顯 示面板、光學補償彎曲排列型(OCB)顯示面板、超級 水平切換型(S-IPS)顯示面板、先進超級水平切換型 (AS-IPS)顯示面板、極端邊緣電場切換型(upFS)顯 示面板、高分子穩定配向型顯示面板、雙視角型 (dual-view)顯示面板、三視角型(triple_view)顯示 面板、三維顯示面板(three-dimensional)或其它型面板、 或上述之組合。又,上述之顯示面板及其方法亦可運用 光電裝置及其方法上。如圖4所示’光電裝置的示意圖。 由上述之晝素結構200陣列排列而成的顯示面板可 以跟電子元件410組合成一光電裝置5〇〇。在此,電子元 16 1379135 99-6-28 件稱包括如:㈣元件、操作元件 元件、記憶元件、驅動元件、發光元件、保二件二 測元件Μ貞測元件、或其它功能元件、或前= 而光電裝置之類型包括可攜式產品(如手^ ° 照減、筆,電腦、遊戲機、手錶、音樂播=機電 子销件收發器、地圖導航器、數位相片、或類似之產品)、 影音產品(如影音放映器或類似之產品)、 :σFor example, it is not limited thereto, and it can also be used in an organic/inorganic electroluminescence display surface (e.g., a fluorescent photoexcited light display panel, a phosphorescent photoelectric excitation light display panel, or a combination thereof). The organic electroluminescent material of the organic electroluminescent display panel comprises a small molecule luminescent material, a polymer luminescent material, or a combination thereof. The liquid crystal display panel includes, for example, a penetrating drug display panel, a semi-transmissive display. Panel, reflective display panel, display panel of color light film on active layer (c〇l〇r filter on array), display panel of active layer on color filter (array on color filter), vertical alignment Type (VA) display panel, horizontal switching type (IPS) display panel, multi-domain vertical alignment type (MVA) display panel, twisted nematic (TN) display panel, super twisted nematic (STN) display panel, pattern vertical Alignment type (PVA) display panel, super pattern vertical alignment type (S-PVA) display panel, advanced large viewing angle (ASV) display panel, edge electric field switching type (FFS) display panel, continuous flame-like arrangement (CPA) display Panel, Axis Symmetrical Micro Cell (ASM) Display Panel, Optically Compensated Curved Arrangement (OCB) Display Panel, Super Horizontal Switching (S-IPS) Display Panel, Advanced Super Level Switching Type (A S-IPS) display panel, extreme edge electric field switching (upFS) display panel, polymer stable alignment display panel, dual-view display panel, triple view display panel, and three-dimensional display panel ( Three-dimensional) or other type of panel, or a combination of the above. Further, the above display panel and method thereof can also be applied to an optoelectronic device and a method thereof. Figure 4 is a schematic illustration of an optoelectronic device. The display panel arrayed by the array of the above-described halogen structures 200 can be combined with the electronic component 410 to form an optoelectronic device 5A. Here, the electronic component 16 1379135 99-6-28 includes, for example: (4) component, operating component component, memory component, driving component, illuminating component, second component, component, component, or other functional component, or Front = and the type of optoelectronic device includes portable products (such as hand ^ ° photo subtraction, pen, computer, game console, watch, music broadcast = machine electronic pin transceiver, map navigator, digital photo, or similar products ), audio and video products (such as audio and video projectors or similar products), : σ
看板、投影_之面板IKanban, projection _ panel I
雖然本發明已以實施例揭露如上,然其並非用以限 定本發明,任何所屬技術領域中具有通常知識者,在不 脫離本發明之精神和範圍内’當可作些許之更動與潤 飾,因此本發明之保護範圍當視彳灸附之申請專利範圍所 界定者為準。 【圖式簡單說明】Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make a few changes and refinements without departing from the spirit and scope of the invention. The scope of protection of the present invention is subject to the definition of the patent application scope attached to the moxibustion moxibustion. [Simple description of the map]
圖1為習知技術之晝素結構及其修補位置之剖面示 意圖。 圖2Α為本發明第一實施例的晝素結構之示意圖。 圖2Β為本發明第一實施例的晝素結構之剖面示意 圖。 圖2C為圖2Β之晝素結構經過修補後之示意圖。 圖3Α為本發明第二實施例的晝素結構之剖面示意 圖。 圖3Β為圖3Α之晝素結構經過修補後之示意圖。 圖4為本發明之一種光電裝置的示意圖。 17 1379135 99-6-28 【主要元件符號說明】 100、200、200’ :畫素結構 106 :虛線框格 110、S :基板 120 :半導體層 130、214 :閘絕緣層 140 :第一金屬層 150 :介電層BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a structure of a halogen structure of a prior art and its repairing position. 2 is a schematic view showing the structure of a halogen body according to a first embodiment of the present invention. Fig. 2 is a schematic cross-sectional view showing a structure of a halogen substrate according to a first embodiment of the present invention. Fig. 2C is a schematic view showing the structure of the ruthenium structure of Fig. 2 after being repaired. Fig. 3 is a schematic cross-sectional view showing a structure of a halogen substrate according to a second embodiment of the present invention. Fig. 3 is a schematic view showing the structure of the ruthenium structure of Fig. 3 after being repaired. 4 is a schematic view of an optoelectronic device of the present invention. 17 1379135 99-6-28 [Description of main component symbols] 100, 200, 200': pixel structure 106: dotted grid 110, S: substrate 120: semiconductor layer 130, 214: gate insulating layer 140: first metal layer 150: dielectric layer
152、154、172 :接觸窗 160:第二金屬層 170、270 :圖案化保護層 180 :平坦層 190 :透明導電層 212 :圖案化半導體層 212a :第一半導體區塊 212b :第二半導體區塊 214 :閘絕緣層152, 154, 172: contact window 160: second metal layer 170, 270: patterned protective layer 180: flat layer 190: transparent conductive layer 212: patterned semiconductor layer 212a: first semiconductor block 212b: second semiconductor region Block 214: Gate Insulation
216、216a、216b :閘極 218 :接觸導體層 218D ··第一接觸導體區塊 218S :第二接觸導體區塊 220:晝素電極 270圖案化保護層 400 :顯示面板 410 :電子元件 18 1379135 99-6-28216, 216a, 216b: gate 218: contact conductor layer 218D · first contact conductor block 218S: second contact conductor block 220: halogen electrode 270 patterned protective layer 400: display panel 410: electronic component 18 1379135 99-6-28
500 :光電裝置 C :切割線 Η :開口 S :基板 W :連接處 292 :下電極 294 :上電極 290 :儲存電容器 19500 : Optoelectronic device C : Cutting line Η : Opening S : Substrate W : Connection 292 : Lower electrode 294 : Upper electrode 290 : Storage capacitor 19
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