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TWI378456B - Method and system for reducing program disturb in non-volatile storage - Google Patents

Method and system for reducing program disturb in non-volatile storage Download PDF

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Publication number
TWI378456B
TWI378456B TW96135141A TW96135141A TWI378456B TW I378456 B TWI378456 B TW I378456B TW 96135141 A TW96135141 A TW 96135141A TW 96135141 A TW96135141 A TW 96135141A TW I378456 B TWI378456 B TW I378456B
Authority
TW
Taiwan
Prior art keywords
volatile storage
storage element
voltage
volatile
adjacent
Prior art date
Application number
TW96135141A
Other languages
English (en)
Chinese (zh)
Other versions
TW200822344A (en
Inventor
Gerrit Jan Hemink
Shih Chung Lee
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/535,628 external-priority patent/US8189378B2/en
Priority claimed from US11/535,634 external-priority patent/US8184478B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Publication of TW200822344A publication Critical patent/TW200822344A/zh
Application granted granted Critical
Publication of TWI378456B publication Critical patent/TWI378456B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562Multilevel memory programming aspects
    • G11C2211/5621Multilevel programming verification

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW96135141A 2006-09-27 2007-09-20 Method and system for reducing program disturb in non-volatile storage TWI378456B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/535,628 US8189378B2 (en) 2006-09-27 2006-09-27 Reducing program disturb in non-volatile storage
US11/535,634 US8184478B2 (en) 2006-09-27 2006-09-27 Apparatus with reduced program disturb in non-volatile storage

Publications (2)

Publication Number Publication Date
TW200822344A TW200822344A (en) 2008-05-16
TWI378456B true TWI378456B (en) 2012-12-01

Family

ID=39230870

Family Applications (1)

Application Number Title Priority Date Filing Date
TW96135141A TWI378456B (en) 2006-09-27 2007-09-20 Method and system for reducing program disturb in non-volatile storage

Country Status (2)

Country Link
TW (1) TWI378456B (fr)
WO (1) WO2008039667A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11495297B2 (en) 2020-05-27 2022-11-08 Windbond Electronics Corp. Semiconductor device and reading method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7848144B2 (en) * 2008-06-16 2010-12-07 Sandisk Corporation Reverse order page writing in flash memories

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100272037B1 (ko) * 1997-02-27 2000-12-01 니시무로 타이죠 불휘발성 반도체 기억 장치
KR100385230B1 (ko) * 2000-12-28 2003-05-27 삼성전자주식회사 불휘발성 반도체 메모리 장치의 프로그램 방법
JP3957985B2 (ja) * 2001-03-06 2007-08-15 株式会社東芝 不揮発性半導体記憶装置
KR100502412B1 (ko) * 2002-10-23 2005-07-19 삼성전자주식회사 불 휘발성 반도체 메모리 장치 및 그것의 프로그램 방법
US7161833B2 (en) * 2004-02-06 2007-01-09 Sandisk Corporation Self-boosting system for flash memory cells
US7466590B2 (en) * 2004-02-06 2008-12-16 Sandisk Corporation Self-boosting method for flash memory cells
US7170793B2 (en) * 2004-04-13 2007-01-30 Sandisk Corporation Programming inhibit for non-volatile memory
EP1964127B1 (fr) * 2005-12-19 2009-11-25 SanDisk Corporation Procede pour la programmation de memoire non volatile avec perturbation de programme reduite au moyen de tensions de passage modifiees

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11495297B2 (en) 2020-05-27 2022-11-08 Windbond Electronics Corp. Semiconductor device and reading method thereof

Also Published As

Publication number Publication date
WO2008039667A2 (fr) 2008-04-03
TW200822344A (en) 2008-05-16
WO2008039667A3 (fr) 2008-06-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees