TWI367455B - Systems and methods for storing texture map data - Google Patents

Systems and methods for storing texture map data

Info

Publication number: TWI367455B
Authority: TW; Taiwan
Prior art keywords: systems; methods; map data; texture map; storing texture
Prior art date: 2006-06-20

Application number

TW096122024A

Other languages

Chinese (zh)

Other versions

TW200821988A (en

Inventor

Xu Jim

Brother John

Shao Jin

Original Assignee

Via Tech Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2006-06-20

Filing date

2007-06-20

Publication date

2012-07-01

2007-06-20 Application filed by Via Tech Inc filed Critical Via Tech Inc

2008-05-16 Publication of TW200821988A publication Critical patent/TW200821988A/en

2012-07-01 Application granted granted Critical

2012-07-01 Publication of TWI367455B publication Critical patent/TWI367455B/en

Links

TW096122024A 2006-06-20 2007-06-20 Systems and methods for storing texture map data TWI367455B (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US81505306P	2006-06-20	2006-06-20

Publications (2)

Publication Number	Publication Date
TW200821988A TW200821988A (en)	2008-05-16
TWI367455B true TWI367455B (en)	2012-07-01

Family

ID=39022707

Family Applications (3)

Application Number	Title	Priority Date	Filing Date
TW096122072A TWI395152B (en)	2006-06-20	2007-06-20	A graphics processing unit and a method of processing border color information
TW096122024A TWI367455B (en)	2006-06-20	2007-06-20	Systems and methods for storing texture map data
TW096122026A TWI341976B (en)	2006-06-20	2007-06-20	Systems and methods for performing a bank swizzle operation to reduce bank collisions

Family Applications Before (1)

Application Number	Title	Priority Date	Filing Date
TW096122072A TWI395152B (en)	2006-06-20	2007-06-20	A graphics processing unit and a method of processing border color information

Family Applications After (1)

Application Number	Title	Priority Date	Filing Date
TW096122026A TWI341976B (en)	2006-06-20	2007-06-20	Systems and methods for performing a bank swizzle operation to reduce bank collisions

Country Status (2)

Country	Link
CN (3)	CN101145239A (en)
TW (3)	TWI395152B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US8368701B2 (en) *	2008-11-06	2013-02-05	Via Technologies, Inc.	Metaprocessor for GPU control and synchronization in a multiprocessor environment
TWI474280B (en) *	2010-04-21	2015-02-21	Via Tech Inc	System and method for improving throughput of a graphics processing unit
US9230517B2 (en)	2012-05-31	2016-01-05	Microsoft Technology Licensing, Llc	Virtual surface gutters
CN105426259B (en) *	2014-09-16	2019-08-06	辉达公司	Method and medium for communicating dependencies in an API
CN106611401B (en) *	2015-10-22	2020-12-25	阿里巴巴集团控股有限公司	Method and device for storing image in texture memory
CN112381715B (en) *	2020-11-16	2024-04-09	航天科工(北京)空间信息应用股份有限公司	Method and device for parallel generation of map tiles by mass remote sensing images
CN114036612B (en) *	2021-11-05	2025-02-11	土巴兔集团股份有限公司	Room paving quantity calculation method, device and storage medium based on layout placement

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5765182A (en) *	1995-04-13	1998-06-09	Lsi Logic Corporation	Interleaving memory on separate boards
US5828382A (en) *	1996-08-02	1998-10-27	Cirrus Logic, Inc.	Apparatus for dynamic XY tiled texture caching
WO2000011603A2 (en) *	1998-08-20	2000-03-02	Apple Computer, Inc.	Graphics processor with pipeline state storage and retrieval
US6300953B1 (en) *	1998-10-15	2001-10-09	Nvidia	Apparatus and method for grouping texture cache requests
US6266733B1 (en) *	1998-11-12	2001-07-24	Terarecon, Inc	Two-level mini-block storage system for volume data sets
US7050063B1 (en) *	1999-02-11	2006-05-23	Intel Corporation	3-D rendering texture caching scheme
US6650333B1 (en) *	1999-06-09	2003-11-18	3Dlabs Inc., Ltd.	Multi-pool texture memory management
US6825848B1 (en) *	1999-09-17	2004-11-30	S3 Graphics Co., Ltd.	Synchronized two-level graphics processing cache
WO2003065308A2 (en) *	2002-02-01	2003-08-07	Koninklijke Philips Electronics N.V.	Stepless 3d texture mapping in computer graphics
TWI249144B (en) *	2003-02-21	2006-02-11	Via Tech Inc	Single level MIP filtering algorithm for anisotropic texturing
US7053904B1 (en) *	2003-12-15	2006-05-30	Nvidia Corporation	Position conflict detection and avoidance in a programmable graphics processor
CN1273940C (en) *	2004-04-12	2006-09-06	浙江大学	Fast drawing forest method of graded hierarchical assembling depth paste-up atlas

2007
- 2007-06-19 CN CNA2007101120142A patent/CN101145239A/en active Pending
- 2007-06-20 CN CN200710123324A patent/CN100578542C/en active Active
- 2007-06-20 CN CN2007101233278A patent/CN101114376B/en active Active
- 2007-06-20 TW TW096122072A patent/TWI395152B/en active
- 2007-06-20 TW TW096122024A patent/TWI367455B/en active
- 2007-06-20 TW TW096122026A patent/TWI341976B/en active

Also Published As

Publication number	Publication date
TW200809691A (en)	2008-02-16
CN100578542C (en)	2010-01-06
CN101114376B (en)	2010-06-23
TWI395152B (en)	2013-05-01
TW200821988A (en)	2008-05-16
CN101145239A (en)	2008-03-19
CN101114376A (en)	2008-01-30
CN101122997A (en)	2008-02-13
TW200819987A (en)	2008-05-01
TWI341976B (en)	2011-05-11

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