1363961 101年02月02日梭正替換頁 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係關於一種開機控制裝置及方法，尤指一種可識 別微控制器冷、熱開機之開機控制裝置及方法。 【先前技術】 [0002] 熱開機（熱啓動，Warm boot/Push Button Reset ) 係指在系統通電情況下之系統重置；冷開機（冷啓動，1363961 On February 2, 2011, the shuttle is replaced. Page 6 Description of the Invention: [Technical Field] [0001] The present invention relates to a boot control device and method, and more particularly to an identifiable microcontroller for cold and hot booting Power-on control device and method. [Prior Art] [0002] Warm boot (Push Button Reset) refers to system reset when the system is powered on; cold boot (cold boot,
Cold boot/ Power ON Reset)係指藉由按下系統電 源按鈕所進行之系統重置。Cold boot/Power ON Reset) refers to the system reset performed by pressing the system power button.
[0003] 在微控制器（MCU，Micro-Controller Unit)應用系統 内’冷開機執行整個系統供電（p〇wer 〇N)後之開機程式 ’包含微控制器自我測試、記憶體測試及週邊介面（I/O[0003] In the microcontroller (MCU, Micro-Controller Unit) application system, 'cool booting the entire system power supply (p〇wer 〇N) after the boot program' contains the microcontroller self-test, memory test and peripheral interface (I/O
Port)測試等系統硬體確認程式以及軟體下載之相關預 設流程：而熱開機常被應用於執行系統參數設定以及軟 體升級等程式後之系統重置。 [0004]在微控制器應用系統内，用硬體動作重置可以區分爲冷 開機或熱開機。而微控制器之重置引腳（RESET PIN)所 連接之内部重置寄存器（RESET REGISTER)無法區分重 置訊號之種類，只要當重置引腳接收到重置訊號後，即 重置寄存器接收到重置訊號後，微控制器只能以冷開機 / 之模式執行開機動作，無法執行較省時之熱開機系統重 置。 【發明内容】 [0005]有鑒於此，有必要提供一種可識別微控制器冷、熱開機 之開機控制裝置。 1013038308-0 09511441#單编號A〇1(U 第3頁/共15頁 1363961 [0006] [0007] [0008] [0009] [0010] 09511441^^^ 101年02月02日核正替换頁 有鑒於此，有必要提供一種可識別微控制器冷、熱開機 之開機控制方法。 一種微控制器之開機控制裝置，包括一熱開機重置電路 、一冷開機訊號檢測電路及該熱開機重一延時電路。該 微控制器包括一重置引腳及一偵測引腳。該熱開機重置 電路輸出一重置訊號至該重置引腳。該冷開機訊號檢測 電路産生一檢測訊號經該延時電路延遲後輸出至該偵測 引腳。 一種微控制器之開機控制方法，透過一開機控制裝置識 別微控制器之冷、熱開機，該微控制器包括一重置引腳 及一偵測引腳，該開機控制裝置包括一熱開機重置電路 、一冷開機訊號檢測電路及一延時電路，該開機控制方 法包括：該熱開機重置電路輸出一重置訊號至該重置引 腳；該冷開機訊號檢測電路輸出一檢測訊號至該延時電 路，該延時電路對該檢測訊號進行延遲後輸出至該偵測 引腳；如果該偵測引腳所接收之訊號爲高電位，則微控 制器執行冷開機操作；如果該偵測引腳所接收之訊號爲 低電位，則微控制器執行熱開機操作。 該開機控制裝置及方法可區分微控制器之冷、熱開機， 並使微控制器執行相應之開機程式，可在熱開機時省卻 耗時之系統硬體確認程式時間或設計者預設省略之執行 流程，以加快熱開機之開機速度與減輕微控制器負荷。 【實施方式】 請參照圖1及圖2，本發明微控制器開機控制裝置1之較佳 實施方式係用以識別一微控制器40之冷開機及熱開機， A0101 第4頁/共15頁 1013038308-0 1363961 101年.02月02日核正替^頁 其包括一熱開機重置電路10、一冷開機訊號檢測電路20 及一延時電路30。該微控制器40包括一重置引腳P2及一 偵測引腳P4。 [0011] 該熱開機重置電路10包括一電阻R1、一電容C1、一二極 體D1及一重置開關S1。該電阻R1及該電容C1串聯在一電 源Vcc與地之間。該重置開關S1 —端接該二極體D1之陽極 ，另一端接地。該二極體D1之陰極接該電源Vcc。該電阻 R1與電容C1之共接點及該二極體D1與重置開關S1之共接 點相連接並輸出一重置訊號至該重置引腳P2。該重置開 關S1爲一常開開關。 [0012] 該冷開機訊號檢測電路20包括依次相連接之一分壓電路 22、一電壓偵測判定電路24及一重置訊號開關電路26。 [0013] 該分壓電路22包括串聯在該電源Vcc與地之間之一電阻R2 及一電阻R3 *該電壓偵測判定電路24包括一電阻R5及一 NPN型電晶體Q1。該NPN型電晶體Q1之基極連接於該電阻 R2與該電阻R3之間之共接點，其射極與地相連，其集極 透過電阻R5接該電源Vcc。該重置訊號開.關電路26包括一 電阻R6與一PNP型電晶體Q2。該PNP型電晶體Q2之射極透 過該電阻R6接該電源Vcc，其基極接該NPN型電晶體Q1之 集極，其集極接地。該PNP型電晶體Q2之射極輸出一檢測 訊號。 [0014] 該延時電路30包括一延時器32，其可對該冷開機訊號檢 測電路20輸出之檢測訊號進行數百ms (毫秒）之延遲後 輸出至該微控制器40之偵測引腳P4。該延遲時間之設置 0951144#單編號 A0101 第5頁/共15頁 1013038308-0 1363961 必須大於賴㈣_從供電後到㈣執 需之時間，但又不可太長而降低系統靈敏度。 [0015] [0016] [0017] 如下所述為該開機控制裝置1之工作過程： 請-併參考圖3，該微控制㈣接通冷開機）後1 電源VCC可同時向該熱開機重置電路1G及該冷開機訊梦二 測電路20供電。 ° 對於熱開機重置電路U)，該電源VCC對該電容π進行充電 ’使微控制器40之重置引腳P2接收到〜上升緣之重置訊 號；對於該冷開機訊號檢測電路20，當該電源Vcc之電麼 值達到噴如圖3中虛線位置處）時’ t亥電源Vcc經分壓 電路22之電阻R2及電阻R3分壓後’可觸發電壓偵測判定 電路24之NPN電晶體Q1導通，進而使該重置訊號開關電路 26之PNP電晶趙Q2導通’輸出低電位之檢測訊號至該延時 器32，而該延時器32對該檢測訊號延遲數百毫秒（ms 後輸出至該微控制器40之偵測引腳P4。」多時，該偵剛引 腳P4所接收之訊號爲高電位，該微控制器4〇執行冷開機 [0018] 請一併參考圖4，按下該重置開關$1然後釋放（即微控制 器40熱開機操作），該熱開機重置電路1〇先閉合再斷開， 該微控制器40U置引腳P2接&之重置訊號先爲低電^ ，然後該電源Vcc對電谷C1充電，微控制器之重置引腳 P2再次接收到-上升緣之重置訊號。而該冷開機訊號檢 測電路20輸出之低電位檢測訊號經過該延時器32數百毫 秒（ms )之延遲後已被輸出至該偵測引腳p4。此時該 單编號A0101 第6頁/共15頁 1013038308-0 1363961 ιοί年.02月0·2日核正替換頁 偵測引腳Ρ4接收之訊號爲低電位，該微控制器40執行熱 開機。 [0019] 請繼續參考圖5，本發明微控制器之開機控制方法之較佳. 實施方式係透過該開機控制裝置1來識別微控制器40之冷 、熱開機。該開機控制方法包括： [0020] 判斷該微控制器40之重置引腳Ρ2是否接收到一上升緣之 重置信號； [0021] 如果該重置引腳Ρ2未接收到該重置信號，則微控制器40 不開機； [0022] 如果該重置引腳Ρ2接收到該重置信號，判斷該微控制器 4 0之偵測引腳Ρ 4所接收之信號是否為低電位； [0023] 如果該偵測引腳Ρ4所接收之信號為低電位，則微控制器 40執行熱開機操作； [0024] 如果該偵測引腳Ρ4所接收之信號為高電位，則微控制器 40執行冷開機操作。.Port) Tests such as system hardware verification programs and software download related preset processes: Hot boot is often used to perform system reset after executing system parameter settings and software upgrades. [0004] Within a microcontroller application system, a hardware action reset can be distinguished as a cold boot or a hot boot. The internal reset register (RESET REGISTER) connected to the reset pin (RESET PIN) of the microcontroller cannot distinguish the type of reset signal, as long as the reset pin receives the reset signal, it resets the register reception. After the reset signal, the microcontroller can only perform the boot operation in the cold boot mode, and it is not possible to perform a more time-saving hot boot system reset. SUMMARY OF THE INVENTION [0005] In view of the above, it is necessary to provide a boot control device that can recognize the cold and hot boot of the microcontroller. 1013038308-0 09511441#单单A〇1(U Page 3 of 15 page 1363961 [0006] [0007] [0008] [0009] [0010] 09511441^^^ February 02, 2010 Nuclear replacement page In view of this, it is necessary to provide a boot control method for recognizing the cold and hot boot of the microcontroller. A boot control device for a microcontroller includes a hot boot reset circuit, a cold boot signal detection circuit, and the hot boot weight a delay circuit, the microcontroller includes a reset pin and a detection pin, and the hot start reset circuit outputs a reset signal to the reset pin. The cold start signal detecting circuit generates a detection signal The delay circuit is delayed and output to the detection pin. A startup control method of the microcontroller, which recognizes the cold and hot start of the microcontroller through a boot control device, the microcontroller includes a reset pin and a detect Measuring the pin, the boot control device includes a hot boot reset circuit, a cold boot signal detection circuit and a delay circuit, the boot control method includes: the hot boot reset circuit outputs a reset signal to the reset pin ; the cold boot The detecting circuit outputs a detecting signal to the delay circuit, and the delay circuit delays the detecting signal and outputs the signal to the detecting pin; if the signal received by the detecting pin is high, the microcontroller performs cold The power-on operation; if the signal received by the detection pin is low, the microcontroller performs a hot power-on operation. The power-on control device and method can distinguish the cold and hot power of the microcontroller, and enable the microcontroller to perform corresponding The booting program can save the time-consuming system hardware to confirm the program time or the designer presets the execution flow during the hot boot to speed up the hot booting speed and reduce the microcontroller load. [Embodiment] Please refer to the figure. 1 and FIG. 2, a preferred embodiment of the microcontroller boot control device 1 of the present invention is used to identify a cold boot and a hot boot of a microcontroller 40, A0101 page 4/15 pages 1013038308-0 1363961 101 years. On February 2nd, the core includes a hot boot reset circuit 10, a cold boot signal detection circuit 20 and a delay circuit 30. The microcontroller 40 includes a reset pin P2 and a detective. The power-on reset circuit 10 includes a resistor R1, a capacitor C1, a diode D1, and a reset switch S1. The resistor R1 and the capacitor C1 are connected in series with a power source Vcc and ground. The reset switch S1 is terminated to the anode of the diode D1, and the other end is grounded. The cathode of the diode D1 is connected to the power source Vcc. The common point of the resistor R1 and the capacitor C1 and the diode D1 is connected to the common contact of the reset switch S1 and outputs a reset signal to the reset pin P2. The reset switch S1 is a normally open switch. [0012] The cold start signal detecting circuit 20 includes sequential phases. A voltage divider circuit 22, a voltage detection determination circuit 24, and a reset signal switch circuit 26 are connected. [0013] The voltage dividing circuit 22 includes a resistor R2 and a resistor R3 connected in series between the power source Vcc and the ground. The voltage detecting and determining circuit 24 includes a resistor R5 and an NPN transistor Q1. The base of the NPN transistor Q1 is connected to a common junction between the resistor R2 and the resistor R3. The emitter is connected to the ground, and the collector is connected to the power source Vcc through the resistor R5. The reset signal on/off circuit 26 includes a resistor R6 and a PNP type transistor Q2. The emitter of the PNP-type transistor Q2 is connected to the power source Vcc through the resistor R6, and its base is connected to the collector of the NPN-type transistor Q1, and its collector is grounded. The emitter of the PNP type transistor Q2 outputs a detection signal. [0014] The delay circuit 30 includes a delay device 32, which can output a detection signal outputted by the cold start signal detecting circuit 20 to a detection pin P4 of the microcontroller 40 after a delay of several hundred milliseconds (msec). . Setting the delay time 0951144#Single number A0101 Page 5 of 15 1013038308-0 1363961 Must be greater than Lai (4) _ from power supply to (4) time required, but not too long to reduce system sensitivity. [0017] [0017] The working process of the power-on control device 1 is as follows: Please - and refer to FIG. 3, the micro-control (4) is turned on after the cold boot) 1 power supply VCC can be reset to the hot power at the same time The circuit 1G and the cold start signal circuit 20 are powered. ° For the hot-start reset circuit U), the power supply VCC charges the capacitor π' so that the reset pin P2 of the microcontroller 40 receives the reset signal of the rising edge; for the cold-start signal detecting circuit 20, When the value of the power supply Vcc reaches the position shown by the dotted line in FIG. 3, the voltage of the power supply Vcc is divided by the resistor R2 of the voltage dividing circuit 22 and the resistor R3, and the NPN of the voltage detection determining circuit 24 can be triggered. The transistor Q1 is turned on, and the PNP transistor Q2 of the reset signal switching circuit 26 is turned on to output a low-level detection signal to the delay unit 32, and the delay unit 32 delays the detection signal by several hundred milliseconds (after ms). Output to the detection pin P4 of the microcontroller 40. "For a long time, the signal received by the detection pin P4 is high, and the microcontroller 4 performs cold boot [0018] Please refer to FIG. 4 together. Pressing the reset switch $1 and then releasing (ie, the microcontroller 40 is hot-on), the hot-on reset circuit 1 is first closed and then disconnected, and the microcontroller 40U sets the pin P2 to reset The signal is first low, then the power supply Vcc charges the battery C1, and the microcontroller resets The pin P2 receives the reset signal of the rising edge again, and the low potential detection signal outputted by the cold start signal detecting circuit 20 is output to the detecting pin after being delayed by the delay of the delay unit 32 by several hundred milliseconds (ms). P4. At this time, the single number A0101 page 6/15 pages 1013038308-0 1363961 ιοί年.02月0·2 nuclear replacement page detection pin Ρ4 receiving signal is low, the microcontroller 40 [0019] Please continue to refer to FIG. 5, which is preferred to the boot control method of the microcontroller of the present invention. The embodiment is to identify the cold and hot boot of the microcontroller 40 through the boot control device 1. The method includes: [0020] determining whether the reset pin Ρ2 of the microcontroller 40 receives a reset signal of a rising edge; [0021] if the reset pin Ρ2 does not receive the reset signal, the micro control If the reset pin Ρ 2 receives the reset signal, it is determined whether the signal received by the detection pin Ρ 4 of the microcontroller 40 is low; [0023] When the signal received by the detection pin Ρ4 is low, the microcontroller 40 executes The hot boot operation; [0024] If the signal received by the detection pin Ρ4 is high, the microcontroller 40 performs a cold boot operation.
[0025] 綜上所述，本發明符合發明專利要件，爰依法提出專利 申請。惟，以上所述者僅為本發明之較佳實施例，舉凡 熟悉本案技藝之人士，在爰依本發明精神所作之等效修 飾或變化，皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 [0026] 圖1係本發明微控制器之開機控制裝置之較佳實施方式之 電路方框圖》 [0027] 圖2係本發明微控制器之開機控制裝置之較佳實施方式之 09511441尸織 A°1(n ^ 7 1 / ^ 15 I 1013038308-0 1363961 101年02月02日核正替换i 電路圖。 [0028] 圖3及圖4分別係微控制器於冷/熱開機時之相關波形圖。 [0029] 圖5係本發明微控制器之開機控制方法之較佳實施方式之 流程圖。 【主要元件符號說明】 [0030] 開機控制裝置：1 [0031] 熱開機重置電路：1 0 [0032] 冷開機訊號檢測電路：20 [0033] 分壓電路：22 [0034] 電壓偵測判定電路：24 [0035] 重置訊號開關電路：26 [0036] 延時電路：30 [0037] 延時器：32 [0038] 微控制器：40 [0039] 重置引腳：P2 [0040] 偵測引腳：P4 [0041] 電源：V c c [0042] 電容：C1 [0043] 二極體：D1 [0044] 重置開關：S1[0025] In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art of the present invention should be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0026] FIG. 1 is a block diagram of a preferred embodiment of a boot control device for a microcontroller of the present invention. [0027] FIG. 2 is a preferred embodiment of a boot control device for a microcontroller of the present invention. 09511441 corpse A°1 (n ^ 7 1 / ^ 15 I 1013038308-0 1363961 February 02, 101 nuclear replacement i circuit diagram. [0028] Figure 3 and Figure 4 are microcontrollers in cold / hot boot [0029] FIG. 5 is a flow chart of a preferred embodiment of the boot control method of the microcontroller of the present invention. [Main component symbol description] [0030] Power-on control device: 1 [0031] Hot boot weight Set circuit: 1 0 [0032] Cold start signal detection circuit: 20 [0033] Voltage divider circuit: 22 [0034] Voltage detection decision circuit: 24 [0035] Reset signal switch circuit: 26 [0036] Delay circuit: 30 [0037] Delayer: 32 [0038] Microcontroller: 40 [0039] Reset Pin: P2 [0040] Detection Pin: P4 [0041] Power Supply: V cc [0042] Capacitor: C1 [0043] Diode: D1 [0044] Reset Switch: S1
09511441 A〇101 第8頁/共15頁 1013038308-0 ιοί年.02月02日修正替換頁 1363961 [0045] 電晶體：Q1、Q2 [0046] 電阻：R1、R2、R3、R5、R609511441 A〇101 Page 8 of 15 1013038308-0 ιοί年. February 02 Revision Replacement Page 1363961 [0045] Transistor: Q1, Q2 [0046] Resistor: R1, R2, R3, R5, R6
095U44#單編號A_ 第9頁/共15頁 1013038308-0095U44#单单A_ Page 9 of 15 1013038308-0