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TWI350060B - Fractional frequency divider pll device and control method thereof - Google Patents

Fractional frequency divider pll device and control method thereof

Info

Publication number
TWI350060B
TWI350060B TW096150763A TW96150763A TWI350060B TW I350060 B TWI350060 B TW I350060B TW 096150763 A TW096150763 A TW 096150763A TW 96150763 A TW96150763 A TW 96150763A TW I350060 B TWI350060 B TW I350060B
Authority
TW
Taiwan
Prior art keywords
control method
frequency divider
fractional frequency
pll device
divider pll
Prior art date
Application number
TW096150763A
Other languages
English (en)
Other versions
TW200838145A (en
Inventor
Morihito Hasegawa
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Publication of TW200838145A publication Critical patent/TW200838145A/zh
Application granted granted Critical
Publication of TWI350060B publication Critical patent/TWI350060B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
TW096150763A 2007-02-20 2007-12-28 Fractional frequency divider pll device and control method thereof TWI350060B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007038830A JP4827764B2 (ja) 2007-02-20 2007-02-20 分数分周ｐｌｌ装置、およびその制御方法

Publications (2)

Publication Number Publication Date
TW200838145A TW200838145A (en) 2008-09-16
TWI350060B true TWI350060B (en) 2011-10-01

Family

ID=39706653

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096150763A TWI350060B (en) 2007-02-20 2007-12-28 Fractional frequency divider pll device and control method thereof

Country Status (5)

Country Link
US (1) US8406364B2 (zh)
JP (1) JP4827764B2 (zh)
KR (1) KR100964857B1 (zh)
CN (1) CN101252356B (zh)
TW (1) TWI350060B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI676359B (zh) * 2016-06-23 2019-11-01 豪威科技股份有限公司 用於數位系統中時鐘合成器的１-１６＆１.５-７.５分頻器

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JP2010041685A (ja) 2008-08-08 2010-02-18 Hitachi Communication Technologies Ltd 無線通信システム、リピータ装置及びその制御方法
US8063707B2 (en) * 2009-05-08 2011-11-22 Mediatek Inc. Phase locked loop
US8368480B2 (en) * 2009-06-24 2013-02-05 Mediatek Inc. Phase locked loop circuits and gain calibration methods thereof
JP5839927B2 (ja) * 2011-10-13 2016-01-06 ルネサスエレクトロニクス株式会社 ディジタル制御発振装置および高周波信号処理装置
CN102340308B (zh) * 2011-10-13 2013-07-17 电子科技大学 一种小数分频频率合成器
JP5738749B2 (ja) * 2011-12-15 2015-06-24 ルネサスエレクトロニクス株式会社 Ｐｌｌ回路
CN103593161B (zh) * 2013-11-20 2016-08-17 上海爱信诺航芯电子科技有限公司 基于真随机数发生器的全随机任意分数分频器及方法
US9191128B2 (en) * 2013-12-17 2015-11-17 National Applied Research Laboratories Spread spectrum clock generator and method for generating spread spectrum clock signal
US20150318860A1 (en) * 2014-04-30 2015-11-05 Qualcomm Incorporated Low noise phase locked loops
CN106549667B (zh) * 2015-09-22 2019-11-15 大唐半导体设计有限公司 数字小数分频器及其分频方法

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US5305362A (en) * 1992-12-10 1994-04-19 Hewlett-Packard Company Spur reduction for multiple modulator based synthesis
JPH0879073A (ja) * 1994-09-09 1996-03-22 Toshiba Corp 周波数シンセサイザ
CA2233831A1 (en) * 1998-03-31 1999-09-30 Tom Riley Digital-sigma fractional-n synthesizer
JP3488180B2 (ja) * 2000-05-30 2004-01-19 松下電器産業株式会社 周波数シンセサイザ
KR100346839B1 (ko) * 2000-10-10 2002-08-03 삼성전자 주식회사 시그마-델타 변조기를 이용한 분수-ｎ 주파수 합성 장치및 그 방법
JP3461799B2 (ja) * 2000-11-16 2003-10-27 松下電器産業株式会社 デルタ・シグマ変調型分数分周ｐｌｌ周波数シンセサイザ
KR100398048B1 (ko) * 2001-12-11 2003-09-19 한국전자통신연구원 델타 시그마 나누기의 구조
US6600378B1 (en) * 2002-01-18 2003-07-29 Nokia Corporation Fractional-N frequency synthesizer with sine wave generator
US6707855B2 (en) * 2002-06-20 2004-03-16 Nokia Corporation Digital delta sigma modulator in a fractional-N frequency synthesizer
JP4037212B2 (ja) * 2002-08-19 2008-01-23 富士通株式会社 半導体装置
WO2005053162A1 (ja) * 2003-11-28 2005-06-09 Fujitsu Limited Ｐｌｌ回路のσδ変調器
JP4064338B2 (ja) * 2003-12-10 2008-03-19 松下電器産業株式会社 デルタシグマ型分数分周ｐｌｌシンセサイザ
JP2005252678A (ja) 2004-03-04 2005-09-15 Toshiba Microelectronics Corp 位相同期ループ回路及び位相同期ループ回路の制御方法
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KR100684053B1 (ko) * 2005-02-14 2007-02-16 삼성전자주식회사 시그마 델타 변조 장치, 이를 이용한 주파수 합성기 및 분수 분주 주파수 합성 방법
US7405629B2 (en) * 2005-06-30 2008-07-29 Cypress Semiconductor Corp. Frequency modulator, circuit, and method that uses multiple vector accumulation to achieve fractional-N frequency synthesis
JP2007259122A (ja) * 2006-03-23 2007-10-04 Renesas Technology Corp 通信用半導体集積回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI676359B (zh) * 2016-06-23 2019-11-01 豪威科技股份有限公司 用於數位系統中時鐘合成器的１-１６＆１.５-７.５分頻器

Also Published As

Publication number Publication date
TW200838145A (en) 2008-09-16
CN101252356A (zh) 2008-08-27
US20080198959A1 (en) 2008-08-21
US8406364B2 (en) 2013-03-26
CN101252356B (zh) 2011-10-12
KR20080077553A (ko) 2008-08-25
KR100964857B1 (ko) 2010-06-21
JP4827764B2 (ja) 2011-11-30
JP2008205760A (ja) 2008-09-04

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees