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TWI349973B - Method of fabricating alignment mark for cdim package structure - Google Patents

Method of fabricating alignment mark for cdim package structure

Info

Publication number
TWI349973B
TWI349973B TW096141089A TW96141089A TWI349973B TW I349973 B TWI349973 B TW I349973B TW 096141089 A TW096141089 A TW 096141089A TW 96141089 A TW96141089 A TW 96141089A TW I349973 B TWI349973 B TW I349973B
Authority
TW
Taiwan
Prior art keywords
cdim
alignment mark
package structure
fabricating alignment
fabricating
Prior art date
Application number
TW096141089A
Other languages
Chinese (zh)
Other versions
TW200919596A (en
Inventor
Wen Yung Fu
Original Assignee
Chipmos Technologies Inc
Chipmos Technologies Bermuda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipmos Technologies Inc, Chipmos Technologies Bermuda filed Critical Chipmos Technologies Inc
Priority to TW096141089A priority Critical patent/TWI349973B/en
Publication of TW200919596A publication Critical patent/TW200919596A/en
Application granted granted Critical
Publication of TWI349973B publication Critical patent/TWI349973B/en

Links

Classifications

    • H10W72/0198—
    • H10W46/301—
    • H10W70/09—
    • H10W72/241—
    • H10W74/019—
    • H10W74/10—
    • H10W74/142—
TW096141089A 2007-10-31 2007-10-31 Method of fabricating alignment mark for cdim package structure TWI349973B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW096141089A TWI349973B (en) 2007-10-31 2007-10-31 Method of fabricating alignment mark for cdim package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096141089A TWI349973B (en) 2007-10-31 2007-10-31 Method of fabricating alignment mark for cdim package structure

Publications (2)

Publication Number Publication Date
TW200919596A TW200919596A (en) 2009-05-01
TWI349973B true TWI349973B (en) 2011-10-01

Family

ID=44727169

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096141089A TWI349973B (en) 2007-10-31 2007-10-31 Method of fabricating alignment mark for cdim package structure

Country Status (1)

Country Link
TW (1) TWI349973B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016171149A (en) 2015-03-11 2016-09-23 株式会社東芝 Semiconductor device and manufacturing method thereof
JP6928437B2 (en) * 2016-03-04 2021-09-01 日東電工（上海松江）有限公司 Manufacturing method of sealed optical semiconductor device
US10833021B2 (en) * 2017-06-29 2020-11-10 Alpha And Omega Semiconductor (Cayman) Ltd. Method for precisely aligning backside pattern to frontside pattern of a semiconductor wafer

Also Published As

Publication number Publication date
TW200919596A (en) 2009-05-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees