TWI343132B - Led chip package structure and method of making the same - Google Patents
Led chip package structure and method of making the same Download PDFInfo
- Publication number
- TWI343132B TWI343132B TW96116895A TW96116895A TWI343132B TW I343132 B TWI343132 B TW I343132B TW 96116895 A TW96116895 A TW 96116895A TW 96116895 A TW96116895 A TW 96116895A TW I343132 B TWI343132 B TW I343132B
- Authority
- TW
- Taiwan
- Prior art keywords
- light
- emitting diode
- substrate
- unit
- colloidal
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims description 115
- 239000008393 encapsulating agent Substances 0.000 claims description 73
- 238000000034 method Methods 0.000 claims description 46
- 235000012431 wafers Nutrition 0.000 claims description 38
- 239000000084 colloidal system Substances 0.000 claims description 26
- 238000004806 packaging method and process Methods 0.000 claims description 19
- 238000012937 correction Methods 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 238000005538 encapsulation Methods 0.000 claims description 5
- 239000011159 matrix material Substances 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 5
- 239000000499 gel Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 210000004508 polar body Anatomy 0.000 claims description 2
- 239000000843 powder Substances 0.000 claims 3
- NIHNNTQXNPWCJQ-UHFFFAOYSA-N fluorene Chemical compound C1=CC=C2CC3=CC=CC=C3C2=C1 NIHNNTQXNPWCJQ-UHFFFAOYSA-N 0.000 claims 2
- 238000002156 mixing Methods 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 239000000565 sealant Substances 0.000 claims 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 claims 1
- 241000254158 Lampyridae Species 0.000 claims 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims 1
- 241000737002 Siganus vulpinus Species 0.000 claims 1
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 238000002425 crystallisation Methods 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 229920001296 polysiloxane Polymers 0.000 claims 1
- 239000002689 soil Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 27
- 230000000694 effects Effects 0.000 description 10
- 230000017525 heat dissipation Effects 0.000 description 6
- 238000005286 illumination Methods 0.000 description 6
- 238000012858 packaging process Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 3
- 230000005284 excitation Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000013021 overheating Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Landscapes
- Led Device Packages (AREA)
Description
—1343132 - 100年1月10日修正替換頁 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種發光二極體晶片封裝結構及其 封裝方法，尤指一種具有高效率側向發光效果之發光二極 體晶片封裝結構及其封裝方法。 【先前技術】 請參閱第一圖所示，其係為習知發光二極體之第一種 封裝方法之流程圖。由流程圖中可知，習知發光二極體之 ® 第一種封裝方法，其步驟包括：首先，提供複數個封裝完 成之發光二極體（S800);接著，提供一條狀基板本體， 其上具有一正極導電軌跡與一負極導電執跡（S802);最 後，依序將每一個封裝完成之發光二極體設置在該條狀基 板本體上，並將每一個封裝完成之發光二極體之正、負極 端分別電性連接於該條狀基板本體之正、負極導電軌跡 (S804)〇 請參閱第二圖所示，其係為習知發光二極體之第二種 φ 封裝方法之流程圖。由流程圖中可知，習知發光二極體之 第二種封裝方法，其步驟包括：首先，提供一條狀基板本 體，其上具有一正極導電執跡與一負極導電轨跡（S900); 接著，依序將複數個發光二極體晶片設置於該條狀基板本 體上，並且將每一個發光二極體晶片之正、負極端分別電 性連接於該條狀基板本體之正、負極導電軌跡（S902); 最後，將一條狀封裝膠體覆蓋於該條狀基板本體及該等發 6 1343132 J〇〇年丨月川曰修正替換頁</ RTI> 1343132 - January 10, 100 revised replacement page IX, the invention description: [Technical Field] The present invention relates to a light emitting diode chip package structure and a packaging method thereof, and more particularly to a high efficiency lateral direction Light-emitting diode package structure and method of packaging the same. [Prior Art] Please refer to the first figure, which is a flow chart of the first packaging method of the conventional light-emitting diode. As can be seen from the flow chart, the first package method of the conventional light-emitting diodes includes the steps of: firstly providing a plurality of packaged light-emitting diodes (S800); and then providing a substrate body on which Having a positive conductive track and a negative conductive trace (S802); finally, each packaged light-emitting diode is sequentially disposed on the strip substrate body, and each packaged light-emitting diode is The positive and negative terminals are electrically connected to the positive and negative conductive tracks of the strip substrate body (S804). Please refer to the second figure, which is the flow of the second φ package method of the conventional light-emitting diode. Figure. As can be seen from the flow chart, the second packaging method of the conventional light-emitting diode comprises the steps of: firstly providing a substrate body having a positive conductive trace and a negative conductive trace (S900); And arranging a plurality of light emitting diode chips on the strip substrate body, and electrically connecting the positive and negative ends of each of the light emitting diode chips to the positive and negative conductive tracks of the strip substrate body. (S902); Finally, a strip of encapsulating glue is applied over the strip substrate body and the hair is replaced by the 6 1343132 J〇〇年丨月川曰 revision replacement page
光二極體晶H W収a日乃上，以形成一 (S904)。 T有條狀發光區域之光棒 然而 ’闕於上述習知於# & 由於每一顆封穿先一極體之第一種封裝方法， 二極體封裝切割下來，然後 體必須先從一整塊發光The photodiode crystal H W is taken up to form one (S904). T has a strip of light-emitting area of the light bar, however, 'because of the above-mentioned conventional knowledge of # & Because each of the first package method of sealing the first pole, the diode package is cut, and then the body must first Whole glow
程，將每一顆封裝完成之發光二極'^黏著技術（SMT)製 體上，因此無法有㈣短其歸狀基板本 等封裝完成之發光二極體之再：’發光時’該 用者視線仍然產生;^佳效果。θ有暗▼現象存在，對於使 另外，關於上述習知發光二極 法將不會產生暗帶的問題。 * 激發的區域不均，為雜狀封裝膠體被 使仔忐棒之光效率不佳（亦即，靠 么先；極體晶片的封裝膠體區域會產生較強的激發光 ^、’而通離發光二極體晶片的封裝膠體區域則產生較弱的 激發光源）。Cheng, each package will be completed by the LED two-electrode technology (SMT) body, so there is no way to (4) short return of the substrate, such as the completion of the package of the light-emitting diode: 'lighting' The line of sight still produces; ^ good effect. There is a dark θ phenomenon, and there is no problem that the dark band will not occur with respect to the above-described conventional light-emitting diode method. * The area of the excitation is uneven, and the light of the miscellaneous encapsulation colloid is inefficient (that is, it depends on the first; the encapsulation colloidal region of the polar body wafer generates strong excitation light ^, ' and is separated The encapsulated colloidal region of the light-emitting diode wafer produces a weaker excitation source).
請參閱第三圖所示，其係為習知發光二極體應用於側 向發光之示意圖。由圖中可知，當習知之發光二極體晶片 D應用於側向發光時（例如：使用於筆記型電腦螢幕之導 光板Μ之側向光源），由於筆記型電腦螢幕之導光板…非 常薄的關係，該發光二極體晶片D之基座s 1的長度11 則必須相對的縮短。換言之，由於該基座s丄的長度u 太短的關係，習知之發光二極體晶片D將無法得到有效的 散熱效果，進而產生發光二極體晶片D因過熱而燒壞的情 7 1343132 100年1月10日修正賛換頁 形。 是以，由上可知，目前習知之發光二極體的封裝方法 及封裝結構，顯然具有不便與缺失存在，而待加以改善者。 緣是，本發明人有感上述缺失之可改善，且依據多年 來從事此方面之相關經驗，悉心觀察且研究之，並配合學 理之運用，而提出一種設計合理且有效改善上述缺失之本 發明。 【發明内容】 · 本發明所要解決的技術問題，在於提供一種發光二極 體晶片之封裝方法及其封裝結構。本發明之發光二極體結 構於發光時，形成一連續之發光區域，而無暗帶及光衰減 的情況發生，並且本發明係透過晶片直接封裝（Chip On Board，COB )製程並利用壓模（die mold )的方式，以使 得本發明可有效地縮短其製程時間，而能進行大量生產。 再者，本發明之結構設計更適用於各種光源，諸如背光模 組、裝飾燈條、照明用燈、或是掃描器光源等應用，皆為 · 本發明所應用之範圍與產品。 另外，本發明之封裝膠體透過特殊模具之壓模過程， 以使得本發明之發光二極體晶片封裝結構於直立的情況 下，即可產生側向發光的效果，因此本發明不會有散熱不 足的情況發生。換言之，本發明不僅可產生側向投光的功 能，更能顧到應用於薄型殼體内之散熱效果。 為了解決上述技術問題，根據本發明之其中一種方 8 1343132 100年丨月10日修正替換頁 案，提供一種發光二極體晶片之封裝方法，其包括下列步 驟：首先，提供一基板單元，其具有一基板本體、及分別 形成於該基板本體上之一正極導電轨跡與一負極導電軌 跡。 接著，透過矩陣的方式，分別設置複數個發光二極體 晶片於該基板本體上，以形成複數排縱向發光二極體晶片 排，其中每一個發光二極體晶片係具有分別電性連接於該 基板單元的正、負極導電執跡之一正極端與一負極端。 然後，透過一第一模具單元，將複數條條狀封裝膠體 縱向地分別覆蓋在每一排縱向發光二極體晶片排上，其中 每一條條狀封裝膠體之上表面係具有複數個相對應該等 發光二極體晶片之膠體弧面。 最後，本發明具有二種後續的實施態樣： 第一種態樣：首先，沿著每兩個縱向發光二極體晶片 之間，横向地切割該等條狀封裝膠體，以形成複數個彼此 分開地覆蓋於每一個發光二極體晶片上之封裝膠體，其中 • 每一個封裝膠體的上表面係為該膠體弧面，並且每一個封 裝膠體係具有一形成於該膠體弧面前端之膠體出光面；接 著，透過一第二模具單元，將一框架單元覆蓋於該基板本 體及該等封裝膠體上並且填充於該等封裝膠體之間；最 後，沿著每兩個縱向發光二極體晶片之間，横向地切割該 框架單元及該基板本體，以形成複數條光棒，並且使得該 框架單元被切割成複數個只讓每一條光棒上之所有封裝 膠體的該等膠體出光面露出之框架層。 9 1343132 - 100年1月10日修正替換頁 第二種態樣：首先，沿著每兩個縱向發光二極體晶片 之間，横向地切割該等條狀封裝膠體，以形成複數個彼此 分開地覆蓋於每一個發光二極體晶片上之封裝膠體，其中 每一個封裝膠體的上表面係為該膠體弧面，並且每一個封 裝膠體係具有一形成於該膠體弧面前端之膠體出光面；接 著，透過一第三模具單元，將複數條條狀框架層覆蓋於該 基板本體及該等封裝膠體上並且縱向地填充於每一個封 裝膠體之間；最後，沿著每兩個縱向發光二極體晶片之 間，横向地切割該等條狀框架層及該基板本體，以形成複 ® 數條光棒，並且使得該等條狀框架層被切割成複數個只讓 每一個封裝膠體的膠體出光面露出之框體。 為了解決上述技術問題，根據本發明之其中一種方 案，提供一種發光二極體晶片封裝結構，其包括：一基板 單元、一發光單元、及一封裝膠體單元。 其中，該基板單元係具有一基板本體、及分別形成於 該基板本體上之一正極導電軌跡與一負極導電軌跡。該發 光單元係具有複數個設置於該基板本體上之發光二極體 · 晶片，其中每一個發光二極體晶片係具有分別電性連接於 該基板單元的正、負極導電執跡之一正極端與一負極端。 該封裝膠體單元係具有複數個分別覆蓋於該等發光二極 體晶片上之封裝膠體，其中每一個封裝膠體之上表面及前 表面係分別具有一膠體弧面及一膠體出光面。 另外，本發明之發光二極體晶片封裝結構，可更進一 步包括下例兩種結構： 1343132 100年1月10日修正替換頁 第一種：一框架單元，其係為一層覆蓋於該基板本體 上並包覆每一個封裝膠體而只露出該等膠體出光面之框 架層。 第二種：一框架單元，其具有複數個分別覆蓋該等封 裝膠體而只露出每一個封裝膠體的膠體出光面之框體，其 中該等框體係彼此分離地設置於該基板本體上。 因此，本發明之發光二極體結構於發光時，形成一連 續之發光區域，而無暗帶及光衰減的情況發生。並且，本 發明係透過晶片直接封裝（Chip On Board，COB)製程 並利用壓模（die mold)的方式，以使得本發明可有效地 縮短其製程時間，而能進行大量生產。再者，由於本發明 之發光二極體晶片封裝結構於直立的情況下，即可產生側 向發光的效果。因此，本發明不僅可產生側向投光的功 能，更能顧到應用於薄型殼體内之散熱效果。 為了能更進一步瞭解本發明為達成預定目的所採取 之技術、手段及功效，請參閱以下有關本發明之詳細說明 • 與附圖，相信本發明之目的、特徵與特點，當可由此得一 深入且具體之瞭解，然而所附圖式僅提供參考與說明用， 並非用來對本發明加以限制者。 【貫施方式】 請參閱第四圖、第四a圖至第四d圖、及第四A圖至 第四D圖所示。第四圖係為本發明封裝方法之第一實施例 之流程圖，第四a圖至第四d圖分別為本發明封裝結構之 1343132 100年1月10曰修正替換頁 第一實施例之封裝流程示意圖，第四A圖至第四D圖分別 為本發明封裝結構之第一實施例之封裝流程刮面示意 圖。由第四圖之流程圖可知，本發明之第一實施例係提供 種盔光一極體晶片之封裝方法’其包括下列步驟：八 首先’請配合第四a圖及第四A圖所示，提供一基板 單兀1，其具有一基板本體1 〇、及分別形成於該基板本 體1 0上之複數個正極導電轨跡2丄與複數個負極導電 轨跡1 2 (S100)。其中，依不同的設計需求，該基板單 元1 0係可為一印刷電路板、一軟基板、一鋁基板、一陶 _ 瓷基板、或一銅基板。此外，該正、負極導電軌跡丄工、 1 2係可採用鋁線路或銀線路，並且該正、負極導電軌跡 1 1、1 2之佈局（layout)係可隨著不同的需要而有 改變。 接著，請配合第四b圖及第四B圖所示，透過矩陣的 方式，分別設置複數個發光二極體晶片2 〇於該基板本體 1 0上，以形成複數排縱向發光二極體晶片排2，其中每 二個發光二極體晶片2 〇係具有分別電性連接於該基板籲 單元的正、負極導電軌跡！工、工2之一正極端2〇ι與 一負極端 2 0 2 (S102)。 ' 此外’以本發明之第一實施例而言，每一個發光二極 體晶片2 0之正、負極端2 〇 1、2 〇 2係透過兩相對應 之導線W並以打線的方式，以與該基板單元上之正、負極 導電執跡1 1、i 2產生電性連接。再者，每一排縱向發 先二極體晶片排2係以-直線的排列方式設置於該基板 12 1343132 川〇年丨月]〇曰修正替換頁 di基〇★ 上’並且每-個發光二極體晶片2 U係了為-藍色發先二極體晶片（blue 。 當然，上述該等發光二極體晶片20之電 t非用以限定本發明，例如:請參閱第五圖所矛 發光二極體晶片透過覆晶的方式達成電接 (2發j 圖），每一個發光二極體晶片20 -之 妾t不思 1 ’、2 Q 2 ’係透過複數個相對庫 _ 1 2 0 方式，以與該基板單元厂之正以覆晶的 1〇-又止負極導電執跡11一、 1 2 _產生電性連接。另外，依據不同的設計需求， 發光二極體晶片（圖未示）之正'負極 ^、 聯、或串聯加並聯的方式，以與該基板單元 ^ 正、負極導電軌跡產生電性連接。 、口木不）之 ，後:請^合第四c圖、第四〇圖及第六圖所示，透 匕一第一杈具早2，將複數條條狀封裝膠體3 分別覆蓋在每-排縱向發光二極體晶片排2上，其中每— 條條狀封裝膠體3之上表面係具有複數個相對心等 光，極體晶片2 0之膠體弧面3 〇 〇，並且每一條條= 裝膠體3係具有複數個設置於該等相對應膠體弧面〇 0前端之膠體前端面3 〇 1 (S】〇4)。 其中，該第-模具單元M1係由一第一上模具m 及-用於承載該基板本體i 〇之第—下模具Μι 2賴 成且該第一上模具町1係具有複數條相對應該等縱 向命光一極體晶片排2之第—通道M1丄〇。其中每 第-通道Ml 1 〇係具有複數個凹槽G，而每—個 13 1343132 100年1月丨0曰修正替換頁 ___________ =表面及前表面係分別具有—個相對應該膠體弧 之杈具弧面G 1 0 〇及—個相對應該 0 1之模具前端面G 1 〇 1。 則％面3 此外’該等第-通道M1 ! Q的尺寸係與該等條 再者，每一條條狀封裝膠體3係可 依據不同的使用需求，而選擇為：由一石夕膠與 混合形成之螢光膠體、或由一環氧樹脂與 二 形成之螢光膠體。 物所此口 緊接著，請配合第四d圖及第四D圖所示，沪著 _ 個縱向發光二極體晶片20之間，橫向地切割該^條狀封 裝膠體3，以形成複數個彼此分開地覆蓋於每一個發光二 極體晶片2 0上之封裝膠體3 〇，其中每一個封裝▲體I 0的上表面係為該膠體弧面3 〇 〇，並且每一個封裝膠體 3 0係具有一形成於該膠體弧面3 〇 〇前端之膠體出 面 3 0 2 (S106)。 ’ 然後，請配合第四e圖及第四£圖所示，透過一第二 杈具單tcM 2，將一框架單元4覆蓋於該基板本體丄〇及籲 該等封裝膠體3 0上並且填充於該等封裝膠體3 〇之間 (S108)。其中，該第二模具單元M2係由一第二上模具 M2 1及一用於承載該基板本體i 〇之第二下模具M2 2所、.且成’並且5亥第一上模具Μ 2 1係具有一條相對應該 框架單元4之第二通道M2 1 0，此外該第二通道Μ2工 0的高度係與該等封裝膠體3 〇的高度相同，而該第二通 道Μ21〇的寬度係與該框架單元4的寬度相同。 1343132 100年1月丨〇日修正替換頁 敢後，睛再參閱第四e圖’並配合第四f圖及第四ρ 圖所示’沿著每兩個縱向發光二極體晶片2 〇之間，橫向 地切割該框架單元4及該基板本體1 〇，以形成複數^光 棒L 1，並且使得該框架單元4被切割成複數個只讓每一 條光棒L 1上之所有封裝膠體3 〇的該等膠體出光面3 〇 2露出之框架層4 〇 (suo)。其中，該等框架層4 〇 係可為不透光框架層，例如：白色框架層。 ^請參閱第七圖、第七a圖至第七b圖、及第七A圖至 第七B圖所示。第七圖係為本發明封裝方法之第二實施例 ，流程11 ’第七a圖至第七b圖分別為本發明封裝結構之 第二實施例之部分封裝流程示意圖，第七A圖至第七B圖 刀別為本發明封I结構之第二實施例之部分封裝流程剖 面不意圖。由第七圖之流程圖可知，第二實施例之步驟 2〇〇至S206係分別與第一實施例之步驟sl〇〇至si〇6 亦即’步驟S200係等同於第一實施例之第四a圖 及第―四A圖之示意圖說明；步驟S2〇2係等同於第一實施 二:四b圖及第_圖之示意圖說明；步驟s2〇4係等 一Λ施例之第四c圖及第四c圖之示意圖說明，·步 等同於第一實施例之第四d圖及第四。圖之示 -牛於^驟贿之後，本發明之第二實施例更進 -d:參閲第七3圖及第七八圖所示，透過 將複數條條狀框架層4>覆蓋於該 體1 0及5亥等封裝膠體3 0上並且縱向地填充於 15 1343132 100年1月丨〇曰修正替換頁 每一個封裝膠體3 〇之間（S208)。 其中’該第三模具單元M3係由一第三上模具M3 1 及一用於承載該基板本體1 0之第三下模具M3 2所組 成’並且該第三上模具Μ 3 1係具有複數條相對應該等縱 向發光二極體晶片排2之第三通道m3 1 0,並且該第三 通道M3 1 〇的高度係與該等封裝膠體3 〇的高度相 同，而該第三通道M3 1 0的寬度係大於每一個封裝膠體 3 0的寬度。 敢後Please refer to the third figure, which is a schematic diagram of a conventional light-emitting diode applied to lateral illumination. As can be seen from the figure, when the conventional LED chip D is applied to the lateral illumination (for example, the lateral light source used for the light guide plate of the notebook computer screen), the light guide plate of the notebook computer screen is very thin. In the relationship, the length 11 of the susceptor s 1 of the LED wafer D must be relatively shortened. In other words, since the length u of the susceptor 太 is too short, the conventional light-emitting diode wafer D will not be able to obtain an effective heat-dissipating effect, thereby causing the light-emitting diode wafer D to burn out due to overheating. 7 1343132 100 On January 10th, the revised page was revised. Therefore, it can be seen from the above that the conventional packaging method and package structure of the light-emitting diode are obviously inconvenient and missing, and are to be improved. The reason is that the inventors have felt that the above-mentioned defects can be improved, and based on the relevant experience in this field for many years, carefully observed and studied, and in conjunction with the application of the theory, a present invention which is reasonable in design and effective in improving the above-mentioned defects is proposed. . SUMMARY OF THE INVENTION The technical problem to be solved by the present invention is to provide a method for packaging a light-emitting diode wafer and a package structure thereof. The light-emitting diode structure of the present invention forms a continuous light-emitting region when light is emitted, and no dark band and light attenuation occurs, and the present invention utilizes a chip on-board (COB) process and utilizes a stamper. The way of the die mold is such that the present invention can effectively shorten the process time thereof and can be mass-produced. Furthermore, the structural design of the present invention is more suitable for various light sources, such as backlight modules, decorative light strips, illumination lamps, or scanner light sources, etc., all of which are applicable to the scope and products of the present invention. In addition, the encapsulant of the present invention passes through a molding process of a special mold, so that the light-emitting diode package structure of the present invention can produce lateral illumination effects when it is erected, so that the present invention does not have insufficient heat dissipation. The situation happened. In other words, the present invention not only produces the function of lateral light projection, but also the heat dissipation effect applied to the thin casing. In order to solve the above technical problem, in accordance with one of the aspects of the present invention, a method for packaging a light-emitting diode wafer, the method includes the following steps: First, a substrate unit is provided. The invention has a substrate body and a positive conductive track formed on the substrate body and a negative conductive track. Then, a plurality of light emitting diode chips are respectively disposed on the substrate body through a matrix to form a plurality of rows of vertical light emitting diode chips, wherein each of the light emitting diode chips is electrically connected to the substrate The positive and negative conductive traces of the substrate unit are one of the positive terminal and the negative terminal. Then, a plurality of strip-shaped encapsulants are longitudinally covered on each row of the vertical LED arrays through a first mold unit, wherein each of the strip-shaped encapsulants has a plurality of corresponding surfaces. The colloidal arc of the LED chip. Finally, the present invention has two subsequent embodiments: First aspect: First, the strip-shaped encapsulants are laterally cut along each of the two longitudinal light-emitting diode wafers to form a plurality of mutually Separatingly covering the encapsulant on each of the LED wafers, wherein: the upper surface of each encapsulant is the colloidal arc surface, and each encapsulant system has a colloidal light formed at the front end of the colloidal arc surface Then, a frame unit is overlaid on the substrate body and the encapsulants and filled between the encapsulants through a second mold unit; finally, along each of the two longitudinally-emitting diode chips Simultaneously cutting the frame unit and the substrate body laterally to form a plurality of light bars, and causing the frame unit to be cut into a plurality of frames which expose only the colloidal light-emitting surfaces of all the encapsulants on each of the light bars Floor. 9 1343132 - January 10, 100 Revision of the replacement page The second aspect: first, along each of the two longitudinal light-emitting diode wafers, the strip-shaped encapsulants are cut laterally to form a plurality of separate pieces Covering the encapsulant on each of the LED wafers, wherein the upper surface of each encapsulant is the colloidal arc surface, and each encapsulant system has a colloidal light-emitting surface formed on the front end of the colloidal arc surface; Then, a plurality of strip-shaped frame layers are overlaid on the substrate body and the encapsulants through a third mold unit and vertically filled between each of the encapsulants; finally, along each of the two longitudinally-emitting diodes Between the body wafers, the strip-shaped frame layers and the substrate body are laterally cut to form a plurality of light bars, and the strip-shaped frame layers are cut into a plurality of gels for each of the encapsulants. The frame that is exposed. In order to solve the above problems, according to one aspect of the present invention, a light emitting diode chip package structure is provided, comprising: a substrate unit, a light emitting unit, and an encapsulant unit. The substrate unit has a substrate body and a positive conductive track and a negative conductive track formed on the substrate body. The light-emitting unit has a plurality of light-emitting diodes and wafers disposed on the substrate body, wherein each of the light-emitting diode chips has one of positive and negative conductive traces electrically connected to the substrate unit. With a negative end. The encapsulating colloid unit has a plurality of encapsulants respectively covering the LED chips, wherein each of the upper surface and the front surface of the encapsulant has a colloidal arc surface and a colloidal light emitting surface. In addition, the LED package structure of the present invention may further include the following two structures: 1343132 Modified on January 10, 100, the first type: a frame unit, which is a layer covering the substrate body. Each of the encapsulants is coated and exposed to expose only the frame layer of the colloidal illuminating surface. The second type: a frame unit having a plurality of frames respectively covering the encapsulants and exposing only the colloidal light-emitting surface of each of the encapsulants, wherein the frame systems are disposed on the substrate body separately from each other. Therefore, the light-emitting diode structure of the present invention forms a continuous light-emitting region when light is emitted, and no dark band and light attenuation occurs. Further, the present invention is a chip on board (COB) process and utilizes a die mold so that the present invention can effectively shorten the process time thereof and can be mass-produced. Furthermore, since the light-emitting diode package structure of the present invention is erected, the effect of lateral light emission can be produced. Therefore, the present invention can not only produce the function of lateral light projection, but also the heat dissipation effect applied to the thin casing. In order to further understand the techniques, means, and effects of the present invention in order to achieve the intended purpose, refer to the following detailed description of the present invention. It is to be understood that the invention is not to be construed as limited [Comprehensive method] Please refer to the fourth figure, the fourth a to fourth d, and the fourth to fourth D. The fourth figure is a flow chart of the first embodiment of the packaging method of the present invention, and the fourth to fourth figures are the package of the first embodiment of the first embodiment of the first embodiment of the present invention. The flow diagrams of the fourth embodiment to the fourth D are respectively schematic views of the package flow of the first embodiment of the package structure of the present invention. As can be seen from the flow chart of the fourth figure, the first embodiment of the present invention provides a method for packaging a seed-light mono-polar wafer, which includes the following steps: eight first, please cooperate with the fourth a diagram and the fourth diagram A, A substrate unit 1 is provided, which has a substrate body 1 , and a plurality of positive conductive traces 2 丄 and a plurality of negative conductive traces 1 2 ( S100 ) respectively formed on the substrate body 10 . The substrate unit 10 can be a printed circuit board, a flexible substrate, an aluminum substrate, a ceramic substrate, or a copper substrate. In addition, the positive and negative conductive traces are completed, and the 1 2 series can adopt an aluminum line or a silver line, and the layout of the positive and negative conductive traces 1 1 and 1 2 can be changed according to different needs. Then, in combination with the fourth b and the fourth B, a plurality of light emitting diode chips 2 are respectively disposed on the substrate body 10 through a matrix to form a plurality of rows of vertical light emitting diode chips. Row 2, wherein each of the two LED chips 2 has a positive and negative conductive track electrically connected to the substrate unit respectively! One of the working and working 2 terminals is 2〇ι and a negative terminal 2 0 2 (S102). In addition, in the first embodiment of the present invention, the positive and negative terminals 2 〇1, 2 〇2 of each of the LED chips 20 are transmitted through the two corresponding wires W and are wire-bonded. Electrical connection is made to the positive and negative conductive traces 1 1 and i 2 on the substrate unit. Furthermore, each row of longitudinally-emitting diode chips 2 is arranged in a linear arrangement on the substrate 12 1343132 〇 〇 〇曰 〇曰 〇曰 〇曰 替换 替换 替换 替换 di di di di di di di di 并且 并且 并且 并且 并且 并且 并且 并且 并且 并且 并且The diode chip 2 U is a blue-emitting diode chip (blue. Of course, the above-mentioned LEDs 20 are not used to limit the invention, for example, please refer to the fifth figure. The spear light-emitting diode chip is electrically connected by flip chip (2 shots), and each of the light-emitting diode chips 20 - 妾t 不 1 ', 2 Q 2 ' is transmitted through a plurality of relative libraries _ 1 20 0, in order to electrically connect with the substrate unit of the substrate unit, which is flip-chip, and the negative electrode conductive traces 11 and 1 2 _. In addition, according to different design requirements, the light-emitting diode chip ( The figure is not shown in the positive 'negative ^, connected, or series and parallel connection, to electrically connect with the substrate unit positive and negative conductive traces., mouth wood does not), after: please ^ fourth c As shown in the figure, the fourth figure and the sixth figure, a plurality of strip-shaped encapsulants 3 are respectively covered by a first cooker 2 Covered on each row of longitudinal light-emitting diode rows 2, wherein each of the strip-shaped encapsulants 3 has a plurality of opposite-centered surfaces, and the colloidal surface of the polar wafer 20 is 3 〇〇, and Each strip = the colloid 3 has a plurality of colloidal front faces 3 〇 1 (S 〇 〇 4) disposed at the front end of the corresponding colloidal 〇 0. Wherein, the first die unit M1 is formed by a first upper mold m and a first lower mold Μι 2 for carrying the substrate body i 且 and the first upper mold line 1 has a plurality of corresponding correspondences Longitudinal life of the first row of the wafer row 2 - channel M1 丄〇. Each of the first channel Ml 1 has a plurality of grooves G, and each 13 13343132 January 100 曰 0 曰 correction replacement page ___________ = surface and front surface system respectively have a corresponding colloidal arc The curved surface G 1 0 〇 and the corresponding front end face G 1 〇1 of 0 1 . Then the % face 3 is further 'the size of the first channel M1 ! Q is the same as the strips, and each strip of the encapsulating colloid 3 can be selected according to different use requirements: A fluorescent colloid, or a fluorescent colloid formed of an epoxy resin and two. Immediately after the object, please cooperate with the fourth d picture and the fourth D picture, between the _ longitudinal illuminating diode chips 20, laterally cutting the strip-shaped encapsulant 3 to form a plurality of The encapsulant 3 〇 on each of the LED wafers 20 is covered separately from each other, wherein the upper surface of each package ▲ body I 0 is the colloidal surface 3 〇〇, and each encapsulant 30 is There is a colloidal exit surface 3 0 2 formed at the front end of the colloidal arc surface 3 (S106). Then, with a second cookware single tcM 2, a frame unit 4 is overlaid on the substrate body and the encapsulants 30 and filled with a second cookware single tcM 2 as shown in the fourth and fourth figures. Between the encapsulants 3 〇 (S108). The second mold unit M2 is composed of a second upper mold M2 1 and a second lower mold M2 2 for carrying the substrate body i, and is formed into a first upper mold Μ 2 1 The second channel M2 1 0 corresponding to the frame unit 4 is further provided, and the height of the second channel Μ 2 is the same as the height of the encapsulant 3 ,, and the width of the second channel Μ 21 与 is The frame unit 4 has the same width. 1343132 After the correction of the replacement page on the following day of January, 100, the eye will refer to the fourth e-picture 'and the fourth f-picture and the fourth ρ-picture along the 'two along each longitudinal LED chip 2' The frame unit 4 and the substrate body 1 are laterally cut to form a plurality of light rods L1, and the frame unit 4 is cut into a plurality of packages 100 for each of the light bars L1. The frame layer 4 〇 (suo) exposed by the colloidal light-emitting surface 3 〇 2 of the crucible. Wherein, the frame layer 4 can be an opaque frame layer, such as a white frame layer. ^ Please refer to the seventh figure, the seventh to seventh b, and the seventh to seventh B. The seventh embodiment is a second embodiment of the packaging method of the present invention, and the flow chart 11 'the seventh through seventh to the seventh b are respectively a schematic diagram of a part of the packaging process of the second embodiment of the package structure of the present invention, and the seventh through the seventh The seventh block diagram is not intended to be a partial package flow profile of the second embodiment of the invention. It can be seen from the flowchart of the seventh figure that the steps 2〇〇 to S206 of the second embodiment are respectively equivalent to the steps s1〇〇 to si〇6 of the first embodiment, that is, the step S200 is equivalent to the first embodiment. The schematic diagrams of the four a diagrams and the fourth to fourth diagrams; the step S2〇2 is equivalent to the first embodiment two: four b diagrams and the schematic diagram of the figure _ diagram; the steps s2 〇 4 series and the fourth embodiment of the embodiment The schematic diagram of the figure and the fourth c diagram illustrates that the steps are equivalent to the fourth d diagram and the fourth embodiment of the first embodiment. The second embodiment of the present invention is further described as follows: Referring to Figures 7 and 7 of the present invention, by covering a plurality of strip-like frame layers 4> The body 10 and 5 hai are encapsulated on the body 30 and longitudinally filled in 15 1343132 January 100 丨〇曰 corrected replacement page between each encapsulant 3 〇 (S208). Wherein the third mold unit M3 is composed of a third upper mold M3 1 and a third lower mold M3 2 for carrying the substrate body 10 and the third upper mold Μ 3 1 has a plurality of Corresponding to the third channel m3 1 0 of the longitudinal light emitting diode chip row 2, and the height of the third channel M3 1 〇 is the same as the height of the encapsulant 3 ,, and the third channel M3 10 The width is greater than the width of each of the encapsulants 30. Dare
w冉參閱第七a圖，並配合第七b圖及第七1 圖所不，沿著每兩個縱向發光二極體晶片2 〇之間，橫ρ 地切割該等條狀框架層4 ^及該基板本體i Q，以形成^ 數條光棒L 2，並且使得該等條狀框架層4 /被切割成名 數個只讓每一個封裝膠體3 0的膠體出光面3〇ud (S210)。其中，該等框體4〇、系糊 透先框體，例如：白色框體。W冉 refer to the seventh a diagram, and in conjunction with the seventh b and seventh diagrams, the strip frame layer 4 is cut transversely between each of the two longitudinal light emitting diode chips 2 And the substrate body i Q to form a plurality of light bars L 2 and such that the strip frame layers 4 / are cut into a number of colloidal light-emitting surfaces 3 〇 ud (S210) . Among them, the frame 4〇 and the paste are transparent to the frame, for example, a white frame.
明第^圖及“ A_$。第人a圖係為本潑 圖# Ϊ j之第三實施例之部分封裝流程示意圖，第八A 裝結構之第三實施例之部分封裝流程剖 八圖之流程圖可知，第三實施例與第-、 例的差異在於：第—實施例之步驟讓 ^^:Γ 膠體3 -」。日日0之間’縱向地切割該等條狀封裝 再者， 一第四模具單元从4係由—第 四上模具Μ4 16 丄343132 100年1月]〇日蜂正替換頁 及一用於承载該基板本體1 0之第四下模具Μ4 2所組 成。此外，該第四模具單元Μ4與該第一模具單元Ml最 大的不同在於：每一個第四通道M4 1 0之上表面及前表 面係分別具有一模具弧面3 0 〇 —及一模具出光面3 〇 2 。所以，複數條條狀封裝膠體3/係横向地分別覆蓋 在橫向的發光二極體晶片2上。 请參閱第九圖所示，其係為本發明發光二極體晶片之 φ 封裝結構應用於側向發光之示意圖。由圖中可知，當本發 明之發光二極體晶片D應用於側向發光時（例如：使用於 f記型電腦螢幕之導光板1^之侧向光源），該發光二極體 曰曰片D之基座S 2的長度12可依散熱的需要而加長（不 像習知一樣受導光板M厚度的限制）。換言之，由於該基 座S 2的長度12可依散熱的需要而加長，因此本發明之 發光二極體晶片D將可得到有效的散熱效果，進而可避免 發光一極體晶片D因過熱而燒壞的情形。 綜上所述，本發明之發光二極體結構於發光時，形成 連續之發光區域，而無暗帶及光衰減的情況發生，並且 本發明係透過晶片直接封裝製程並利用壓模的方式，以使 得本發明可有效地縮短其製程時間，而能進行大量生產。 再者，由於本發明之發光二極體晶片封裝結構於直立的情 ;兄下’即可產生側向發光的效果。因此，本發明不僅可產 生側向投光的功能，更能顧到應用於薄型殼體内之散埶效 果。 ’’、、 惟，以上所述，僅為本發明最佳之一的具體實施例之 17 100年1月10日修正替換頁 坪細說明與圖式，惟本發明之 以限制本發明’本發明之枝亚不侷限於此，並非用 圍為準，凡合於太私日日由/有乾圍應以下述之申請專利範 之實浐存丨:處A χ申睛專利範圍之精神盘類似變化 之貫靶例，皆應包含於本發 月竹一頰似文化 藝者在本發明之領域内，可中’/壬何熟悉該項技 蓋在以下本案之專利範圍及之變化或修飾皆可涵 【圖式簡單說明】 第圖係為習知發光二極體之笛 第二圖係為習知發光二極體方法之流程圖； 第三圖传為習遛之第一種封裝方法之流程圖； :㈡料白知發光二極 第四圖係為本發明封裝方法之第二 圖， =二圖分別為本發明封裝結構之第-實施 例之封裝流程立體示意圖； 第四⑽發明封裝結構之第-實施 J之封裝〜程剖面示意圖； 第五圖極體晶“過覆晶的方式達成 明第四C圓未灌入封裝膠雜前之示意圖； 封裝方法之第二實绝例之流程圖r 二二二別為本發明封裝結構之第二實施 j之邓刀封裝流程立體示意圖； 七分別為本發明封裝結構之第二實施 之邛/刀封裝流程剖面示意圖； 、 1343132The first part of the figure and the "A_$. The first person a picture is a schematic diagram of a part of the packaging process of the third embodiment of the present invention, and the partial packaging process of the third embodiment of the eighth A structure is shown in FIG. As is apparent from the flow chart, the difference between the third embodiment and the first and third examples is that the steps of the first embodiment allow ^^: 胶 colloid 3 -". Between the day 0 and the 'longitudinal cutting of the strips of the package, a fourth die unit from the 4 series by - the fourth upper mold Μ 4 16 丄 343132 January 100] the next day bee replacement page and one for The fourth lower mold Μ 4 2 carrying the substrate body 10 is composed of. In addition, the fourth mold unit Μ4 and the first mold unit M1 are different in maximum: each of the upper surface and the front surface of the fourth passage M4 1 0 has a mold arc surface 30 〇—and a mold illuminating surface 3 〇2. Therefore, a plurality of strip-shaped encapsulants 3/ are laterally covered on the lateral light-emitting diode wafer 2, respectively. Please refer to the ninth figure, which is a schematic diagram of the φ package structure of the LED of the present invention applied to lateral illumination. As can be seen from the figure, when the light-emitting diode chip D of the present invention is applied to lateral light emission (for example, a lateral light source used for the light guide plate 1 of the f-type computer screen), the light-emitting diode chip The length 12 of the base S 2 of D can be lengthened according to the need of heat dissipation (not limited by the thickness of the light guide plate M as is conventional). In other words, since the length 12 of the susceptor S 2 can be lengthened according to the heat dissipation requirement, the light-emitting diode wafer D of the present invention can obtain an effective heat dissipation effect, thereby preventing the light-emitting diode wafer D from being burnt due to overheating. Bad situation. In summary, the light-emitting diode structure of the present invention forms a continuous light-emitting region when light is emitted, and no dark band and light attenuation occurs, and the present invention directly encapsulates the process through the wafer and utilizes a stamper. Therefore, the present invention can effectively shorten the process time thereof and can be mass-produced. Furthermore, since the light-emitting diode package structure of the present invention is in an upright position, the effect of lateral illumination can be produced. Therefore, the present invention can not only produce the function of lateral projection, but also the effect of divergence applied in a thin casing. '',, but only the specific embodiment of the present invention is only one of the preferred embodiments of the present invention. On January 10, 100, the replacement page is described and illustrated, but the present invention is intended to limit the present invention. The invention is not limited to this, and it is not limited to the scope of the application. The scope of the patent application is the same as that of the following: The target of the change should be included in the field of the present month. It is in the field of the invention. It can be used in the scope of the patent and the changes or modifications in the following cases. The following figure is a flow chart of the conventional illuminating diode dipole method. The third picture is the first packaging method of Xi’s. Flowchart; (2) The fourth diagram of the light-emitting diode is the second diagram of the packaging method of the present invention, and the second diagram is a perspective view of the package flow of the first embodiment of the package structure of the present invention; The structure of the structure - implementation J package ~ path profile; fifth figure polar crystal "The method of over-crystallapping achieves a schematic diagram of the fourth C-circle before it is filled into the package glue; the second actual example of the package method r 222 is the second implementation of the package structure of the invention Schematic diagram of the knives packaging process; seven are respectively schematic cross-sectional views of the 邛/knife packaging process of the second implementation of the package structure of the present invention; 1343132
實施例之部分封裝 第八a圖係為本發明封裝結構之第 流程立體示意圖； 第三實施例之部分封裝 片之封裝結構應用於側 第八A圖係為本發明封裝結構之 流裎剖面示意圖；以及 第九圖係為本發明發光二極體晶 向發光之示意圖。The eighth embodiment of the embodiment is a schematic diagram of the flow of the package structure of the present invention; the package structure of the partial package of the third embodiment is applied to the side of the eighth embodiment, which is a schematic diagram of the flow of the package structure of the present invention. And the ninth figure is a schematic diagram of the crystal light emission of the light-emitting diode of the present invention.
D Μ S 1 11D Μ S 1 11
【主要元件符號說明 [習知] 發光二極體 導光板 基座 長度 [本發明] 基板單元 基板單元 縱向發光二極體晶片排2 基板本體 10 正極導電轨跡 11 負極導電轨跡 12 正極導電軌跡 11一 負極導電轨跡 1 2 一 發光二極體晶片2 〇 正極端 201 負極端 2 Q 2 發光二極體晶片2 〇 一 正極端 2 0 1 一 1343132 - 100年1月10曰修正替換頁 負極端 2 0 2 > 3 封裝膠體 3 0 膠體弧面 3 0 0 膠體前端面 3 0 1 膠體出光面 3 0 2 3 / 模具弧面 3 0 0 ^ 模具出光面 3 0 2 ^ 4 框架層 4 0 4 ^ 框體 4 0 ^ W B Ml 第一上模具 Mil 第一通道 Μ 1 1 0 第一下模具 Μ 1 2 凹槽 G 模具弧面 G 1 〇 〇 模具前端面 G 1 〇 1 Μ 2 第二上模具 M 2 1 第二通道 M 2 1 0 第二下模具 M2 2 M3 第三上模具 M 3 1 第三通道 M 3 1 0 第三下模具 M 3 2 Μ 4 第四上模具 M4 1[Main component symbol description [General] Light-emitting diode light guide plate base length [Invention] Substrate unit substrate unit Longitudinal light-emitting diode wafer row 2 Substrate body 10 Positive conductive track 11 Negative conductive track 12 Positive conductive track 11 a negative conductive track 1 2 a light emitting diode chip 2 〇 positive terminal 201 negative terminal 2 Q 2 light emitting diode chip 2 〇 a positive terminal 2 0 1 a 1343132 - 100 January 100 曰 correction replacement page negative Extreme 2 0 2 > 3 Package colloid 3 0 Colloidal arc surface 3 0 0 Colloid front end face 3 0 1 Colloidal exit surface 3 0 2 3 / Mold arc surface 3 0 0 ^ Mold exit surface 3 0 2 ^ 4 Frame layer 4 0 4 ^ Frame 4 0 ^ WB Ml First upper mold Mil First channel Μ 1 1 0 First lower mold Μ 1 2 Groove G Mold curved surface G 1 〇〇 Mold front end face G 1 〇1 Μ 2 Second upper Mold M 2 1 Second channel M 2 1 0 Second lower mold M2 2 M3 Third upper mold M 3 1 Third passage M 3 1 0 Third lower mold M 3 2 Μ 4 Fourth upper mold M4 1
條狀封裝膠體 條條狀封裝膠體 框架單元 條狀框架層 導線 錫球 第一模具單元 第二模具單元 第三模具單元 第四模具單元 20 1343132 - • . 100年1月10曰修正替換頁 第四通道 Μ 4 1 0 第四下模具 Μ 4 2 光棒 L 1 光棒 L 2 發光二極體 D 導光板 Μ 基座 S 2 長度 12Strip encapsulant colloid strip encapsulation colloid frame unit strip frame layer conductor tin ball first mold unit second mold unit third mold unit fourth mold unit 20 1343132 - • . 100 January 10 曰 correction replacement page fourth Channel Μ 4 1 0 Fourth lower mold Μ 4 2 Light rod L 1 Light rod L 2 Light-emitting diode D Light guide plate 基座 Base S 2 Length 12
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| TW96116895A TWI343132B (en) | 2007-05-11 | 2007-05-11 | Led chip package structure and method of making the same |
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