TWI228802B - Cavity down type package for avoiding the exposure of gold wire - Google Patents
Cavity down type package for avoiding the exposure of gold wire Download PDFInfo
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- TWI228802B TWI228802B TW092122578A TW92122578A TWI228802B TW I228802 B TWI228802 B TW I228802B TW 092122578 A TW092122578 A TW 092122578A TW 92122578 A TW92122578 A TW 92122578A TW I228802 B TWI228802 B TW I228802B
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- H10W72/884—
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Abstract
Description
12288021228802
、本發明是有關於一種封裝件,且特別是有關於一種可 避免金線外露之晶穴朝下型(Cavi ty D〇wn Type)封裝件。 【發明所屬之技術領域】 【先前技術】 請參照第1圖,其所繪示乃傳統之晶穴朝下型封裝件 之侧視圖。傳統晶穴朝下型封裝件1〇〇係包括有一基板 102 一被動元件(Pass i ve Component) 1 04、一晶粒(di e ) 106、一膠體(Molding Compound)110 以及多個錫球 ii2。 基板100上具有一晶穴114,用以容置晶粒丨〇6。被動元件 104係配置於基板102之第一面1〇以上,並靠近晶穴114之 一侧。晶粒106係透過多條金線丨08與基板丨02上之信號層 118電性連接。膠體丨1〇係用以包覆晶粒丨〇6與金線1〇8。錫 球11 2係形成於基板1 〇 2之第一面1 〇 2 A上。其中,當要將晶 穴朝下型封裝件100配置於一電路板(未繪示於圖中)上 時,封裝件100需先上下翻轉180度之後,再將封裝件丨00 配置於電路板上。 由於被動元件1 0 4係配置於晶穴11 4之旁,所以,當進 行打線製程(Wire Bonding)時,由於金線1 〇8必須跨過被 動元件104,所以必須將金線108拉高,以避免金線1〇8碰 觸到被動元件1 0 4而造成金線1 0 8與被動元件1 〇 4短路。然 而,過高的金線108將可能無法完全被膠體1 1〇所包覆,部 分之金線108將可能暴露於膠體100之外。外露之金線1〇8 將受外界濕氣的影響。此外,外露之金線1 〇 8之電性特性The present invention relates to a package, and more particularly to a Cavity Type (Wave Type) package that can prevent the gold wire from being exposed. [Technical field to which the invention belongs] [Prior art] Please refer to FIG. 1, which shows a side view of a conventional cavity-down type package. The conventional cavity-down type package 100 includes a substrate 102, a passive component 104, a die 106, a molding compound 110, and a plurality of solder balls ii2. . The substrate 100 has a crystal cavity 114 for receiving crystal grains. The passive element 104 is disposed above the first surface 10 of the substrate 102 and is close to the side of the cavity 114. The die 106 is electrically connected to the signal layer 118 on the substrate 02 through a plurality of gold wires 08. The colloid 10 is used to coat the crystal grains 106 and gold wires 108. The tin ball 11 2 is formed on the first surface 102 A of the substrate 102. Wherein, when the cavity-down type package 100 is to be arranged on a circuit board (not shown in the figure), the package 100 needs to be turned upside down 180 degrees before the package 100 is arranged on the circuit board. on. Since the passive component 104 is arranged beside the crystal cavity 114, when performing the wire bonding process, since the gold wire 108 must cross the passive element 104, the gold wire 108 must be pulled up. In order to avoid that the gold wire 108 touches the passive element 104, the gold wire 108 and the passive element 104 are short-circuited. However, an excessively high gold wire 108 may not be completely covered by the colloid 110, and a part of the gold wire 108 may be exposed outside the colloid 100. The exposed gold wire 108 will be affected by external moisture. In addition, the electrical characteristics of the exposed gold wire 108
TW1220F(日月光).ptd 第7頁 1228802TW1220F (Sun Moonlight) .ptd Page 7 1228802
亦可砲趨於惡化 【發明内容】 有鐘於此, 外露之晶穴朝下 之一凹槽,可以 露之目的。本發 特性與降低成本 根據本發明 朝下型封裝件, 本發明的目 型封裝件。 達到使金線 明更具有減 之優點。 的目的,提 包括一基板 體。基板具有一晶穴與一凹 的就是在提供一 藉由將被動元件 之高度降低,進 少金線長度,改 出一種可避免金 、一被動元件、 中。晶粒係配置 性連接。至少此 粒與此些金線。 根據本發明 晶穴朝下型封裝 件、一晶粒以及 於第一面上係具 之第—面上。被 穴中,並黏著於 第一面電性連接 則係包覆晶粒與 為讓本發曰月 懂,下文特舉一 槽。被動元件係 於晶穴中,晶粒係透過多條 些金線之一係跨越凹槽。而 的另一目的 件,包括一 一膠體。基 ,提出一種可避 基板、一散熱片 板具有一第一面 有一晶穴與一凹槽。散熱片 動元件係配 散熱片上。 ’至少此些 此些金線。 之上述目的 較佳實施例 置於凹槽中。晶 晶粒係透過多條 金線之一係跨越 、特徵、和優點 ,並配合所附圖 種可避免金線 配置於基板上 而避免金線外 善金線之電性 線外露之晶穴 一晶粒及一膠 配置於凹槽 金線與基板電 膠體則包覆晶 免金線外露之 、一被動元 與一第二面, 係配置於基板 粒係配置於晶 金線與基板之 凹槽。而膠體 能更明顯易 式,作詳細說The gun can also be deteriorated. [Summary of the invention] There is a bell here, and the exposed cavity faces a groove downward, which can expose the purpose. Features of the invention and reduced cost According to the present invention, a face-down package, a target package of the present invention. To achieve the advantage of making the golden thread more subtractive. The purpose is to include a substrate body. The substrate has a cavity and a recess to provide a way to reduce the height of the passive element and reduce the length of the gold wire, and to change a type that can avoid gold, a passive element, and the like. Grain system configurational connection. At least this grain with these gold threads. According to the present invention, a cavity-down-type package, a die, and a first side of a jig on the first side. In the hole, and adhere to the first side, the electrical connection is covered with crystal grains. In order to make the hair easier to understand, a slot is given below. The passive element is in a crystal cavity, and the crystal grain crosses the groove through one of a plurality of gold wires. And the other purpose of the item includes a colloid. Based on the proposal, an avoidable substrate and a heat sink plate have a first surface with a cavity and a groove. The heat sink is mounted on the heat sink. ’At least these gold wires. The above purpose of the preferred embodiment is placed in the groove. The crystal grains pass through one of a plurality of gold wires, spanning, characteristics, and advantages, and in combination with the drawings, can prevent the gold wires from being arranged on the substrate and the electrical wires of the gold wires from being exposed. The grain and a glue are arranged on the gold wire of the groove and the substrate. The electric gel coats the exposed gold wire, a passive element and a second surface. It is arranged on the substrate. The grain is arranged on the groove of the gold wire and the substrate. . And colloid can be more obvious
1228802 五、發明說明(3) 明如下: 【實施方式】 本發明係藉由將被動元件配置於基板上之凹槽,可以 達到使金線之高度降低,進而避免金線外露之目的。 施例, 請參照第2圖,其繪示依照本發明一第一實施例的一 種可避免金線外露之晶穴朝下型封裝件2 〇 〇之側視圖。晶 穴朝下型封裝件200具有一基板202、一被動元件204、一 晶粒206、一膠體210以及錫球212。基板202具有相對之一 第一面202A與一第二面202B,且基板202具有多層信號 層,例如是位於第一面202上之信號層21 8A與位於基板202 内部之信號層218B。於第一面202A上具有一晶穴214與一 凹槽21 6。被動元件2 0 4係配置於凹槽21 6中。晶粒2 0 6係配 置於晶穴214中,晶粒206係經由黏著劑220固定於晶穴2 14 之底部。晶粒206係透過多條金線,例如是金線208A與金 線208B,與基板202之第一面2 02A上的信號層218A電性連 接。金線208A係跨越凹槽208。膠體210係包覆晶粒206、 被動元件204與所有的金線。而多個錫球212係配置於基板 202之第一面202A上。 於凹槽216中之被動元件2〇4係與信號層218B電性連 接。被動元件204例如是以銲錫或導電膠黏著於信號層 218B之上的方式與信號層218B電性連接。凹槽216之深度1228802 Fifth, the description of the invention (3) is as follows: [Embodiment] The present invention achieves the purpose of reducing the height of the gold wire and preventing the gold wire from being exposed by arranging the passive element in a groove on the substrate. For an example, please refer to FIG. 2, which illustrates a side view of a package-type package 200 that can prevent the gold wire from being exposed according to a first embodiment of the present invention. The cavity-down package 200 has a substrate 202, a passive element 204, a die 206, a colloid 210, and a solder ball 212. The substrate 202 has a first surface 202A and a second surface 202B opposite to each other, and the substrate 202 has multiple signal layers, such as a signal layer 218A on the first surface 202 and a signal layer 218B inside the substrate 202. A cavity 214 and a groove 216 are formed on the first surface 202A. The passive components 2 0 4 are arranged in the grooves 21 6. The grains 206 are arranged in the cavity 214, and the grains 206 are fixed on the bottom of the cavity 2 14 through the adhesive 220. The die 206 is electrically connected to the signal layer 218A on the first surface 202A of the substrate 202 through a plurality of gold wires, for example, the gold wires 208A and 208B. The gold wire 208A crosses the groove 208. The colloid 210 covers the die 206, the passive element 204, and all the gold wires. The plurality of solder balls 212 are disposed on the first surface 202A of the substrate 202. The passive component 204 in the groove 216 is electrically connected to the signal layer 218B. The passive element 204 is electrically connected to the signal layer 218B by, for example, soldering or conducting adhesive on the signal layer 218B. Depth of groove 216
TW1220F(日月光).Ptd 第9頁 1228802TW1220F (Sun Moonlight) .Ptd Page 9 1228802
五、發明說明(4) 可大致上等於晶穴214之深度,如第2圖所示。此外,凹槽 216之深度亦可小於晶穴214之深度,只要讓被動元件 得以與基板中之多個信號層之一電性連接即可。 請同時參照第2圖與第3圖,其中,第3圖所繪示乃第2 圖之基板202簡化後之上視圖。晶穴214與凹槽216係相 鄰,兩者間之距離很小。而晶穴21 4與凹槽21 6之底面積大 小係對應至晶粒206與被動元件2〇4之面積。 由於被動元件204係容置於凹槽216中,於進行打線製 程時,金線2 0 8 A不會碰觸到被動元件2 〇 4。所以,當進行 打線製程時,金線208A並不需要特別拉高,來避免金 208A與被動元件204短路。所以,本發明之金線之高度可 以降低,故本發明之金線將可完全地被包覆於膠體U 〇 中。因此,本發明之可完全包覆於膠體21〇中之金線將 免於外界濕氣的影響,並保有良好的電性特性。 實施例二 請參照第4圖與第5圖,其中,第4圖所繪示乃本發明 之第二實施例之-種可避免金線外露之晶 400之侧視圖,第5圖緣示乃第4圖之基板402簡化後之^ 圖。與第—實施例不同的是,形成於封裝件之第一面 402A之晶穴414與凹槽416係相通。吐 面 六少 々曰m 此外,如第4圖所示, 凹槽416之巧係可小於晶穴414 黏著劑420固f於日】穴414之底部’而被動元件416係固ί 於凹槽416底部,並與信號層418電性連接。5. Description of the invention (4) It may be approximately equal to the depth of the crystal cavity 214, as shown in FIG. In addition, the depth of the groove 216 may be smaller than the depth of the cavity 214, as long as the passive element can be electrically connected to one of the plurality of signal layers in the substrate. Please refer to FIG. 2 and FIG. 3 at the same time, wherein FIG. 3 is a simplified top view of the substrate 202 of FIG. 2. The cavity 214 and the groove 216 are adjacent to each other, and the distance between them is small. The area of the bottom of the cavity 21 4 and the groove 21 6 corresponds to the area of the crystal grain 206 and the passive element 204. Since the passive element 204 is accommodated in the groove 216, the gold wire 208 A will not touch the passive element 204 during the wire bonding process. Therefore, when the wire bonding process is performed, the gold wire 208A does not need to be specially pulled up to avoid short circuit between the gold 208A and the passive component 204. Therefore, the height of the gold wire of the present invention can be reduced, so the gold wire of the present invention can be completely covered in the colloid U 0. Therefore, the gold wire of the present invention, which can be completely coated in the colloid 21, will be protected from the influence of external moisture and retain good electrical characteristics. For the second embodiment, please refer to FIG. 4 and FIG. 5. Among them, the drawing in FIG. 4 is a side view of the second embodiment of the present invention-a kind of crystal 400 which can prevent the gold wire from being exposed. The substrate 402 of FIG. 4 is simplified. Unlike the first embodiment, the cavity 414 and the groove 416 formed on the first surface 402A of the package are in communication with each other. In addition, as shown in FIG. 4, the groove 416 may be smaller than the crystal cavity 414, and the adhesive 420 is fixed at the bottom of the cavity 414. The passive element 416 is fixed to the groove 416. The bottom is electrically connected to the signal layer 418.
TW1220F(日月光).Ptd 第10頁 1228802 五、發明說明(5) 實施例三 請參照第6圖,其繪示乃本發明之第三實施例之一種 可避免金線外露之晶穴朝下型封裝件6〇〇之側視圖。第三 實施例與第一實施例不同的是,晶粒606更可透過黏著劑 620固定於散熱片6〇3上,以達到良好之散熱效果。 詳而言之,封裝件600具有一基板6〇2、一散熱片 603、一被動元件6〇4、一晶粒6〇6、一膠體61〇以及多個錫 球612。基板6 02具有一第一面60 2A與一第二面60 2B,於基 板6 02之第一面60 2A上係具有一晶穴614與一凹槽616。散 熱片603係配置於基板6〇2之第二面602B上。被動元件604 係配置於凹槽616中。晶粒606係配置於晶穴614中,並黏 著於散熱片6 0 3上。晶粒6 0 6係透過多條金線,例如是金線 608A與608B,與基板602之第一面602A電性連接。金線 608A係跨越凹槽616。而膠體610係包覆晶粒60 6、被動元 件604與所有金線。錫球612係配置於基板602之第一面 6 0 2 A 上。 其中,基板602係具有多層信號層,例如是位於基板 602之第一面602A上的信號層618A與位於基板内部的信號 層61 8B。位於凹槽616中之被動元件604係與信號層608B電 性連接。晶穴61 4與凹槽6 1 6係相鄰。凹槽6 1 6之深度係小 於晶穴61 4之深度。 實施例四TW1220F (Sun and Moonlight) .Ptd Page 10 1228802 V. Description of the Invention (5) Embodiment 3 Please refer to FIG. 6, which shows the third type of the present invention, which can prevent the gold wire from being exposed downward. Side view of package 600. The third embodiment is different from the first embodiment in that the die 606 can be fixed on the heat sink 603 through the adhesive 620 to achieve a good heat dissipation effect. In detail, the package 600 has a substrate 602, a heat sink 603, a passive element 604, a die 606, a colloid 610, and a plurality of solder balls 612. The substrate 60 02 has a first surface 60 2A and a second surface 60 2B, and a cavity 614 and a groove 616 are formed on the first surface 60 2A of the substrate 60 02. The heat radiation sheet 603 is disposed on the second surface 602B of the substrate 602. The passive element 604 is disposed in the groove 616. The crystal grains 606 are arranged in the crystal cavity 614 and adhered to the heat sink 603. The die 60 is electrically connected to the first surface 602A of the substrate 602 through a plurality of gold wires, such as gold wires 608A and 608B. The gold wire 608A crosses the groove 616. The colloid 610 covers the crystal grains 60, the passive element 604, and all the gold wires. The solder ball 612 is disposed on the first surface 602 A of the substrate 602. The substrate 602 has a plurality of signal layers, such as a signal layer 618A on the first surface 602A of the substrate 602 and a signal layer 61 8B on the inside of the substrate. The passive element 604 in the groove 616 is electrically connected to the signal layer 608B. The cavity 61 4 is adjacent to the groove 6 1 6. The depth of the groove 6 1 6 is smaller than the depth of the cavity 61 4. Example 4
TW1220F(日月光).ptd 第11頁 1228802 五、發明說明(6) 請參照 可避免金線 實施例與第 通。 本發明 下型封裝件 可以有效地 體中。本發 的電性特性 長度亦可縮 低金線之阻 短後,所需 綜上所 然其並非用 本發明之精 本發明之保 準。 上述實 ,由於 降低, 明之金 。甚且 短,如 抗,以 之成本 述,雖 以限定 神和範 護範圍 施例所 被動元 故本發 線將免 ,高度 此,可 提升訊 亦隨之 然本發 本發明 圍内, 當視後 揭露之 件係容 明之金 受外界 降低後 以縮短 號傳送 降低。 明已以 ,任何 當可作 附之申 第7^圖,曰其綠示乃本發明之第四實施例之一種 外露之晶穴朝下型封裝件700之側視圖。第四 三實施例不同的是,晶穴714與凹槽716係相 可避免金線外露之晶穴朝 置於凹槽中,金線的高度 線將可完全地被包覆於膠 濕氣的影響,並保有良好 之金線,其所需之金線的 δίΐ號傳送之路徑長度,降 品質。此外,金線長度縮 一較佳實施例揭露如上, 熟習此技藝者,在不脫離 各種之更動與潤飾,因此 請專利範圍所界定者為TW1220F (sun and moonlight) .ptd Page 11 1228802 V. Description of the invention (6) Please refer to the avoidable gold wire embodiment and the same. The lower package of the present invention can be effectively built in the body. The electrical characteristics of the hair can also reduce the resistance of the gold wire. After all, it is not necessary to use the essence of the present invention. The above facts, due to the reduction of Mingzhijin. Even if it is short, such as resistance, it is stated at the cost, although the passive line will be avoided by the example of limiting the scope of the god and the scope of protection. At this high level, the message can be promoted. The items that were later disclosed were reduced by the outside world and reduced by the shortened number. It has been shown in Figure 7 that the green display is a side view of an exposed cavity-down type package 700 according to the fourth embodiment of the present invention. The difference between the fourth embodiment and the third embodiment is that the cavity 714 and the groove 716 are in phase to prevent the exposed gold wire from being placed in the groove, and the height line of the gold wire can be completely covered with glue. Influence, and maintain a good gold thread, the required length of the δίΐ number of the gold wire to transmit the path length, degrading quality. In addition, the preferred embodiment of the shortening of the length of the gold wire is disclosed above. Those skilled in this art will not depart from various changes and retouches, so please define the scope of the patent as
12288021228802
圖式簡單說明 【圖式簡單說明】 第1圖所繪不乃傳統之晶穴朝下型封裝件之侧視圖· =2圖繪示依照本發明一第一實施例的一種可避免金 線外露之晶穴朝下型封裝件之側視圖; ’ 第3圖繪示乃第2圖之基板簡化後之上視圖; 第4圖繪示乃本發明之第二實施例之一種可 外露之晶穴朝下型封裝件之侧視圖; 第5圖繪示乃第4圖之基板簡化後之上視圖; 第6圖繪示乃本發明之第三實施例之一種可避免金線 外露之晶穴朝下型封裝件之側視圖;以及 第7圖繪示乃本發明之第四實施例之一種可避免金線 外露之晶穴朝下型封裝件之侧視圖。 圖式標號說明 100、200、400、600、700 :封裝件 102、202、402、602 :基板 102A 、 202A 、 402A 、 602A :第一面 402B 、 604B :第二面 104、204、404、604 :被動元件 106、206 ^ 406、606 :晶粒 108、208A、208B、608A、608B :金線 110 > 210 > 610 :膠體 11 2、2 1 2、61 2 ••錫球 114 、 214 、 414 、 614 、 714 :晶穴Brief Description of the Drawings [Simplified Illustration of the Drawings] Figure 1 is not a side view of a traditional cavity-down type package. = 2 Figure 2 illustrates a method to prevent the gold wire from being exposed according to a first embodiment of the present invention. A side view of the cavity-down type package; 'FIG. 3 is a simplified top view of the substrate of FIG. 2; FIG. 4 is an exposed cavity of the second embodiment of the present invention A side view of a downward-facing package; FIG. 5 is a simplified top view of the substrate of FIG. 4; FIG. 6 is a view of a third embodiment of the present invention, which can prevent the gold wire from being exposed. A side view of the down-type package; and FIG. 7 is a side view of a down-type package that can prevent the gold wires from being exposed, according to the fourth embodiment of the present invention. Description of drawing symbols 100, 200, 400, 600, 700: Packages 102, 202, 402, 602: Substrates 102A, 202A, 402A, 602A: First side 402B, 604B: Second side 104, 204, 404, 604 : Passive element 106, 206 ^ 406, 606: Die 108, 208A, 208B, 608A, 608B: Gold wire 110 > 210 > 610: Colloid 11 2, 2 1 2, 61 2 •• Ball 114, 214 , 414, 614, 714: Crystal Cavern
TW1220F(曰月光).ptd 第13頁 1228802 圖式簡單說明 216 118 220 416、616、716 :凹槽 218A 、 218B 、 418 、 618A 420、620 ··黏著劑 603 :散熱片 618B :信號層TW1220F (say moonlight) .ptd Page 13 1228802 Brief description of the diagrams 216 118 220 416, 616, 716: grooves 218A, 218B, 418, 618A 420, 620
TWH20F(日月光).ptd 第14頁TWH20F (Sun Moonlight) .ptd Page 14
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092122578A TWI228802B (en) | 2003-08-15 | 2003-08-15 | Cavity down type package for avoiding the exposure of gold wire |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092122578A TWI228802B (en) | 2003-08-15 | 2003-08-15 | Cavity down type package for avoiding the exposure of gold wire |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200507192A TW200507192A (en) | 2005-02-16 |
| TWI228802B true TWI228802B (en) | 2005-03-01 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092122578A TWI228802B (en) | 2003-08-15 | 2003-08-15 | Cavity down type package for avoiding the exposure of gold wire |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI228802B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8085547B2 (en) | 2007-04-29 | 2011-12-27 | Hon Hai Precision Industry Co., Ltd. | Electronic elements carrier |
-
2003
- 2003-08-15 TW TW092122578A patent/TWI228802B/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8085547B2 (en) | 2007-04-29 | 2011-12-27 | Hon Hai Precision Industry Co., Ltd. | Electronic elements carrier |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200507192A (en) | 2005-02-16 |
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| MM4A | Annulment or lapse of patent due to non-payment of fees |