TWI227554B - Flip-chip package with integration of passive component - Google Patents

Abstract

A flip-chip package with integration of passive component includes a substrate. The substrate has an upper surface, a lower surface and a through hole. A chip is mounted on the upper surface of the substrate. The chip has an active surface with a plurality of first bonding pads and at least a second bonding pad. A plurality of bumps is formed on the first bonding pads for mounting the chip on the upper surface of the substrate. The second bonding pad is aligned with the through hole. A passive component corresponding to the through hole is bonded on the second bonding pad. An underfilling material is formed in the gap between the chip and the substrate and the through hole by injecting through the through hole to steady the bumps and the passive component.

Description

1227554 V. Description of the invention (1) — ^ [Technical field to which the invention belongs] The present invention relates to a flip-chip package structure, and more particularly to a flip-chip package structure integrating passive components. [Previous technology] In the electrical connection technology of semiconductor wafers and substrates, the "flip-chip mounting" technology is superior to traditional wire bonding technology in both circuit density and & process efficiency [wireb ο nding ], Especially suitable for digital applications, and semiconductor wafers and substrates often generate unnecessary resonance or signal reflection in high-speed digital applications, which affects signal quality. 'In order to improve the quality of electrical signals or increase electrical functions, A passive component [passive c0mp0nent] will be attached to the upper surface of the semiconductor device, such as an inductor, a resistor or a capacitive component. Since the passive components are relatively cheap and easy to obtain, the passive components are directly integrated into the chip or substrate. , Not cost-effective. In view of this, if there are other passive components arranged on the substrate outside the encapsulant, please refer to Figure 1, as disclosed in the Republic of China Patent Bulletin No. 51 5063 "IC Package Components That Improve Signal Quality", The package element includes a first substrate 10 and a second substrate 20. The first substrate 10 has a first surface and a second surface. The first surface is used for packaging a chip (not shown). [Drawing], and the second surface is used for assembling the external terminal 11, the plurality of passive components 21 are disposed on the second substrate 2 / ^, and the second substrate 20 is disposed on the first substrate 10 The first surface. Therefore, in addition to the wafer, the first surface of the first substrate 10 needs to be additionally designed with a peripheral area to configure the second substrate 20 ′ provided with the passive element 21, resulting in a smaller package size. Large and many components. In addition,

1227554 V. Description of the invention (2) The quality of No. 2 or increase of electrical functions (not shown in the figure) must be kept to say 'the passive components mentioned above may be too far away from the chip, so that electrical signal products cannot be effectively improved. A patented stacked multi-chip package structure includes a substrate conductor wafer and at least one passive element on the substrate, the second semiconductor on the first semiconductor wafer, and a flip-chip technology can be used, the second conductor wafer In terms of the size, the second semiconductor chip is not passively. Although this configuration method adds electrical functions, the size of the first half chip cannot be reduced. [Summary of the invention] The main purpose of the present invention is a crystal package structure, which is connected to a substrate with a through-hole, $% 'in order to reduce the combination of the substrate and the second objective of the present invention,' the passive component 21 is necessary Within a distance, the effect will be because the package can not achieve its expected quality or effectively increase the electrical function. Announcement No. 461 058 "with integrated passive, integrated structure" is unveiled without another known seal and the chip. That is to say, the result is out of the colloid, that is, a first semiconductor wafer, a piece of the first semiconductor wafer, the space occupied by the second semiconducting semiconductor wafer element system, and the space occupied by the semiconductor chip can be further modified in addition to the passive components. The two halves are arranged on the first semiconductor wafer body and the size of the arrangement is smaller than the first half on the first semiconductor wafer. For its good electrical signal, it is necessary to configure it, but it also results in electrical characteristics or quality. The second semiconductor package structure is to provide a chip with passive components integrated with passive components, which correspond to the area. It is to provide an integrated passive device cover, a flip chip bonding, and a substrate.

Page 8 1227554 V. Description of the invention (3) Crystal package structure, which is a wafer with passive components, flip-chip bonding = a substrate with through-holes, and the passive component corresponds to the through-opening of the substrate Hole, an underfill material can be injected from the through opening, formed between the wafer and the substrate, and filled in the through opening. The underfill material simultaneously seals the passive element and stabilizes the bumps With the passive element. A flip-chip substrate for integrating passive components according to the present invention, a wafer having an upper surface penetrating the upper surface and a lower surface of the substrate are combined with the wafer having a plurality of first and a plurality of convex upper surfaces, and the components are Corresponding to the filling material system board, the bumps and sheets are filled, a passive, lower surface and lower surface are bonded, the wafer is a bonding pad and at least one, the wafer is the second The pads pass through the openings and can pass through the passive components and one bottom and one through the width of a plurality of solder balls with an active and a second pad aligned with the convex systems. The bonding is combined with the crystal through hole, the injection hole, to seal the structure, the part of the filling material, the hole, which is open at 0.3 to 3. Omm, on the substrate 'the active surface, the first A solder bump is bonded to the through hole, and the second pad of the sheet is preferably formed on the wafer to seal the passive element substrate. The hole system is preferably formed on the surface, and the surface system is formed into a pad system. The substrate and the passive element are formed. And stable [implementation] The accompanying drawings, the present invention will include the following examples. Human, rfr 2 The first specific embodiment of the present invention, please refer to FIG. 2, a flip-chip package structure 100 with a total of 70 passive components, which includes a substrate U0, a wafer 120, a passive component 130, and a bottom Filling material 14〇, the substrate 11〇

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1227554 V. Description of the invention (4) The material system can be BT, FR-4 or FR-5, which has an upper surface in, a lower surface 112 and a through-opening 丨 13. The through-opening 113 runs through the < The upper surface 111 and the lower surface 11 2, the width of the through-opening hole 11 3 is not less than 0.3 mm, preferably, 0.3 to 30 minutes, and the lower surface 11 2 of the substrate 110 is A plurality of solder balls 150 are bonded to transmit the signal of the flip-chip package structure 100. The upper surface of the substrate 110 is combined with the wafer 120, and the wafer 120 has an active surface 121. The active surface 121 is formed with a plurality of first pads 122 and a plurality of second pads 123. The first pads 122 are formed with a plurality of bumps 124, and the wafer 120 is covered with the bumps 124. The crystals are bonded to the upper surface 111 of the substrate 110, and the second solder pads 123 are aligned with the Betong openings 11 3 'The passive element 1 3 0 may be an inductor, a resistor or a capacitive element, and the passive element 1 3 0 corresponds to the through-opening 1 1 3 and is connected to the second pad 1 23 of the wafer 120. In this embodiment, the passive component 130 is more The block 124 is relatively protruded from the main face 121 of the wafer 120, and is provided in the through-opening hole 113. The underfill material 140 is formed between the wafer 120 and the substrate 110, and is filled in the The through hole 113 is used to stabilize the bumps 124 and the passive element 130. Preferably, the underfill material 140 covers and seals the passive element 130, so that the passive element 30 is buried in the through opening. Hole 113. Since the passive component 130 is coupled to the second solder pad 123 of the wafer 120 and corresponds to the through-hole 113 of the substrate 110, the substrate 110 does not need to additionally design a peripheral area for the passive The components 30 are combined to reduce the area of the substrate 110, and when the passive component 130 is more protruded than the bumps 124 on the active surface 121 of the wafer 120, the through opening can be used

Page 1227554 V. Description of the invention (5)-11 3 as the yielding space of the passive element 1 3 0, that is, the passive element 3 0 0 can be accommodated in the through opening 11 3 so as not to affect The bumps 1 2 4 are a combination of the substrate 110. In addition, as shown in FIG. 3, the underfill material 140 can be injected into the through-hole 113 through a glue-coated needle 2000. When the underfill material 140 is injected through the through-hole 1 13 to form the wafer 12 〇 and the substrate 110, and filled in the through-opening 丨 丨 3, the passive element 130 can be sealed at the same time to stabilize the bumps 124 and the passive element 130, without additional steps to protect the These passive components 1 3 0. The present invention exemplifies a second specific embodiment. Please refer to FIG. 4, a flip-chip package structure 300 for integrating passive components, which includes a substrate 3 1 0, a wafer 320, a passive component 330, and an underfill. Material 340, the substrate has an upper surface 311, a lower surface 312, and a through hole 313 penetrating the upper surface 31 and the lower surface 312, and the through hole 313 is formed with a stepped portion 314, the substrate 310 The lower surface 312 is connected with a plurality of solder balls 350, and the upper surface 311 of the substrate 3 10 is combined with the wafer 320. The wafer 320 has an active surface 321, and the active surface 321 is formed with a plurality of first solders. A pad 322 and a second pad 323, the first pads 322 are formed with a plurality of bumps 324, the wafer 320 is bonded to the upper surface 311 of the substrate 310 by the bumps 324, and The second bonding pad 323 is aligned with the through hole 313 of the substrate 310. The passive element 330 has a first bonding end 331 and a second bonding end 332. The first bonding end 331 is coupled to the wafer 320. A second bonding pad 323, and the second bonding end 332 is electrically connected by a bonding wire 360. 31〇 connected to the substrate portion of step 314, the underfill material may be through the through 34〇 based dispensing opening 313 formed on the wafer 320 and the substrate

Page 11 1227554 V. Description of the invention (6) 3 1 0 'is filled in the through opening 3 3 to stabilize the bumps 324 and seal the passive element 330 and the bonding wire 360. The scope of protection of the present invention is subject to the scope of the appended patent application scope. Any changes and modifications made by those skilled in the art without departing from the scope of the present invention are covered by the present invention. 1 God and Fan

1227554 on the 12th page _------------ / Simplified Schematic on the map] Figure ^ • Republic of China Patent Bulletin No. 51 5063 "Front view of 1C package components that can improve signal quality Schematic diagram: ϋ ί: According to a first specific embodiment of the present invention, a cross-sectional schematic diagram of a flip-chip package structure integrating passive components; according to a first specific embodiment of the present invention, the integrated passive component is constructed by A schematic cross-sectional view of a through-hole injection underfill material and, according to a second embodiment of the present invention, a cross-sectional schematic view of a flip-chip package structure integrating passive components. Brief description of component symbols: 10 first substrate 11 external terminals 20 Two substrates 21 Passive component 100 Chip-on-chip packaging structure 110 Substrate 111 upper surface 112 lower surface 113 through hole 120 wafer 121 active surface 122 first zinc 123 second pad 124 bump 130 passive component 140 underfill 150 solder ball 200 Rubber-coated needle 3 0 0 flip chip package structure

1227554 Brief description of the diagram 310 Substrate 311 Upper surface 312 Lower surface 313 Through hole 314 Stepped portion 320 Wafer 321 Active surface 322 First pad 323 Second pad 324 Bump 330 Passive element 331 First joint end 332 Second joint End 340 underfill material 3 5 0 fresh ball 3 6 0 welding wire

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Claims (1)

1227554 [Scope of patent application] Hole; A flip-chip-substrate integrated with passive components, which has an upper 2 package structure, including: a surface, a lower surface, and a through-open chip, which is optional and ancient .. ^ u You have a An active surface, the active surface is formed with a plurality of solder pads, and a plurality of bumps are formed on the upper and lower surfaces of the substrate and the chip is bonded to the upper surface of the substrate with the bumps and the first Two solder pads are aligned with the through-hole; a passive component is a second pad connected to the wafer corresponding to the through-hole; and an underfill material is formed between the wafer and the Between the substrates, the bumps and the passive component are stabilized. 2 'The chip-on-sealing structure of an integrated passive component as described in item 1 of the patent application scope, wherein the passive component has a first joint end and a second joint end, and the first joint end is bonded to the chip The second pad is electrically connected to the substrate. 3. The flip-chip package structure integrating passive components as described in the second item of the patent application scope, wherein the through-opening of the substrate is formed with a stepped portion, and a bonding wire is electrically connected to the second joint of the passive component. And the stepped portion of the substrate. 4. The flip-chip packaging structure of the integrated passive component as described in item 1 of the scope of the patent application, wherein the width of the through-opening is not less than 0.3 mm. 5. The flip-chip packaging structure of the integrated passive component as described in item 4 of the scope of the patent application, wherein the width of the through-opening is between 0.3 and 3.0 mm. Page 15 1227554 6. Scope of applying for patent 6. If applying for the installation structure ‘its 7, if applying for the installation structure’ # 8, if so please ask for the installation ’’ 9, jealousy applying for the installation structure ’its active side. 10, jealous application of the installation structure 'its surface. i Reports the flip-chip sealing M of the integrated passive device described in item 1, and the partial filling material is filled in the through opening. . The crystal-on-chip encapsulation of an integrated passive component as described in item 1 of the patent scope. The middle passive component is buried in the through hole. The underfill material in the flip-chip package with integrated passive device described in item 7 of the patent scope seals the passive device. In the flip-chip package with integrated passive components described in item 1 of the patent scope, the passive component is more prominent than the bumps. The flip-chip package with integrated passive components described in item 1 of the wafer patent includes a plurality of solders. Ball, which is bonded to the bottom of the substrate Page 16