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TWI222761B - Light-emitting diode and its manufacturing method - Google Patents

Light-emitting diode and its manufacturing method Download PDF

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Publication number
TWI222761B
TWI222761B TW92129734A TW92129734A TWI222761B TW I222761 B TWI222761 B TW I222761B TW 92129734 A TW92129734 A TW 92129734A TW 92129734 A TW92129734 A TW 92129734A TW I222761 B TWI222761 B TW I222761B
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Taiwan
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type electrode
emitting diode
light
substrate
patent application
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TW92129734A
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Chinese (zh)
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TW200515620A (en
Inventor
Wen-Jie Huang
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Arima Optoelectronics Corp
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Publication of TW200515620A publication Critical patent/TW200515620A/en

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Abstract

A kind of light-emitting diode (LED) and its manufacturing method are disclosed in the present invention. The invention at least contains a die-carrying base, an LED die having plural semiconductor layers and a patterned substrate; the first type electrode and the second type electrode. The first type electrode and the patterned substrate are located on the bottom part of plural semiconductor layers. When the die is bonded to the die-carrying base, the first type electrode is electrically connected to the first type electrode contact region on the electrode die-carrying base; and one wire-bonding step is used to complete the electric connection of the second type electrode. The electrodes of LED stated above are located at different sides of the chip such that it is capable of eliminating the problems, such as the requirement of performing the secondary wire-bonding step, poor diode heat dissipation and reduction of light-emitting area, generated in the prior art where electrodes are disposed on the same side to obtain electric connection.

Description

12227611222761

1222761 五、發明說明(2) 該晶粒1具有一 p型雷 該η型電極3係朝向^ / 1型電極3 ’且該P型電極2與 -具有複數半導體層;參考第la®及第1b圖’形成 之複數半導體層〗4 ^貝石基板之晶粒1,移除部份 該藍寳石基板4底部愈m該一n型電極3朝上,而 固晶面13結合。,然後再 (7如一 ^粒承載座)之― 式,用導線9分別電性接= bonding)的方 承載體之電性連^6、7 2電極2 &該11型電極3與該 線接合之發光二極體1〇包封起來,以伴 :=10Λ該承載體5之間的電性及機械連结。 時所產生的作用熱較=傳;結構相…發光 將導致二極體因作用埶積聚 D — = 1之散熱效率, 不穩定、較低二極體,亮;;:;化’&成二極體發光特性 且由於η型電極3及p型雷極? +门士丄 利電極之配置。如此4 之半導體層(主動綱 積,降低元件的發光效率及亮i。-極體兀件的發光面 另外,此種構裝方式需逸并 的電性連結,該導線9連接該發光Λ-人了線接合來進灯兀件 性連接端6、7,所形成之線圈牛之電極Μ與« 、略(loop)更必須佔據相當1222761 V. Description of the invention (2) The crystal grain 1 has a p-type thunder, the n-type electrode 3 is oriented to ^ / 1-type electrode 3 ′, and the P-type electrode 2 and-have a plurality of semiconductor layers; Figure 1b. The plurality of semiconductor layers formed. 4 ^ The crystal grains 1 of the sapphire substrate are removed. The more the bottom of the sapphire substrate 4 is, the more the n-type electrode 3 faces upward, and the solid crystal surface 13 is bonded. , And then (7 as a ^ grain bearing seat)-In this way, the wires 9 are electrically connected to the square carrier of the bonding body ^ 6, 7 2 electrode 2 & the 11 type electrode 3 and the wire The bonded light-emitting diodes 10 are encapsulated so as to have an electrical and mechanical connection with the carrier 5 = 10Λ. The heat generated when the temperature is relatively low; the structural phase ... the light will cause the diode to accumulate the heat dissipation efficiency of D — = 1, unstable, lower diode, bright; Diode light-emitting characteristics and due to the n-type electrode 3 and p-type thunder pole? + Menshijili electrode configuration. In this way, the semiconductor layer (active matrix product, reduces the luminous efficiency of the element and brightens i.-The light emitting surface of the polar body element) In addition, this type of assembly requires a relaxed electrical connection, and the wire 9 connects the light emitting Λ- The wire bonding is used to enter the lamp connection ends 6, 7, and the formed coil electrode M and «, and the loop must occupy a considerable amount.

__! Μ 0691-9379TWF(N1);AOC-02-17-TW;PH0ELIP.ptd 第6頁__! Μ 0691-9379TWF (N1); AOC-02-17-TW; PH0ELIP.ptd Page 6

1222761 五、發明說明(3) 大的空間。對於目前發光元 說,無疑是一種缺點。 件不斷朝小型化發展的趨勢來 發明内容】 有鑑於此,為了解決上 提供一種發光二極體,其去除 =明之主要目的在 ,以將-第-型電極設置於“於::體晶粒之部份基 ,當該晶粒與晶粒承載座接合時,、上之半導體膜層 上1f晶粒承載座之-第-型電極接觸d:極直接 打線接合步驟,以解決習知技術在使用電性連結,減少 晶層之基板時’為達電性連結不導電材質作為 ’導致需二次打線接合電極、散=置於同-問題。 … 良及降低發光區域 本發明之另—目的係提供一種發 ,以獲致本發明所述使用不導電極板只ί二= 極之發光二極體。 而-人打線接合 為獲致上述之目的,本發明所述之發 包括-晶粒承載座,該晶粒承載座係具有及y :::極接觸區於其上;-發光二極體晶粒,:;曰::; ”板’…述第一型電極與基= i ΐ ΐ:二型電極位於複數半導體層之頂•,而:上 , ;昼位於晶粒之不同側,且該晶粒以上述圖^ 之土反側固合於上述晶粒承載座之固晶面上、該晶粒之第1222761 V. Description of invention (3) Large space. It is undoubtedly a disadvantage for the current luminescence element. In view of this, in order to solve this problem, a light-emitting diode is provided, the main purpose of which is to remove = Ming, in order to set the -type-electrode to "in :: bulk crystal grains" Part of the base, when the die is bonded to the die carrier, the -type-electrode contact of the 1f die carrier on the semiconductor film layer above the d: extremely direct wire bonding step to solve the conventional technology in When using an electrical connection to reduce the substrate of the crystal layer, the non-conductive material is used to achieve the electrical connection. As a result, it is necessary to wire the electrodes twice, and the dispersion is placed in the same- problem. A hair is provided to obtain the light-emitting diode using the non-conductive electrode plate according to the present invention, and the two-pole light-emitting diode is used for achieving the above-mentioned purpose. The hair according to the present invention includes a grain bearing base. The grain bearing base has y ::: pole contact area on it;-a light emitting diode grain ::; ":"; said first type electrode and base = i ΐ ΐ: Type II electrodes are located on top of the multiple semiconductor layers, and: on,; day position Different sides of the grain, and the grain in the opposite side of the solid soil of FIG. ^ Bonded to the solid surface of the crystal grains of the supporting base, of the die of

0691·937(卿⑽);縱 第7頁 遣編隱哪關 L厶厶厶丨U1 五、發明說明(4) 一型電極與上述晶 ' 結,以及一第二型4雷座之第一型電極接觸區電性連 體晶粒之第二型 性接觸區,以一導線與上述二極 根擄太欢電電性連結。 據本發明所述之 複數半導體層底部具二^ 一極體,其發光二極體晶粒之 體層相接處係為11〕有一第一表面,而基板上與複數半導 相接,而第一表弟一表面,該第一表面係與該第二表面 晶粒之第一型雷太,面積係大於第二表面之面積,且上述 面上。 σ糸位於未與上述第二表面相接的第一表 基於本 體之製作方 粒承載座係 提供一基板 複數之半導 案化之罩覆 去除部份基 基板;形成 上述圖案化 半導體層之 側,將上述 載座之固晶 載座之第一 二極體晶粒 性之連結。 發 明 之 另 — 法 , 其 步 驟 具 有 一 固 晶 5 在 其 上 形 體 層 構 成 層 於 上 述 發 板 使 得 上 第 一 形 電 之 基 板 同 頂 部 而 與 晶 粒 以 上 述 面 上 5 且 使 型 電 極 接 觸 之 第 二 型 電 目,本發明 至少包括提 面及一第一 成複數之半 發光二極體 光二極體晶 述發光二極 極於上述複 側;形成一 上述第一型 圖案化之基 该晶粒之弟 區電性連結 極與一第二 係關於提供 供一晶粒承 型電極接觸 導體層,而 晶粒;形成 粒之基板側 體晶粒具有 數半導體層 第二形電極 電極於上述 板側固合於 '一型電極與 ,以及以一 型電極電性 一發光二極 載座,該晶 區於其上; §亥基板及該 並定義一圖 ,以一程序 一圖案化之 之底部而與 於上述複數 晶粒之不同 上述晶粒承 上述晶粒承 導線將上述 接觸區作電0691 · 937 (Qing⑽); page 7 edits the hidden L 关 丨 U1 V. Description of the invention (4) A type electrode and the above crystal 'junction, and a second type 4 thunder block first The second type contact region of the electrically connected conjoined grains of the type electrode contact region is electrically connected with the above-mentioned two-pole root electrode by a wire. According to the present invention, the bottom of the plurality of semiconductor layers has a bipolar body, and the light-emitting diode grains are connected at the body layer at 11] having a first surface, and the substrate is connected to the plurality of semiconductors, and the first A cousin has a surface, the first surface is the first type of lightning with the second surface grains, and the area is larger than that of the second surface, and the above surface. σ 糸 is located on the first table that is not in contact with the second surface. The body-based manufacturing of the pellet bearing seat provides a substrate with a semi-conductive cover to remove a part of the base substrate; the side of the patterned semiconductor layer is formed , The first diode crystallinity of the solid crystal carrier of the carrier is connected. Another method of the invention, the step of which has a solid crystal 5 on which a physical layer constitutes a layer on the above-mentioned hair plate so that the substrate of the first shape is the same as the top and the surface of the crystal is on the surface 5 and the type electrode is contacted The second-type electric eye, the present invention includes at least a lifting surface and a first plurality of semi-luminescent diodes. The light-emitting diodes are on the above-mentioned complex side; and a first-type patterned base of the crystal grains is formed. The second-region electrical connection electrode and a second system are provided for providing a die-bearing electrode to contact the conductor layer, and the die is formed; Combined with a type-I electrode and a type-I electrode with a light-emitting diode carrier, the crystal region is on it; § the substrate and the definition of a figure, and a pattern and a patterned bottom and The difference between the plurality of grains is that the above-mentioned grains bear the above-mentioned grain-bearing wires and the above-mentioned contact area is used as electricity

PtdPtd

1222761 五、發明說明(5) 本發明 往習知技術 除部分半導 法。本發明係在形成 部分之基板 之半導體膜 之特徵在 在使用不 體層,而 將第一 層上,使 粒之不同 之第一型電極接觸區 性連結的 電極接觸 發明之上 例,並配 極形成於 aa 線以達到電 極與第二型 為使本 舉較佳實施 於本發 導電材 將電極 複數半 型電極 二極體 側,以 電性連 作法相 區電性 述目的 合所附 明所述 質作為 設置於 導體層 設置於 晶粒之 利第一 結,如 比,P、 連結即 、特徵 圖式, 之發光二極體,不同以 半導體層之基板時,移 同一側(發光側)之作 於基板之步驟後,移除 移除部分基板後所露出 第一型電極與第二型電 型電極與晶粒承載座上 此與習知技術需打兩次 需打一條線將第二型電 〇 能更明 作洋細 顯易懂,下文特 說明如下: 【實施方式】 以下將配合圖式詳細說明本發明 請參照则,其顯示本iid:施例: 基板! 2 〇,本發明之方法適用於_印例刷之雷起f步驟。提供一 板或是半導體基板,可以是一藍寶石電路基板、陶瓷基 首先,在上述基板120上形成複數之丰"板或一尖石基板。 之半導體層13〇及上述基板120構成—體層130 ’此複數 二極體晶粒丨丨0當通入電流之後即產生一伞接體晶粒1 1 0 ’此 任意擇自由P型束縛層、η型束缚層、半士 to層1 3 0可 觸層所組成之族群中。半導體層13〇可\衝層、线層及接 」由液i曰石曰、、表 (LPE)、氣相磊晶法(VPE)或是有機金 從相邱日日淥 . 屬軋相磊晶法1222761 V. Description of the invention (5) The present invention is based on conventional techniques. The present invention is an example of a semiconductor film formed on a part of a substrate. The use of a body layer, but the first layer, the electrode of the first type electrode with a different type of contact between the particles is connected to the invention. Formed on the aa line to reach the electrode and the second type. In order to make this move better implemented in the conductive material of the present invention, the electrode is a plurality of half-type electrodes on the diode side. The light emitting diode is arranged on the conductor layer and is the first junction of the crystal grains. For example, P, connection is the characteristic pattern, and the light emitting diode is different from the substrate on the semiconductor layer. After the step on the substrate, the first type electrode and the second type electrode and the die carrier are exposed after removing and removing part of the substrate. This and the conventional technique need to be performed twice. A line is required to connect the second type. The electric power can be more clearly defined and easy to understand. The following description is as follows: [Embodiment] The invention will be described in detail below with reference to the drawings. Please refer to it, which shows this iid: Example: substrate! 2 0, the method of the present invention is applicable to the step f of the printing process. A board or a semiconductor substrate is provided, which may be a sapphire circuit board or a ceramic substrate. First, a plurality of "boards" or a sharp-stone board are formed on the above-mentioned substrate 120. The semiconductor layer 13 and the above-mentioned substrate 120 are composed of a bulk layer 130 'this plurality of diode crystal grains 丨 丨 0 when an electric current is applied, an umbrella crystal grain 1 1 0' is arbitrarily selected as a free P-type binding layer , Η-type binding layer, half-toss layer to 130 groups of touchable layers. The semiconductor layer 130 can be punched, lined, and connected "by liquid phase, stone surface, surface (LPE), vapor phase epitaxy (VPE), or organic gold from phase Qiu Riri. It is a rolling phase. Crystal method

m 0691-9379rrWF(Nl);AOC-02-17-rnV;PHOELIF.ptd 第9頁m 0691-9379rrWF (Nl); AOC-02-17-rnV; PHOELIF.ptd page 9

1222761 五、發明說明(6) (Μ 0 C V D )所形成。在此二極體晶粒之組成中,亦可包含布 拉格反射層(distributed Bragg reflector ;DBR)、透明 接觸層或是多重量子井層。在一較佳實施例中,該晶粒可 以是在一藍寶石(sapphire)基板上以有機金屬氣相磊晶法 (M0CVD)磊晶成長氮化鎵(GaN)系列的發光元件。 再形成一電極於上述晶粒11 〇的複數半導體層1 3 0之頂 部’以作為该晶粒的弟二型電極1 4 〇 b。作為電極之材質可 擇自由鉑(Pt)、鈷(Co)、金(Au)、鈀(Pd)、鎳(Ni)、鎂 (Mg)、銀(Ag)、|呂(A1)、鈒(V)、猛(Μη)、絲(Bi)、銖 (Re)、銅(Cu)、錫(Sn)、錄(Rh)、鈦(Ti)、鉬(Mo)、鶴 (W」、辞(Zn)、絡(Cr)、銳(Nb)、給(Hf)及其合金所組成 之族群中。 接下來,請參照第2b圖,形成並定義一圖案化之罩覆 層1 5 0於上述晶粒1 1 〇之基板1 2 0上,再以上述圖案化之罩 覆層1 5 0作為餘刻之罩幕進行一餘刻程序,以钱刻掉部分 之基板1 2 0,得到移除部分基板後露出之半導體膜層下表 面1 3 2,請參照第2 c圖。蝕刻掉部分基板之蝕刻程序可以 是一乾餘刻,可利用錢擊I虫刻(s p u 11 e r i n g e t c h )、反應 離子姓刻(r e a c t i v e i ο n e t c h i n g,R I E )、磁強化反應離 子 I虫刻(magnetically enhanced RIE,MERIE)、電子迴 旋共振(electron cyclotron resonance,ECR)|虫刻或感 應耦合電漿蝕刻程序(ICP,TCP)等方式,用來作為反應氣 體的分子可為含有氟化合物之氣體分子、含硫化合物之氣 體分子、氧氣及輔助氣體分子等(如惰性氣體)。1222761 V. Description of the invention (6) (M 0 C V D). The composition of the diode grains may also include a distributed Bragg reflector (DBR), a transparent contact layer, or a multiple quantum well layer. In a preferred embodiment, the die may be a gallium nitride (GaN) series light-emitting device grown on a sapphire substrate by an organic metal vapor phase epitaxy (MOCVD). Then, an electrode is formed on the top portion of the plurality of semiconductor layers 130 of the crystal grain 110, as the second-type electrode 1440 of the crystal grain. The material of the electrode can be selected from platinum (Pt), cobalt (Co), gold (Au), palladium (Pd), nickel (Ni), magnesium (Mg), silver (Ag), | Lu (A1), thorium ( V), Meng (Μη), Silk (Bi), Baht (Re), Copper (Cu), Tin (Sn), Record (Rh), Titanium (Ti), Molybdenum (Mo), Crane (W), Word ( Zn), Cr, Nb, Hf, and their alloys. Next, please refer to Figure 2b to form and define a patterned cover layer 150 above. On the substrate 1 2 0 of the die 1 1 0, the patterned masking layer 1 50 is used as the remaining mask to carry out a more than one procedure, and a portion of the substrate 1 2 0 is engraved with money and removed. The lower surface of the semiconductor film layer exposed on the back of some substrates is 1 2 3, please refer to Figure 2c. The etching process to etch out some substrates can be a dry etch, you can use money to hit I insect etch (spu 11 eringetch), reactive ion surname Etch (reactivei ο netching, RIE), magnetically enhanced reactive ion I worm etch (magnetically enhanced RIE, MERIE), electron cyclotron resonance (ECR) | worm etch or inductive coupling The plasma etching process (ICP, TCP) and other methods, the molecules used as the reaction gas can be gas molecules containing fluorine compounds, gas molecules containing sulfur compounds, oxygen and auxiliary gas molecules (such as inert gases).

II

0691 -9379TWF(N1);AOC-02-17-TW ; PHOELIP. ptd 第 10 頁 1222761 五、發明說明(7) 接著,請參照第2d圖,在移除部分基板120後所露出 之半導體膜層下表面1 3 2上形成一電極,以作為該晶粒的 第一型電極140a,此電極140a與基板120同樣形成於複數 半導體層130之底部表面。作為第一型電極140a之材質可 擇自由鉑(Pt)、姑(Co)、金(Au)、ls(Pd)、鎳(Ni)、鎮 (Mg)、銀(Ag)、鋁(A1)、釩(V)、錳(Μη)、鉍(Bi)、銖 (Re)、銅(Cu)、錫(Sn)、铑(Rh)、鈦(Ti)、钥(Mo)、鎢 (W)、鋅(Zn)、鉻(Cr)、鈮(Nb)、铪(Hf)及其合金所組成 之族群中。 再來,請參照第2e圖,提供 日日袓水戟座2 0 〇 具有一固晶面170及一第一型電極接觸區16〇a n將上述之 二極體晶粒11 〇以基板丨2 〇側固合於晶粒承載座2 〇 〇之固晶 面170上,且使上述二極體晶粒11〇之第一型電極H〇a(與 基板位於半導體層同一面)與晶粒承載座2 〇 〇上之第一型電 極接觸區1 6 0 a接觸,達到電性之連結。可以在第一型電極 140a上形成一金屬凸塊,或是在第一型電極接觸區16〇&上 形成一接合墊162 ,如此可方便第一型電極14〇3和 電極接觸區1 60a電性連結’以達到電性之連結。該金屬凸 :鬼或接合墊162之材質可與電極之材質相 ::適金屬、合金或複合膜層,例如可為二金 ::二錫銀合金之焊料凸塊。將晶粒固合於晶 芦來固^ a +之固晶面1 70之方法可以是利用—透明黏接 -I ^ 5日日例如BCB與環氧樹脂(ep〇xy);亦可使用低 溫焊料以電阻加熱焊接、超音波焊接、電弧焊0691 -9379TWF (N1); AOC-02-17-TW; PHOELIP. Ptd Page 10 1222761 V. Description of the invention (7) Next, please refer to Figure 2d, the semiconductor film layer exposed after removing part of the substrate 120 An electrode is formed on the lower surface 1 3 2 as the first type electrode 140 a of the crystal grain. This electrode 140 a is formed on the bottom surface of the plurality of semiconductor layers 130 like the substrate 120. As the material of the first type electrode 140a, platinum (Pt), copper (Co), gold (Au), ls (Pd), nickel (Ni), town (Mg), silver (Ag), and aluminum (A1) can be selected. , Vanadium (V), manganese (Μη), bismuth (Bi), baht (Re), copper (Cu), tin (Sn), rhodium (Rh), titanium (Ti), molybdenum (Mo), tungsten (W) , Zinc (Zn), chromium (Cr), niobium (Nb), hafnium (Hf) and their alloys. Next, please refer to FIG. 2e, and provide a sun-dried water scorpion 200, which has a solid crystal surface 170 and a first type electrode contact area 160an, and the above-mentioned diode crystal grains 11 and the substrate 2 The 〇 side is fixed on the solid crystal surface 170 of the die carrier 200, and the first type electrode H0a (located on the same side as the substrate of the semiconductor layer) of the above-mentioned diode die 110 is supported by the die. The first type electrode contact area on the seat 2000 is contacted at 160a to achieve electrical connection. A metal bump can be formed on the first-type electrode 140a, or a bonding pad 162 can be formed on the first-type electrode contact area 160 and the first-type electrode 1403 and the electrode contact area 160a. Electrical connection 'to achieve electrical connection. The material of the metal bump: the ghost or the bonding pad 162 can be compatible with the material of the electrode :: suitable metal, alloy or composite film layer, for example, it can be a solder bump of two gold :: two tin silver alloy. The method of fixing the crystal grains on the crystal reed to fix the ^ a + solid crystal surface 1 70 can be-transparent bonding-I ^ 5 days such as BCB and epoxy resin (ep〇xy); low temperature can also be used Solder by resistance heating welding, ultrasonic welding, arc welding

1222761 曰 修正 案號 92129734 五、發明說明(9) 綜上所述’本發明之發光二極體 下之優點: 瑕及其製造方法具有以 1 ·本發明之發光二極體其二極體曰 第二型電極係形成於晶粒之不同側上(型電極與 之表面,一形成於半導體層之底部),=你導體層 二極體所產生的熱積聚於同一側,且由如认此作法可避免 載座相*時’㈣*能傳至具*大散衙二二$晶粒承 逸散,可大大幫助發光二極體之散Ϊ熱:積=載體5而 狀;^ °所以本發明 =以習知技術製成之二極體,因作用熱積聚而, 發光特性不穩定及較低壽命等缺點。 、 &成 2·本發明所述之發光二極體,係移 分基板,以將第一型電極設置於移除又I —曰曰粒之嗒 半導體膜層上,如此-來,不需去板後所露出之 動層)以設置第一型電極與另一半導髅爲,你 以王 接觸,所以不會減少了二極體元件導的^ 的發光效率及亮度降低。請參考第7圖,技3、—避免兀件 極發光侧之俯視圖,半導體層頂部面積^^不本發光二 _ n , 積扣除第二型電極面 J即發光之面積30 0。而第8圖係顯示習知技術之發光面 3.本發明所述之發光二極體製造方法,在電性接合 之構裝時,只需進行一次打線接合便可6 由 ,, & j凡成70件的電性連 ’所需之導線也只要-條’不但滿足目前發光元件 朝小型化發展的趨勢,且較習知技術在製程上更具便利 性。 本發日月雖以較佳實施例揭露如上然其並非用以限定 〇69l-9379TWFl(Nl);AOC-02-17-TW.ptc1222761 Amendment No. 92129734 V. Description of the invention (9) In summary, the advantages of the light-emitting diode of the present invention: The flaw and its manufacturing method have the following: 1. The light-emitting diode of the present invention and its diode The second type of electrode system is formed on different sides of the crystal grain (the surface of the type electrode and the first layer is formed on the bottom of the semiconductor layer), = the heat generated by the diode of your conductor layer is accumulated on the same side, The method can prevent the carrier phase from being transmitted to the surface of the substrate with large particles, which can greatly help the heat dissipation of the light-emitting diode: product = carrier 5; ^ ° so The present invention = a diode made by a conventional technique, which has disadvantages such as unstable luminous characteristics and low lifetime due to accumulation of action heat. &Amp; Into the light emitting diode according to the present invention, the substrate is shifted to dispose the first type electrode on the semiconductor film layer which is removed from the substrate, so-here, no need The moving layer exposed after removing the board) is to set the first type electrode and the other semiconducting crossbones as you are in contact with the king, so the light emitting efficiency and brightness of the diode element will not be reduced. Please refer to Figure 7, Technique 3—Avoid the top view of the light-emitting side of the element. The area of the top of the semiconductor layer ^^ is not the same as the light-emitting area. The product of the second type electrode surface J is the light-emitting area 300. And Fig. 8 shows the light-emitting surface of the conventional technology. 3. The method of manufacturing the light-emitting diode according to the present invention requires only one wire bonding when the electrical bonding is configured, and & j Every 70-piece electrical connection requires only one lead wire, which not only meets the current trend of miniaturization of light-emitting components, but also has more convenience in manufacturing processes than conventional technologies. Although the sun and the moon are disclosed in the preferred embodiment as above, it is not intended to be limited. 〇69l-9379TWFl (Nl); AOC-02-17-TW.ptc

1222761 _案號 92129734 五、發明說明(10) 年 月 曰 修正 本發明的範圍,任何熟習此項技藝者,在不脫離本發明之 精神和範圍内,當可做各種的更動與潤飾,因此本發明之 保護範圍當視後附之申請專利範圍所界定者為準。1222761 _ Case No. 92129734 V. Description of the invention (10) The scope of the invention is amended. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

0691-9379TWFl(Nl);A0C-02-17-TW.ptc 第14頁 1222761 年月曰 圖式簡輕@ ^— -- 第1 a圖及第1 b圖係顯示習知之發光二極體 圖。 ί 2 Ξ至第2 e圖係顯示根據本發明所述之 之一較佳'施例之製程流程圖。 第圖係”、員示根據本發明所述之發光二極雜 施例之結構剖面圖。 —第4圖係顯示根據本發明所述之發光二極體另 貫施例之結構剖面圖。 η H圖係顯示根據本發明所述之發光二極體一 施例,其二極體晶粒之仰視圖。 與f Γι 6φ圖盆係顯不根據本發明所述之發光二極體另一較佳 實施:中其二極體晶粒之仰視圖。 第7圖係顯示根據本發 — ^ 施例中之發光面積示意圖。斤这之發先-㈣車““ 第8圖係顯示一習 圖。 % 之毛先二極體其發光面積示意 結構 剖面 發光 極 較隹實 /較隹 較佳實 【符號說明】 1〜二極體晶粒; 2〜ρ型電極; 3〜η型電極; 4〜基板; 5〜承載體; 6、7〜電性連接端;0691-9379TWFl (Nl); A0C-02-17-TW.ptc Page 14 1227761 Months of the diagram is simple and light @ ^--Figures 1a and 1b show the conventional light-emitting diode diagrams . Figures 2a through 2e are process flow diagrams showing a preferred 'embodiment according to the present invention. "Picture system", the member shows a sectional view of the structure of the light emitting diode hybrid embodiment according to the present invention.-Figure 4 is a sectional view of the structure of another embodiment of the light emitting diode according to the present invention. Η Figure H shows an embodiment of the light-emitting diode according to the present invention, and a bottom view of the diode grains. Compared with f Γι 6φ, the picture shows a light-emitting diode according to the present invention. The best implementation: the bottom view of the diode grains in Figure 7. Figure 7 shows a schematic diagram of the light-emitting area in the embodiment of the present invention. ^ This is the first-the car "" Figure 8 shows a diagram % Mao Mao Diode's luminous area is a schematic structure. The cross-section luminous pole is more solid / more solid. [Symbol] 1 ~ diode crystal grain; 2 ~ ρ type electrode; 3 ~ η type electrode; 4 ~ Substrate; 5 ~ carrier; 6, 7 ~ electrical connection terminal;

1222761 _案號92129734 _年月日__ 圖式簡單說明 8〜封裝樹脂; 9〜導線; 1 0〜發光二極體; 11〜導線之接合端點; 1 3〜金屬物質層; 14〜複數之半導體層; 20〜二極體之發光面積; 22〜半導體層被移除之面積; I 0 0〜發光二極體;1222761 _ Case No. 92129734 _ Year Month Day __ Brief description of the drawing 8 ~ encapsulating resin; 9 ~ lead; 10 ~ light emitting diode; 11 ~ junction end of the wire; 1 ~ 3 ~ metal material layer; 14 ~ plural Semiconductor layer; 20 ~ diode light emitting area; 22 ~ semiconductor layer removed area; I 0 0 ~ light emitting diode;

II 0〜二極體晶粒; 1 2 0〜基板; 130〜複數之半導體層; 132〜移除部分基板後露出之半導體膜層下表面; 140a〜第一型電極; 140b〜第二型電極; 1 4 4〜導線之接合端點; 1 5 0〜罩覆層; 160a〜第一型電極接觸區; 160b〜第二型電極接觸區;II 0 ~ diode crystal grain; 120 ~ substrate; 130 ~ plural semiconductor layer; 132 ~ lower surface of semiconductor film layer exposed after removing part of substrate; 140a ~ first type electrode; 140b ~ second type electrode ; 1 4 4 ~ joint end point of the wire; 1 50 ~ cover layer; 160 a ~ first type electrode contact area; 160 b ~ second type electrode contact area;

1 6 2〜接合墊; 1 6 4〜導線; 1 7 0〜基板所佔面積; 20 0〜晶粒承載座; 21 0〜導線架; 3 0 0〜二極體之發光面積。1 6 2 ~ bonding pads; 1 6 4 ~ lead wires; 1 70 ~ area occupied by the substrate; 2 0 0 ~ die carrier; 2 0 ~ lead frame; 3 0 ~ light emitting area of the diode.

0691-9379TWF1(N1);AOC-02-17-TW. ptc 第16頁0691-9379TWF1 (N1); AOC-02-17-TW.ptc Page 16

Claims (1)

1222761 六、申請專利範圍 1. 一種發光二極體,至少包括: 一晶粒承載座,該晶粒承載座係具有一固晶面及一第 一型電極接觸區於其上; 一發光二極體晶粒,該晶粒具有複數半導體層、一第 一型電極、一第二型電極及一圖案化之基板,其中上述第 一型電極與基板位於複數半導體層之底部,上述第二型電 極位於複數半導體層之頂部,而與上述第一型電極不同 側,且該晶粒以上述圖案化之基板側固合於上述晶粒承載 座之固晶面上、該晶粒之第一型電極與上述晶粒承載座之 第一型電極接觸區電性連結;以及 一第二型電極電性接觸區’以一導線與上述二極體晶 粒之第二型電極電性連結。 2. 如申請專利範圍第1項所述之發光二極體,其中上 述發光二極體晶粒其複數半導體層底部具有一第一表面, 而上述基板上與上述複數半導體層之相接處係為一第二表 面,該第一表面係與該第二表面相接,而第一表面之面積 係大於第二表面之面積,且上述晶粒之第一型電極係位於 移除部分基板後所露出之半導體膜層的第一表面上。 3. 如申請專利範圍第1項所述之發光二極體,其中該 第二型電極電性接觸區係位於上述晶粒承載座上。 4. 如申請專利範圍第1項所述之發光二極體,其中該 第二型電極電性接觸區係位於一導線架(1 e a d f r a m e )上。 5. 如申請專利範圍第1項所述之發光二極體,其中上 述第一型電極電性接觸區具有一接合墊與上述晶粒之第一1222761 6. Scope of patent application 1. A light-emitting diode, at least comprising: a die-bearing base, the die-bearing base having a solid crystal surface and a first type electrode contact area thereon; a light-emitting diode A bulk crystal grain having a plurality of semiconductor layers, a first type electrode, a second type electrode, and a patterned substrate, wherein the first type electrode and the substrate are located at the bottom of the plurality of semiconductor layers, and the second type electrode It is located on the top of the plurality of semiconductor layers, and is on a different side from the first type electrode, and the crystal grains are fixed on the solid crystal surface of the crystal grain carrier with the patterned substrate side, and the first type electrode of the crystal grains. It is electrically connected to the first-type electrode contact area of the die carrier; and a second-type electrode electrical contact area is electrically connected to the second-type electrode of the diode grain by a wire. 2. The light-emitting diode according to item 1 of the scope of the patent application, wherein the light-emitting diode grains have a first surface at the bottom of the plurality of semiconductor layers, and the junction between the substrate and the plurality of semiconductor layers is Is a second surface, the first surface is in contact with the second surface, and the area of the first surface is larger than that of the second surface, and the first type electrode of the crystal grain is located after removing a part of the substrate On the first surface of the exposed semiconductor film layer. 3. The light-emitting diode according to item 1 of the scope of the patent application, wherein the electrical contact area of the second-type electrode is located on the above-mentioned die carrier. 4. The light-emitting diode according to item 1 of the scope of patent application, wherein the electrical contact area of the second-type electrode is located on a lead frame (1 e a d f r a m e). 5. The light-emitting diode according to item 1 of the scope of patent application, wherein the electrical contact area of the first type electrode has a bonding pad and a first 0691-9379TWF(Nl);AOC-02-17-TW;PHOELIP,ptd 第17頁 1222761 六、申請專利範圍 型電極電性連結。 6. 如申請專利範圍第1項所述之發光二極體,其中上 述晶粒之第一型電極具有一金屬凸塊與上述第一型電極電 性接觸區電性連結。 7. 如申請專利範圍第1項所述之發光二極體,其中上 述基板係為印刷電路基板、陶瓷基板或是半導體基板。 8. 如申請專利範圍第1項所述之發光二極體,其中上 述基板係為藍寶石基板或是晶尖石基板。 9. 如申請專利範圍第1項所述之發光二極體,其中上 述發光二極體晶粒係為在一藍寶石基板上磊晶成長而得之 氮化鎵系列二極體晶粒。 1 0. —種發光二極體的製造方法,至少包括: 提供一晶粒承載座,該晶粒承載座係具有一固晶面及 一第一型電極接觸區於其上; 提供一基板,在其上形成複數之半導體層,而該基板 及該複數之半導體層構成一發光二極體晶粒; 形成並定義一圖案化之罩覆層於上述發光二極體晶粒 之基板側,以一程序去除部份基板,使得上述發光二極體 晶粒具有一圖案化之基板; 形成一第一形電極於上述複數半導體層之底部而與上 述圖案化之基板同一側; 形成一第二形電極於上述複數半導體層之頂部,而與 上述第一型電極於上述晶粒之不同側; 將上述晶粒以上述圖案化之基板側固合於上述晶粒承0691-9379TWF (Nl); AOC-02-17-TW; PHOELIP, ptd Page 17 1222761 VI. Patent Application Type The electrodes are electrically connected. 6. The light-emitting diode according to item 1 of the scope of the patent application, wherein the first type electrode of the crystal grain has a metal bump and is electrically connected to the electrical contact area of the first type electrode. 7. The light-emitting diode according to item 1 of the scope of patent application, wherein the substrate is a printed circuit substrate, a ceramic substrate, or a semiconductor substrate. 8. The light-emitting diode according to item 1 of the scope of patent application, wherein the substrate is a sapphire substrate or a spinel substrate. 9. The light-emitting diode according to item 1 in the scope of the patent application, wherein the light-emitting diode grains are epitaxially grown on a sapphire substrate and obtained from a gallium nitride series diode grain. 10. A method for manufacturing a light emitting diode, at least comprising: providing a die carrier, the die carrier having a solid crystal surface and a first type electrode contact area thereon; providing a substrate, A plurality of semiconductor layers are formed thereon, and the substrate and the plurality of semiconductor layers constitute a light emitting diode crystal; a patterned cover layer is formed and defined on the substrate side of the light emitting diode crystal, and A program removes a part of the substrate, so that the light-emitting diode die has a patterned substrate; forming a first-shaped electrode on the bottom of the plurality of semiconductor layers on the same side as the patterned substrate; forming a second shape The electrode is on the top of the plurality of semiconductor layers and is on a different side of the crystal grains than the first type electrode; the crystal grains are fixed to the crystal grain bearing with the patterned substrate side. 0691-9379TWF(N1);A0C-02-17-TW;PHOELIF.ptd 第18頁 1222761 六、申請專利範圍 載座之固晶面上,且使該晶粒之第一型電極與上述晶粒承 載座之第一型電極接觸區電性連結;以及 以一導線將上述二極體晶粒之第二型電極與一第二型 電極電性接觸區作電性之連結。 11.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中上述去除部份基板之程序係包括一蝕刻程序。 1 2.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中上述發光二極體晶粒其複數半導體層底部具有 一第一表面,而上述基板上與上述複數半導體層之相接處 係為一第二表面,該第一表面係與該第二表面相接,而第 一表面之面積係大於第二表面之面積,且上述晶粒之第一 型電極係位於移除部分基板後所露出之半導體膜層的第一 表面上。 1 3.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中該第二型電極電性接觸區係形成於上述晶粒承 載座上。 1 4.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中該第二型電極電性接觸區係形成於一導線架 (lead frame)上 ° 1 5.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中上述第一型電極電性接觸區具有一接合墊與上 述晶粒之第一型電極電性連結。 1 6.如申請專利範圍第1 0項所述之發光二極體的製造 方法,其中上述晶粒之第一型電極具有一金屬凸塊與上述0691-9379TWF (N1); A0C-02-17-TW; PHOELIF.ptd page 181222761 VI. Patent application scope on the solid crystal surface, and the first type electrode of the crystal grain and the above crystal grain are carried The first type electrode contact area of the base is electrically connected; and the second type electrode of the diode crystal grains and the second type electrode electrical contact area are electrically connected by a wire. 11. The method for manufacturing a light-emitting diode according to item 10 of the scope of patent application, wherein the above-mentioned procedure for removing a part of the substrate includes an etching procedure. 1 2. The method for manufacturing a light emitting diode according to item 10 of the scope of the patent application, wherein the bottom of the plurality of semiconductor layers of the light emitting diode grains has a first surface, and the substrate and the plurality of semiconductor layers are on the first surface. The junction is a second surface, the first surface is in contact with the second surface, and the area of the first surface is larger than the area of the second surface, and the first type electrode system of the crystal grains is located On the first surface of the semiconductor film layer exposed after removing a part of the substrate. 1 3. The method for manufacturing a light-emitting diode according to item 10 of the scope of patent application, wherein the electrical contact region of the second-type electrode is formed on the above-mentioned crystal grain carrier. 1 4. The method for manufacturing a light emitting diode as described in item 10 of the scope of patent application, wherein the electrical contact area of the second type electrode is formed on a lead frame ° 1 5. As a patent application The method for manufacturing a light-emitting diode according to item 10 in the scope, wherein the first-type electrode electrical contact region has a bonding pad electrically connected to the first-type electrode of the crystal grain. 16. The method for manufacturing a light-emitting diode according to item 10 of the scope of patent application, wherein the first-type electrode of the crystal grain has a metal bump and the above-mentioned 0691 -9379TWF(N1); AOC-02-17-TW;PHOELIF. pt'J 第19頁 1222761 » 六、申請專利範圍 第一型電極電性接觸區電性連結。 1 7.如申請專刺m 1祀圍弟1 〇項所述之發光二極體的製造 方法,其中上述福赵* f 1 J石H map、 数+導體層係由液相蠢晶法(LPE)、氣 相蠢晶法(VPE)或是古 ^ &有機金屬氣相磊晶法(MOCVD)所形成。 、18·如申明專利範圍第1 0項所述之發光二極體的製造 方法’其中上述基板係為印刷電路基板、陶瓷基板或是半 導體基板。 1 9 ·如申請專利範圍第丨〇項所述之發光二極體的製造 方法,其中上述基板係為藍寶石基板或是晶尖石基板。 20·如申請專利範圍第項所述之發光二極體的製造 方法,其中上述發光二 '係為在一藍寶石基板上磊 晶成長而得之氮化錄系列I^體晶粒。0691 -9379TWF (N1); AOC-02-17-TW; PHOELIF. Pt'J Page 19 1222761 »6. Scope of patent application The electrical contact area of the first type electrode is electrically connected. 1 7. The method for manufacturing a light-emitting diode as described in the application for special m1 sacrifice to 10, wherein the above-mentioned Fu Zhao * f 1 J stone H map, number + conductor layer system is by the liquid phase stupid method ( LPE), vapor phase stupid crystal (VPE) or ancient metal organic vapor phase epitaxy (MOCVD). 18. A method for manufacturing a light emitting diode as described in Item 10 of the declared patent scope ', wherein the substrate is a printed circuit substrate, a ceramic substrate, or a semiconductor substrate. 19 · The method for manufacturing a light-emitting diode according to item No. 0 of the patent application scope, wherein the substrate is a sapphire substrate or a spinel substrate. 20. The method for manufacturing a light-emitting diode according to item 1 of the scope of the patent application, wherein the above-mentioned light-emitting diode is a nitride series I ^ crystal grain obtained by epitaxial growth on a sapphire substrate.
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