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TWI222270B - On-chip high-pass filter with large time constant - Google Patents

On-chip high-pass filter with large time constant Download PDF

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Publication number
TWI222270B
TWI222270B TW92124131A TW92124131A TWI222270B TW I222270 B TWI222270 B TW I222270B TW 92124131 A TW92124131 A TW 92124131A TW 92124131 A TW92124131 A TW 92124131A TW I222270 B TWI222270 B TW I222270B
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Taiwan
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transistor
pass filter
terminal
voltage source
type transistor
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TW92124131A
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Chinese (zh)
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TW200511711A (en
Inventor
Han-Chang Kang
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Realtek Semiconductor Corp
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Publication of TW200511711A publication Critical patent/TW200511711A/en

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Abstract

An on-chip high-pass filter with large time constant comprising a capacitor, a first transistor having a first terminal connected to a first voltage source and a second terminal connected to the capacitor, and a second transistor having a first terminal connected to the second terminal of the first transistor and a second terminal connected to ground, wherein the first transistor and the second transistor are for operating as a large-resistance resistor. The electrical equivalent large-resistance resistor and the capacitor together form a high-pass filter between the input port and the output port.

Description

1222270 五、發明說明(1) 發明所屬之技術領域 本發明提供一種高通濾波器,尤指一種大時間常數的高 通濾波器。 先前技術 為了濾除訊號的直流部分或減少直流偏移(DC 〇 f f s e t),很多電路需要運用高通濾波器。像隔直流電 容器(DC voltage blocking capacitor)、直流位準轉 換器(DC voltage level shifter)和直流伺服迴路 (DC servo loop)這些電路都是為了要實現高通濾波器 的功能。 在使用兩個直流位準不同的電壓源的電路中,無法將訊 號從一電源域(power supply domain)直接連接到另一 電源域。為了能在兩種電源域中連接訊號,可用直流位 準轉換器將第一電源域的直流位準轉換成第二電源域的 直流位準。然而在積體電路和裝置的製程改善下,晶片 上的工作電壓早已被大幅地降低,實際上已低到無法滿 足直流位準轉換器的運作需求。在這種情況下可用高通 滤波器來阻隔直流訊號而濾、過想要的訊號。如果高^淚 波器的角頻(corner frequency)夠低,則使用高通淚 波器對系統不會造成反效果。 ° ^1222270 V. Description of the invention (1) Technical field to which the invention belongs The present invention provides a high-pass filter, especially a high-pass filter with a large time constant. Prior art In order to filter the DC portion of the signal or reduce the DC offset (DC 0 f f s e t), many circuits require the use of high-pass filters. Circuits like DC voltage blocking capacitor, DC voltage level shifter, and DC servo loop are all designed to implement the function of a high-pass filter. In a circuit using two voltage sources with different DC levels, it is not possible to directly connect a signal from one power supply domain to another. In order to connect signals in two power domains, a DC level converter can be used to convert the DC level of the first power domain to the DC level of the second power domain. However, with the improvement of the integrated circuit and device manufacturing process, the operating voltage on the chip has been greatly reduced, and it is actually low enough to meet the operation requirements of the DC level converter. In this case, a high-pass filter can be used to block the DC signal and filter the desired signal. If the corner frequency of the high tear wave device is low enough, using a high pass tear wave device will not have an adverse effect on the system. ° ^

1222270 五、發明說明(2) 在零中頻(zero intermediate frequency)接收器、混 頻器(mixers)和低通濾波器(low pass f i 1 ters) 中’直流偏移(DC offset voltage)是不可忽視的要 項。如果沒有移除,則不想要的直流偏移可能會使如類 比數位轉換器(ADC converters)這類敏感的裝置因過 飽和(saturate)而失效。一般解決這問題的方法是加 入一直流伺服迴路。直流伺服迴路利用回授來使直流位 準保持穩又’然而回授窗口 ( feedback window)愈小 (意指角頻很低),則趨穩時間(s e 111 i ng t i m e)將愈 長。當角頻很低的時候,不只濾波器裡電阻的阻抗值和 電容的電容量要很大,而且通常趨穩時間也會過長。利 用一個簡單的高通濾波器,不僅可達成與直流伺服迴 相同的功能,而且沒有封閉迴路趨穩時間過長的額 題。 1問 圖一表示一習知技術的高通濾波器1 〇。一電容丨2連接一 輸入埠1 4和一輸出埠1 6,且一電阻i 8連接輸出埠j 6和 地。當使用像圖一中標準的電阻/電容高通濾波器i 〇,要 須用到具有兩阻抗的電阻1 8和具有高電容量的的電容必 來產生理想的低角頻。如果要角頻能低到i 〇 〇 Hz (或〜2 下),電阻18的阻抗值必須達百萬歐姆(M〇hm)等 電容1 2的電容量將咼達數百微微法(pF)的範圍。例 如,若想要的角頻(Fc)是100Hz,由公式Fc = 1/ 11222270 V. Description of the invention (2) 'DC offset voltage' is not available in zero intermediate frequency receivers, mixers and low pass filters (low pass fi 1 ters) Neglected points. If not removed, unwanted dc offsets can cause sensitive devices such as analog-to-digital converters (ADC converters) to fail due to oversaturation. The general solution to this problem is to add a DC servo loop. The DC servo loop uses feedback to keep the DC level stable. However, the smaller the feedback window (meaning the angular frequency is very low), the longer the stabilization time (s e 111 i ng t i m e) will be. When the angular frequency is low, not only the resistance value of the resistor in the filter and the capacitance of the capacitor are large, but also the stabilization time is usually too long. Using a simple high-pass filter, not only can achieve the same function as the DC servo return, but there is no problem that the closed loop stabilization time is too long. Question 1 Figure 1 shows a conventional high-pass filter. A capacitor 丨 2 is connected to an input port 14 and an output port 16, and a resistor i 8 is connected to the output port j 6 and ground. When using a standard resistor / capacitor high-pass filter i0 as shown in Figure 1, a resistor with two impedances 18 and a capacitor with high capacitance must be used to generate the ideal low angular frequency. If the angular frequency energy is to be as low as 100 Hz (or ~ 2 times), the resistance value of the resistor 18 must be millions of ohms (Mohm) and the capacitance of the capacitor 12 will reach hundreds of picofarads (pF). Range. For example, if the desired angular frequency (Fc) is 100Hz, the formula Fc = 1/1

第7頁 1222270 五、發明說明(3) (2ττ R*C)可知,電容12的電容量是50pF,而電阻18的阻抗 必須高達33Mohm。這樣大數值的阻抗值和電容量需佔用 非常大的I C面積。實際上高通濾波器1 0所需要的I C面積 可能是其他設計部分的數倍之多。 容 内 明 發 時 大 和 頻 角 低 有 具 種 一 供 提 於 在 的。 目器 要波 主濾 之通 明高 發的 本數 此常 因間 常一 間第 時其 大體 備晶 具電 • IL | 種一 一第 露一 揭 ·, 係容 ,電 圍一 範: 利含 專包 請, 申器 之波 明渡 發通 本高 據的 根數 二接 第端 一二 •,第 容且 電端 述二 上第 至之 接體 連晶 端電 二一 第第 且至 源接 壓連 電端 1 一 第第 至其 接體 連晶 端電 抗共 阻間 大埠一出 成輸 組與 了埠 為入 是輸 體在 晶容 二與 第阻 與電。 體抗器 晶阻波 電大渡 一效通 第等高 中該一 其。成 ,阻組 地電同 實施方式 請參閱圖二中顯示本發明的高通濾波器2 0之示意圖。高 通濾波器20包含有一輸入埠22、一輸出埠24、一電容 2 6、一 p型電晶體2 8、一 η型電晶體3 0和一電壓源3 2。電 容2 6連接於輸入埠2 2和輸出埠2 4之間。ρ型電晶體2 8的源Page 7 1222270 V. Description of the invention (3) (2ττ R * C) It can be seen that the capacitance of the capacitor 12 is 50pF, and the impedance of the resistor 18 must be as high as 33Mohm. Such large values of impedance and capacitance require a very large IC area. In fact, the IC area required for the high-pass filter 10 may be several times that of other design parts. Rong Neiming has a wide range of timings and low frequency angles. The eye-catcher's clear and high-frequency data of the main filter is often due to the general preparation of the crystal • IL | Species one by one revealed first, the system, the electric range: Li Hanzhuan Please include, the number of the application of the application of the device of the Ming-Fu Ming-duo to the second end of the first two •, the second terminal of the first and second terminal connected to the second terminal and the second terminal of the first and second to the source The crimping electrical terminal 1 is connected to the crystal terminal reactance and common resistance, and the large terminal is an output group and the input terminal is the input body. Body reactor Crystal resistance wave Electric Dadu Yixiaotong High school should be one of them. The resistance and ground power are the same as the embodiment. Please refer to FIG. 2 for a schematic diagram of the high-pass filter 20 of the present invention. The high-pass filter 20 includes an input port 22, an output port 24, a capacitor 26, a p-type transistor 28, an n-type transistor 30, and a voltage source 32. Capacitor 26 is connected between input port 2 2 and output port 2 4. Source of p-type transistor 2 8

1222270 五、發明說明(4) 極連接到一電壓 電晶體3 0的沒極 體2 8和η型電晶骨 電壓源32主要是 和模式下運作的 電晶體的沒極電 (L)和寬度(、 作,汲極電流I j 固定。然而,在 得汲極到源極間 的細微改變。電 在汲極-源極電^ 關。VDS = 1/“ 如果電晶體在飽 抗由汲極電流I 可作為一等效電 2 2與輸出埠2 4之 λ的大小範圍通 流I則介於uA到 百Μ 〇 h m。因此將 便可輕易實現一 個在晶片 供應器VDDa汲極連接到輸出埠24。η型 連接到輸出蜂2 4且源極接地。而ρ型電晶 曼3 0的閘極都連接到電壓源3 2的輸出端。 提供讓ρ型電晶體和η型電晶體都能在飽 電位。 流大小是依製程中所決定的通道長度 )來計算的。當電晶體在飽和模式下運 $大小在通道的長度和寬度決定後就保持 實際電路中由於通道長度調變效應會使 的電壓V D大小產生變化而造成汲極電流 晶體的輸出阻抗R是l/(ID*;l ),其中參數入 !位於飽和區時是與汲極電流成線性相 I為爾利電壓(early voltage)。所以, 和模式運作,可視為一等效電阻,其阻 來決定。因此ρ型電晶體與n型電晶體兩者 阻,該等效電阻與電容2 6共同在輸入槔 間形成一高通渡波器。 常介於0· 01到0· 03 V-1之間,而汲極電 m Α之間。在此方法中,輸出阻抗r 〇可達數 電晶體作為大阻抗電阻來運作的方式, 上具有大時間 常數的 高通濾波 1222270 五、發明說明(5) 請注意二,然上述較佳實施的詳細說明使用的是M〇s電晶 體’但只是舉例說明,本發明同樣可適用BJT電晶體。 & 電晶體2 8與n型電晶體3 〇組成的輸出阻抗的阻抗值 對於由電壓源3 2所提供的閘極電位非常敏感。理論上, 如果在積體電路的製程沒有製程誤差(pr〇cess van at ion ’亦即因製程誤差所產生之參數差異),則電 塵源3 2會產生相同的電壓訊號,由?型電晶體2 8與n型電 晶體3 0組成的輸出阻抗的阻抗值也會相同。且對所有的 積體電路來說’相關的高通濾波器2 〇的角頻都會一樣。 實務上’由於製程差異,所以電晶體的參數值都會有細 微的差異’因此必須考慮這些變異值,以確定在不同的 積體電路製程中,由ρ型電晶體2 8與η型電晶體3 0組成的 等效阻抗,其阻抗值皆為可預測為與所求相同。 請參閱圖三中顯示一個具備偏壓複製電壓源(bias replica voltage generator) 42的高通濾波器 40的示意 圖。偏差複製電壓源4 2包含有一個實質上與ρ型電晶體& 一樣大小的ρ型電晶體(generator transistor) 44以及 一個實質上與η型電晶體3 0—樣大小的η型電晶體4 6。ρ型 電晶體4 4的源極連接到電壓源V D D且其沒極連接到一電壓 源節點Α。η型電晶體4 6的汲極連接到電壓源節點Α且其源 極接地。ρ型電晶體4 4和η型電晶體4 6兩者的閘極都連接 1222270 五、發明說明(6) 到電壓源節點A。 由於P型電晶體4 4和η型電晶體4 6的大小和設計與高通渡 波器40中的ρ型電晶體28和η型電晶體30是相同的,所以 由偏差複製電壓源42的電壓源節點Α所產生的位準訊號可 用以表示不同積體電路製程中的製程差異。藉由調整ρ型 電晶體2 8與η型電晶體3 0的電晶體通道長度與寬度,並且 選擇一適當大小的電容2 6,便可直接控制由高通濾波器 形成的角頻與時間常數。偏差複製電壓源42可確保不 論製程差異為何,都能有相同的角頻響應。 請參閱圖四中所示本發明提出的高通濾波器4 0的頻率響 應圖48。如圖四所示,選定通道寬度W = m、長度L = 2 0// m的ρ型電晶體28與44 ;通道寬度W=l// m、長度L = 2 0/z m的η型電晶體30與46 ;並選定電容26的電容量C = 1 3pF,則由高通濾波器所得到的角頻(Fc)會等於 1 0 0 Hz。這樣的高通濾波器4 0與習知技術比較起來更容易 在積體電路上實現且在設計空間上更為經濟。 請參閱圖五顯示一具備有可變式偏壓複製電壓源 (variable bias replica voltage generator) 52的高 通濾波器5 0之示意圖。可變式偏壓複製電壓源5 2包含有 一實質上與ρ型電晶體2 8—樣大小的ρ型電晶體 (generator transistor) 54以及一個實質上與η型電晶1222270 V. Description of the invention (4) Electrode body 28 connected to a voltage transistor 3 0 and n-type transistor bone voltage source 32 are mainly electrodeless (L) and width of the transistor operating in mode (Operation, the drain current I j is fixed. However, there is a slight change between the drain and the source. The electricity is at the drain-source voltage ^ Off. VDS = 1 / "If the transistor is at full impedance from the drain The current I can be regarded as an equivalent electric current 2 2 and the output port 24. The magnitude of the current I ranges from uA to 100 μm. Therefore, a chip supply VDDa drain can be easily connected to the output Port 24. The n-type is connected to the output bee 24 and the source is grounded. The gates of the p-type transistor 3 0 are connected to the output of the voltage source 32. Both p-type transistors and n-type transistors are provided. It can be at a full potential. The current size is calculated according to the channel length determined in the process.) When the transistor is operated in the saturation mode, the size is maintained in the actual circuit due to the channel length modulation effect. The voltage VD will change and the output impedance R of the drain current crystal is l / (ID *; l), where the parameter input! Is in the saturation region and is in linear phase with the drain current. I is the early voltage. Therefore, the mode operation can be regarded as an equivalent resistance. Decided. Therefore, the ρ-type transistor and the n-type transistor both resist, and the equivalent resistance and the capacitor 26 together form a high-pass wave wave between the input 。. Usually between 0 · 01 to 0 · 03 V-1 And the drain electrode m Α. In this method, the output impedance r 〇 can reach the way that the digital transistor operates as a large impedance resistor, with a high-pass filter with a large time constant 1222270 V. Description of the invention (5) Please Note two, of course, the detailed description of the above preferred embodiment uses a Mos transistor, but it is just an example, and the present invention is also applicable to a BJT transistor. &Amp; Output of transistor 28 and n-type transistor 3 The impedance value of the impedance is very sensitive to the gate potential provided by the voltage source 32. In theory, if there is no process error in the process of the integrated circuit (pr0cess van at ion ', that is, the parameter difference caused by the process error ), The electric dust source 3 2 will produce the same The voltage signal will have the same output impedance impedance as the? -Type transistor 28 and the n-type transistor 30. The angular frequency of the related high-pass filter 2 will be the same for all integrated circuits. In practice, 'the parameter values of the transistor will be slightly different due to process differences', so these variations must be considered to determine that in different integrated circuit processes, the p-type transistor 28 and the n-type transistor The equivalent impedance of 30 is the same as that of the impedance. The schematic diagram of a high-pass filter 40 with a bias replica voltage generator 42 is shown in FIG. 3. The bias replication voltage source 42 includes a p-type transistor 44 that is substantially the same size as the p-type transistor & and an n-type transistor 4 that is substantially the same size as the n-type transistor 3 0 6. The source of the p-type transistor 44 is connected to a voltage source V D D and its terminal is connected to a voltage source node A. The drain of the n-type transistor 46 is connected to the voltage source node A and its source is grounded. The gates of both the p-type transistor 4 4 and the n-type transistor 4 6 are connected to 1222270 V. Description of the invention (6) To the voltage source node A. Since the size and design of the P-type transistor 44 and the n-type transistor 46 are the same as those of the p-type transistor 28 and the n-type transistor 30 in the high-pass filter 40, the voltage source of the voltage source 42 is copied by the deviation The level signal generated by the node A can be used to represent process differences in different integrated circuit processes. By adjusting the length and width of the transistor channels of the p-type transistor 28 and the n-type transistor 30, and selecting a capacitor 26 of an appropriate size, the angular frequency and time constant formed by the high-pass filter can be directly controlled. The offset replication voltage source 42 ensures that the same angular frequency response can be achieved regardless of process differences. Please refer to FIG. 48 for the frequency response of the high-pass filter 40 proposed by the present invention shown in FIG. As shown in Figure 4, ρ-type transistors 28 and 44 with a channel width of W = m and a length of L = 2 0 // m are selected; η-type transistors with a channel width of W = 1 // m and a length of L = 2 0 / zm Crystals 30 and 46; and the capacitance C of the capacitor 26 is selected to be 13 pF, the angular frequency (Fc) obtained by the high-pass filter will be equal to 100 Hz. Such a high-pass filter 40 is easier to implement on integrated circuits and more economical in design space compared to conventional techniques. Please refer to FIG. 5, which shows a schematic diagram of a high-pass filter 50 with a variable bias replica voltage generator 52. The variable bias replication voltage source 5 2 includes a p-type transistor 54 that is substantially the same as a p-type transistor 2 8 and a p-type transistor 54 that is substantially the same as a p-type transistor.

第11頁 1222270 五、發明說明(7) ^ —--- =3 0—樣大小的n型電晶體5 6,以及一個有—非反相入 端、一反相輸入端和一輸出端的放大器58。 ^ 之源極連接到電壓源VDD且其汲極連接到放大器58= =輸入端。η型電晶體56之汲極連接到放大器°58的非反相 輸入端且其源極接地。Ρ型電晶體5 4和η型電晶體5 6兩者 的閘極都連接到一電壓源節點Α。一位準訊號Vb丨as接在 放大器58的反相輸入端且放大器58的輸出端連接到電壓 源節點A。 與圖三所示的偏壓複製電壓源4 2類似,由於ρ型電晶體5 4 考η型電晶體5 6的大小和設計與局通濾、波|§ 5 2中的ρ型電 晶體2 8和η型電晶體3 0是相同的,所以由可變式偏壓複製 電壓源5 2的電壓源節點Α所產生的位準訊號可針對積體電 路製程中的製程差異。藉由調整ρ型電晶體2 8與n型電晶 體3 0的電晶體通道長度與寬度,並且選擇一適當大小的 電各2 6 ’便可直接控制由高通濾波器5 0形成的角頻與時 間吊數。選定通道寬度W = 2/z m、長度L = 20// m的ρ型電晶體 28與54 ;通道寬度W=l// m、長度L = 20// m的η型電晶體30與 56;並選定電容2 6的電容量〇=13口?,會產生的角頻 (F c)等於1 〇 〇 Ηζ且將會得到和圖四所示相同的頻率響 應。該可變式偏壓複製電壓源的額外優點是高通濾波器 5 0的輸出埠2 4的位準偏移將追蹤輸入到放大器5 8的反相 輪入端6 0的位準訊號Vb i as。可變式偏壓複製電壓源5 2可 直接控制高通濾波器5 0的直流偏移。位準訊號Vb i as可接Page 11 1222270 V. Description of the invention (7) ^ ----- = 3 0-type n-type transistor 5 6 and an amplifier having a non-inverting input, an inverting input and an output 58. The source of ^ is connected to the voltage source VDD and its drain is connected to the amplifier 58 = = input. The drain of the n-type transistor 56 is connected to the non-inverting input terminal of the amplifier 58 and its source is grounded. The gates of both the P-type transistor 54 and the n-type transistor 56 are connected to a voltage source node A. A quasi-signal Vb? As is connected to the inverting input terminal of the amplifier 58 and the output terminal of the amplifier 58 is connected to the voltage source node A. Similar to the bias replication voltage source 4 2 shown in Fig. 3, because the p-type transistor 5 4 considers the size and design of the n-type transistor 5 6 and local filtering, wave | ρ-type transistor 2 in § 5 2 The 8 and n-type transistors 30 are the same, so the level signal generated by the voltage source node A of the variable bias replica voltage source 52 can be targeted at the process difference in the integrated circuit manufacturing process. By adjusting the length and width of the transistor channels of the p-type transistor 28 and the n-type transistor 3 0, and selecting a proper size of each 2 6 ′, the angular frequency and Time hanging number. Selected p-type transistors 28 and 54 with channel width W = 2 / zm and length L = 20 // m; n-type transistors 30 and 56 with channel width W = l // m and length L = 20 // m; And select the capacitance of the capacitor 26 6 = 13 mouth? The resulting angular frequency (F c) is equal to 100 〇 ζ and the same frequency response as shown in Figure 4 will be obtained. An additional advantage of this variable bias replica voltage source is that the level shift of the output port 24 of the high-pass filter 50 will track the level signal Vb i as input to the inverting wheel input 60 of the amplifier 58. . The variable bias replica voltage source 52 can directly control the DC offset of the high-pass filter 50. Level signal Vb i as can be connected

1222270 五、發明說明(8) 受的範圍如下:¥1:<乂1)133<(丫00-¥1:)。放大器5 8的 電壓增益應該高到足以提供想要的輸出直流偏移誤差 (output DC of f set error)的精確性。放大器58的電 壓增益愈高,則高通濾波器5 0的輸出埠2 4的直流偏移誤 差看起來愈低。 清參閱圖六顯不一個差動式南通渡波^§ 70的不意圖。此 一差動式的實作方式通常用在高速積體電路環境,具有 高很多的共同模式雜訊剔除(common mode noise rejection)能力。差動式南通渡波器70包含有一正向輸 入埠72、一正向輸出埠74、一正向電容76、一正向p型電 晶體78、一正向p型電晶體80、一負向輸入埠82、一負向 輸出埠84、一與正向電容76相同的負向電容86、一與正 向P型電晶體7 8相同的負向p型電晶體8 8、一與正向n型電 晶體8 0相同的負向n型電晶體9 〇,以及偏壓複製電壓源 42。偏 示相同 7 4之間 8 4之間 極連接 到正向 連接到 型電晶 正、負 壓複製電壓源42包含的元件及運作方式與圖三所 。正向電谷7 6連接在正向輸入埠7 2與正向輸出埠 。負向電容8 6連接在負向輸入埠§ 2與負向輸出埠 。正向ρ型電晶體78之源極連接到電源VDD且其汲 到正向輸出埠74,而正向n型電晶體8〇之汲極連接 輸出埠7 4且其源極接地。負向ρ型電晶體8 8之源極 電源VDD且其汲極連接到負向輸出埠84,而負向η 體9〇之汲極連接到負向輸出埠84且其源極接地。 向成與η型電晶體7 8、8 0、8 8、9 0的閘極都連接1222270 V. Description of the invention (8) The acceptance range is as follows: ¥ 1: < 乂 1) 133 < (丫 00- ¥ 1 :). The voltage gain of the amplifier 58 should be high enough to provide the desired accuracy of the output DC of f set error. The higher the voltage gain of the amplifier 58, the lower the DC offset error of the output port 24 of the high-pass filter 50 appears. See Figure 6 for the intention of a differential Nantong crossing ^ § 70. This differential implementation is usually used in high-speed integrated circuit environments and has much higher common mode noise rejection capabilities. The differential Nantong crossing wave device 70 includes a forward input port 72, a forward output port 74, a forward capacitor 76, a forward p-type transistor 78, a forward p-type transistor 80, and a negative input. Port 82, a negative output port 84, a negative capacitor 86 that is the same as the positive capacitor 76, a negative p-type transistor 8 8 that is the same as the positive P-type transistor 78, and a positive n-type Transistor 80 is the same negative-type n-type transistor 90, and a bias replication voltage source 42 is used. The bias is the same between 7 4 and 8 4. The poles are connected to the positive and are connected to the transistor. The components and operating modes of the positive and negative voltage replication voltage source 42 are the same as those in Figure 3. The forward power valley 7 6 is connected to the forward input port 7 2 and the forward output port. A negative capacitor 86 is connected to the negative input port § 2 and the negative output port. The source of the forward p-type transistor 78 is connected to the power supply VDD and it is drawn to the forward output port 74, and the drain of the forward n-type transistor 80 is connected to the output port 74 and its source is grounded. The source of the negative p-type transistor 88 is VDD and its drain is connected to the negative output port 84, and the drain of the negative n body 90 is connected to the negative output port 84 and its source is grounded. Xiangcheng is connected to the gates of n-type transistors 7 8, 8 0, 8 8, 9 0

第13頁 1222270 五、發明說明(9) 到電壓源節點A,其連接到偏壓複製電壓源4 2的輸出端。 該差動式高通濾波器7 0運作的方式係與圖三所示之單一 端點的版本十分相似,然而其不同之處在於:於圖六 中,該正向高通濾波器係被複製以產生一差動操作所需 之負向高通濾波器。該電路之正向與負向的運作方式均 與圖三所示的高通濾波器相同。 請參閱圖七顯示另一個差動式高通濾波器1 0 0的示意圖。 差動式高通濾波器100,可用於正、負向輸出埠74、8 4的 直流偏移需要被控制的情況。該電路的示意圖除了電壓 源節點A的位準訊號是由可變式偏壓複製電壓源5 2產生的 之外,非常像圖六所示之差動式高通濾波器7 0。該電路 之正向與負向的高通濾波器之運作方式與元件都與圖六 所示的相同。可變式偏壓複製電壓源5 2包含的元件及運 作方式與圖五所示相同。 相較於習知技術,本發明使用一 p型電晶體與一 η型電晶 體共同組成一個預定的阻抗值,如此一來就能在積體電 路上實現高通濾波器。該預定的阻抗值與一電容共同在 輸入埠與輸出埠之間組成一高通濾波器,如此一來便不 需要在積體電路上增加電阻及電容值就可達成。本發明 藉由偏壓複製電壓源、ρ型和η型電晶體的組合來得到一 可預測的阻抗值。本發明藉由使用可變式偏壓複製電壓Page 13 1222270 V. Description of the invention (9) To the voltage source node A, which is connected to the output terminal of the bias copy voltage source 42. The operation of the differential high-pass filter 70 is very similar to the single-end version shown in FIG. 3, but the difference is that in FIG. 6, the forward high-pass filter is copied to produce A negative high-pass filter required for differential operation. The positive and negative operating modes of this circuit are the same as the high-pass filter shown in Figure 3. Please refer to FIG. 7 for a schematic diagram of another differential high-pass filter 100. The differential high-pass filter 100 can be used when the DC offset of the positive and negative output ports 74, 84 needs to be controlled. The schematic diagram of this circuit is very similar to the differential high-pass filter 70 shown in Fig. 6 except that the level signal of the voltage source node A is generated by the variable bias replica voltage source 52. The positive and negative high-pass filters of this circuit operate in the same way as the components shown in Figure 6. The components and operation modes of the variable bias replication voltage source 52 are the same as those shown in FIG. Compared with the conventional technology, the present invention uses a p-type transistor and an n-type transistor to form a predetermined impedance value, so that a high-pass filter can be implemented on the integrated circuit. The predetermined impedance value and a capacitor together form a high-pass filter between the input port and the output port, so that it can be achieved without adding resistance and capacitance values to the integrated circuit. The present invention obtains a predictable impedance value by a combination of a bias replication voltage source, a p-type and an n-type transistor. The present invention reproduces voltage by using a variable bias

第14頁 1222270 五、發明說明(10) 源,可直接控制高通濾波器輸出埠的直流偏移,此外同 樣可以在不論積體電路製造時的程序變異情況下維持一 可預測的阻抗值。 以上所述僅為本發明之較佳實施例,凡依本發明申請專 利範圍所做之均等變化與修飾,皆應屬本發明專利之涵 蓋範圍。章節結束Page 14 1222270 V. Description of the invention (10) The source can directly control the DC offset of the output port of the high-pass filter. In addition, it can also maintain a predictable impedance value regardless of the program variation when the integrated circuit is manufactured. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of the patent application for the present invention shall fall within the scope of the patent of the present invention. End of chapter

第15頁 1222270 圖式簡單說明 圖式之簡單說明 圖一為習知技術中之高通濾波器的示意圖。 圖二為本發明之高通濾波器的示意圖。 圖三為圖二中之高通濾波器具備一偏壓複製電壓源的示 意圖。 圖四為圖三中之高通濾波器的頻率響應圖。 圖五為圖二中之高通濾波器具備一可變式偏壓複製電壓 源的示意圖。 圖六為圖三中的高通濾波器之差動式的示意圖。 圖七為圖五中的高通濾波器之差動式的示意圖。 圖式之符號說明Page 15 1222270 Brief description of the diagram Brief description of the diagram Figure 1 is a schematic diagram of a high-pass filter in the conventional technology. FIG. 2 is a schematic diagram of a high-pass filter according to the present invention. Figure 3 is a schematic diagram of the high-pass filter in Figure 2 equipped with a biased replica voltage source. Figure 4 shows the frequency response of the high-pass filter in Figure 3. FIG. 5 is a schematic diagram of the high-pass filter in FIG. 2 provided with a variable bias replicating voltage source. FIG. 6 is a schematic diagram of a differential type of the high-pass filter in FIG. 3. FIG. 7 is a schematic diagram of a differential type of the high-pass filter in FIG. 5. Schematic symbol description

第16頁 10、 20> 40、 50〜 70> 100 通濾波器 48 頻率 響應 圖 12^ 26' 76> 86 電容 14、 22> Ί2、 82 輸入 埠 16> 24、 74' 84 輸出 埠 18 電阻 28、 44 - 54' 78〜 88 P型電 晶 體 30、 46> 56' 80> 90 N型電 晶 體 32 電壓 源 42 偏壓 複製 電壓 源 1222270 圖式簡單說明 52 可變式偏壓複製電壓源 5 8 放大器 60 放大器5 8的反相輸入端 IHI1 第17頁Page 16 10, 20 > 40, 50 ~ 70 > 100-pass filter 48 Frequency response graph 12 ^ 26 '76 > 86 capacitor 14, 22 > Ί2, 82 input port 16 > 24, 74' 84 output port 18 resistance 28 , 44-54 '78 ~ 88 P-type transistor 30, 46 > 56' 80 > 90 N-type transistor 32 Voltage source 42 Bias voltage source 1222270 Brief description of the diagram 52 Variable bias voltage source 5 8 Amplifier 60 Inverting input of amplifier 5 8 IHI1 Page 17

Claims (1)

1222270 六、申請專利範圍 1. 一種高通濾波器,包含: 一電容; 一第一電晶體,其第一端連接至一第一電壓源,其第二 端連接至該電容;及 一第二電晶體,其第一端連接至該第一電晶體之第二 端,其第二端接地; 其中該高通濾波器之時間常數係由該第一電晶體與該第 二電晶體所決定。 2. 如申請專利範圍第1項所述之高通濾波器,其中該 第一電晶體為一 η型電晶體。 3. 如申請專利範圍第1項所述之高通濾波器,其中該 第二電晶體為一 Ρ型電晶體。 4. 如申請專利範圍第1項所述之高通濾波器,其另包 含有一第二電壓源連接到該第一與第二電晶體的第三 端,以致使該第一與第二電晶體能在一飽和模式下運 作。 5. 如申請專利範圍第4項所述之高通濾波器,其中該 第二電壓源包含有: 一第三電晶體,其第一端連接至該第一電壓源,其第二 端連接至該第一與第二電晶體的第三端,其第三端連接1222270 6. Scope of patent application 1. A high-pass filter comprising: a capacitor; a first transistor having a first terminal connected to a first voltage source and a second terminal connected to the capacitor; and a second capacitor The first end of the crystal is connected to the second end of the first transistor, and the second end of the crystal is grounded. The time constant of the high-pass filter is determined by the first transistor and the second transistor. 2. The high-pass filter according to item 1 of the scope of patent application, wherein the first transistor is an n-type transistor. 3. The high-pass filter according to item 1 of the patent application scope, wherein the second transistor is a P-type transistor. 4. The high-pass filter according to item 1 of the patent application scope, further comprising a second voltage source connected to the third terminals of the first and second transistors, so that the first and second transistors can Operates in a saturated mode. 5. The high-pass filter according to item 4 of the scope of patent application, wherein the second voltage source includes: a third transistor, a first terminal of which is connected to the first voltage source, and a second terminal of which is connected to the The third terminal of the first and the second transistor, the third terminal of which is connected 第18頁 1222270 六、申請專利範圍 至其第二端;以及 一第四電晶體,其第一端連接至該第一電晶體的第二 端,其第二端接地,其第三端連接至其第一端。 6. 如申請專利範圍第4項所述之高通濾波器,其中該 第二電壓源包含有: 一第三電晶體,包含有一第一端、一第二端、及一第三 端,其第一端連接至該第一電壓源; 一第四電晶體,包含有一第一端、一第二端、及一第三 端,其第一端連接至該第一電晶體的第二端,其第二端 接地;以及 一放大器,其第一輸入端連接至該第一電晶體的第二 端,其第二輸入端連接至一偏壓源,其輸出端連接至該 第一、第二、第三、第四電晶體的第三端。 7. 如申請專利範圍第1項所述之高通濾波器,其中該 高通濾波器係内建於一晶片中。 8. 如申請專利範圍第1項所述之高通濾波器,其中該 第一與第二電晶體能在一飽和模式下運作。Page 18 1222270 6. The scope of the patent application is to its second end; and a fourth transistor whose first end is connected to the second end of the first transistor, whose second end is grounded, and whose third end is connected to Its first end. 6. The high-pass filter according to item 4 of the scope of patent application, wherein the second voltage source includes: a third transistor including a first terminal, a second terminal, and a third terminal, One terminal is connected to the first voltage source. A fourth transistor includes a first terminal, a second terminal, and a third terminal. The first terminal is connected to the second terminal of the first transistor. The second terminal is grounded; and an amplifier whose first input terminal is connected to the second terminal of the first transistor, its second input terminal is connected to a bias source, and its output terminal is connected to the first, second, The third terminal of the third and fourth transistors. 7. The high-pass filter according to item 1 of the patent application scope, wherein the high-pass filter is built in a chip. 8. The high-pass filter according to item 1 of the patent application, wherein the first and second transistors are capable of operating in a saturation mode. 第19頁Page 19
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