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TWI291150B - Liquid crystal display and driving method therefore - Google Patents

Liquid crystal display and driving method therefore Download PDF

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Publication number
TWI291150B
TWI291150B TW94107215A TW94107215A TWI291150B TW I291150 B TWI291150 B TW I291150B TW 94107215 A TW94107215 A TW 94107215A TW 94107215 A TW94107215 A TW 94107215A TW I291150 B TWI291150 B TW I291150B
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Taiwan
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voltage
pixel
pixel array
time
driven
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TW94107215A
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Chinese (zh)
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TW200632819A (en
Inventor
Ming-Jhen Sie
Chen-Yi Wu
Chia-Ho Yang
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Chi Mei Optoelectronics Corp
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Abstract

A liquid crystal display (LCD) includes a pixel array. The pixel array is a flip pixel array. The liquid crystal display drives the pixel array in a first time to make a pixel voltage of each pixel has different polarity with adjacent pixels. After that, a first voltage is provided to data lines connected to pixels which are driven by positive pixel voltage and a second voltage is provided to data lines connected to pixels which are driven by negative pixel voltage. A frame time includes the first time and the second the time.

Description

1291150 九、發明說明: : 【發明所屬之技術領域】 , 本發明是有關於一種液晶顯示器,且特別是有關於一種能 改善顯示品質之驅動方法。 【先前技術】 請參照第1圖,其為習知翻轉畫素矩陣之示意圖。在第i 圖中係以3x3之翻轉晝素矩陣(flip pixei array)i〇〇為例做說 明。翻轉晝素矩陣100包括4條資料線102(1)〜102(4)、3條掃 籲描線104(丨)〜1〇4(3)與9個畫素106。每個畫素1〇6均包括薄膜 電晶體20與畫素電極(pixei eiectr〇de ) 22。 當以行反轉(column inversion)模式驅動翻轉畫素矩陣 100時,掃描線104(1)〜104(3)上之掃描訊號係依序導通各列畫 素106中之薄膜電晶體20,且資料線102(1)〜1〇2(4)如圖所示, 係以母一畫面時間依照正、負極性之驅動順序傳送對應的畫素 電壓至對應之畫素106中。故,如第1圖所示,每個畫素電極 22上之畫素電壓和其上下左右相鄰之畫素電極22上之畫素電 _ 壓具有相反的極性’以達到點反轉(dot inversion )模式的書面 品質。且於一畫面時間後,原本以正極性驅動之畫素丨〇6改以 負極性來驅動,而原本以負極性驅動之晝素1〇6改以正極性來 驅動。 然而,在翻轉畫素矩陣100進行行反轉模式驅動時,會產 生嚴重的串音(cross talk)現象。以第一條資料線102(1)與書 素106(1)之畫素電極22為例做說明,於資料線102(1)與畫素電 極22間將會形成一橫向電場E。造成此橫向電場e之原因是, 畫素電極22與資料線1 〇2( 1)間之電壓差。此橫向電場£將會影 TW1948PA 5 1291150 響到原本液晶的排列方向,造成有漏光的現象。這種漏光的現 - 象於每一列畫素上造成影響程度不相同,使得整個畫面的亮度 • 看起來很不均勻,會有亮暗交錯的細紋。亮暗交錯的細紋將會 嚴重影響到所顯示之畫質。而傳統的解決方法是增加資料線1〇6 與晝素電極22間之距離,以減少橫向電場£對液晶分子的影 響,但這種做法卻會降低了畫素1〇6之開口率。故,解決以行 反轉模式驅動時之串音現象所造成的問題仍是業界目前急需解 決的課題。 • 【發明内容】 有鑑於此,本發明的目的就是在提供一種液晶顯示器及其 驅動方法,讓相鄰的每列畫素受到串音(er〇ss talk )之影響更 為平均’以改善整體顯示畫面之品質。 根據本發明的目的,提出一種液晶顯示器之驅動方法。液 晶顯示器係包括畫素陣列。畫素陣列係為翻轉晝素矩_(fUp pixel array)。此液晶顯示器之驅動方法如下。於第一時間内驅 動畫素陣列,以使晝素陣列中之每個畫素與上下左右相鄰之畫 φ 素具有相反極性之畫素電壓。接著,於第二時間内,使畫素陣 列中之與掃描線耦接之薄膜電晶體係均截止,並且資料驅動電 路輸出第一電壓至以正極性驅動之畫素所連接之資料線及輸出 第二電壓至以負極性驅動之畫素所連接之資料線。其中,一畫 面時間係包括該第一時間與該第二時間。 根據本發明的另一目的,提出一種液晶顯示器之驅動方 法液晶顯示器係包括畫素陣列。畫素陣列具有Μ列n行畫素, 並與Μ條掃描線及Ν+1條資料線電性連接。晝素陣列中相鄰的 兩列畫素係分別與第1條至第Ν條資料線及第2條至第N+1條 TW1948PA 6 1291150 資料線電性連接。此液晶顯示器之驅動方法如下。於一第一時 _ 間内,依序從第一條掃描線掃描至第Μ條掃描線,同時藉由 N+1條資料線驅動畫素陣列,以使畫素陣列中之每個晝素9與上 下左右相鄰之畫素具有相反極性之畫素電壓。接著,於第二時 間内,使畫素陣列中與Μ條掃描線耦接之薄膜電晶體係均截 止,並提供第一電壓至以正極性驅動之畫素所連接之資料線及 提供第二電壓至以負極性驅動之晝素所連接之資料線。其中, 一畫面時間包括第一時間與第二時間。 根據本發明的再一目的,提出一種液晶顯示器。液晶顯示 ^ 器包括畫素陣列、Μ條掃描線與Ν+1條資料線,μ、Ν係為正 整數。晝素陣列具有Μ列Ν行畫素,並與Μ條掃描線及N+1 條資料線電性連接。畫素陣列中相鄰的兩列畫素係分別與第i 條至第N條資料線及第2條至第N+1條資料線電性連接。資料 驅動電路經由N+1條資料線與畫素陣列電性連接,並用以輸出 第一電壓與第二電壓。掃描驅動電路經由M條掃描線與畫素陣 列電性連接,並用以輸出掃描訊號。 其中於第一時間内,掃描驅動電路依序從第一條掃描線掃 φ 描至第M條掃描線,同時資料驅動電路經由N+1條資料線驅動 畫素陣列,以使畫素陣列中之每個畫素與上下左右相鄰之晝素 具有相反極性之畫素電壓。而於第二時間内,掃描驅動電路使 畫素陣列中與掃描線耦接之薄膜電晶體係均截止,並且以正極 性驅動之晝素所連接之資料線係接收該第一電壓,以負極性驅 動之晝素所連接之資料線係接收該第二電壓。 為讓本發明之上述目的、特徵、和優點能更明顯易懂,下 文特舉一較佳實施例,並配合所附圖式,作詳細說明如下:1291150 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a liquid crystal display, and more particularly to a driving method capable of improving display quality. [Prior Art] Please refer to Fig. 1, which is a schematic diagram of a conventional flip pixel matrix. In the i-th figure, a 3x3 flip pixei array i 〇〇 is taken as an example. The flip-flop matrix 102 includes four data lines 102(1) to 102(4), three scanning lines 104(丨)~1〇4(3), and nine pixels 106. Each pixel 1〇6 includes a thin film transistor 20 and a pixel electrode (pixei eiectr〇de) 22. When the flip pixel matrix 100 is driven in a column inversion mode, the scan signals on the scan lines 104(1) to 104(3) sequentially turn on the thin film transistors 20 in the columns of pixels 106, and As shown in the figure, the data lines 102(1) to 1〇2(4) transmit the corresponding pixel voltages to the corresponding pixels 106 in the driving order of the positive and negative polarities in the mother-picture time. Therefore, as shown in Fig. 1, the pixel voltage on each of the pixel electrodes 22 and the pixel voltage on the pixel electrodes 22 adjacent thereto are opposite to each other to achieve dot inversion (dot). Inversion) The written quality of the pattern. After one screen time, the pixel element 6 which was driven by the positive polarity was driven by the negative polarity, and the halogen element 1〇6 which was originally driven by the negative polarity was driven by the positive polarity. However, when the flip pixel matrix 100 is driven in the row inversion mode, a serious cross talk phenomenon occurs. Taking the first data line 102(1) and the pixel electrode 22 of the book 106(1) as an example, a transverse electric field E will be formed between the data line 102(1) and the pixel electrode 22. The reason for this transverse electric field e is the voltage difference between the pixel electrode 22 and the data line 1 〇 2 (1). This transverse electric field will affect the alignment of the original liquid crystal, causing light leakage. This kind of light leakage is caused by different degrees of influence on each column of pixels, so that the brightness of the entire picture • looks uneven, and there are bright and dark interlaced fine lines. Light and dark interlaced fine lines will seriously affect the quality of the displayed image. The traditional solution is to increase the distance between the data line 1〇6 and the halogen electrode 22 to reduce the effect of the transverse electric field on the liquid crystal molecules, but this method will reduce the aperture ratio of the pixel 1〇6. Therefore, solving the problem caused by the crosstalk phenomenon driven by the line inversion mode is still an urgent problem to be solved in the industry. SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide a liquid crystal display and a driving method thereof, which allow adjacent pixels in each column to be more evenly affected by crosstalk (to improve the overall). Display the quality of the picture. According to an object of the present invention, a driving method of a liquid crystal display is proposed. Liquid crystal displays include a pixel array. The pixel array is a fUp pixel array. The driving method of this liquid crystal display is as follows. The anilin array is driven for the first time so that each pixel in the pixel array has a pixel voltage of opposite polarity to the upper and lower left and right pixels. Then, in a second time, the thin film electro-crystal system coupled to the scan line in the pixel array is turned off, and the data driving circuit outputs the first voltage to the data line and the output connected by the pixel driven by the positive polarity. The second voltage is connected to the data line connected to the pixel driven by the negative polarity. Wherein, a picture time includes the first time and the second time. According to another object of the present invention, a driving method of a liquid crystal display is provided which comprises a pixel array. The pixel array has n rows of pixels and is electrically connected to the scan lines and the +1 data lines. The adjacent two columns of pixels in the pixel array are electrically connected to the first to third data lines and the second to the N+1th TW1948PA 6 1291150 data lines, respectively. The driving method of this liquid crystal display is as follows. In a first time _ interval, sequentially scanning from the first scan line to the scan line, and driving the pixel array by N+1 data lines to make each element in the pixel array 9 pixels adjacent to the top, bottom, left and right have pixel voltages of opposite polarities. Then, in a second time, the thin film electro-crystal system coupled to the scan line of the pixel array is turned off, and the first voltage is supplied to the data line connected by the pixel driven by the positive polarity and the second is provided. The voltage is connected to the data line connected to the element driven by the negative polarity. Wherein, a picture time includes a first time and a second time. According to still another object of the present invention, a liquid crystal display is proposed. The liquid crystal display includes a pixel array, a scan line and a Ν1 data line, and μ and Ν are positive integers. The pixel array has a plurality of pixels and is electrically connected to the scan line and the N+1 data lines. The adjacent two columns of pixels in the pixel array are electrically connected to the i-th to N-th data lines and the second to N+1th data lines, respectively. The data driving circuit is electrically connected to the pixel array via the N+1 data lines, and is configured to output the first voltage and the second voltage. The scan driving circuit is electrically connected to the pixel array via M scan lines and is used to output a scan signal. In the first time, the scan driving circuit sequentially scans from the first scanning line to the Mth scanning line, and the data driving circuit drives the pixel array via the N+1 data lines to make the pixel array Each pixel has a pixel voltage of opposite polarity to the pixels adjacent to the top, bottom, left, and right. In the second time, the scan driving circuit cuts off the thin film electro-crystal system coupled to the scan line in the pixel array, and receives the first voltage to the negative voltage by the data line connected to the positively driven pixel. The data line connected to the sexually driven element receives the second voltage. The above described objects, features, and advantages of the present invention will become more apparent and understood.

TW1948PA 7 1291150 【實施方式】 造成焭暗細紋的原因是兩相鄰資料線與畫素電極間之電 壓差,此電壓差造成的橫向電場影響到液晶分子預定的排列方 向’使得液晶分子發生漏光的現像。且每一列畫素之漏光現象 隨著資料線上之等效電壓,受到不同大小的橫向電場影響,使 得所顯示之畫面會有亮暗細紋的存在。 請參照第2圖,其為畫素陣列之一例之示意圖。畫素陣列 200具有Μ列N行,共M*N個畫素p。N與M係為正整數。 畫素陣列200與Μ條掃描線S(l)〜S(M)及N+1條資料線 D(l)〜D(N+1)電性連接。且第χ列畫素之N筆畫素電壓係分別 由對應的第2條至第N+1條資料線所傳送,χ為正整數且 ‘M-1。而第X+1列畫素u筆畫素電壓係分別由對應的第i 條至第N條資料線所傳送。例如畫素陣列2〇〇為2〇列 (R1〜R20)35行(C1〜C35)之翻轉畫素矩陣(mp pixel array)並繪 於第2圖中。即畫素陣列2〇〇與掃描線s〇)〜s(2〇)以及資料線 D(l)〜D(36)電性連接。並以χ==2為例,表示第2列畫素之乃 筆畫素電壓係分別由對應的第2條至第36條資料線d(2)〜d(36) 所傳送’而其下列畫素’第3列畫素之35筆晝素電壓則分別由 對應的第1條至第35條資料線d(1)〜D(35)所傳送。TW1948PA 7 1291150 [Embodiment] The reason for causing dull lines is the voltage difference between two adjacent data lines and the pixel electrodes. The transverse electric field caused by this voltage difference affects the predetermined alignment direction of the liquid crystal molecules. The image of the present. And the leakage phenomenon of each column of pixels is affected by the transverse electric field of different magnitudes with the equivalent voltage on the data line, so that the displayed picture will have bright and dark lines. Please refer to FIG. 2, which is a schematic diagram of an example of a pixel array. The pixel array 200 has a row of N rows and a total of M*N pixels p. N and M are positive integers. The pixel array 200 is electrically connected to the scan lines S(1) to S(M) and the N+1 data lines D(1) to D(N+1). And the N-picture pixel voltage of the first array of pixels is respectively transmitted by the corresponding 2nd to N+1th data lines, and χ is a positive integer and ‘M-1. The voltages of the X+1th column pixel u are respectively transmitted by the corresponding i-th to Nth data lines. For example, the pixel array 2 is a rp pixel array of two rows (R1 to R20) of 35 rows (C1 to C35) and is shown in Fig. 2. The pixel array 2 is electrically connected to the scan lines s〇)~s(2〇) and the data lines D(l) to D(36). Taking χ==2 as an example, it means that the pentaline voltages of the second column of pixels are respectively transmitted by the corresponding second to 36th data lines d(2)~d(36), and the following pictures are drawn. The 35-character voltage of the third column of pixels is transmitted by the corresponding first to 35th data lines d(1) to D(35).

請參照第3A圖與第3B圖。第3A圖為第一畫面F1中, 每個畫素p所儲存的晝素電壓大小之示意圖。第3B圖為第二 畫面F2中,每個畫素p所儲存的晝素電壓大小之示意圖。晝素 陣列200係以行反轉(c〇lumninversi〇n)模式被驅動並 %灰階值為例,顯示第一晝面F1與第二畫面F2。5〇%灰階值 對應的正、負極性之畫素電壓例如為+6·6與+2·〇伏特。且顯示 第一晝面F1時,先以正極性之畫素電壓驅動與奇數條資料線 TW1948PA 1291150Please refer to Figures 3A and 3B. Fig. 3A is a diagram showing the magnitude of the voltage of the pixel stored in each pixel p in the first picture F1. Fig. 3B is a diagram showing the magnitude of the voltage of the pixel stored in each pixel p in the second picture F2. The pixel array 200 is driven by the line inversion (c〇lumninversi〇n) mode and the % gray scale value is taken as an example, and the first and second screens F1 and the second screen F2 are displayed. The positive and negative polarities corresponding to the 5〇% grayscale values are shown. The pixel voltage of the sex is, for example, +6·6 and +2·〇V. And when the first surface F1 is displayed, the positive pixel voltage is driven first and the odd data lines are TW1948PA 1291150

D(l)、D(3).“D(35)電性連接之晝素P,及以負極性之畫素電壓 驅動與偶數條資料線D(2)、D(4)...D(36)電性連接之畫素p。顯 示完第一畫面F1後,每個畫素P所儲存到之畫素電壓之電壓值 如第3A圖所列,例如第3 A圖中之第一列ri第一行c i所列 之數值,6·6,代表第2圖中之畫素ρ(ι,丨)所接收之畫素電壓 之電壓值。接著,由於行反轉(column inversion)的驅動模式, 顯示完第二畫面F2後,每個畫素p所儲存的畫素電壓為如第 3B圖所列,原本以正極性驅動之晝素p改以負極性來驅動,而 原本以負極性驅動之畫素P改以正極性來驅動。 接著請參照第4圖,其列出每條資料線D上,各畫素p 於維持晝素電壓之時間内,所感受到對應的資料線〇上電壓變 化之等效電壓均方根值(等效電壓均方根值以下通稱等效電壓 值)。例如第4圖中,第3列第3行所標示之數值6·3,代 表6.3伏特之等效電壓rms值。也就是說此6·3伏特代表畫素 Ρ(3,3)於維持畫素電壓6·6伏特之時間内,感受到資料線旦 上電壓變化之等效電壓rms值。請同時參照帛3A圖與第3β圖 即可知,從畫素P(3,3)看到的資料線D3±電壓即是以伏特 維持17週期(一個週期代表輸入完一列畫素之^㈣素電壓所 需之時間)。故17週期為輸入畫素電壓至第4列〜第2〇列畫素p 所而之時間,亚接著於顯示第二畫面F2時,畫素,3)感受 到的資料線D3上電壓變為2伏特,並維持2週期。如此,竺 素3)看到的資料線D3上畫素電壓之等效電壓歷值即為 UUxm八2)/19}再開根號,即為第3列第3行所標示之數值 6·3 〇 壓 一,不滑於弟2圖中)上之畫素電 係維持一畫面時間後才更換。 母個1素電極與對應的資料D(l), D(3). "D(35) electrically connected to the element P, and driven by the negative pixel voltage and even data lines D(2), D(4)...D (36) The pixel p of the electrical connection. After the first picture F1 is displayed, the voltage value of the pixel voltage stored in each pixel P is as shown in FIG. 3A, for example, the first in FIG. 3A. The value listed in the first row ci of the column ri, 6·6, represents the voltage value of the pixel voltage received by the pixel ρ(ι, 丨) in Fig. 2. Then, due to the column inversion In the driving mode, after the second screen F2 is displayed, the pixel voltage stored in each pixel p is as listed in FIG. 3B, and the elemental p which is driven by the positive polarity is driven by the negative polarity, and the negative is originally used. The sex-driven pixel P is driven by the positive polarity. Next, please refer to Fig. 4, which shows that each pixel p has a corresponding data line in the time when the pixel voltage is maintained for each pixel D. The equivalent voltage rms value of the upper voltage change (the equivalent voltage rms value is generally referred to as the equivalent voltage value). For example, in Figure 4, the value indicated by the third row of the third column is 6.3 volts, representing 6.3 volts. Etc The voltage rms value. That is to say, this 6.3 volt represents the equivalent voltage rms value of the voltage change on the data line when the pixel Ρ(3,3) maintains the pixel voltage of 6·6 volts. Referring to the 帛3A map and the 3β map, the data line D3± voltage seen from the pixel P(3,3) is maintained at volts for 17 cycles (one cycle represents the input voltage of a column of pixels). The required time is). Therefore, the period of 17 is the time when the pixel voltage is input to the fourth column to the second column, and then the pixel is displayed when the second screen F2 is displayed, and 3) the data is felt. The voltage on line D3 becomes 2 volts and is maintained for 2 cycles. Thus, the equivalent voltage history of the pixel voltage on the data line D3 seen by the pixel 3) is UUxm 八 2)/19} reopening the root number, ie The value indicated in the third row of the third column is 6.3. The pressure of the pixel is not changed after the screen is maintained for one screen time. The parental electrode and corresponding data are replaced.

TW1948PA 9 1291150TW1948PA 9 1291150

線D上之電壓便會有隨時間變化之電。 於屮雪厭兰 》w廿人咖 產一檢向電場E正比 於此電壓差。此橫向電場E即造成所謂的 象。故,藉由第4圖與第3A、B圖即可得知 talk現 F1至顯示第二晝面F2之期 ’於,員不第-畫面 朋间母個畫素電極與鄰逬眘粗蠄D 間之電壓差變化,並將其結果繪製於第5 _ 1㈣第γ圖, 其列出每個畫素Ρ之畫素電極與資料❹間之電壓差。 圖所示,每一個數字代表每個蚩音ρ 查 HI ^ ^ 旦素之'^素黾極與對應於第4 =上所狀專效電壓rms值之電壓差(第3Α_去第4圖後之 值)。為了方便說明以4個畫素P(1,3)、ρ(ι,4) p(2,4)來說明,並另繪一結構示意圖於第6圖上。The voltage on line D will have a change in time. Yu Yu Xue Luan Lan 》 w廿人咖 Produce a check to the electric field E is proportional to this voltage difference. This transverse electric field E causes a so-called image. Therefore, by means of Fig. 4 and Fig. 3A and Fig. B, it can be known that the talk F1 to the second face F2 is in the period of 'the member's picture electrode and the neighbor's pixel electrode. The voltage difference between D changes, and the result is plotted in the 5th _ 1 (four) gamma diagram, which lists the voltage difference between the pixel electrode of each pixel and the data ❹. As shown in the figure, each number represents the voltage difference between the 黾 黾 之 HI HI 与 与 与 与 与 与 与 对应 对应 与 与 ( ( ( ( ( ( ( ( ( ( ( ( ( 去 去 去 去 去 去 去 去 去 去 去 去 去After the value). For convenience of description, four pixels P(1,3), ρ(ι,4) p(2,4) are illustrated, and a schematic structural diagram is shown on the sixth figure.

請參照第6圖,其為部分畫素陣列2〇〇之結構示意圖。畫 素PU,3)於儲存6.6伏特之畫素電壓,而其對應的資料線D3, 於一畫面時間内之等效電壓rms值為6·6伏特,故其橫向電場 E1正比於兩端(畫素Ρ〇,3)之晝素電極與資料線D3則之電壓 差(6.6-6.6)=0伏特。而畫素P(1,4)儲存2〇伏特之晝素電壓, 而其對應的資料線D4之等效電壓ms值為2伏特,橫向電場 E2正比於兩端之電壓差(2_2)=〇伏特。同樣地,而畫素p(2,3) 與P(2’ 4)所對應到的橫向電場E3、Eq別正比於所對應的電 壓差(6.4-2)=4.4與電壓差(6.6-2.5)=43。因此,第2列之兩畫素 P(2, 3)與P(2’ 4)受到電場们、以產生之平均漏光亮度遠大於 第1列之兩畫素P(1 ’ 3)與P(1,4)受到電場El、E2影響產生 之平均漏光亮度。 故’再回到第5圖來看一整列晝素的情況,將可發現第2 列晝素之漏光現像將比第1列還嚴重,這就是造成明顯的亮_ 暗交錯之小細橫紋的原因。且畫面中央若有插入一黑色視窗, 此黑色視窗上下之顯示區域内之亮暗細紋更為明顯。 TW1948PA 10 !29115〇 後,讓wr 至最彳卜條掃騎係依序被掃描完 utr與掃描線麵接之薄膜電晶體均截止。於薄膜 =體均截止之期間,提供—電壓至所有的f料線。如此,任Please refer to FIG. 6 , which is a schematic structural diagram of a partial pixel array 2 . The pixel PU, 3) stores a pixel voltage of 6.6 volts, and its corresponding data line D3 has an equivalent voltage rms value of 6.6 volts in one picture time, so its transverse electric field E1 is proportional to both ends ( Ρ〇素Ρ〇, 3) The voltage difference between the elemental electrode and the data line D3 (6.6-6.6) = 0 volts. The pixel P(1,4) stores a voltage of 2 volts, and the equivalent voltage of the corresponding data line D4 is 2 volts, and the transverse electric field E2 is proportional to the voltage difference between the two ends (2_2)=〇 volt. Similarly, the transverse electric fields E3 and Eq corresponding to the pixels p(2,3) and P(2' 4) are proportional to the corresponding voltage difference (6.4-2)=4.4 and the voltage difference (6.6-2.5). ) = 43. Therefore, the two pixels P(2, 3) and P(2' 4) in the second column are subjected to electric fields, and the average light leakage brightness is much larger than the two pixels P(1 '3) and P in the first column. 1,4) The average light leakage brightness caused by the influence of the electric fields El and E2. Therefore, when we return to Figure 5 to see the whole list of elements, we will find that the light leakage of the second column will be more serious than that of the first column. This is the small thin stripes that cause obvious bright _ dark interlacing. s reason. If a black window is inserted in the center of the screen, the light and dark lines in the upper and lower display areas of the black window are more obvious. After TW1948PA 10 !29115〇, let wr to the most sweeping sweeping system be scanned in sequence. The thin film transistors connected to the scanning line are cut off. During the film = body cutoff period, the voltage is supplied to all f lines. So, let

查:素於維持畫素電壓之時間内’所感受到對應的資料線上, :素電壓變化之等效電屢·值’係、與同列但不同行之畫素之 :效電壓_值甚為接近。其接近_度,係遠勝於傳統作法, 砼顯不畫面之品質得以改善。其中掃描第一條至最後一條掃描 ;;所需之時間與薄膜電晶體均截止之時間之和,係為一畫面時 "月“、、第7圖’其為本發明較佳實施例之液晶顯示器之示 :圖其中與上述相同之元件給予相同的元件標號。液晶顯示 =600包括畫素陣列6〇2、N+1條資料線D⑴〜D(N+1)、Μ條 掃描線S(l) S(M)、資料驅動電路6〇4與掃描驅動電路6〇6。畫 素陣列602包括M列N行畫素,m#n係為正整數,且畫素一 陣列中602相鄰的兩列畫素係分別與第】條至第N條資料線 D(l)〜D(N)及第2條至第N+1條資料線D⑺〜D(N+1)電性連接。 直素陣列602例如與上述畫素陣列2〇〇具有相同的電路結構, 匕括20列35行之翻轉畫素矩陣,即μ為2〇,N為。資料 驅動電路602經由資料線D⑴〜D(36)與畫素陣列6〇2電性連 接,並用以輸出畫素電壓。掃描驅動電路6〇4經由掃描線 S(l—)〜S(2G)與畫素陣列’電性連接,並用以依序輸出掃描訊號 至每-條掃描線S⑴〜s(2〇)。其中每個畫素p以p(M,N)標示 於第7圖,例如第-列第—行畫素標示為ρ(1,υ。Check: In the time when the pixel voltage is maintained, 'the corresponding data line is felt, the equivalent electric power value of the prime voltage change is the same as the pixel of the same column but different lines: the effect voltage _ value is very close . Its closeness to _ degree is far superior to the traditional practice, and the quality of the picture is improved. Wherein the first to the last scan is scanned; the sum of the required time and the time when the thin film transistor is cut off is a picture time "month", and Fig. 7 is a preferred embodiment of the present invention DESCRIPTION OF THE LCD: The same components as those described above are given the same component numbers. Liquid crystal display = 600 includes pixel arrays 6〇2, N+1 data lines D(1) to D(N+1), and scan lines S (1) S (M), data driving circuit 6〇4 and scan driving circuit 6〇6. The pixel array 602 includes M columns of N rows of pixels, m#n is a positive integer, and 602 phase in a pixel array The adjacent two columns of pixels are electrically connected to the data lines D(l) to D(N) and the second to N+1 data lines D(7) to D(N+1) of the first to Nth data lines, respectively. The pixel array 602 has the same circuit structure as the above pixel array 2, for example, including 20 columns and 35 rows of flip pixel matrices, that is, μ is 2〇, N is . The data driving circuit 602 is via the data line D(1)~ D (36) is electrically connected to the pixel array 6〇2 and used to output the pixel voltage. The scan driving circuit 6〇4 is electrically connected to the pixel array via the scan lines S(l—) to S(2G). And used to The scanning signal is output to each of the scanning lines S(1)~s(2〇), wherein each pixel p is denoted by p(M,N) in the seventh picture, for example, the first-column-line pixel is marked as ρ(1) , hehe.

TW1948PA 11 1291150 請參照第8圖,其為應用於本發明較佳實施例之液晶顯示 • 器之驅動方法之流程圖。本實施例之驅動方法例如用於上述液 晶顯示器600。首先於步驟8〇4,於第一時間T1内,掃描驅動 電路606依序從第一條掃描線s(1)掃描至第2〇條掃描線 S(20),同時資料驅動電路6〇4經由資料線D(1)〜D(36)驅動晝素 陣列602,以使畫素陣列602中之每個畫素p與上下左右相鄰 之畫素P具有相反極性之畫素電壓。接著,於步驟806,於第 二時間T2内,使畫素陣列602中與掃描線s(1)〜8(2〇)耦接之薄 膜電晶體(未繪於第7圖中)均截止,並提供第一電壓V1至以正 馨極性驅動之畫素P所連接之資料線,及提供第二電壓V2至以 負極性驅動之畫素P所連接之資料線。其中一個畫面時間包括 了第一時間T1與第二時間T2。 進一步來說,液晶顯示器600於第一時間τι内以正極性 之畫素電壓驅動與資料線D(1)、D(3)...D(35)耦接之畫素p,及 以負極性之畫素電壓驅動與資料線D(2)、D(4)…〇(36)耦接之畫 素P,以將第一畫面F1所對應的畫素電壓輸入至畫素陣列602 中’且維持一個晝面時間。接著,於第二時間T2内,由於薄膜 φ 電晶體,例如第1圖所繪之薄膜電晶體20,係被截止,故每個 晝素P不再能接受到資料線D上之晝素電壓。此時資料驅動電 路604輸出第一電壓V1至資料線D(1)、D(3)·· D(35)及輸出第 一電C V2至資料線d(2)、D(4)…D(36),並維持第二時間T2。 本實施例藉由電壓V1與V2維持第二時間T2,以使每條資料 線D上之等效電壓rms值,於一個畫面時間内彼此更為接近。 請同時參照第9A圖與9B圖,第9A圖與9B圖列出一畫 面時間内出每條資料線上隨著時間變化之電壓大小。以第一時 間T1與第二時間T2各佔一畫面時間的二分之一,及第一電壓TW1948PA 11 1291150 Please refer to FIG. 8 , which is a flow chart of a driving method of a liquid crystal display device applied to a preferred embodiment of the present invention. The driving method of this embodiment is used, for example, in the above liquid crystal display 600. First, in step 8〇4, in the first time T1, the scan driving circuit 606 sequentially scans from the first scan line s(1) to the second scan line S(20), and the data drive circuit 6〇4 The pixel array 602 is driven via the data lines D(1) to D(36) such that each pixel p in the pixel array 602 has a pixel voltage of opposite polarity to the pixel P adjacent to the top, bottom, left, and right. Next, in step 806, in the second time T2, the thin film transistors (not shown in FIG. 7) coupled to the scan lines s(1)-8(2〇) in the pixel array 602 are turned off. And providing a data line connected by the first voltage V1 to the pixel P driven by the positive polarity, and providing the second voltage V2 to the data line connected to the pixel P driven by the negative polarity. One of the picture times includes the first time T1 and the second time T2. Further, the liquid crystal display 600 drives the pixel p coupled to the data lines D(1), D(3), ... D(35) with a positive pixel voltage in the first time τι, and the negative electrode The pixel voltage is coupled to the pixel P coupled to the data lines D(2), D(4), ... (36) to input the pixel voltage corresponding to the first picture F1 into the pixel array 602' And maintain a face-to-face time. Then, in the second time T2, since the thin film φ transistor, for example, the thin film transistor 20 depicted in FIG. 1 is cut off, each halogen P can no longer receive the pixel voltage on the data line D. . At this time, the data driving circuit 604 outputs the first voltage V1 to the data lines D(1), D(3)··D(35), and outputs the first power C V2 to the data lines d(2), D(4)...D. (36) and maintain the second time T2. In this embodiment, the voltages V1 and V2 are maintained for the second time T2 such that the equivalent voltage rms values on each of the data lines D are closer to each other within one picture time. Please refer to Figures 9A and 9B at the same time. Figures 9A and 9B show the voltage changes over time on each data line during a picture time. The first time T1 and the second time T2 each occupy one-half of a picture time, and the first voltage

TW1948PA 12 1291150 :1與V2均為9伏特為例做說明。首先於第μ圖中,每一行 素電壓’並以Y軸代表日年M . 料線D來看,例如更說明,取任兩相鄰的資 圖之第3與第4行所列之數值,盆代表TW1948PA 12 1291150: Both 1 and V2 are 9 volts as an example. First, in the μ map, each row of the voltage 'and the Y axis represents the day of the M. Line D, for example, the value listed in the third and fourth rows of the two adjacent maps. , basin representative

=線叩)與D(4)。先看資料線叩),資料驅動電路604於資 查^(3)上,持續輪出正極性之畫素電壓^伏特至與其連接 ,里素P’表示資料線D3隨著時間軸丁持續輸出以伏特至時 二T1為止。同樣地,第4行表示資料線D⑷,從時間το持續 :出2.0伏特至時間T1為止。接著,於第二時間T2内所有 資料線D上之電壓維持9伏特。 請參照第10A圖與1GB圖,其列—晝面時間内出每條資 料線上隨著時間變化之電壓大小。如同第9圖之顯示條件,液 晶顯示器600於顯示完第—畫面?1後,顯示極性反轉後之第二 畫面F2°如上述’第1G圖所列之第3行之數值,表示資料線 D(3)IU著時間軸T持續輸出2 〇伏特至時間T1為止。同樣地, 第4行表示資料線D⑷,隨料間軸了持續輸出6 6伏特至 間T1為止。 接著,以第9圖與第10A圖上之每條資料線上之電壓變 化,计算出每條資料線D1〜D36對應每個畫素p於維持晝素電 壓期間内之等效電壓ms值,並將每個畫素p感受到對應的資 料線D上之等效電|rms值繪於第η目中。請參照帛u圖: 其列出資料線D上晝素電壓變化之等效電壓均方根值。並比較 第11圖與第4圖所例之數值,即可看出,任—晝素?於維持畫 素電壓期間内,所感受到對應的資料線D上,畫素電壓變化之 等效電壓rms值,係與同列但不同行之晝素ρ之等效電壓犷咖 值相比,比起傳統作法甚為接近,讓相鄰兩列畫素受到橫向電= line 叩) and D (4). First look at the data line 叩), the data driving circuit 604 on the investigation ^ (3), continue to turn out the positive pixel voltage ^ volts to connect with it, the prime P' indicates that the data line D3 continues to output with the time axis In volts until the second T1. Similarly, the fourth line indicates the data line D(4), which continues from time το : 2.0 volts to time T1. Next, the voltage across all data lines D during the second time T2 is maintained at 9 volts. Please refer to Figure 10A and 1GB, which are the voltages that vary with time on each data line during the time. As shown in the display condition of Fig. 9, the liquid crystal display 600 displays the first picture? After 1 , the second picture F2° after the polarity inversion is displayed as the value of the 3rd line listed in the above 1G chart, indicating that the data line D(3)IU has the time axis T continuously outputting 2 volts to the time T1. . Similarly, line 4 represents data line D(4), with the output axis continuing to output 6 6 volts to interval T1. Then, using the voltage changes on each data line on the 9th and 10th graphs, calculate the equivalent voltage ms value of each of the data lines D1 to D36 corresponding to each pixel p during the maintenance of the pixel voltage, and Each pixel p is perceived as the equivalent electric |rms value on the corresponding data line D in the nth mesh. Please refer to 帛u diagram: It lists the equivalent voltage rms value of the voltage change of the pixel on the data line D. And comparing the values in the 11th and 4th figures, you can see that the 昼-昼素? During the period of maintaining the pixel voltage, the equivalent voltage rms value of the pixel voltage change on the corresponding data line D is compared with the equivalent voltage of the same column but different rows of pixels ρ. The traditional approach is very close, so that the adjacent two columns of pixels are subjected to horizontal electricity.

TW1948PA 13 1291150 %的影響,所造成之平均漏光現象彼此更為接近。更進一步的 , 說明本發明之功效,同第6圖以4個晝素P(1,3)、P(1,4)、 P(2 ’ 3)與p(2,4)為例做更進一步的說明,並另繪此4個晝素p 之結構示意圖於第12圖上。 請參照第12圖,其為部分畫素陣列602之結構示意圖。 從第12圖可以看出,於第一畫面F1,畫素p(1,3)之畫素電極 具有6.6伏特之畫素電壓,而從第1〇圖得知其等效電壓均方根 值為7·9伏特,故其橫向電場E1,正比於,畫素p(1,3)之畫素 電極與資料線D3間之電壓差,此電壓差即為7 9_6 6=ι 3伏特。 同理,晝素P(1,4)之橫向電場E2,正比於4·6伏特之電壓差, 旦素Ρ(2,3)之橫向電場£3’正比於5.9伏特之電壓差,而畫素 Ρ(2,4)之橫向電場Ε4,正比於Q1伏特之電壓差。 如前述,相鄰的兩橫向電場E1,與E2,影響第i列之兩畫 素P(1,3)與ρ(ι,4)的平均漏光亮度,係正比於兩電壓差 (1.3V+4.6V)之平均,為2·95ν。而電場E3,、E4,所影響第2列 之兩晝素P(2、3)與P(2, 4)的平均漏光亮度,係正比於另外兩 電壓差(5·9ν+0·1ν)之平均,為3V。故可以看出,第卜2列畫 鲁素分別受到電場E1,、E2,與E3,、E4,影響之漏光程度,極為接 近這也代表每一列畫素受到串音(cross talk)影響之差異將更 為接近,接近致人眼已經分辨不出有亮-暗交錯之小細橫紋,讓 所顯示之畫面品質更為提高。 然,熟悉此技藝者能根據在第二時間T2内輸入之電壓νι >、V2大小來調整第二時間T2之長短,例如:電壓vi與是 一於時間T2 ’因此電壓V1與V2越大,所需的第二時間乃 越短。於本實施例中並不特別限制電壓νι肖W之電壓大小與 第二時間T2之時間長短。 ’、TW1948PA 13 1291150% of the effects, the resulting average light leakage phenomenon is closer to each other. Further, the effect of the present invention will be described, and FIG. 6 is made by taking four elements of P (1, 3), P (1, 4), P (2 ' 3) and p (2, 4) as an example. Further explanation, and another structural diagram of the four halogens p is shown in Fig. 12. Please refer to FIG. 12, which is a schematic structural diagram of a partial pixel array 602. As can be seen from Fig. 12, in the first picture F1, the pixel electrode of the pixel p(1,3) has a pixel voltage of 6.6 volts, and the equivalent voltage rms value of the pixel is obtained from the first picture. It is 7. 9 volts, so its transverse electric field E1 is proportional to the voltage difference between the pixel electrode of pixel p(1,3) and data line D3. This voltage difference is 7 9_6 6=ι 3 volts. Similarly, the transverse electric field E2 of Alizarin P(1,4) is proportional to the voltage difference of 4.6 volts, and the transverse electric field of the prime Ρ(2,3) is proportional to the voltage difference of 5.9 volts. The transverse electric field Ε4 of the prime (2, 4) is proportional to the voltage difference of Q1 volts. As mentioned above, the adjacent two transverse electric fields E1, and E2 affect the average light leakage brightness of the two pixels P(1,3) and ρ(ι,4) in the i-th column, which is proportional to the two voltage differences (1.3V+ The average of 4.6V) is 2.95ν. The electric field E3, E4, the average light leakage brightness of the two elements P (2, 3) and P (2, 4) affected by the second column is proportional to the other two voltage differences (5·9ν+0·1ν) The average is 3V. Therefore, it can be seen that the second column of Lu Su is affected by the electric fields E1, E2, and E3, and E4, and the degree of light leakage is very close. This also represents the difference between each column of pixels affected by cross talk. Will be closer, close to the human eye has been able to distinguish the bright and dark staggered small thin stripes, so that the quality of the displayed picture is improved. However, those skilled in the art can adjust the length of the second time T2 according to the voltages νι >, V2 input in the second time T2, for example, the voltage vi and the time is T2', so the voltages V1 and V2 are larger. The second time required is shorter. In the present embodiment, the magnitude of the voltage of the voltage νι W W and the length of the second time T2 are not particularly limited. ’,

TW1948PA 14 1291150 性驅動下’資料驅動電路604所能輸出之之最大電壓值。然, 熟悉此技藝者能根據在第二時間T2⑽人之電壓v卜v2大小 來調整第二時間T2之長短’例如:電壓〜V2是反比於時間 此外’第一電壓V1可以為資料驅動電路604於正極性驅 動下之最大電壓值,而第二電壓V2則為資料驅動電路綱於 負極性驅動下之最大電壓值。或者,第—電壓νι與第二電壓 V2係均為共同電極電壓之電壓位準’或最接近共同電壓之正負 極性驅動下之畫素電壓,亦電壓係為正極性驅動下資 料驅動電路_所能輸出之最小電壓值,而第二電壓係為負極TW1948PA 14 1291150 The maximum voltage value that can be output by the data drive circuit 604. However, those skilled in the art can adjust the length of the second time T2 according to the voltage of the person V2 at the second time T2 (10). For example, the voltage ~V2 is inversely proportional to the time. Further, the first voltage V1 can be the data driving circuit 604. The maximum voltage value under the positive polarity drive, and the second voltage V2 is the maximum voltage value of the data drive circuit under the negative polarity drive. Alternatively, the first voltage νι and the second voltage V2 are both the voltage level of the common electrode voltage or the pixel voltage driven by the positive and negative polarity of the common voltage, and the voltage is the data driving circuit driven by the positive polarity. The minimum voltage that can be output, and the second voltage is the negative

源為何,只要能於第二時間内輸入至資料線上即可故第一電 壓VI與第二電壓V2亦可以其他電路來產生。 T2’因此電MV1、V2越大,所需是第二時間τ2越短。於本實 施例中並不特別限制電壓V1、Vk電壓大小與第二時間”之 時間長短。其只要能使得每_列畫素受到串音(⑽μ仏⑷之影 響差異更為平均’使顯示畫面沒有明顯的亮暗細紋即可。此外, 於本實施例中也並不特別限制第一電壓V1與第二電壓v2的來 綜上所述,雖然本發明已以一較佳實施例揭露如上,然其 並非用以限^本發明,任何熟習此技藝者,在不脫離本發明之 :神和範圍内,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。The source, as long as it can be input to the data line in the second time, the first voltage VI and the second voltage V2 can also be generated by other circuits. Therefore, the larger the electric MV1, V2, the shorter the second time τ2 is required. In the present embodiment, the lengths of the voltages of the voltages V1 and Vk and the second time are not particularly limited. As long as the per-line pixels are subjected to crosstalk (the difference between (10) μ仏(4) is more averaged, the display screen is displayed. There is no obvious bright and fine lines. In addition, the first voltage V1 and the second voltage v2 are not particularly limited in this embodiment, although the present invention has been disclosed in a preferred embodiment as above. However, it is not intended to limit the invention, and any person skilled in the art can make various changes and retouchings without departing from the scope of the invention. Therefore, the scope of protection of the present invention is attached to the application. The scope defined by the patent scope shall prevail.

TW1948PA 15 1291150 【圖式簡單說明】 • 第1圖為習知翻轉晝素矩陣之示意圖。 第2圖為晝素陣列之一例之示意圖。 第3A圖為第一畫面pi中每個畫素P所儲存的畫素電壓大 小之示意圖。 第3B圖為第二畫面F2中每個畫素P所儲存的畫素電壓大 小之示意圖。 第4圖列出每條資料線d上,各畫素P於維持畫素電壓之 時間内,所感受到對應的資料線D上,畫素電壓變化之等效電 鲁壓均方根值。 第5圖列出每個畫素P之畫素電極與資料線D間之電壓 差。 第6圖為部分畫素陣列200之結構示意圖。 第7圖為本發明較佳實施例之液晶顯示器之示意圖。 第8圖為應用於本發明較佳實施例之液晶顯示器之驅動方 法之流程圖。 第9A圖列出一畫面時間内出每條資料線上隨著時間變化 φ 之電壓大小。 第9B圖列出一畫面時間内出每條資料線上隨著時間變化 之電壓大小。 第10 A圖列出一晝面時間内出每條資料線上隨著時間變 化之電壓大小。 第10B圖列出一晝面時間内出每條資料線上隨著時間變 化之電壓大小。 第11圖列出資料線D上畫素電壓變化之等效電壓均方根 值0 TW1948PA 16 1291150 第12圖為部分畫素陣列602之結構示意圖。 【主要元件符號說明】 20 : ί專膜電晶體 22 : 畫素電極 200 、200 :畫素陣列 102 :資料線 104 :掃瞄線 106 :畫素 600 •液晶顯不器 602 :畫素陣列 604 :資料驅動電路 606 :掃描驅動電路 D1- Ί)36 :資料線 S1〜S20 :掃描線 P : 畫素 17TW1948PA 15 1291150 [Simple description of the diagram] • Figure 1 is a schematic diagram of a conventional flip-flop matrix. Figure 2 is a schematic diagram of an example of a halogen matrix. Fig. 3A is a diagram showing the pixel voltage size stored in each pixel P in the first picture pi. Fig. 3B is a diagram showing the pixel voltage size stored in each pixel P in the second picture F2. Figure 4 shows the equivalent rms rms value of the pixel voltage change on the corresponding data line D for each pixel P on each data line d during the period of maintaining the pixel voltage. Figure 5 shows the voltage difference between the pixel electrode of each pixel P and the data line D. FIG. 6 is a schematic structural view of a partial pixel array 200. Figure 7 is a schematic view of a liquid crystal display according to a preferred embodiment of the present invention. Fig. 8 is a flow chart showing a driving method of a liquid crystal display applied to a preferred embodiment of the present invention. Figure 9A shows the voltage level of φ over time on each data line in one screen time. Figure 9B shows the voltage over time for each data line over time. Figure 10A shows the magnitude of the voltage over time on each data line over a period of time. Figure 10B shows the magnitude of the voltage over time on each data line over a period of time. Figure 11 shows the equivalent voltage rms value of the pixel voltage change on the data line D. TW1948PA 16 1291150 Figure 12 is a schematic diagram of the structure of the partial pixel array 602. [Main component symbol description] 20 : ί film transistor 22 : pixel electrode 200 , 200 : pixel array 102 : data line 104 : scan line 106 : pixel 600 • liquid crystal display 602 : pixel array 604 : data drive circuit 606 : scan drive circuit D1 - Ί) 36 : data line S1 ~ S20 : scan line P : pixel 17

TW1948PATW1948PA

Claims (1)

1291150 十、申請專利範圍 ^年h #日修(更)..絲 i_________免^让二王!^---------------------—, 查·種液晶顯不器之驅動方法,該液晶顯示器係包括一 一素陣列,该畫素陣列係為一翻轉畫素矩陣,該驅動方法包括: 金於第一時間内驅動該畫素陣列,以使該畫素陣列中之每 個旦素與上下左右相鄰之畫素具有相反極性之畫素電壓;以及 曰麵於一第二時間内,使該畫素陣列中與掃描線耦接之薄膜電 曰曰肢^均截止’並提供一第一電壓至以正極性驅動之畫素所連 資料線及提供一第二電壓至以負極性驅動之畫 資料線; 其中,一畫面時間係包括該第一時間與該第二時間。 帝胃2·如申請專利範圍第丨項所述之驅動方法,其中,該第. 包壓與該第二電壓係為正極性驅動下之最大電壓值。 f·如申請專利範圍第1項所述之驅動方法,其中,該第 一電壓係為正極性驅動下之最大電壓值,該第二電壓係為負極 性驅動下之最大電壓值。 4.如申請專利範圍第1項所述之驅動方法,其中,該第 電壓與該第二電壓係均為共同電極電屢。 •如申叫專利範圍第1項所述之騍動方法,其中,該第 -電壓係為正極性驅動下之最小電壓值,該第二電壓係為負極 性驅動下之最大電壓值。 6·如申請專利範圍第1項所述之驅動方法,其中,該 一電壓係等於該第二電壓。 Μ乐 •一種液晶顯示器之驅動方法,該液晶顯示器係包括一 晝^陣列’該晝素陣列具有Μ列Ν行畫素,該畫素陣列係與Μ 條掃描線及Ν+1條資料線電性連接,該畫素陣列中相鄰的兩 畫素係分別與第1條至第則㈣料線及第2條至第n+1條資料 TW1948PA 1291150 線電性連接,該驅動方法包括: 於一第一時間内,依序從該第一條掃描線掃描至該第Μ條 掃描線,同時藉由該Ν+1條資料線驅動該畫素陣列,以使該畫 素陣列中之每個畫素與上下左右相鄰之畫素具有相反極性之晝 素電壓;以及 於一第二時間内,使該畫素陣列中與該Μ條掃描線耦接 之薄膜電晶體係均截止,並提供一第一電壓至以正極性驅動之 畫素所連接之資料線及提供一第二電壓至以負極性驅動之畫素 所連接之資料線; 其中’一晝面時間包括該第一時間與該第二時間。 8.如申請專利範圍第7項所述之驅動方法,其中,該第 一電壓與該第二電壓係為正極性驅動下之最大電壓值。 9·如申請專利範圍第7項所述之驅動方法,其中,該第 一電壓係為正極性驅動下之最大電壓值,該第二電壓係為負極 性驅動下之最大電壓值。 1〇·如申請專利範圍第7項所述之驅動方法,其中,該第 電壓與該第二電壓係均為共同電極電壓。 11 ·如申請專利範圍第7項所述之驅動方法,其中,該第 一電壓係為正極性驅動下之最小電壓值,該第二電壓係為負極 性驅動下之最大電壓值。 12·如申請專利範圍第7項所述之驅動方法,其中,該第 一電壓係等於該第二電壓。 13· 一種液晶顯示器,包括: 一晝素陣列,具有Μ列Ν行畫素,Μ、Ν係為正整數; Μ條掃描線; N+1條資料線’該畫素陣列係與Μ條掃描線及Ν+1條資 TW1948PA 19 1291150 料線電性連接,該畫素陣列中相鄰的兩例…分別與 至第N條資料線及第2條至第_條:#料線電性連接; 一資料驅動電路’經由該N+1條資料線與該畫素陣列電性 連接,並用以輸出一第一電壓與一第二電壓;以及 、一掃描驅動電路,經由該Μ條掃描線與該晝素陣列電性 連接’並用以輸出掃描訊號; ^其中,於一第一時間内,該掃描驅動電路依序從該第一條 柃描線掃描至該第]^條掃描線,同時該資料驅動電路經由該 Ν+1條貢料線驅動該晝素陣列,以使該晝素陣列中之每個畫素 與上下左右相鄰之晝素具有相反極性之晝素電壓; 其中,於一第二時間内,該掃描驅動電路使該畫素陣列/ 中,與該Μ條掃描線耦接之薄膜電晶體係均截止,並且該資料 驅動電路輸出該第一電壓至以正極性驅動之畫素所連接之該些 資料線及輸出該第二電壓至以負極性驅動之畫素所連接之該些 資料線’一畫面時間包括該第一時間與該第二時間。 14·如申請專利範圍第13項所述之顯示器,其中,該第 一電壓與該第二電壓係為該正極性驅動下之最大電壓值。 I5·如申請專利範圍第13項所述之顯示器,其中,該第 一電壓係為正極性驅動下之最大電壓值,該第二電壓係為負極 性驅動下之最大電壓值。 16·如申請專利範圍第13項所述之顯示器,其中,該第 一電壓係等於該第二電壓。 17·如申請專利範圍第π項所述之顯示器,其中,該第 一電壓與該第二電壓係均為共同電極電壓。 TW1948PA 20 1291150 ι 18.如申請專利範圍第13項所述之顯示器,其中,該第一 電壓係為正極性驅動下之最小電壓值,該第二電壓係為負極性 驅動下之最大電壓值。 TW1948PA 211291150 X. Application for patent scope ^year h #日修(more)..丝i_________免免让二王!^----------------------, The driving method of the liquid crystal display device comprises: a pixel array, wherein the pixel array is a flip pixel matrix, the driving method comprises: driving the pixel array in a first time, So that each pixel in the pixel array has a pixel voltage of opposite polarity to the pixels adjacent to the upper, lower, left and right sides; and the surface of the pixel array is coupled to the scan line in a second time. The thin film is turned off and provides a first voltage to the data line connected to the pixel driven by the positive polarity and provides a second voltage to the data line driven by the negative polarity; wherein, one picture time is included The first time and the second time. The driving method according to the invention of claim 2, wherein the first voltage and the second voltage are the maximum voltage values under positive driving. The driving method according to claim 1, wherein the first voltage is a maximum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. 4. The driving method according to claim 1, wherein the first voltage and the second voltage are both common electrode. The sway method of claim 1, wherein the first voltage is a minimum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. 6. The driving method of claim 1, wherein the voltage is equal to the second voltage. Μ乐• A method of driving a liquid crystal display, the liquid crystal display comprising an array of pixels, the pixel array having a matrix of pixels, the pixel array and the scan line and the Ν1 data line The two adjacent pixels in the pixel array are electrically connected to the first to fourth (four) feed lines and the second to n+1th data TW1948PA 1291150, and the driving method includes: a first time, sequentially scanning from the first scan line to the scan line, and driving the pixel array by the Ν+1 data lines, so that each of the pixel arrays The pixel has a pixel voltage of opposite polarity to the pixel adjacent to the upper, lower, left and right sides; and the thin film electro-crystal system coupled to the scan line of the pixel array is turned off and provided in a second time period a first voltage to the data line connected by the pixel driven by the positive polarity and a second voltage to the data line connected to the pixel driven by the negative polarity; wherein 'the one time includes the first time and the The second time. 8. The driving method of claim 7, wherein the first voltage and the second voltage are maximum voltage values under positive polarity driving. 9. The driving method according to claim 7, wherein the first voltage is a maximum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. The driving method of claim 7, wherein the first voltage and the second voltage are both common electrode voltages. The driving method according to claim 7, wherein the first voltage is a minimum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. 12. The driving method of claim 7, wherein the first voltage is equal to the second voltage. 13· A liquid crystal display comprising: a pixel array having a matrix of pixels, a Μ and a Ν are positive integers; a scan line of the ;; N+1 data lines ‘the pixel array and the Μ scan Line and Ν 条1 TW1948PA 19 1291150 The material line is electrically connected. The two adjacent cases in the pixel array are electrically connected to the Nth data line and the 2nd to the _th: #料线 respectively. a data driving circuit 'electrically connected to the pixel array via the N+1 data lines, and configured to output a first voltage and a second voltage; and a scan driving circuit via the scan line and the scan line The pixel array is electrically connected and used to output a scan signal; wherein, in a first time, the scan driving circuit sequentially scans from the first scan line to the scan line, and the data The driving circuit drives the pixel array via the Ν+1 tributary line, so that each pixel in the pixel array has a pixel voltage of opposite polarity to the pixel adjacent to the upper, lower, left and right sides; Two times, the scan drive circuit makes the pixel array / in, with the Μ The thin film electro-crystal system coupled to the scan line is turned off, and the data driving circuit outputs the first voltage to the data lines connected by the pixels driven by the positive polarity and outputs the second voltage to the picture driven by the negative polarity The data lines connected by the primes include a first time and a second time. The display of claim 13, wherein the first voltage and the second voltage are maximum voltage values of the positive polarity drive. The display of claim 13, wherein the first voltage is a maximum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. The display of claim 13, wherein the first voltage is equal to the second voltage. The display of claim π, wherein the first voltage and the second voltage are common electrode voltages. The display of claim 13, wherein the first voltage is a minimum voltage value driven by a positive polarity, and the second voltage is a maximum voltage value driven by a negative polarity. TW1948PA 21
TW94107215A 2005-03-09 2005-03-09 Liquid crystal display and driving method therefore TWI291150B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI398840B (en) * 2009-10-12 2013-06-11 Au Optronics Corp Organic light emitting display having a power saving mechanism
TWI408654B (en) * 2008-01-11 2013-09-11 Japan Display Central Inc Liquid crystal display apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI408654B (en) * 2008-01-11 2013-09-11 Japan Display Central Inc Liquid crystal display apparatus
TWI398840B (en) * 2009-10-12 2013-06-11 Au Optronics Corp Organic light emitting display having a power saving mechanism

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