1290377 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種發光結構，特別是指一種高效率 的發光結構。 【先前技術】 過去十年間，固態發光技術的出現使得高亮度發光二 極體（Light Emitting Diode ;簡稱LED)的製造快速的進展， 而發光二極體也為日益增加的相關照明能源需求的經濟有 效解決方案上，帶來了希望；隨著先進的發光二極體技術 的發展，能源的消耗也將顯著的減少。 發光一極體的效能受到半導體結構的内在效率和光取 出效率（light extraction efficiency)所支配，隨著高效能的金 屬有機氣相沈積（Metal_Organic Chemical Vapor Deposition ; 間稱MOCVD)、液相蠢晶成長（Liquid Phase Epitaxial ;簡稱 LPE)和分子束磊晶法（Molecular Beam Epitaxy;簡稱 MBE) 的發展，内在效率幾可達100%，但是發光二極體的光取出 效率則仍有很大的空間需要改進。 光取出效率反映了從發光二極體内部逃脫進入周遭介 質的能力。例如，相較於空氣的折射率1和環氧樹脂 (epoxy)的折射率 1.5 ’ 填化鎵基礎（Gallium phosphide-based) 材料的折射率接近於3·4 ;如此將分別導致相對於空氣的臨 界角為17度，相對於環氧樹脂的臨界角為25度，若考慮 單一界面，僅有入射進入空氣之光的2%和入射進入環氧樹 脂之光的4%被取出。與氮化鎵基礎（Gallium nitride-based) 5 1290377 材料之折射率接近於2.3比較，其結果是進人空氣的臨界角 為26度，進入環氧樹脂的臨界角為41度，若考慮單一界 面，僅有入射進入空氣之光的5%和入射進入環氧樹脂之光 ， @ 12%被取[其餘將被反射進人半導體，而後被再吸收 或回收，並遭致元件效能衰減。 加發光二極體的光取出效率是用來增加發光二極體 免度的-種常用方法，其方法例如有表面質地、格狀薄膜（ .· 美國第5’779,924號專利)、修改晶粒幾何形狀(美國第 • 6,323,063號號專利），及光子晶體結構（美國第5,955,749號 - 專利）等口 ) 一種增進發光二極體光取出效率的提議包含移去吸收 物質並以一反射鏡來取代，留下來的可發光的半導體薄膜 易碎而無法成為一個單獨的元件，因此在移去基板之後需 要支撐。已知傳統紅光（AlGalnP)和藍光（InGaN)發光二極 體是分別成長在N+砷化鎵（GaAs)和藍寶石（sapphire)基板 φ 上，其主要的缺點之一是熱傳導率不佳，砷化鎵和藍寶石 的熱傳導率分別為50和40 w/m°K。明顯地，基於熱散之故 / ’以高熱傳導率載體如矽（150 或銅（4〇〇 w/m〇K)來取 • 代砷化鎵或藍寶石，將顯著的改善發光二極體的效能。 然而’上述載體的熱膨脹係數（Coefficient of Thermal Expansion;簡稱CTE)遠大於神化鎵和藍寶石，直接將坤化 鎵或氮化鎵（GaN)基礎發光二極體連結於矽或銅載體上將導 致高應力而使得發光二極體碎裂。晶圓連結技術已於美國 第6,221，683號和第6,258,699號專利提出，其利用了高溫 6 1290377 而上述的先前技 合金來連結，例如AuSn/Au和AuBe/Au。 術的元件皆面臨高連結應力和高成本的難題1290377 IX. Description of the Invention: TECHNICAL FIELD The present invention relates to a light-emitting structure, and more particularly to a highly efficient light-emitting structure. [Prior Art] Over the past decade, the emergence of solid-state lighting technology has led to rapid advances in the manufacture of high-brightness LEDs (LEDs), which are also increasingly economical for related lighting energy needs. The effective solution brings hope; with the development of advanced light-emitting diode technology, energy consumption will also be significantly reduced. The performance of a light-emitting body is governed by the intrinsic efficiency of the semiconductor structure and the light extraction efficiency, with high-performance metal-organic vapor deposition (Metal_Organic Chemical Vapor Deposition; MOCVD), liquid phase stupid growth ( The development of Liquid Phase Epitaxial (LPE) and Molecular Beam Epitaxy (MBE) has an intrinsic efficiency of up to 100%, but there is still much room for improvement in the light extraction efficiency of the LED. . The light extraction efficiency reflects the ability to escape from the interior of the light-emitting diode into the surrounding medium. For example, the refractive index of air 1 and the refractive index of epoxy are 1.5 '. The refractive index of a gallium phosphide-based material is close to 3.4; this will result in air, respectively. The critical angle is 17 degrees, and the critical angle with respect to the epoxy resin is 25 degrees. If a single interface is considered, only 2% of the light incident into the air and 4% of the light incident into the epoxy resin are taken out. Compared with the gallium nitride-based 5 1290377 material, the refractive index is close to 2.3. The result is that the critical angle of entering the air is 26 degrees, and the critical angle of entering the epoxy resin is 41 degrees. Only 5% of the light entering the air and the light entering the epoxy, @12% is taken [the rest will be reflected into the human semiconductor, and then reabsorbed or recovered, and the component performance is attenuated. The light extraction efficiency of the light-emitting diode is a common method for increasing the degree of freedom of the light-emitting diode, and the method is, for example, a surface texture, a lattice film (. US Pat. No. 5,779,924), modifying the crystal grain. Geometry (U.S. Patent No. 6,323,063), and Photonic Crystal Structure (U.S. Patent No. 5,955,749 - Patent). A proposal to improve the light extraction efficiency of a light-emitting diode involves removing the absorbing material and replacing it with a mirror. The remaining illuminable semiconductor film is fragile and cannot be a separate component, so support is required after removal of the substrate. It is known that conventional red (AlGalnP) and blue (InGaN) light-emitting diodes are grown on N+ gallium arsenide (GaAs) and sapphire substrates φ, respectively. One of the main disadvantages is poor thermal conductivity, arsenic. The thermal conductivity of gallium and sapphire is 50 and 40 w/m °K, respectively. Obviously, based on heat dissipation / 'high thermal conductivity carrier such as germanium (150 or copper (4〇〇w/m〇K) to replace gallium arsenide or sapphire, will significantly improve the light-emitting diode However, 'the coefficient of thermal expansion (CTE) of the above carrier is much larger than that of deuterated gallium and sapphire, directly connecting the gallium or gallium nitride (GaN) basic light-emitting diode to the tantalum or copper carrier. The high-stress causes the light-emitting diode to be broken. The wafer bonding technique has been proposed in U.S. Patent Nos. 6,221,683 and 6,258,699, which utilize high temperature 6 1290377 and the prior art alloys described above, such as AuSn/Au. And AuBe/Au. The components of the operation are faced with the problem of high joint stress and high cost.
晶圓連結技術另-項主要的挑戰是降低接觸金屬面積 但又不損及電流的擴散。光子的重覆使用增加了光取出效 率，但亦要求在發光二極體中需有最小的吸收中心。 AlGaInP基礎的發光二極體的内在效率已接近1〇〇%，其主 要的吸收來自於接觸金屬，不論是p或N接觸，皆有相當 高的吸收；在N側朝上的發光二極體中，透過均勻分佈在 整個發光二極體表面的細微接觸可減低在p側上的歐姆接 觸0 然而，在打線連結時，於N側需要直徑至少丨〇〇微米 的接觸焊墊，如此大的焊墊不僅阻礙了光，而且也造成了 喬光一極體光取出效率的惡化。現在已在使用中或已被提 出的元件，沒有一種可完全滿足以上所描述的難題，而本 發明則是提出一種具成本效益且創新的方法來解決所述的 難題。 【發明内容】 一發光裝置的效能可藉由附著至一半導體結構來改善 而此半導體結構具有一發光二極體、一具有一熱傳率高 於使用之結構的熱傳導率的載體，及/或一可以被使用、且 其具有一介於該載體之熱膨脹係數和該結構之熱膨脹係數 的實質不匹配性的載體。在一較佳實施例中，該介於該載 體之熱膨脹係數和該結構之熱膨脹係數的不匹配性至少為 10%。此載體較佳地取代半導體結構所成長之基板。該結構 1290377 有複數凹槽和一使該結構附著於該載體的應力吸收物質 ，如此使其實質上填入所述之凹槽。這將降低該半導體結 構和該载體於一熱製程附著結合時的應力，而不管其彼此 間不同的熱傳導率及/或熱膨脹係數。 ，將半導體晶圓附著於一載體上時，一半導體晶圓和 -載體是於一真空腔中進行，大體上均勻的壓力和溫度引 入導體晶圓和該載體以製造一強而勻的連結，其中壓 力是單方向性或等麗的。 在利用本發明另一概念之較佳實施例中，一用以供 -電流至一含有發光二極體的導電網絡將使該二極體射出 光。該網絡包含複數呈陣列狀的金屬接觸，其中，在此陣 列中，該等接觸之至少一些接觸的每一個接觸不互相接觸 ，且該等接觸與該半導體結構形成歐姆接觸。一個導電物 質連接上述接觸。較佳地，前述物質相對於該二極體射出 之光是光反射或實質穿透。 上述特徵可以個別獨立僅用$ 使用或以任何形式組合以增強 效能。 【實施方式】 晶圓連結技術主要的挑戰夕 \丄 一 文幻洮戟之一即在選擇一具經濟效益 且具有高熱傳導率和與發光二極 、 從體之熱膨脹係數相匹配的 載體。為了降低因發光二極體牙 、、 隨和载體之間熱膨係數不匹配 造成之應力，較佳地是使用_低、、四 m，皿的連結製程。低溫焊料 如 In、Sn、Pb/Sn、Au/Sn 是比於人m + b季又合適用來連結發光二極體 和載體。在低的連接結溫度時，截 又了，載體和發光二極體之間的 1290377 應力相對較低。應力也可以在連結之後藉由適當的熱處理 來釋放’在晶圓連結後，原本的基板，例如碑化錄和藍寶 石可以藉由蝕刻或雷射剝離技術移除，而僅剩數微米厚、 發光二極體薄膜結構殘留在載體上。發光二極體的頂你= 常為N側）可以用電子束蒸鍍或濺鍍方式覆蓋有適當的n型 金屬，如在N+砷化鎵上的Au_Ge。而為了降低半"導體和前 述N型金屬之間的電阻值，一個適當熱理程序是需要的，’ 通常於一如氮氣的内在氣氛，而高溫如36〇t。·在熱處理程 序時，應力將於薄膜發光二極體、連結金屬（如焊料）和載體 之間產生，如無適當的應力處理，發光二極體薄膜傾向褶 皺或碎裂。如何產生一在高溫熱處理程序中仍可存活且〆 #賴的薄膜發光二極體元件是晶圓連結技術的另一項挑戰 〇 本發明揭露了一種降低因薄膜半導體、連結膜和新載 體之間的熱膨脹係數不匹配而產生的應力的連結方法。此 方法增加了半導體膜和新載體之間的連結強度，同時也增 加了元件的熱散能力。利用進入半導體膜的凹槽和高熱^ 導率、咼熱脹係數物質（如連結層）的填入，在半導體^上產 生了「穩固效u此，在半導體膜和新載體之間的連結 得以增強。 當填入凹槽内物質之熱傳導率大於半導體物質之熱傳 導率時，此種元件的熱散能力大於沒有凹槽圖像之傳Ζ膜 。本發明提供經改善過連結強度、較佳的熱散和較高的光 取出效率。 1290377 本《月亦揭不-種晶圓連結和一種N型金屬熱處理方 法，其利用-彈性膜來對發光二極體產生真空密封 氣壓，藉由該彈性膜的支撲，在連接和熱處理程序之後 薄膜發光：極體元件可轉持平坦和避免碎裂。此連結或 熱處理方法對於此種薄膜發光二極體元件的大量生產製生 是具成本效益的。 本發明也揭露-種藉由降低形成於元件頂側電極的吸The main challenge of wafer bonding technology is to reduce the contact metal area without compromising the spread of current. The repeated use of photons increases the efficiency of light extraction, but it is also required to have a minimum absorption center in the light-emitting diode. The intrinsic efficiency of the AlGaInP-based light-emitting diode is close to 1%, and its main absorption comes from the contact metal. Whether it is p or N contact, it has a relatively high absorption; the light-emitting diode on the N side is upward. The ohmic contact on the p-side can be reduced by the fine contact uniformly distributed over the surface of the entire light-emitting diode. However, when the wire is bonded, a contact pad having a diameter of at least 丨〇〇m is required on the N-side, such a large The solder pad not only hinders the light, but also causes the deterioration of the efficiency of the body light extraction by Qiao Guang. None of the components that are currently in use or have been proposed can fully satisfy the above-described problems, and the present invention proposes a cost-effective and innovative method to solve the problems described. SUMMARY OF THE INVENTION The performance of a light-emitting device can be improved by attaching to a semiconductor structure having a light-emitting diode, a carrier having a heat transfer rate higher than that of the structure used, and/or A carrier that can be used and which has a substantial mismatch between the coefficient of thermal expansion of the carrier and the coefficient of thermal expansion of the structure. In a preferred embodiment, the mismatch between the coefficient of thermal expansion of the carrier and the coefficient of thermal expansion of the structure is at least 10%. This carrier preferably replaces the substrate from which the semiconductor structure is grown. The structure 1290377 has a plurality of grooves and a stress absorbing material that causes the structure to adhere to the carrier such that it substantially fills the grooves. This will reduce the stress of the semiconductor structure and the carrier when it is bonded to a thermal process, regardless of the thermal conductivity and/or coefficient of thermal expansion that are different from each other. When the semiconductor wafer is attached to a carrier, a semiconductor wafer and carrier are carried out in a vacuum chamber, and substantially uniform pressure and temperature are introduced into the conductor wafer and the carrier to create a strong and uniform bond. The pressure is unidirectional or equal. In a preferred embodiment utilizing another aspect of the present invention, a conductive network for supplying current to a light-emitting diode will cause the diode to emit light. The network includes a plurality of metal contacts in an array, wherein in the array, each of the contacts of at least some of the contacts does not contact each other and the contacts form an ohmic contact with the semiconductor structure. A conductive substance connects the above contacts. Preferably, the light of the foregoing material is reflected or substantially penetrated relative to the light emitted by the diode. The above features can be individually and independently used only for $ or in any combination to enhance performance. [Embodiment] One of the main challenges of wafer bonding technology is to select a carrier that is economical and has high thermal conductivity and matches the thermal expansion coefficient of the light-emitting diode and the body. In order to reduce the stress caused by the mismatch of the thermal expansion coefficient between the light-emitting diode teeth and the accompanying carrier, it is preferable to use a connection process of _low, four m, and a dish. Low-temperature solders such as In, Sn, Pb/Sn, and Au/Sn are suitable for connecting the light-emitting diodes and carriers to the human m + b season. At low junction junction temperatures, the 1290377 stress between the carrier and the light-emitting diode is relatively low. Stress can also be released by appropriate heat treatment after bonding. After the wafer is bonded, the original substrate, such as the tablet and sapphire, can be removed by etching or laser stripping, leaving only a few microns thick and glowing. The diode film structure remains on the carrier. The top of the LED (of the N side) can be covered with an appropriate n-type metal by electron beam evaporation or sputtering, such as Au_Ge on N+ gallium arsenide. In order to reduce the resistance between the semi-quota conductor and the aforementioned N-type metal, a suitable thermal process is required, 'usually in an intrinsic atmosphere such as nitrogen, and a high temperature such as 36 〇t. • During the heat treatment process, stress is generated between the thin film light-emitting diode, the joint metal (such as solder), and the carrier. If there is no proper stress treatment, the light-emitting diode film tends to wrinkle or chip. How to create a thin-film light-emitting diode component that is still alive in a high-temperature heat treatment process is another challenge of wafer bonding technology. The present invention discloses a reduction between a thin film semiconductor, a bonding film, and a new carrier. The method of joining the stresses caused by the mismatch in the coefficient of thermal expansion. This method increases the bonding strength between the semiconductor film and the new carrier, and also increases the heat dissipation capability of the device. By using a recess into the semiconductor film and filling with a high thermal conductivity and a thermal expansion coefficient material (such as a tie layer), a "stabilization effect" is generated on the semiconductor, and the connection between the semiconductor film and the new carrier can be achieved. When the thermal conductivity of the substance filled in the groove is greater than the thermal conductivity of the semiconductor material, the heat dissipation capability of the element is greater than that of the film without the groove image. The present invention provides improved over-bond strength, preferably Heat dissipation and higher light extraction efficiency. 1290377 This month also discloses a wafer connection and an N-type metal heat treatment method, which uses an elastic film to generate a vacuum sealing gas pressure to the light-emitting diode, by which the elasticity Film splicing, film illuminating after bonding and heat treatment procedures: polar body components can be flattened and prevented from chipping. This joining or heat treatment method is cost effective for mass production of such thin film luminescent diode components. The invention also discloses a method for reducing the absorption formed on the top side electrode of the element.
收而增加發光二極體的光取出效率的方法。藉由對於局部 區域小島狀的吸收金屬的高溫熱處理產生歐姆接觸。這些 區域化金屬®像分佈在半導體元件的表面，且由高反射: 的金屬來連接。元件整體的吸收因而降低，而光取出效率 也得以提昇。 本發明也引入了一些規則的表面圖像，如在半導體膜 上之光子能階（Photonic Band Gap)結構和微透鏡陣列來加強 光取出效率。光取出機制也更進一步的被一位晶圓連結界 面的高反射鏡來加強。 此處所述之特徵可以單獨的被使用或與其他特徵結合 共用。而本發明之概念和其優點可以由以下的詳細說明和 其圖式得到清楚的了解。而在本發明被詳細描述之前，要 注意的是’在以下的說明内容中，類似的元件是以相同的 編號來表示。 圖5說明了 一典型的三五族物質的磊晶結構。金屬有 機化學氣相沈積和分子束磊晶可以精確的控制物質的特性 和其生長條件。由於不同層之高濃度摻雜，一般大於， 10 1290377 使得在該結構中内部擴散的傾向性可能會非常的高，反而 會影響蠢晶層的結晶品質。為了達到結晶品質，N型摻雜層 首先成長’然後依序是主動層和P型摻雜層的成長。A method of increasing the light extraction efficiency of a light-emitting diode. An ohmic contact is produced by a high temperature heat treatment of the localized island-shaped absorbing metal. These regionalized metal® images are distributed on the surface of the semiconductor component and are connected by a highly reflective metal. The absorption of the entire element is thus reduced, and the light extraction efficiency is also improved. The present invention also introduces some regular surface images, such as photonic band Gap structures on semiconductor films and microlens arrays to enhance light extraction efficiency. The light extraction mechanism is further enhanced by a high mirror of a wafer bonding interface. Features described herein may be used alone or in combination with other features. The inventive concept and its advantages are apparent from the following detailed description and drawings. Before the present invention is described in detail, it is to be noted that in the following description, similar elements are denoted by the same reference numerals. Figure 5 illustrates the epitaxial structure of a typical tri-five material. Metal organic chemical vapor deposition and molecular beam epitaxy can precisely control the properties of the material and its growth conditions. Due to the high concentration of different layers, it is generally larger than 10 1290377. The tendency of internal diffusion in this structure may be very high, which may affect the crystalline quality of the stupid layer. In order to achieve the crystal quality, the N-type doped layer is first grown' and then sequentially the growth of the active layer and the P-type doped layer.
一緩衝層（buffer layer) 110首先成長於基板1〇〇上，以 確保良好的結晶性質和該結構的最佳磊晶品質。在該層1 i 〇 的頂面沈積一蝕刻終止層12〇,該層預防當基板移除時發光 二極體結構受到損傷。下一層為η接觸層130，接下來是一 η隔絕層（space layer)14〇。接下來步驟包括一 η被覆層或波 導層150、一主動層16〇，和一 ρ被覆層（cladding⑽邱波 導層（waveguide layer)170。此三層 15〇、16〇、17〇 的性質（ 厚度、形變、摻雜，折射係數）的設計將決定發光二極體結 構的性質。最後’一開口層(wind〇w layer)18〇成長於該結 構的最上方以確保電流可良好的擴散到整個發光二極體， 該開口層180的厚度範圍從一到數十個微米。為了要形成 -個較好的歐姆接觸而具有p接觸金屬的接觸層細(見圖 6)選擇性地加在該開口層18()的頂面。 圖5之基板是可為—高吸收基板，如料她㈣發 光二極體0㈣’或者為—差的熱導體’如用於她㈣ 膜的藍寶石。基板刚’如砂化鎵或藍寶石，其熱傳導率分 別約為50和.40 w/m〇K。明顯地，以高熱傳導率㈣㈣ 050 W，或銅（彻w/mQK)來取料域或 的改善發光二極體的效能》 將頌者 而其將在以 因此，需#一種經改善的晶圓連結㈣ 下的說明中做介紹。 11 1290377 ^槽和組合反射鏡 直接將GaAs或GaN基礎之發光二極體連結至如si、 Cu/Si或Cu的載體上，由於發光二極體之熱膨脹係數不匹 配和發光一極體裂縫的因素，將產生高應力。晶圓連結技 術主要挑戰之-是選擇一高成本效益且具有高熱導性和與 發光二極體之熱膨脹係數匹配的載體。為了改連結強度並 ， #放在高溫連結製程中產生的應力，該半導體膜包含圖像 — 化且填有高熱傳導率物質的凹槽。 - 參閱圖6，在本發明之一較佳實施例，一部分的凹槽 261是如圖6所示的在半導體薄膜上蝕刻而成，前述凹槽 261 —般是穿過開口層18〇且同時進入被覆層17〇。在一些 狀況中，所述凹槽261非常靠近主動層16〇，甚至是穿過它 。除了增加光取出效率，這些凹槽還有兩個重要的功能： 其一，由於軟性物質填入所述凹槽中，使得應力得以釋放 # ，進而確保半導體結構和新載體之間的連接強度；其二， 填入高熱傳導物質亦可改善元件的熱散能力。 • 從主動層16〇產生之光激發許多傳播於發光二極體晶 _ 粒内的電磁模態，其部分被限制在主動層160和被覆層/ = 導層170之間，部分傳播於晶粒的開口層180内。在前述 的光學模態中，一部分會到達開口層丨8〇和周遭介質（例如 空氣）的界面而離開元件，而大部分則不會。因此，大量從 主動層160射出之光，在其被重覆使用或被吸收前，會被 捕捉限制在開口 180層内。而AlInGaP物質的再復合長声 12 1290377 約為30微米’因此，必需找出一種方法，使得由這些模態 所搭載的光可以在再復合長度内被重覆使用或被吸收前， 迅速的離開元件。其中一 方法即是利用褶皺的光學界面來 中加入.凹槽，如此將會 微擾這些模態，例如於光傳播物質 改變傳播特性而使得由這些模態搭載的光離開元件。A buffer layer 110 is first grown on the substrate 1 to ensure good crystalline properties and optimum epitaxial quality of the structure. An etch stop layer 12 is deposited on the top surface of the layer 1 i 〇 which prevents damage to the light-emitting diode structure when the substrate is removed. The next layer is the η contact layer 130, followed by a η space layer 14 〇. The next step includes an n-cladding layer or waveguide layer 150, an active layer 16A, and a ρ-cladding layer (waveguide layer) 170. The properties of the three layers 15〇, 16〇, 17〇 (thickness) , deformation, doping, refractive index) design will determine the properties of the light-emitting diode structure. Finally, a 'window layer' 18〇 grows at the top of the structure to ensure that the current can spread well throughout a light-emitting diode having a thickness ranging from one to several tens of micrometers. A contact layer having a p-contact metal (see FIG. 6) is selectively added to form a good ohmic contact. The top surface of the opening layer 18(). The substrate of Fig. 5 is a high-absorption substrate, such as a (four) light-emitting diode 0 (four) 'or a poor thermal conductor' such as a sapphire for her (four) film. 'As for gallium sulphide or sapphire, the thermal conductivity is about 50 and .40 w/m 〇 K. Obviously, the high heat conductivity (4) (four) 050 W, or copper (complete w/mQK) to reclaim the area or improve The efficacy of the light-emitting diode will be the latter and it will be The description of the improved wafer bond (4) is described in the description. 11 1290377 ^Slot and combined mirror directly connect the GaAs or GaN-based light-emitting diode to a carrier such as Si, Cu/Si or Cu due to the light-emitting diode The thermal expansion coefficient of the body does not match and the crack of the light-emitting body will cause high stress. The main challenge of the wafer bonding technology is to choose a cost-effective and high thermal conductivity and match the thermal expansion coefficient of the light-emitting diode. In order to change the bonding strength and to place the stress generated in the high temperature bonding process, the semiconductor film contains an image-forming groove filled with a material having a high thermal conductivity. - Referring to Figure 6, one of the preferred embodiments of the present invention is preferred. In the embodiment, a portion of the recess 261 is etched on the semiconductor film as shown in FIG. 6, and the recess 261 generally passes through the opening layer 18 and simultaneously enters the cladding layer 17 〇. In some cases, The groove 261 is very close to the active layer 16〇, even through it. In addition to increasing the light extraction efficiency, these grooves have two important functions: First, due to the filling of the soft substance into the groove, The force is released #, thereby ensuring the strength of the connection between the semiconductor structure and the new carrier; second, filling the high thermal conductivity material can also improve the heat dissipation capability of the component. • The light generated from the active layer 16 激发 excites many of the propagation in the luminescence The electromagnetic mode within the polar body granules is partially confined between the active layer 160 and the cladding layer / = conductive layer 170 and partially propagated within the opening layer 180 of the die. In the optical mode described above, a portion It will reach the interface of the opening layer 丨8〇 and the surrounding medium (such as air) and leave the component, and most will not. Therefore, a large amount of light emitted from the active layer 160 will be used before it is reused or absorbed. It is trapped within the opening 180 layer. The recombination of the AlInGaP material is 12 1290377, which is about 30 microns. Therefore, it is necessary to find a way to allow the light carried by these modes to be re-used in the recombination length or to be quickly removed before being reabsorbed. element. One of the methods is to use the optical interface of the pleats to add the grooves, which will perturb these modes, for example, the light-transmitting material changes the propagation characteristics so that the light carried by these modes leaves the element.
在本發明之-較佳實施例，如圖2c之標號加和圖^ 之26卜凹槽輪廓是藉由在半導體膜向開口層⑽之適當的 結晶方向蝕刻而成’開口層180的厚度需足夠厚以使得電 流得以良好的擴散而且有足夠的空間得以製造凹槽261。一 至數十微米的厚度皆可使用，而基於晶格結構f凹槽的姓 刻表面將變得平滑。接下來’凹槽表面將被覆蓋—層反射 鏡’其反射性質主要地由表自的平整度來決定。如此具有 褶皺的反射鏡會增強光取出效率。 、 如圖2a，凹槽輪廓261可以是濃密陣列所構成的平行 線，而平行線是橫跨晶粒表面且均勻的分佈。圖k是圖。 的一剖面視圖，前述之線較佳地是形成於半導體薄膜上的v 型凹槽，而其線寬從i至3〇微米。在圖2c中，凹槽線2幻 的深度典型地在數百個奈米至數百個微米。藉由一在發光 結構中不同層之高_選擇比或藉由精確的控㈣刻參數 可以有效的控制凹槽的深度。例如圖6所示，在開口層; 和波導及/或被覆層17〇之間的高蝴選擇比可藉由^刻 方式和乾蝕刻氣體來達成，開口層18〇例如可為、 A1GaAs和其相似物，波導及/或被覆層170例如可為A1As 、AlInGaP和其相似物，溼蝕刻方式如重鉻酸鉀、乙酸和溴 13 1290377 化氫之混合，乾蝕刻氣體如氣電漿。凹槽較佳地同時穿過 開口層180和p被覆層17〇。在另一施例，凹槽可穿透主= 層160’甚至是進人n被覆層15()，但是深層穿透有會產生 電流漏電路徑的缺點，反而會影響元件可靠度。圖2d顯示 了經過蝕刻後的元件的三維透視圖。而圖2a則指出，在= 行線之間傳播的光2 6 3未被取出。 因此，在本發明之另一實施例，兩凹槽線所形成的正 交組是如圖2b所示。其中，光在沒有傳播進人p被覆層或 開口層之前，就碰觸凹槽的表面或頂面而離開發光二極體 晶粒。於是，光在更多的侷限區域被取出，因而更具有效 率〇 上述的凹槽具有機構上和光學上的優點。首先，在機 構上可保證半導體結構和新載體間的連結強度，以及因金 屬填入凹槽而具有良好的熱散性質。而在光學上亦可強化 光的取出。而為了達到此目的，高反射鏡於凹槽的表面被 製成。 在發光二極體表面製備金屬反射鏡或混成反射鏡，如 介電層和一高金屬反射層之組合已經發表，如「 T.Gessmann, E. Fred Schubert, J. Graff, K. Streubel Light-Emitting Diodes: Research, Manufacturing, and Applications VII，Proc. SPIE，vol. 4996, p26」 接下來將描述本發明之歐姆接觸和高反射組合鏡的製 備。圖6說明了一 p金屬接觸200 .是藉由電子束蒸鍍或濺 鍍’並配合典型的光罩製程在前述之表面的局部區域沈積 14 1290377 而成。以氮化鎵基礎元件為例說明，p金屬2〇〇可為具有非 常高吸收的Pt、Ti和Au，或者高反射的AuZn、AuBe，或 者疋半穿透金屬，如薄Ni〇/Au和Pd/Pt層。 形成低電阻p歐姆接觸之熱處理的溫度和時間分別從 350 C至500 C和幾秒至數分鐘。一但歐姆接觸形成時，由 於歐姆接觸金屬的融合，歐姆接觸金屬的反射率通常會下 降，且降至50%之多。因此要選擇正確的熱處理條件以使 反射率下降程度最小化而且不對元件的電性產生影響。 為了更進一步的降低因接觸金屬造成的吸收，歐姆接 觸金屬只產生在半導體膜的局部區域以降低接觸區域。如 上所述，歐姆接觸吸收主動層射出之光，係因為接觸金屬 在熱處理之後的融合。此融合增加了吸收，並減少了反射 。典型常使用的鬲反射金屬如A1InGaP結構中的或 AuZn合金，氮化蘇基礎結構中的NiQ/Au合金或薄Pd/Pt層 。圖1中蒸鍍在該表面的金屬接觸2〇〇覆蓋半導體晶粒的 0.5%至5%的區域。 如圖1，孤立的金屬島可採用不同的形狀，例如圖la 的點狀，圖ib的線狀，圖lc的橢圓形，或圖ld的方形。 參閱圖6,在這些接觸上形成夸一組合鏡255，其由透明介 電層210和高反射金屬層22〇(光反射層）所組成。p金屬接 觸200經由開設於介電層21〇之開口而連接於反射金屬層 220 〇 數種不同金屬展現了在可見光譜之高反射性，而高反 射金屬層220可為下列之任一或其組合·· a卜Ag、Au等。 15 1290377 前述金屬在波長範圍420 nm到650 nm的反射率高於8〇% ，在金屬層220和半導體層18〇、po之間介電層21〇的沈 積會提高鏡的整體反射率。在連結製程、一系列的η金屬 接觸熱處理和元件操作時，可確保穩定且無擴散的發生。 例如，介電層210可為下列任一元素的氧化物或氮化物：以 、Ta、Nb、A卜In、Mb、Sn。介電層210的厚度隨著組合 鏡255作最佳化調整以得到最佳的反射率。除了透明介電 層的光學優點，及Fabry-Per〇t型式腔體的製作以外，這層 210的存在使任何反應和内在擴散製程得以在反射層22〇和 半導體頂層180發生，於是金屬鏡的反射性得以保存。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍。例如半導體薄膜的形狀可 以為任何形式的結構，凹槽可以蝕刻至如p-GaN的薄層， 或如GaP的厚層。 連結層製備 在歐姆接觸和反射鏡的製成之後，在半導體晶圓表面 而要製成數個膜層以確保半導體晶圓連結至載體晶圓前的 馬生產製造良率。 參閱圖6，半導體膜的製備包括： 1·在半導體表面最後成長層180表面上形成一歐姆接 觸層200以產生良好電子注入條件的步驟。 2.形成圖6中261所指出的凹槽，例如圖2a中刻入半 導體膜的濃密線，以保證光取出和增加如上述連結 16 1290377 強度的步驟。 3_形成如上述組合反射鏡21〇、22〇的步驟。 4·形成阻障層23〇的步驟，其防止圖7之連結層_ 和組合鏡255之反射金屬層220的内在擴散。阻障 層、23〇典型為Cr、Ti/w《Ν,。對於特殊應用和特 殊溫度範圍的考量下，以及有關於穩定性，黏合性 的所有特f生上的要求，銳（Nb)是一個極佳的選擇， 其會阻斷組合鏡255和連結層440之間的内在擴散 〇 5·製成溼層（wet layer)24〇的步驟，其包括一層如 、Cu或Ni，此將增強連結層44〇和阻障層23〇的 黏合度。 6·對於連結製程來說，形成連結層440的步驟是重要 的。在本發明，連結層44〇可形成在載體晶圓上或 在圖6之半導體晶圓之溼層240的頂面，其方法可 為電子束蒸鍍、濺鍍或電鍍。而電鍍是具成本效益 的’其可產生金屬厚度從數十奈米至數百微米。 7·形成填充層的步驟已如上所述。此層形成在半導體 結構的凹槽内並具有高熱傳導率。此層較佳的在溼 層24〇製成之後，而在連結層440製成之前形成。 本層的目的在於藉由利甩高熱傳導物質來取代被餘 刻的半導體物質以改善熱散能力。高熱傳導物質可 為下列之任一 ：Au、Ag、Cu、Sn、In、Pb，和In the preferred embodiment of the present invention, the groove profile of FIG. 2c and the groove profile of FIG. 2 are formed by etching the semiconductor film toward the appropriate crystallographic direction of the opening layer (10) to form the thickness of the opening layer 180. It is thick enough to allow the current to spread well and there is enough room to make the groove 261. A thickness of one to several tens of micrometers can be used, and the surface of the surname based on the lattice structure f groove will be smooth. Next, the 'groove surface will be covered—the layer mirror' whose reflective properties are mainly determined by the flatness of the surface. Such a pleated mirror enhances light extraction efficiency. As shown in Fig. 2a, the groove profile 261 may be a parallel line of dense arrays, and the parallel lines are evenly distributed across the grain surface. Figure k is a diagram. In a cross-sectional view, the aforementioned line is preferably a v-shaped groove formed on the semiconductor film, and has a line width from i to 3 μm. In Fig. 2c, the depth of the groove line 2 is typically in the range of hundreds of nanometers to hundreds of micrometers. The depth of the groove can be effectively controlled by a high _ selection ratio of different layers in the illuminating structure or by precise control (four) engraving parameters. For example, as shown in FIG. 6, the high butterfly selection ratio between the opening layer and the waveguide and/or the cladding layer 17〇 can be achieved by etching and dry etching gas, and the opening layer 18 can be, for example, A1GaAs and Similarly, the waveguide and/or cladding layer 170 can be, for example, A1As, AlInGaP, and the like, wet etching such as a mixture of potassium dichromate, acetic acid, and bromine 13 1290377 hydrogen, a dry etching gas such as a gas plasma. The grooves preferably pass through the opening layer 180 and the p-cladding layer 17 at the same time. In another embodiment, the recess can penetrate the main = layer 160' or even into the n-cladding layer 15 (), but the deep penetration has the disadvantage of creating a current leakage path, which in turn affects component reliability. Figure 2d shows a three-dimensional perspective view of the etched component. Figure 2a indicates that the light 263 that propagated between the = line lines was not taken out. Thus, in another embodiment of the invention, the orthogonal groups formed by the two groove lines are as shown in Figure 2b. Wherein, the light touches the surface or the top surface of the groove and leaves the light-emitting diode die before it propagates into the p-cladding layer or the opening layer. Thus, the light is taken out in more confined areas and is therefore more efficient. The above described grooves have both mechanical and optical advantages. First, the strength of the joint between the semiconductor structure and the new carrier can be ensured on the mechanism, and the metal has a good heat dissipation property due to the filling of the groove. Optically, the removal of light can also be enhanced. To achieve this, a high mirror is formed on the surface of the recess. Preparation of metal or hybrid mirrors on the surface of a light-emitting diode, such as a combination of a dielectric layer and a high metal reflective layer, has been published, such as "T. Gessmann, E. Fred Schubert, J. Graff, K. Streubel Light- Emitting Diodes: Research, Manufacturing, and Applications VII, Proc. SPIE, vol. 4996, p26" Next, the preparation of the ohmic contact and high reflection combined mirror of the present invention will be described. Figure 6 illustrates a p-metal contact 200. It is deposited by electron beam evaporation or sputtering and is deposited in a localized area of the aforementioned surface by a typical mask process 14 1290377. Taking the GaN base element as an example, the p metal 2〇〇 can be Pt, Ti and Au with very high absorption, or AuZn, AuBe, or semi-transparent metal such as thin Ni〇/Au and highly reflective. Pd/Pt layer. The temperature and time for forming the heat treatment of the low resistance p ohmic contact are from 350 C to 500 C and several seconds to several minutes, respectively. Once the ohmic contact is formed, the reflectivity of the ohmic contact metal typically drops and drops to as much as 50% due to the fusion of the ohmic contact metal. Therefore, the correct heat treatment conditions should be selected to minimize the degree of reflectance degradation and not affect the electrical properties of the components. In order to further reduce the absorption due to the contact metal, the ohmic contact metal is only generated in a partial region of the semiconductor film to lower the contact area. As described above, the ohmic contact absorbs the light emitted by the active layer due to the fusion of the contact metal after the heat treatment. This fusion increases absorption and reduces reflection. Typical commonly used tantalum reflective metals are or AlZn alloys in the AlInGaP structure, NiQ/Au alloys or thin Pd/Pt layers in the nitrided base structure. The metal contact deposited on the surface in Fig. 1 covers a region of 0.5% to 5% of the semiconductor crystal grains. As shown in Fig. 1, the isolated metal islands may take different shapes, such as the dot shape of Fig. la, the line shape of Fig. ib, the ellipse of Fig. lc, or the square of Fig. ld. Referring to Fig. 6, a combination mirror 255 is formed on these contacts, which is composed of a transparent dielectric layer 210 and a highly reflective metal layer 22 (light reflective layer). The p metal contact 200 is connected to the reflective metal layer 220 via an opening formed in the dielectric layer 21, and a plurality of different metals exhibit high reflectivity in the visible spectrum, and the highly reflective metal layer 220 may be any of the following or Combination·· abu Ag, Au, etc. 15 1290377 The reflectivity of the aforementioned metal in the wavelength range of 420 nm to 650 nm is higher than 8〇%, and the deposition of the dielectric layer 21〇 between the metal layer 220 and the semiconductor layer 18〇, po increases the overall reflectance of the mirror. Stable and non-diffusion occurs during the bonding process, a series of η metal contact heat treatments and component operations. For example, dielectric layer 210 can be an oxide or nitride of any of the following elements: , Ta, Nb, A, In, Mb, Sn. The thickness of the dielectric layer 210 is optimized with the mirror 255 for optimum reflectivity. In addition to the optical advantages of the transparent dielectric layer and the fabrication of the Fabry-Per〇t type cavity, the presence of this layer 210 allows any reaction and intrinsic diffusion processes to occur at the reflective layer 22 and the semiconductor top layer 180, thus the metal mirror Reflectivity is preserved. However, the above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto. For example, the shape of the semiconductor film may be any form of structure, and the recess may be etched to a thin layer such as p-GaN or a thick layer such as GaP. Bond Layer Preparation After the ohmic contacts and mirrors are fabricated, several layers are formed on the surface of the semiconductor wafer to ensure horse fabrication yield before the semiconductor wafer is bonded to the carrier wafer. Referring to Figure 6, the fabrication of the semiconductor film includes: 1. The step of forming an ohmic contact layer 200 on the surface of the last grown layer 180 of the semiconductor surface to produce good electron injecting conditions. 2. Form the recess indicated by 261 in Fig. 6, such as the dense line engraved into the semiconductor film in Fig. 2a to ensure light extraction and increase the strength of the joint 16 1290377 as described above. 3_ The step of forming the combined mirrors 21A, 22A as described above. 4. A step of forming the barrier layer 23, which prevents the intrinsic diffusion of the bonding layer _ of FIG. 7 and the reflective metal layer 220 of the combining mirror 255. The barrier layer, 23 〇 is typically Cr, Ti/w, Ν. For special applications and special temperature ranges, as well as all the special requirements for stability and adhesion, Sharp (Nb) is an excellent choice that blocks combination mirror 255 and tie layer 440. Intrinsic diffusion between the layers 〇5. A step of forming a wet layer 24 , comprising a layer such as Cu or Ni, which will enhance the adhesion of the bonding layer 44 〇 and the barrier layer 23 。. 6. For the joining process, the step of forming the joining layer 440 is important. In the present invention, the tie layer 44 can be formed on the carrier wafer or on the top surface of the wet layer 240 of the semiconductor wafer of Figure 6, by electron beam evaporation, sputtering or electroplating. Electroplating is cost-effective, which produces metal thicknesses ranging from tens of nanometers to hundreds of microns. 7. The step of forming the filling layer has been as described above. This layer is formed in the recess of the semiconductor structure and has a high thermal conductivity. This layer is preferably formed after the wet layer 24 is formed and before the tie layer 440 is formed. The purpose of this layer is to improve the heat dissipation capability by replacing the semiconductor material with a remnant heat transfer material. The highly thermally conductive substance may be any of the following: Au, Ag, Cu, Sn, In, Pb, and
Cu/W 〇 17 1290377 載體準備 常用來供給三五族半導體成長之原始基板具有低的熱 傳導率。砷化鎵和石墨的熱傳導率分別為5〇 w/m〇K和4〇 w/m°K。如冑7 ’新的供半導體薄媒使用之載體4〇〇比原始 成長之基板100具有更佳的熱散特性。本文所呈現之連結 方法可使用大範圍的新載體。下列表格列出一些適用的載 體： 物質 熱膨脹係數 熱傳導率 — (ppm/°C ) (w/m°K) 砷化鎵（GaAs) 6.5 、 / 50 石墨 5.0-5.6 — 40 矽（Si) 4.1 150 銅（Cu) 17 400 銅-鉬-銅（Cu-Mo-Cu) 6.0 182 碳化矽鋁（AlSiC) 6-16 170-220 新載體述擇疋由所欲應用之需求而定，其可為下列之 任一：Si、GaAs、Cu、Al、Sic、A1SiC、Cu/M、A1N、 Ah〇3、Cu/Mo/Cu、石墨、石英和其相似物；其中M可為 Mo、W或C。例如，矽的熱膨脹係數明顯的與砷化鎵基礎 磊晶物質的熱膨脹係數不匹配，但矽的成本低而且具有良 好的表面性質和機械強度。本發明此處所描述之「穩固效 18 1290377 果」可降低並調制連結強度。另外例如，銅_鉬_銅合金的熱 膨脹係數與砷化鎵基礎和氮化鎵基礎之發光二極體物質的 熱膨脹係數完美的匹配，卻是較為昂貴。 參閲圖7，晶圓載體400之準備包括： 1 ·在載體400表面形成一產生良好歐姆性質和良好鍵 結性質之接觸層410的步驟。需有足夠厚度的接觸 層410以覆蓋載體表面的缺陷。 2·形成一阻障層的步驟。阻障層420將弱化連結強度 ’並抑制在載體400和連結層440之間的内在擴散 以避免在連結層440形成合金。阻障層420可為下 列之任一或其組合：Cr、Ti/W、Nb或其他金屬。本 發明已證明Nb因滿足所有關於穩定性和黏合性中 被要求的性質，而成為首選。而其使載體4〇〇和連 結層440之間的反應停止。 3·形成溼層430的步驟包括一通常為Au、Cu或Ni層 的蒸鍍，用以改善連結層440和阻障層420的黏合 度。此額外的層有積極地與連結層440反應並加強 連結的形態和可靠性。 4.對於連結製程，形成連結層440是重要的。分子束 蒸鍍、熱蒸鍍、共鍍、濺鍍或電鍍都適用於形成連 結層440。電鍍是具成本效益的，在本發明，其可 產生所欲之厚度從數十奈米至數百微米且耐久的連 結層。但是，其會遇到其他方法不會碰到的表面形 態不均。連結層440可形成於載體、或半導體表面 19 1290377 或兩者之上。而連結層較佳地具有低熔點和低楊 氏係數（易延展），例如錫、鉛、銦和錫金合金等。 在本發明中，連結製程是在一使連結層440到達液化 I態的溫度下進行的。在連結過程中，量的、被稱為 焊料的連結物質440被廢入圖6之半導體的凹槽261内: • 巾當前述焊料層彻凝固後則會在晶圓上造成所謂的「穩 . 固效果」’因此連結強度明顯的改善。圖8說明了載體和半 $體晶圓（見圖6)連結之後的整個結構。較佳地，焊料物質 440的熔點介於100°c至35(rc。 在本發明之一較佳實施例，由於連結層44〇之高熱膨 脹係數使得半導體發光二極體本身產生穩固效果。半導體 的熱膨脹係數通常在4至6 ppm/°c之間，而連結層的熱膨 脹係數通在20至30 ppm/t的範圍。圖8說明了由熱膨係 馨數不匹配造成的應力如箭頭之長短所示，通常延從層43〇 至層170的凹槽方向上地朝上遞減。在冷卻過程中，焊料 440比半導體膜收縮的更多，同時在半導體膜上產生穩固效 果，而連結強度、製程良率和元件可靠度也都改善了。 參閱圖1 〇，載體和半導體發光二極體晶圓總成77〇被 放置於空腔730中以進行連結或熱處理。此裝置具有一進 氣部700和一排氣部710以壓力化真空腔。一加熱器75〇 設置於一具有一咼熱傳導率的金屬基座74〇上，如此可得 到檢跨於晶圓總成770的均勻溫度分佈。前述空腔720連 20 1290377 結於-真料76G。-以高溫支樓膜製成的彈性膜72〇，如 聚酿亞胺、A1、Cu、Ni或不鏽鋼，用來做為晶圓總成· 的密封，以維持真空。當溫度升高到可連結或熱處理N金 屬以產生歐姆接觸時，-氣難應㈣晶圓總成77〇。對於 發光二極體晶圓和載體之連結，通常用的軟焊料例如為如 ，而通常連結溫度在250至400t的範圍，而堡力則從14 psi至500 psi的範圍。m 72〇厚度的選擇是使晶圓邊界一 致，0.1-30 mils的聚醯亞胺或鋁臈可以被使用，因為其具 有高熱穩定性和對發光二極體表面之膜的非黏合性。歐姆 接觸熱處理的典型溫度範圍介於3⑽至冒c。由於連結層 彻的再熔化和固態化’彈性膜72()可抗拒半導體蟲晶膜之 壓力，並且可防止其在連結製程時移動。 机動壓力（氣壓）的使用確保一橫跨於整個晶圓表面 770上的壓力均勻分佈，並使應用的壓力為等壓，如圖 之箭頭所示。彈性冑72〇使壓力從真空腔均勻的移轉至晶 圓的表面。因此沒有一般非方向性高壓裝置的楔形問題 (wedgeissue)e所以，連結較為均勻且有較高的良率。 基板移險 1 接下來，進行選擇性的移除基板。移除製程包括了下 列方法的組合.機械拋光或研磨、化學蝕刻、雷射剝離。 必須了解的是，特別在—些化學㈣的狀況，新載體可能 具有高反應性。移除製程必須選擇性地移除原始基板，例 如圖6中的標號1()()，而不損及半導體薄膜和新載體。所以 21 1290377 建議使用如圖6之終止層120的保護層，甚至在新載體上 使用保護層。一般而言，NH4〇H溶液用來移除砷化鎵，而 雷射剝離用來移除石墨基板。 N金屬和其吸收最小化 本發明的一個面向是提供一種藉由降低發光二極體之 金屬電極造成之吸收而增加光取出效率。 為了操作一發光元件，圖3a-3d之電極510,必須形成於 其上側。一但整合於一封裝件内，該電極將經由一圖3a和 圖3c之導線530而連接至一電源。此電極確保低電阻電子 注入（低電阻歐姆接觸），並提供橫跨於元件表面上之均勻電 流分佈’以確保導線與元件連結的機械強度。 上述導線連結製程要求一如圖3a和3b的金屬墊531， 其直徑通常為80 μηι至120 μιη。標準發光二極體通常為具 有表面積介於250 μηι X 250 μιη到350 μιη X 350 μιη範圍的 方形晶粒’而其意謂著，金屬墊只覆蓋整個晶粒表面積的 10%到20%。對於三五族的磷化物基礎物質，在Ν側上， 通常蒸鍍有Ge、Au和Ni的組合，並經熱處理以產生一在 金屬和半導體之間的低阻抗歐姆接觸。對AlInGaN基礎的 發光二極體，Ti、Pt、Au、A卜Mo、Pd和Ru的組合可以 形成一良好的N型歐姆接觸。圖3a-3d繪出了在打線製程 中的傳統組態’並指出一直徑通常為5〇 和1 〇〇 的導 線 530。 錯之折射率的虛數部份有著非常高的值：在 650 nm 時 22 1290377 kGe等於5.5。奈米等級的鍺會吸收任何到達金屬墊的光。 然而，鍺合金可以容忍高電流密度，故其面積大小可以有 效的降低且可保持好的歐姆接觸性質。 於是，在本發明之一較佳實施例，圖3e和3g中大量的 孤立金屬島510與磊晶半導體層形成良好的歐姆接觸，並 分佈於其表面。需注意的是，歐姆接觸非p型即N型，而 其是依鄰近孤立金屬島510之半導體層的摻雜型式而決定 。其後，一可導電的傳導層52()蒸鍍於該半導體表面上， 以連接所有的金屬島510並形成一連續的金屬網絡，進而 確保良好的注入條件和良好的電流分佈。在傳導層52〇和 半導體層的界面是非歐姆性且有高阻抗。經由連結塾和傳 導網絡層520之外接電流最後分佈到大量的孤立金屬島51〇 ，然後向下流入圖3f之主動層531。圖3f是圖 >結構中線 Π-Π的剖面視圖。因此，電流是均勻 並 有效率地於其内產生輕射™二極體長並 傳導層520之金屬可以是具高反射性或高穿透性。在高反 射性金屬的情況，例如可選擇使用八卜Au、“、a等做 為傳導層520,從主動層531射出之光是被傳導層52〇反射 回發光二極體結構内。其不是在組合冑⑸(見圖6)表面被 反射然後逃離發光二極體結構’就是被主動層再吸收。而 被主動層再吸收之光子可再發射或回收。亦言之，被反射 金屬層520反射之光可以再利用。在穿透的情況，光會直 接穿過並離開’而傳導物質可選用如銦锡氡化物剛之物 23 j29〇377 孤立的金屬可為不同的形狀，例如點狀、方形、擴圓 形或線狀。表面的覆蓋面積範圍介於02%至2%，遠低於先 刖技術之10%至20%。圖3e和3g繪出點狀的組態。高反 射金屬可為下列之任一：Au、Ag或A1。在一具體實施例中 ，孤立金屬島510和傳導網絡520之結構較佳地是以光學 微影技術來製成。 N側和P側形狀 一發光二極體的光取出效率取決於從元件的面離開該 元件的光量。發光二極體六面的其中之五包括一具有圍繞 介質的界面，介質通常為折射率為！之空氣（nai产1}或折射 率”於1.4至2的封殼（1.4<nenc<2)。此五面之形狀明顯的改 善發光二極體的光取出效率。 本發明之一較佳實施例提出一種對發光二極體表面塑 形的方法，使得每一面輪廓不產生臨界角。因為在半導體 物質和周圍介質的係數板差大，所以只有一小部分光從元 件中逃離。 考量一種AlInGaP型發光二極體的主動層做為等向光 發射器，其只有17%的光被定位在存在於發光二極體晶粒 表面的逃離圓錐内。藉由表面粗化來提供光子更多逃離機 會。假定從發光二極體發出的光是等向性的，則從統計上 ，表面積的增加將增加光從元件取出的量。 有數種方式可以粗化表面：如Schnitzer and al於期刊 App· Phy· Lett·，Vol 74, Ν〇16, ρρ· 2174-2176 中所描述的本 24 1290377 質微影技術。然而，次波長輪廓之製造需要高成本製造設 備或特殊的奈米微粒光罩方法，如矽酸膠；而微小輪廓使 用標準半導體製程，因此更具成本效益。 在本發明之一實施例，上述的表面被粗化，使得從元 件内射出之光中有高百分比的光逃離。參閱圖4b和圖4c， 在半導體表面上蝕刻一具有儘可能地濃密的空間週期規則 的圖像，且其側壁幾乎相互碰觸。 每一圖像較佳地具有一微型透鏡的形狀，不論是圖如 的凸鏡701或圖4c的凹鏡702。參閱圖4a，凸鏡之形狀使 凸鏡表面曲率中心位於主動層16〇的平面上。從凸鏡的曲 率中心等向性射出的光將以90度的角度碰觸該表面，因此 ，入射角小於臨界角，光由元件中取出。如光不是由主動 層中160《凸鏡曲率中心的部分射出時，光碰觸至表面時 不是以90度角度入射，因此可能不會被取出。然而，表面 上透鏡的存在無形中增加了表面積，所以增加了等向射出 光子從元件逃離的機率。 圖4c說明了形成在發光元件表面的微凹鏡7〇2的效應 。微凹鏡702形狀使得從凹鏡焦點產生的光以一小角度= 向相對應的透鏡，然後取出。若光以一大傾角射出時^其 可由相鄰的透鏡取出。 例如，對於GaP型式的發光二極體晶粒和空氣介質而 言，透鏡的形成使得在17度半角圓錐内從透鏡焦點射出之 光碰及相對應的透鏡並被取出；而使17。至51。之傾角的光 碰及相鄰的透鏡，故相鄰透鏡具有一相對應傾角為Η。至 25 1290377 51之逃離圓錐的表面。另外，表面上凹鏡的存在無形中增 加了表面積’因此增加了等向射出光子從元件中逃離的機 率。製造圓滑輪廓既難且不具成本效益，因成本之故，用 六邊形或角錐形透鏡表面取代平滑透鏡表面並不會損及光 取出效率。 圖9疋所述元件在連結和金屬接觸電極510、520和表 面輪廓701製成後的剖面視圖。在發光元件表面蝕刻後所 形成之透冑7G1 ’除了沒有覆蓋金屬電極，覆蓋了整個發光 一牛的表面其冰度滿足了確保效率最大化的條件，較佳 地穿入接觸層130、隔絕層⑽’及“皮覆層或波導層15〇 ’也可穿透主動層16〇。 在本發明之另一實施例，圖11a中形成在發光二極體表 面之規則週期性或準週期性洞陣列81〇形成光子能階結構 。洞之形狀較佳為如圖i丨c標號82〇所示之圓錐體，以增加 光取出效率。圖11b是圖lla之光子晶體結構的示意圖，其 說明了洞是以三角陣列為例的形式排列。從主動層產生之 光激發§午多傳播進入發光二極體之電磁模態，前述光子能 1¾使波導模式和溢漏模式的取出更為容易。參閱圖9，前述 取出進一步的可藉由連結在P側晶圓上且供所有入射角度 之光線使用之組合鏡的高反射率來改善。高入射角度光線 之南反射率降低了因波導模式進入基板之耗損，使得光子 能階結構有足夠的時間在其消失前取出所述的模態。光子 能階結構主要是決定於晶格常數，例如，洞之間的距離和 洞的大小。光子能階結構的最低階模態的晶格常數約為波 26 1290377 的數倍。為 達擇具有微 長：分數，而其高階模態之晶袼常數約為波長 、了谷易製造和降低成本，在可見和uv操作下， 米等級的高階模態。 以上所述者，僅為本發明之較佳實施例而已，者 二此限定本發明實施之範圍’即大凡依本發明申請：利: 圍及發明說明内容所作之簡單的等效變化與修都，皆 本發明專利涵蓋之範圍内。Cu/W 〇 17 1290377 Carrier Preparation The original substrate, which is often used to supply the growth of the three-five semiconductors, has a low thermal conductivity. The thermal conductivity of gallium arsenide and graphite is 5 〇 w/m 〇 K and 4 〇 w/m ° K, respectively. For example, the new carrier 4 for semiconductor thin media has better heat dissipation characteristics than the original grown substrate 100. The linking method presented herein can use a wide range of new vectors. The following table lists some suitable carriers: Thermal Coefficient of Thermal Conductivity - (ppm/°C) (w/m°K) Gallium Arsenide (GaAs) 6.5, / 50 Graphite 5.0-5.6 — 40 矽(Si) 4.1 150 Copper (Cu) 17 400 Copper-molybdenum-copper (Cu-Mo-Cu) 6.0 182 Aluminum lanthanum carbide (AlSiC) 6-16 170-220 The new carrier is determined by the needs of the application, which can be as follows Any of: Si, GaAs, Cu, Al, Sic, A1SiC, Cu/M, A1N, Ah〇3, Cu/Mo/Cu, graphite, quartz, and the like; wherein M may be Mo, W or C. For example, the coefficient of thermal expansion of niobium is significantly different from the coefficient of thermal expansion of gallium arsenide-based epitaxial materials, but the cost of niobium is low and has good surface properties and mechanical strength. The "stabilizing effect 18 1290377" described herein can reduce and modulate the bond strength. In addition, for example, the thermal expansion coefficient of the copper-molybdenum-copper alloy is perfectly matched with the thermal expansion coefficient of the gallium arsenide base and the gallium nitride-based light-emitting diode material, but it is relatively expensive. Referring to Figure 7, the preparation of wafer carrier 400 includes: 1. The step of forming a contact layer 410 on the surface of carrier 400 that produces good ohmic properties and good bonding properties. A contact layer 410 of sufficient thickness is required to cover the defects on the surface of the carrier. 2. The step of forming a barrier layer. The barrier layer 420 will weaken the bond strength' and inhibit the intrinsic diffusion between the carrier 400 and the tie layer 440 to avoid alloy formation at the tie layer 440. The barrier layer 420 can be any one or combination of the following: Cr, Ti/W, Nb, or other metal. The present invention has proven that Nb is preferred because it satisfies all of the properties required for stability and adhesion. It stops the reaction between the carrier 4 and the tie layer 440. 3. The step of forming the wet layer 430 includes evaporation of a layer of generally Au, Cu or Ni to improve the adhesion of the tie layer 440 and the barrier layer 420. This additional layer has a form and reliability that actively reacts with the tie layer 440 and strengthens the bond. 4. For the joining process, it is important to form the joining layer 440. Molecular beam evaporation, thermal evaporation, co-plating, sputtering or electroplating are all suitable for forming the tie layer 440. Electroplating is cost effective, and in the present invention, it produces a tie layer having a desired thickness ranging from tens of nanometers to hundreds of microns and being durable. However, it will encounter uneven surface morphology that other methods will not encounter. The tie layer 440 can be formed on the carrier, or on the semiconductor surface 19 1290377 or both. The tie layer preferably has a low melting point and a low Young's modulus (easily ductile) such as tin, lead, indium and tin-gold alloys. In the present invention, the joining process is carried out at a temperature at which the joining layer 440 reaches the liquefied state. During the joining process, a quantity of bonding material 440, referred to as solder, is discarded into the recess 261 of the semiconductor of Figure 6: • The towel causes a so-called "stability" on the wafer when the solder layer is completely solidified. The solid effect "" is therefore a significant improvement in the strength of the joint. Figure 8 illustrates the entire structure after the carrier and the semiconductor wafer (see Figure 6) are joined. Preferably, the melting point of the solder material 440 is between 100 ° C and 35 (rc. In a preferred embodiment of the present invention, the semiconductor light emitting diode itself has a stabilizing effect due to the high thermal expansion coefficient of the bonding layer 44 . The coefficient of thermal expansion is usually between 4 and 6 ppm/°c, and the coefficient of thermal expansion of the tie layer is in the range of 20 to 30 ppm/t. Figure 8 illustrates the stress caused by the thermal expansion of the fragrant number mismatch. As shown by the length and length, it generally decreases from the layer 43 〇 to the groove direction of the layer 170. During the cooling process, the solder 440 shrinks more than the semiconductor film, and at the same time produces a stabilizing effect on the semiconductor film, and the bonding strength. Process yield and component reliability are also improved. Referring to Figure 1, the carrier and semiconductor light-emitting diode wafer assembly 77 is placed in cavity 730 for bonding or heat treatment. The device has an air intake. The portion 700 and a venting portion 710 are used to pressurize the vacuum chamber. A heater 75 is disposed on a metal pedestal 74 having a thermal conductivity, so that a uniform temperature distribution across the wafer assembly 770 can be obtained. The aforementioned cavity 720 20 1290377 结-真料76G. - Elastomeric film 72〇 made of high temperature branch film, such as polyimide, A1, Cu, Ni or stainless steel, used as a seal for the wafer assembly. The vacuum is maintained. When the temperature rises to connect or heat-treat the N metal to produce an ohmic contact, the gas is difficult (4) the wafer assembly is 77. For the connection of the light-emitting diode wafer and the carrier, a soft solder is usually used, for example. For example, the junction temperature is usually in the range of 250 to 400 t, while the fort is in the range of 14 psi to 500 psi. The thickness of the m 72 的 is chosen to make the wafer boundary uniform, 0.1-30 mils of polyimine or Aluminum bismuth can be used because of its high thermal stability and non-adhesiveness to the film on the surface of the luminescent diode. The typical temperature range for ohmic contact heat treatment ranges from 3 (10) to C. Due to the complete remelting and solidification of the tie layer 'The elastic film 72() resists the pressure of the semiconductor film and prevents it from moving during the joining process. The use of motorized pressure (air pressure) ensures a uniform distribution of pressure across the entire wafer surface 770 and allows The applied pressure is equal pressure, as shown in the arrow As shown in the head, the elastic 胄72〇 allows the pressure to be uniformly transferred from the vacuum chamber to the surface of the wafer. Therefore, there is no wedge problem e of the general non-directional high-voltage device, so the connection is more uniform and has a higher yield. Substrate Migration 1 Next, the substrate is selectively removed. The removal process includes a combination of the following methods: mechanical polishing or grinding, chemical etching, laser stripping. It must be understood that especially in the chemical (four) In this case, the new carrier may be highly reactive. The removal process must selectively remove the original substrate, such as reference numeral 1()() in Figure 6, without damaging the semiconductor film and the new carrier. So 21 1290377 is recommended to use The protective layer of the termination layer 120 of Figure 6 uses a protective layer even on the new carrier. In general, the NH4〇H solution is used to remove gallium arsenide, and the laser stripping is used to remove the graphite substrate. N metal and its absorption minimization One aspect of the present invention is to provide an increase in light extraction efficiency by reducing absorption by a metal electrode of a light-emitting diode. In order to operate a light-emitting element, the electrode 510 of Figures 3a-3d must be formed on its upper side. Once integrated into a package, the electrodes are connected to a power source via wires 530 of Figures 3a and 3c. This electrode ensures low resistance electron injection (low resistance ohmic contact) and provides a uniform current distribution across the surface of the component to ensure the mechanical strength of the wire to the component. The wire bonding process described above requires a metal pad 531 as shown in Figures 3a and 3b, which typically has a diameter of 80 μηι to 120 μηη. Standard light-emitting diodes are typically square grains having a surface area ranging from 250 μηι X 250 μηη to 350 μηη X 350 μηη, which means that the metal pads cover only 10% to 20% of the entire surface area of the grains. For the tri-family phosphide base material, on the crucible side, a combination of Ge, Au, and Ni is typically evaporated and heat treated to produce a low impedance ohmic contact between the metal and the semiconductor. For AlInGaN-based light-emitting diodes, a combination of Ti, Pt, Au, A, Mo, Pd, and Ru can form a good N-type ohmic contact. Figures 3a-3d depict the conventional configuration in the wire bonding process' and indicate a wire 530 having a diameter of typically 5 〇 and 1 。. The imaginary part of the wrong refractive index has a very high value: at 650 nm 22 1290377 kGe is equal to 5.5. The nanoscale enamel absorbs any light that reaches the metal pad. However, niobium alloys can tolerate high current densities, so that the area size can be effectively reduced and good ohmic contact properties can be maintained. Thus, in a preferred embodiment of the invention, a plurality of isolated metal islands 510 of Figures 3e and 3g form a good ohmic contact with the epitaxial semiconductor layer and are distributed over the surface. It should be noted that the ohmic contact is not p-type, i.e., N-type, which is determined by the doping pattern of the semiconductor layer adjacent to the isolated metal island 510. Thereafter, an electrically conductive conductive layer 52() is evaporated onto the surface of the semiconductor to connect all of the metal islands 510 and form a continuous metal network to ensure good implantation conditions and good current distribution. The interface between the conductive layer 52 and the semiconductor layer is non-ohmic and has a high impedance. The external current is distributed to a large number of isolated metal islands 51A via the connection 塾 and the conduction network layer 520, and then flows down to the active layer 531 of Fig. 3f. Figure 3f is a cross-sectional view of the line Π-Π in the structure > Therefore, the current is uniformly and efficiently generated within the light-emitting TM diode and the metal of the conductive layer 520 can be highly reflective or highly penetrating. In the case of a highly reflective metal, for example, it is possible to use eight-layer Au, ", a, etc. as the conductive layer 520, and the light emitted from the active layer 531 is reflected back into the light-emitting diode structure by the conductive layer 52. It is not The surface of the composite crucible (5) (see Figure 6) is reflected and then escapes from the light-emitting diode structure 'is reabsorbed by the active layer. The photons re-absorbed by the active layer can be re-emitted or recovered. Also, the reflective metal layer 520 The reflected light can be reused. In the case of penetration, the light will pass directly through and leave 'the conductive material can be selected, such as indium tin telluride, 23 j29〇377, the metal can be in different shapes, such as dots, Square, expanded or linear. The coverage of the surface ranges from 02% to 2%, which is much lower than 10% to 20% of the prior art. Figures 3e and 3g depict the configuration of dots. Highly reflective metal Any of the following: Au, Ag or A1. In one embodiment, the structure of isolated metal island 510 and conductive network 520 is preferably made by optical lithography. N-side and P-side shapes The light extraction efficiency of the light-emitting diode depends on the element leaving the element The amount of light of the piece. Five of the six sides of the light-emitting diode include an interface with a medium surrounding the medium, usually a refractive index of air (nai produced 1} or a refractive index of 1.4 to 2 (1.4<;nenc<2). The five-sided shape significantly improves the light extraction efficiency of the light-emitting diode. A preferred embodiment of the present invention provides a method of shaping the surface of the light-emitting diode such that each surface profile is not produced. Critical angle. Because the difference between the semiconductor material and the surrounding medium is large, only a small part of the light escapes from the element. Consider the active layer of an AlInGaP type light-emitting diode as an isotropic light emitter, which is only 17%. The light is positioned in the escape cone existing on the surface of the light-emitting diode. The surface roughening is used to provide more chances for the photon to escape. Assuming that the light emitted from the light-emitting diode is isotropic, then from the statistics Above, an increase in surface area will increase the amount of light removed from the component. There are several ways to roughen the surface: as described by Schnitzer and al in the journal App· Phy· Lett·, Vol 74, Ν〇 16, ρρ· 2174-2176 Of this 24 12 90377 lithography technology. However, the fabrication of sub-wavelength profiles requires high-cost manufacturing equipment or special nanoparticle reticle methods, such as phthalic acid gels; while micro-profiles use standard semiconductor processes and are therefore more cost effective. In one embodiment, the surface is roughened such that a high percentage of light exiting from within the component escapes. Referring to Figures 4b and 4c, etching a surface of the semiconductor surface with as dense a space period as possible The image, and its side walls almost touch each other. Each image preferably has the shape of a microlens, whether it is a convex mirror 701 or a concave mirror 702 of Fig. 4c. Referring to Fig. 4a, the shape of the convex mirror is such that the center of curvature of the surface of the convex mirror is located on the plane of the active layer 16A. Light emitted from the isotropic center of the curvature of the convex mirror will hit the surface at an angle of 90 degrees. Therefore, the incident angle is smaller than the critical angle, and the light is taken out from the element. If the light is not emitted by the portion of the center of the convex curvature of the active layer 160, the light is not incident at a 90 degree angle when it touches the surface, so it may not be taken out. However, the presence of a lens on the surface invisibly increases the surface area, thereby increasing the probability that the isotropic emitted photons will escape from the component. Fig. 4c illustrates the effect of the micro concave mirror 7〇2 formed on the surface of the light-emitting element. The micro-concave mirror 702 is shaped such that light generated from the focus of the concave mirror is directed to the corresponding lens at a small angle and then taken out. If the light is emitted at a large angle of inclination, it can be taken out by an adjacent lens. For example, for a GaP-type light-emitting diode die and an air medium, the lens is formed such that light emitted from the focal point of the lens within a 17-degree half-angle cone hits the corresponding lens and is taken out; To 51. The dip of the light hits the adjacent lens, so the adjacent lens has a corresponding tilt angle of Η. To 25 1290377 51 to escape the surface of the cone. In addition, the presence of a concave mirror on the surface invisibly increases the surface area' thus increasing the probability that the isotropically emitted photons will escape from the element. It is difficult and cost-effective to make a smooth profile, and replacing the smooth lens surface with a hexagonal or pyramidal lens surface does not compromise the light extraction efficiency. Figure 9 is a cross-sectional view of the component after the bond and metal contact electrodes 510, 520 and surface profile 701 have been fabricated. The through-hole 7G1' formed after the surface of the light-emitting element is etched, except that the metal electrode is not covered, covers the surface of the entire light-emitting one, and the ice content satisfies the condition of ensuring maximum efficiency, preferably penetrates the contact layer 130 and the insulating layer. (10) 'and the sheath or waveguide layer 15' can also penetrate the active layer 16A. In another embodiment of the invention, a regular periodic or quasi-periodic hole is formed in the surface of the LED in Figure 11a. The array 81 is formed into a photon energy level structure. The shape of the hole is preferably a cone as shown by reference numeral 82 of Figure 丨c to increase the light extraction efficiency. Fig. 11b is a schematic view of the photonic crystal structure of Fig. 11a, which illustrates The holes are arranged in the form of a triangular array. The light generated from the active layer excites the electromagnetic mode of the light-emitting diode that is propagated into the light-emitting diode. The photon energy 13⁄4 makes it easier to take out the waveguide mode and the overflow mode. Figure 9. The above extraction can be further improved by the high reflectivity of the combined mirror used on the P-side wafer for light of all incident angles. The south reflectance of the high incident angle light is reduced by the waveguide. The loss into the substrate causes the photon energy level structure to have enough time to take out the modality before it disappears. The photon energy level structure is mainly determined by the lattice constant, for example, the distance between the holes and the size of the hole. The lattice constant of the lowest-order mode of the photon energy structure is about several times that of the wave 26 1290377. It has a micro-length: fraction, and its higher-order mode has a crystal constant of about wavelength, which is easy to manufacture and reduce. Cost, high-order mode of the meter level under visible and uv operations. The above is only the preferred embodiment of the present invention, and the scope of the present invention is limited to the scope of the present invention. The simple equivalent changes and repairs made by the scope of the invention and the scope of the invention are within the scope of the invention.
【圖式簡單說明】 圖Wd說明了利用本發明之—概念的較佳實施例的其 中之一具有不連續金屬圖像的例子，該金屬圖像均勻分佈 在一半導體發光二極體結構的表面上； 圖2a是一本發明另一概念的較佳實施例中，一組藉由 乾银刻或㈣刻或其組合而平行刻人半導體結構之凹^線 的排列的俯視圖； 曰、 圖2b是一兩正交凹槽線組之排列的俯視圖； 圖2c是在圖2a結構沿線w的剖面側視圖，說明該等 凹槽的形狀； 圖2d是圖2a結構的三維透視圖； 圖3a-3d是一先前技術中之發光晶粒、焊墊和連結導線 的幾何關係的視圖； 圖3e和圖3f分別是二不同較佳實施例之發光二極體的 俯視圖，其中，分佈在發光：極體表面之孤立的金屬島是 藉由一導電網絡連結； 27 1290377BRIEF DESCRIPTION OF THE DRAWINGS FIG. Wd illustrates an example in which one of the preferred embodiments of the present invention has a discontinuous metal image uniformly distributed on the surface of a semiconductor light emitting diode structure. Figure 2a is a top plan view of an arrangement of recessed lines of a parallel semiconductor structure by dry silver or (four) engraving or a combination thereof in a preferred embodiment of another concept of the present invention; 曰, Figure 2b Figure 2c is a cross-sectional side view of the structure of Figure 2a along line w, illustrating the shape of the grooves; Figure 2d is a three-dimensional perspective view of the structure of Figure 2a; Figure 3a- 3d is a view of the geometric relationship of the light-emitting dies, pads and connecting wires in the prior art; FIG. 3e and FIG. 3f are respectively top views of two different preferred embodiments of the light-emitting diodes, wherein the light-emitting diodes are distributed: An isolated metal island on the surface of the body is connected by a conductive network; 27 1290377
團g疋一》口圖3e之線IMI ’說明電流在主動層的分佈情況； 面視圖 山圖4a、4c和4b、切分別是具有微凸面鏡（圖#、 相面鏡（圖4c、4d)表面圖像的剖面視圖和俯視圖； 圖5疋&光一極體在其原始成長基板上之磊晶纟士 之剖面視圖； '再Group I 口 一 ” mouth line 3e line IMI 'Describe the distribution of current in the active layer; face view mountain Figure 4a, 4c and 4b, respectively cut with a convex mirror (Figure #, phase mirror (Figure 4c, 4d) A cross-sectional view and a top view of the surface image; Figure 5 is a cross-sectional view of the epitaxial gentleman on the original growth substrate of the light-emitting body;
圖6疋具有凹槽和反射鏡之發光二極體結構的剖面 視圖，該發光二極體結構正準備連結至一新的載體；D 圖7疋一新的且尚未連結之新載體的剖面結構視圖； 圖8是一在移去成長基板後，一具有發光二極體結構 之半導體膜連結至一新載體的剖面結構視圖，說明—本發 明之一概念的較佳實施例； 圖9 具有發光二極體的半導體膜的剖面視圖，說明 與该發光二極體頂面形狀有關的金屬圖像的例子，以此 閣述一本發明另一概念的較佳實施例； 圖10展示了 一等壓晶圓連結裝置之剖面視圖以說明一 本發明又一概念的較佳實施例；及 圖11a至11c說明一刻入半導體層之表面的光子能階結 構’其中，圖11c是圖lib中沿線ΙΙΙ-ΙΙΙ之剖面視圖。 28 1290377Figure 6 is a cross-sectional view of a light-emitting diode structure having a recess and a mirror, the light-emitting diode structure being prepared to be bonded to a new carrier; D Figure 7 is a new cross-sectional structure of a new carrier that has not yet been connected Figure 8 is a cross-sectional structural view showing a semiconductor film having a light-emitting diode structure bonded to a new carrier after removing the grown substrate, illustrating a preferred embodiment of a concept of the present invention; A cross-sectional view of a semiconductor film of a diode, illustrating an example of a metal image associated with the top surface shape of the light emitting diode, and a preferred embodiment of another concept of the present invention is illustrated; FIG. A cross-sectional view of a wafer bonding apparatus is used to illustrate a preferred embodiment of a further concept of the invention; and Figs. 11a to 11c illustrate a photonic energy level structure engraved into the surface of the semiconductor layer, wherein Fig. 11c is along the line lib - The section view of the ΙΙΙ. 28 1290377
【主要元件符號說明】 100 · · 基板 420 · * 阻障層 110 .，* 緩衝層 430 · · 溼層 120 · * 終止層 440 ·. 連結層 130 · · η接觸層 510 · * 金屬島 140 · · 隔絕層 520 · · 傳導層 150 · * η被覆層 531 · · 主動層 160 · * 主動層 700 · * 進氣部 170 * · Ρ被覆層 701 · * 凸鏡 180 ·, 開口層 702 ·. 凹鏡 200 · · ρ金屬接觸 710 ·， 排氣部 210 · ♦ 介電層 720 ·. 彈性膜 220 * · 金屬層 730 · 空腔 230 ·、 阻障層 740 · •基座 240 · · 溼層 750 * *加熱器 255 · ♦ 組合鏡 760 · •真空埠 261 · · 凹槽 770 · •晶圓總 400 · · 載體 ,810 * •洞陣列 410 · · 接觸層 820 · •洞 29[Description of main component symbols] 100 · · Substrate 420 · * Barrier layer 110 ., * Buffer layer 430 · · Wet layer 120 · * Terminating layer 440 ·. Connecting layer 130 · · η contact layer 510 · * Metal island 140 · · Insulation layer 520 · · Conductive layer 150 · * η coating 531 · · Active layer 160 · * Active layer 700 · * Inlet 170 * · Ρ coating 701 · * Convex mirror 180 ·, opening layer 702 ·. Mirror 200 · · ρ metal contact 710 ·, exhaust portion 210 · ♦ dielectric layer 720 ·. elastic film 220 * · metal layer 730 · cavity 230 ·, barrier layer 740 · • pedestal 240 · · wet layer 750 * *Heater 255 · ♦ Combination mirror 760 · • Vacuum 埠 261 · · Groove 770 · • Total wafer 400 · · Carrier, 810 * • Hole array 410 · · Contact layer 820 · • Hole 29