J287265 九、發明說明： 【發明所屬之技術領域】 本發明係為覆晶構裝之裝置，尤其係指一種使用於液 曰曰絲員示裔（LCD)玻璃覆晶（COG—chip on glass)之覆晶構裝 (Flip Chip)之裝置。 【先前技術】 覆晶構裝（Flip Chip)技術係以晶片與基板的接合面 形成接合墊（pad)或是凸塊（bump)來取代傳統打線接合 (wire bonding)構裝技術所使用的導線架，再透過直接 壓合晶片與基板的接合面之間的凸塊及接合墊來達成電路 導電。近年來，由於電子產品朝向輕、薄、短、小的趨勢 發展，使得覆晶構裝技術的應用日益增廣，而在液晶顯示 益（LCD)的驅動ic的構裝上，常利用覆晶構裝技術將含有 ^動1C線路之晶片直接設置於玻璃上，用以連接液晶顯示 器之單元（LCD cell)和驅動1C線路。 習知的覆晶構裝方法，係於晶片和基板的表面形成凸 塊等結合結構，然後在基板表面塗佈接著劑，再將晶片與 基板之凸塊經過對位壓合以完成覆晶構裝結構。在晶片與 基板間使用接著劑接合時，由於晶片與基板的熱膨脹係數 存在差異，當接合時溫度產生變化，熱應力會使得晶片與 基板產生不同程度的麵曲，進而產生變形。 為改善上述問題，因此發展出彈性導電凸塊結構，美 國第5508228號專利「用於覆晶積體電路裝置之彈性電氣 1287265 連結凸塊及其形成方法（C⑽pliant Electrically Connective Bumps For An Adhesive Flip Chip Integrated Circuit Device And Methods For Forming Same)」，如第 一圖所示，揭示一種彈性凸塊，包括有一晶片10，其上有 一接合墊（bond pad)12，高分子聚合物（Polymer)形成一 彈性凸塊14於接合墊（bond pad)12上，在高分子聚合物 (Polymer)之凸塊14上，覆蓋有一金（gold)製成之金屬 層16 ’藉由該彈性凸塊14而組裝於一玻璃基板18上。 另中華民國專利公開號第200402859號「彈性凸塊結 構及其製造方法」，如第二圖所示，揭示一種彈性凸塊，應 用於電子元件之覆晶構裝，包括有一晶片20，其表面具有 衩數個導電接點22，並於導電接點22之周圍披覆保護膜 26，以及一彈性凸塊28。該彈性凸塊28係由一下金屬層 23、一咼分子凸塊21、一上金屬層24及金屬層25所構成。 然而，習知應用在液晶顯示器（LCD)的驅動ic的構裝 上不：疋使用金凸塊（gold bump)或彈性凸塊 (compliant bump)，受限制於IC初期佈線設計，排列方 式皆為四周環狀排列，如第三圖所示，一晶片3〇,在其四 晶（COG)的接合應用上，會產生部分不良的影響，如第四圖 所示，為傳統上玻璃覆晶構裝（⑶G)因熱應力產生龜曲的 示意圖，當晶片34和玻璃基板35透過凸塊36和導電接合 膠37(如異方性導電膜—ACF)接合時，因晶片34的熱ς 脤係數（a=3ppm)和玻璃基板35的熱膨脤係數 7 ,1287265 =4._) *同，會產生相當程度的趣曲（·咖，造成 iC中央與周邊的間隙（_不均，而導致接合阻值升高及 勝材脫層等不良的現象，且愈靠近周圍的區域，脫層現象 ·· 愈為嚴重，使產品可靠度降低。 ^ 發明人鑑於習知技術之缺生 ^ ^ - 、 文何之缺失，乃亟思改良創新之見， 進而改善上述之缺失。 % 【發明内容】 鲁本發明之目的主要提供一種覆晶構裝之裝置，係在於 將f(b卿)塊集中後重佈置對應於晶片上任-區域位置， f使得重佈置狀凸衫難合範圍_較原為集巾前之凸 塊包圍範圍面積小，用以節省成本、增加可靠度及降低彎 曲量的覆晶構裝之裝置。 一 為了達成上述目的，本發明提供一種覆晶構裝之裝 置，^括有一基板，和至少一晶粒，在該晶粒表面具有複 • S個彈性凸塊’該些彈性凸塊係集中及重佈置對應於晶片 上任一區域位置，使得重佈置後凸塊群所包圍接合之範圍 面積較原為集中前凸塊包圍之範圍面積小，以提供該晶粒 與該基板之電性連接，及一接合膠，係置於該基板與該晶 粒之接合區域，用以接合該基板與該晶粒。其中該複數個 • 5早性凸，係由一第一金屬層、一凸塊及一第二金屬層所構 成17亥弟一金屬層披覆於凸塊相對之兩侧面連接於第一金 屬層，以提供基板與晶粒之電性連結。藉由第一金屬層延 伸、第二金屬層延伸或其兩者同時延伸，可改變該些彈性 ^ 1287265 4 * 凸塊的位置’而集中對應佈置於晶粒上，其晶粒的電氣特 性不變’而佈線的難易度亦不改變。 另，本發明提供之覆晶構裝之裝置更可包括複數個非 電性連結之彈性凸塊（dummy bump)，該些非電性連結之彈 性凸塊佈置於晶粒之肖落或該轉性凸塊之相對 以維持接合平行度。 t 【實施方式】 音曰請二第二圖所示，為本發明覆晶構裝之裝置結構示 』°该极曰曰構袭之裝置包括有：-基板54，和至少一曰 ===面具有複數個彈性⑽^ 性凸塊52木中及重佈置對應於晶片5J287265 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a device for flip chip mounting, and more particularly to a liquid crystal screen (COG-chip on glass) for use in liquid crystals. A device for Flip Chip. [Prior Art] Flip Chip technology replaces the wires used in conventional wire bonding technology by forming pads or bumps on the bonding surface of the wafer and the substrate. The frame is electrically conductive by directly pressing the bumps and the bonding pads between the bonding surfaces of the wafer and the substrate. In recent years, due to the trend of light, thin, short and small electronic products, the application of flip chip technology has been widely used, and in the structure of liquid crystal display (LCD) driving ic, flip chip is often used. The mounting technology directly places the wafer containing the 1C line on the glass for connecting the LCD cell and the driving 1C line. The conventional flip chip mounting method is to form a bonding structure such as bumps on the surface of the wafer and the substrate, and then apply an adhesive on the surface of the substrate, and then press the bumps of the wafer and the substrate to form a laminated structure. Loading structure. When an adhesive is used between the wafer and the substrate, since the coefficient of thermal expansion of the wafer and the substrate is different, the temperature changes when the bonding occurs, and the thermal stress causes the wafer and the substrate to have different degrees of curvature and deformation. In order to improve the above problems, an elastic conductive bump structure has been developed. U.S. Patent No. 5,508,228, "Electrical Electrical 1287265 Bonding Bumps for Clad Circuit Circuit Devices and Methods of Forming the Same (C(10) pliant Electrically Connective Bumps For An Adhesive Flip Chip Integrated Circuit Device And Methods For Forming Same), as shown in the first figure, discloses an elastic bump comprising a wafer 10 having a bond pad 12 thereon, and a polymer polymer (Polymer) forming a resilient bump. The block 14 is on a bond pad 12, and is covered on a bump 14 of a polymer, and a metal layer 16' made of gold is assembled by the elastic bump 14. On the glass substrate 18. Another example of the "elastic bump structure and its manufacturing method", as shown in the second figure, discloses an elastic bump applied to a flip chip of an electronic component, comprising a wafer 20 having a surface There are a plurality of conductive contacts 22, and a protective film 26 is coated around the conductive contacts 22, and a resilient bump 28. The elastic bumps 28 are composed of a lower metal layer 23, a unitary molecular bump 21, an upper metal layer 24, and a metal layer 25. However, the conventional application is not applied to the driving ic of a liquid crystal display (LCD): the use of gold bumps or compliant bumps is limited to the initial wiring design of the IC, and the arrangement is The surrounding is arranged in a ring shape. As shown in the third figure, a wafer 3 〇 will have some adverse effects in its four-crystal (COG) bonding application. As shown in the fourth figure, it is a traditional glass-clad structure. (3) G is a schematic diagram of the tortuosity due to thermal stress. When the wafer 34 and the glass substrate 35 are bonded through the bump 36 and the conductive bonding paste 37 (such as an anisotropic conductive film - ACF), the thermal enthalpy coefficient of the wafer 34 is obtained. (a = 3ppm) and the thermal expansion coefficient of the glass substrate 35, 1287265 = 4..) * The same, will produce a considerable degree of fun (·ca coffee, causing the gap between the center of the iC and the periphery (_ uneven, resulting in Unfavorable phenomena such as increased joint resistance and delamination of the material, and the closer to the surrounding area, the more serious the delamination phenomenon is, which reduces the reliability of the product. ^ The inventor lacks the skill of the prior art ^ ^ - The lack of the text, is the idea of improving and innovating, and thus improving the above-mentioned lack. [Invention] The purpose of the invention is mainly to provide a device for flip chip mounting, in which the f(b qing) block is concentrated and rearranged to correspond to any position on the wafer, and f makes the heavy arranging shirt difficult to fit. The range _ is a device for covering the crystal structure of the bump before the towel is small, and is used for cost saving, reliability, and reduction of the amount of bending. In order to achieve the above object, the present invention provides a flip chip package. The device includes a substrate, and at least one die having a plurality of S-shaped elastic bumps on the surface of the die. The elastic bumps are concentrated and rearranged corresponding to any position on the wafer, so that after rearranging The area of the junction surrounded by the bump group is smaller than the area surrounded by the front bump, so as to provide electrical connection between the die and the substrate, and a bonding glue is disposed on the substrate and the die. a bonding region for bonding the substrate and the die, wherein the plurality of 5 early protrusions are formed by a first metal layer, a bump, and a second metal layer On the opposite sides of the bump Connected to the first metal layer to provide electrical connection between the substrate and the die. The first metal layer extension, the second metal layer extension or both of them can be changed to change the elasticity of the 1287265 4 * bump The position is 'concentrated correspondingly disposed on the die, and the electrical characteristics of the die are unchanged' and the ease of wiring is not changed. In addition, the device for flip chip mounting of the present invention may further include a plurality of non-electrical links. The elastic bumps of the non-electrically connected elastic bumps are arranged at the opposite sides of the crystal grains or the opposite sides of the rotating bumps to maintain the joint parallelism. t [Embodiment] 2 is a device structure of the flip-chip device of the present invention. The device includes: a substrate 54, and at least one 曰 === surface has a plurality of elastic (10) ^ bumps 52 wood and heavy arrangement corresponds to wafer 5
使得重佈置後凸塊群所包圍接合之範圍面積較 凸塊包圍之範圍面穑小、1 傾平乂原為集中月，J 電性連接，及一挺人羽，以提供該晶粒50與該基板54之 接曰膠5 3，古玄接人狀R q罢七\ 該晶粒5G之接合_田補4 53置於該基板54與 該些彈性凸塊52 接合該基板54與該晶粒別。 52所包圍(或分佈)：對應位置之意係為該些彈性凸塊 為小。 原曰曰粒之電極包圍（或分佈）之面積 其中該接合膠53 ^ 皂接合膠55，s亥非導電接合膠55 —Filro)、⑽可為異方性導電膜（Anisotropic 有機基板、陶究基板、I和非導電勝，而該基板54可為 而該置於方式可為塗佈^基板、縣板或坤化鎵基板， 達成者。更可包括Γ輝、黏貼步驟或其他結合步驟所 9 < 1287265 置於該基板54與該晶粒5〇之非導電接合區域，以減少該 導電接合膠的使用量，可降低成本。The area of the joint surrounded by the rearranged bump group is smaller than the range enclosed by the bump, the first flattening is a concentrated month, the J is electrically connected, and a human feather is provided to provide the die 50 and The substrate 54 is bonded to the substrate 54 and the crystal 54 is bonded to the substrate 54 and the crystal bumps 52 are bonded to the substrate 54 and the crystal. Grain. Enclosed (or distributed) 52: The corresponding position means that the elastic bumps are small. The area surrounded (or distributed) by the electrode of the original granule, wherein the bonding adhesive 53 ^ saponin 55, s non-conductive bonding adhesive 55 - Filro), (10) can be an anisotropic conductive film (Anisotropic organic substrate, ceramics The substrate, the I and the non-conductive are satisfactory, and the substrate 54 may be a method of coating the substrate, the county plate or the quinganium substrate, and may further include a smear, a pasting step or other bonding steps. 9 < 1287265 is placed in the non-conductive bonding region of the substrate 54 and the die 5 to reduce the amount of the conductive bonding paste used, thereby reducing the cost.
2請㈣第六A _示，㈣本發明之彈性凸塊俯視 ，，由本圖示中可看出該些彈性凸塊52之-凸塊6〇並未 完全被-第二金屬層62所包覆，而在另兩相對之側面上並 不披覆該第二金屬層62,以阻絕相鄰之彈性凸塊之橫向電 性連結’使該些彈性凸塊52集中佈置於該晶粒5()中央時， 不會產生短路之現象，然而本圖示僅為-實施例之說明， 在貫際於實作該些彈性凸塊時，可利用該第二金屬層⑽ 來包覆該凸塊60其中之一邊、二邊、三邊或全部，其中實 作時所使狀接合膠可為導電膠或非導電膠。 清參照第六B圖所示，係為本發明之彈性凸塊剖視 圖三該些彈性凸塊52係由-第-金屬層58、-凸塊60及 第-金屬層62所構成，該第二金屬層62披覆於該凸塊 60相對之兩側面而連接於該第一金屬層58，以提供該基板 54與该晶粒50上之電極56之電性連結。其中該第一金屬 層58是一鈦鎢（Ti—w)金屬層，該凸塊6〇係由高分子聚合 物（Polymer)所構成，而該第二金屬層π是一金（au)金屬 層0 叫參第六C圖所示，係為本發明之第一實施例之彈 性凸塊延伸示意圖，藉由延伸該第一金屬層58，可改變該 些彈性凸塊52的位置，而集中對應佈置於該晶粒5〇上， 其该晶粒50的電氣特性不變，而佈線的難易度亦不改變， 凸塊的製作方式可沿用彈性凸塊（c〇mp 1 iant bump)的製 10 .1287265 程，光罩數目不變，製程道數也不變，僅需利用延伸該第 一金屬層58,即可將該些彈性凸塊52移到晶粒50之中心 位置。 ； 請參照第六D圖所示，係為本發明之第二實施例之彈 ； 性凸塊延伸示意圖，藉由同時延伸該第一金屬層58及該第 二金屬層62，可改變該些彈性凸塊52的位置，而集中佈 • 置於該晶粒50上，其該晶粒50的電氣特性不變，而佈線 的難易度亦不改變，該凸塊60的製作方式可沿用該彈性凸 ® 塊的製程，光罩數目不變，製程道數也不變，僅需利用延 伸該第一金屬層58及該第二金屬層62，即可將該些彈性 凸塊52移到該晶粒50之中心位置。 請參照第六E圖所示，係為本發明之第三實施例之彈 性凸塊延伸示意圖，藉由延伸該第二金屬層62，可改變該 些彈性凸塊52的位置，而集中佈置於該晶粒50上，其該 晶粒50的電氣特性不變，而佈線的難易度亦不改變，該凸 塊60的製作方式可沿用該彈性凸塊的製程，光罩數目不 變，製程道數也不變，僅需利用延伸該第二金屬層62，即 可將該些彈性凸塊52移到晶粒50之中心位置。 請參照第七圖所示，係為本發明覆晶構裝之裝置之彈 性凸塊佈置於晶粒之第二實施例之結構示意圖，在該覆晶 • 構裝之裝置更包括有複數個非電性連結之彈性凸塊 76(dummy bump)。該些非電性連結之彈性凸塊76包括有一 晶粒72，在該晶粒72表面具有複數個彈性凸塊74，該些 彈性凸塊74集中對應佈置於該晶粒72上，以及該些非電 11 ‘1287265 性連結之彈性凸塊76，該些非電性連結之彈性凸塊76佈 置於該晶粒72之角落或該些彈性凸塊之相對侧邊，用以維 持接合平行度。 . 請參照第八A圖所示，係為.本發明之彈性凸塊佈置於 、 晶粒之第三實施例之結構示意圖，該覆晶構裝之裝置包括 ~ 有一晶粒80，在晶粒80表面佈置有複數個彈性凸塊82， • 該些彈性凸塊82集中佈置於晶粒80中心之一軸方向的退 縮距離範圍内，其中退縮距離範圍係為比原來之晶粒面積 • 還小。 請爹照弟八B圖所不’係為本發明覆晶構裝之裝置之 彈性凸塊佈置於晶粒之第四實施例之結構示意圖，該些彈 性凸塊82之佈置可集中於該晶粒80中心之一軸方向的退 縮距離範圍内，及有該些非電性連結之彈性凸塊84。該覆 晶構裝之裝置包括有一晶粒80，在該晶粒80表面具有該 些彈性凸塊82，該些彈性凸塊82集中佈置於該晶粒80中 央之一軸方向的退縮距離範圍内，其中退縮距離範圍係為 * 比原來之晶粒面積還小，以及該些非電性連結之彈性凸塊 84，該些非電性連結之彈性凸塊84佈置於該晶粒80之角 落或該些彈性凸塊之相對側邊，用以維持接合平行度。 請參照第九A圖，係為本發明覆晶構裝之裝置之彈性 ^ 凸塊佈置於晶粒之第五實施例之結構示意圖，該覆晶構裝 •之裝置包括有該晶粒8 0 ’在晶粒8 0表面佈置有該些彈性 凸塊92，該些彈性凸塊92集中佈置於晶粒80中心之另一 軸方向的退縮距離範圍内，其中退縮距離範圍係為比原來 12 ‘1287265 之晶粒面積退小。 請參照第九B圖，係為本發明覆晶構裝之裝置之彈性 凸塊佈置於晶粒之第六實施例之結構示意圖，該覆晶構裝 ； 之裝置包括有該晶粒80，在該晶粒80表面具有複數個彈 ' 性凸塊92，該些彈性凸塊92集中佈置於該晶粒80中央之 另一軸方向的退縮距離範圍内，其中退縮距離範圍係為比 • 原來之晶粒面積還小，以及複數個非電性連結之彈性凸塊 94，該些非電性連結之彈性凸塊94佈置於該晶粒80之角 •落或該些彈性凸塊之相對侧邊，用以維持接合平行度。 請參照第十A圖，係為本發明覆晶構裝之裝置之彈性 凸塊佈置於晶粒之第七實施例之結構示意圖，該覆晶構裝 之裝置包括有該晶粒80，在該晶粒80表面佈置有複數個 彈性凸塊98,該些彈性凸塊98集中佈置於該晶粒80中心 之一軸及另一轴方向的退縮距離範圍内，其中退縮距離範 圍係為比原來之晶粒面積還小。 請參照第十B圖，係為本發明覆晶構裝之裝置之彈性 • 凸塊佈置於晶粒之第八實施例之結構示意圖，該覆晶構裝 之裝置包括有該晶粒80，在該晶粒80表面具有複數個彈 性凸塊98,該些彈性凸塊98集中佈置於晶粒80中央之一 軸及另一軸方向的退縮距離範圍内，其中退縮距離範圍係 • 為比原來之晶粒面積還小，以及複數個非電性連結之彈性 • 凸塊99，該些非電性連結之彈性凸塊99佈置於該晶粒80 之角落或該些彈性凸塊之相對侧邊，用以維持接合平行度。 請參照第十一 A圖，係為本發明覆晶構裝之裝置之彈 13 .1287265 性凸塊佈置於晶粒之第九實施例之結構示意圖，該覆晶構 裝之裝置包括有該晶粒80，在該晶粒80表面佈置有複數 個彈性凸塊100，該些彈性凸塊100集中佈置於晶粒80之 一侧。 請參照第十一B圖，係為本發明覆晶構裝之裝置之彈 性凸塊佈置於晶粒之第十實施例之結構示意圖，該覆晶構 裝之裝置包括有该晶粒80 ’在遠晶粒80表面具有複數個 彈性凸塊100，該些彈性凸塊100集中佈置於該晶粒80之 一侧，以及複數個非電性連結之彈性凸塊102，該些非電 性連結之彈性凸塊102佈置於該晶粒80之角落或該些彈性 凸塊之相對側邊，用以維持接合平行度。 請參照第十一 C圖，係為本發明覆晶構裝之裝置之彈 性凸塊佈置於晶粒之第十一實施例之結構示意圖，該覆晶 構裝之裝置包括有該晶粒80 ’在該晶粒80表面具有該些 彈性凸塊100，該些彈性凸塊100集中佈置於晶粒80之， 電極外側以及該些非電性連結之彈性凸塊102A與102B， 該些非電性連結之彈性凸塊102A佈置於該晶粒80之角落 或該些彈性凸塊102B之相對侧邊，用以維持接合平行度。 上述之各種實施例，可用於複數個晶粒的場合（未顯 示於圖中）。 本發明所具有的特點及功效，可敘述如下： 1. 凸塊向内集中於晶粒之中心位置，可防止因熱應力 而於晶粒四周膠材脫層，可確保内部接點品質。 2. 凸塊接點向内群聚於晶粒之中心位置，接點之阻值 14 t mi265 較為一致 3. 凸塊位置向内縮移，延長環境空氣 的距離，《供更長久的保護作用，可增加可靠占 4. 為節省導電接合膠材的使用量，在 ^ 用非導電接合膠材，可直接節省成本。域可使 5·可避免溢膠造成彎曲方向不同。 拘限發:之較佳:行實施例 ，非因此即 範圍内，合予陳明。 在本案之專利 【圖式簡單說明】 第一圖為用習知覆晶姐# 第二圖為用另-；:！裝之彈性導電凸塊結構之 示意圖 圖 覆晶構裝之彈性導電凸塊結構之示意 第三圖為習知覆晶攝I之凸塊之排列 第四圖為習知覆晶構敦之玻璃覆晶構裝(c‘ 生魏曲之示意圖； 口”、、>c力產 第五圖為本發明覆总i # 復日曰構裝之裝置結構示意圖· 第二構塊剖視圖； 冑訑例之弹f凸塊延伸示意圖 U圖為本Uq二實施例之彈性凸 第六E圖為本發明之第三實施例之彈性凸塊延 15 4 1237265 第七圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒之 第二實施例之結構示意圖； 第八A圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 . 之第三實施例之結構不意圖； 第八B圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 之第四實施例之結構示意圖； ^ 第九A圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 之第五實施例之結構示意圖； ® 第九B圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 之第六實施例之結構示意圖； 第十A圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 之第七實施例之結構示意圖； 第十B圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶粒 之第八實施例之結構示意圖； 第十一 A圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶 粒之第九貫施例之結構不意圖， * 第十一 B圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶 粒之第十實施例之結構示意圖；及 第十一 C圖為本發明覆晶構裝之裝置之彈性凸塊佈置於晶 粒之第十一實施例之結構示意圖。 【主要元件符號說明】 晶片 10、20、30、34 接合墊 12 16 ,I2§7265 高分子聚合物形成之彈性凸塊14 金製成之金屬層 16 玻璃基板 18 高分子凸塊 21 導電接點 22 下金屬層 23 上金屬層 24 金屬層 252 (4) The sixth A _ shows, (d) the elastic bump of the present invention is seen from the top view, as can be seen from the figure, the bumps 6 of the elastic bumps 52 are not completely covered by the second metal layer 62. The second metal layer 62 is not covered on the other two opposite sides to block the lateral electrical connection of the adjacent elastic bumps, so that the elastic bumps 52 are collectively disposed on the die 5 ( When the center is in the middle, no short circuit occurs. However, the illustration is only for the description of the embodiment. When the elastic bumps are actually implemented, the second metal layer (10) may be used to cover the bumps. One of the sides, two sides, three sides or all of the 60, wherein the bonding glue can be made of a conductive adhesive or a non-conductive adhesive. Referring to FIG. 6B, which is a cross-sectional view of the elastic bump of the present invention, the elastic bumps 52 are composed of a -metal layer 58, a bump 60 and a metal layer 62, the second A metal layer 62 is attached to the opposite sides of the bump 60 to be connected to the first metal layer 58 to provide electrical connection between the substrate 54 and the electrode 56 on the die 50. The first metal layer 58 is a titanium-titanium (Ti-w) metal layer, the bump 6 is made of a polymer, and the second metal layer π is a gold (au) metal. The layer 0 is shown in FIG. 6C, which is a schematic diagram of the elastic bump extension of the first embodiment of the present invention. By extending the first metal layer 58, the position of the elastic bumps 52 can be changed and concentrated. Correspondingly disposed on the die 5〇, the electrical characteristics of the die 50 are unchanged, and the difficulty of wiring is not changed. The bump can be fabricated by using an elastic bump (c〇mp 1 iant bump). 10 .1287265, the number of masks is constant, and the number of process lanes is also unchanged. Only by extending the first metal layer 58, the elastic bumps 52 can be moved to the center of the die 50. Please refer to FIG. 6D, which is a schematic diagram of a second embodiment of the present invention; the extension of the bumps can be changed by simultaneously extending the first metal layer 58 and the second metal layer 62. The position of the elastic bumps 52 is placed on the die 50, the electrical characteristics of the die 50 are unchanged, and the ease of wiring is not changed. The bump 60 can be fabricated in such a manner. The process of the convex block, the number of masks is constant, and the number of process tracks is also unchanged. Only by extending the first metal layer 58 and the second metal layer 62, the elastic bumps 52 can be moved to the crystal. The center position of the grain 50. Referring to FIG. 6E, it is a schematic diagram of the elastic bump extension of the third embodiment of the present invention. By extending the second metal layer 62, the positions of the elastic bumps 52 can be changed and concentrated on On the die 50, the electrical characteristics of the die 50 are unchanged, and the difficulty of wiring is not changed. The manufacturing method of the bump 60 can follow the process of using the elastic bump, and the number of the mask is constant, and the process track is The number is also constant, and the elastic bumps 52 can be moved to the center of the die 50 by extending the second metal layer 62. Please refer to the seventh embodiment, which is a schematic structural view of a second embodiment of the elastic bumps of the device for flip chip mounting of the present invention, wherein the device of the flip chip structure comprises a plurality of non- Electrically bonded elastic bump 76 (dummy bump). The non-positively coupled resilient bumps 76 include a die 72 having a plurality of resilient bumps 74 on the surface of the die 72. The resilient bumps 74 are collectively disposed on the die 72, and The non-electrical 11 '1287265 elastically coupled elastic bumps 76 are disposed at the corners of the die 72 or opposite sides of the resilient bumps for maintaining the joint parallelism. Please refer to FIG. 8A, which is a schematic structural view of a third embodiment of the present invention. The flip-chip device includes a die 80 in the die. The surface of the 80 surface is provided with a plurality of elastic bumps 82. The elastic bumps 82 are arranged in a range of a retracting distance in the axial direction of the center of the die 80, wherein the range of the retracting distance is smaller than the original grain area. Please refer to the structural diagram of the fourth embodiment of the present invention in which the elastic bumps of the device of the flip-chip device of the present invention are arranged in the fourth embodiment of the present invention. The arrangement of the elastic bumps 82 can be concentrated on the crystal. The center of the grain 80 has a retracting distance in one of the axial directions, and the non-electrically coupled elastic bumps 84 are provided. The flip-chip device includes a die 80 having a plurality of elastic bumps 82 disposed on the surface of the die 80. The elastic bumps 82 are disposed in a range of a retracting distance in a central direction of the center of the die 80. The retracting distance range is smaller than the original crystal grain area, and the non-electrically coupled elastic bumps 84 are disposed at the corners of the die 80 or The opposite sides of the elastic bumps are used to maintain the joint parallelism. Please refer to FIG. 9A, which is a structural diagram of a fifth embodiment of the elastic bump of the device of the flip-chip device of the present invention, wherein the device of the flip-chip device includes the die 80. The elastic bumps 92 are disposed on the surface of the crystal grain 80, and the elastic bumps 92 are arranged in a range of the retracting distance of the other axial direction of the center of the crystal grain 80, wherein the retracting distance range is 12 '1287265 The grain area is reduced. Please refer to FIG. BB, which is a schematic structural view of a sixth embodiment of the elastic bump of the device of the flip-chip device of the present invention, wherein the device includes the die 80, The surface of the die 80 has a plurality of elastic bumps 92, and the elastic bumps 92 are arranged in a range of a retracting distance in the other axial direction of the die 80, wherein the retracting distance ranges from the original crystal. The granules are also small, and a plurality of non-electrically coupled elastic bumps 94 are disposed on the corners of the dies 80 or on opposite sides of the elastic bumps. Used to maintain the joint parallelism. Referring to FIG. 10A, it is a schematic structural view of a seventh embodiment of the elastic bump of the device of the flip-chip device of the present invention, wherein the device for covering the crystal structure comprises the die 80. A plurality of elastic bumps 98 are disposed on the surface of the die 80. The elastic bumps 98 are disposed in a range of a retracting distance between one axis of the center of the die 80 and the other axis, wherein the retracting distance ranges from the original crystal. The grain area is still small. Please refer to FIG. 10B, which is a structural diagram of an eighth embodiment of the elastic bump of the device of the flip-chip device of the present invention, wherein the device of the flip chip comprises the die 80, The surface of the die 80 has a plurality of elastic bumps 98, and the elastic bumps 98 are arranged in a range of a retracting distance from one axis of the center of the die 80 and the other axis. The area is also small, and a plurality of non-electrically coupled elastic bumps 99 are disposed at the corners of the die 80 or opposite sides of the elastic bumps for Maintain joint parallelism. Please refer to FIG. 11A, which is a schematic structural view of a ninth embodiment of a die of a flip-chip device according to the present invention. The flip-chip device includes the crystal. A plurality of elastic bumps 100 are disposed on the surface of the die 80, and the elastic bumps 100 are disposed on one side of the die 80. Please refer to FIG. 11B, which is a structural diagram of a tenth embodiment in which the elastic bumps of the device for flip chip mounting of the present invention are arranged on the die, and the device for the flip chip device includes the die 80' The surface of the remote die 80 has a plurality of elastic bumps 100. The elastic bumps 100 are disposed on one side of the die 80, and a plurality of non-electrically coupled elastic bumps 102. The elastic bumps 102 are disposed at the corners of the die 80 or opposite sides of the elastic bumps to maintain the joint parallelism. Please refer to FIG. 11C, which is a structural diagram of an eleventh embodiment in which the elastic bumps of the device for flip chip mounting of the present invention are arranged in a die, and the device for flip chip mounting includes the die 80' The elastic bumps 100 are disposed on the surface of the die 80, and the elastic bumps 100 are disposed on the outer side of the die 80, and the non-electrically coupled elastic bumps 102A and 102B. The joined elastic bumps 102A are disposed at the corners of the die 80 or opposite sides of the resilient bumps 102B for maintaining the joint parallelism. The various embodiments described above can be used in the context of a plurality of dies (not shown). The features and effects of the present invention can be described as follows: 1. The bumps are concentrated inwardly at the center of the die to prevent delamination of the glue around the die due to thermal stress, thereby ensuring the quality of the internal contacts. 2. The bump contacts are clustered inward at the center of the die. The resistance of the contacts is 14 t mi265. 3. The bumps are inwardly displaced to extend the distance of the ambient air. It can increase the reliability of 4. In order to save the use of conductive bonding adhesive, it can directly save costs by using non-conductive bonding adhesive. The field can be used to avoid different directions of bending caused by the overflow. Constrained hair: better: the implementation of the example, not within the scope of this, combined with Chen Ming. The patent in this case [Simple description of the map] The first picture shows the use of the familiar cover Jingjie # The second picture is the use of another -;:! Schematic diagram of the structure of the elastic conductive bumps of the flip-chip structure. The third diagram of the structure of the elastic conductive bumps of the flip-chip structure is the arrangement of the bumps of the conventional flip-chip I. The fourth figure is the glass flip-chip of the conventional flip-chip structure. The fifth diagram of the structure of the device of the present invention is a schematic view of the structure of the device of the present invention, and the second block is a sectional view of the second block; Schematic diagram of the projection of the b-bump of the U-B. The U-shaped figure of the second embodiment of the Uq is the elastic projection of the third embodiment of the present invention. The seventh embodiment of the present invention is a device for flip-chip mounting of the present invention. FIG. 8 is a schematic view showing the structure of the second embodiment of the present invention; the eighth embodiment is a schematic view of the third embodiment of the present invention; Figure B is a schematic view showing the structure of the fourth embodiment of the elastic bump of the device of the flip-chip device of the present invention arranged on the die; ^ ninth A is the elastic bump of the device of the flip-chip device of the present invention arranged on the die A schematic structural view of a fifth embodiment; ® ninth B is a device for flip chip mounting of the present invention FIG. 10 is a schematic structural view of a seventh embodiment of the present invention, in which the elastic bumps of the present invention are arranged in the die; The figure is a schematic structural view of an eighth embodiment of the elastic bump of the device of the flip-chip device of the present invention disposed on the die; and the eleventh A is the elastic bump of the device of the flip-chip device of the present invention disposed on the die The structure of the ninth embodiment is not intended, and the eleventh B is a schematic structural view of the tenth embodiment in which the elastic bumps of the device for flip chip mounting are arranged in the die; and the eleventh C-picture is A schematic diagram of the elliptical structure in which the elastic bumps of the device of the flip-chip device are arranged in the eleventh embodiment. [Description of main components] Wafers 10, 20, 30, 34 Bonding pads 12 16 , I2 § 7265 Polymerization Elastic bump formed by material 14 Metal layer 16 made of gold Glass substrate 18 Polymer bump 21 Conductive contact 22 Lower metal layer 23 Upper metal layer 24 Metal layer 25
保護膜 26 彈性凸塊 28、52、74、82、92、98、 100 凸塊 玻璃基板 導電接合膠 晶粒 31 、 36 、 60 35 37 50 、 72 、 80 接合膠 53 基板 54 非導電接合膠 55 電極 56 第一金屬層 58 第二金屬層 62Protective film 26 Elastic bumps 28, 52, 74, 82, 92, 98, 100 Bump glass substrate Conductive bonding paste 31, 36, 60 35 37 50, 72, 80 Bonding paste 53 Substrate 54 Non-conductive bonding paste 55 Electrode 56 first metal layer 58 second metal layer 62
非電性連結之彈性凸塊 76、84、94、99、102A、102B 17Non-electrically coupled elastic bumps 76, 84, 94, 99, 102A, 102B 17