1281751 九、發明說明： 【發明所屬之技術領域】 本發明提供一種橫向電場式（In-Plane Switching ; IPS)之 液晶顯示器，特別是提供一種邊緣電場切換式（Fringed Field Switching ; FFS)液晶顯示器，以及其製造方法。 【先前技術】1281751 IX. Description of the Invention: [Technical Field] The present invention provides an In-Plane Switching (IPS) liquid crystal display, and more particularly to provide a Fringed Field Switching (FFS) liquid crystal display. And its manufacturing method. [Prior Art]
在目前的顯示器產業中，液晶顯示器（Liquid Crystal Display ; LCD)，憑藉著其具有完全純平面、重量輕、節約能 源、低電磁輻射等優點，已經逐漸地將陰極射線管（cathode Ray Tube)取代，而成為顯示器中的主流。 不過，由於液晶分子之長軸與短軸方向的折射率並不一 致:因此，當從不同角度觀看液晶顯示器之螢幕時，隨著視角 不同’所看刺畫面也就不—樣^當視角不斷變大時，將出現 對，度下降、顏色改錢階逆鮮現象。針對這些弱點， 陸縯開發出了各式廣視角技術，以解決上述問題。In the current display industry, liquid crystal displays (LCDs) have gradually replaced cathode ray tubes with their advantages of completely pure plane, light weight, energy saving, and low electromagnetic radiation. And become the mainstream in the display. However, since the refractive indices of the long-axis and the short-axis directions of the liquid crystal molecules are not uniform: when viewing the screen of the liquid crystal display from different angles, the viewing angle is different as the viewing angle is different. When it is big, there will be a phenomenon of a decrease in the degree and a change in the color of the money. In response to these weaknesses, Lu Yan has developed a variety of wide viewing angle technologies to solve the above problems.
其中，又以多區域垂直配向（廳咖她VerticaJ 與橫向電場技術，為目前廣視角技術 (Fringe Field Switching ； FFS) ，術 '則是橫向電場技術中的—個分支，由於其具有高穿透 又、廣視角與低色差等特性，更是被視為深具潛力的技術之一。 頻干ί參Γί辛1夕1，為習知技術之邊緣電場切換式液晶 二含； =示4==晶顯: 1 笛3、7$通線1^11、複數條資料、線17以及-接觸 圖則為第“樣B截線之面不則 5Among them, the multi-area vertical alignment (the VerticaJ and the transverse electric field technology, the current Fringe Field Switching (FSS), the technique is a branch of the transverse electric field technology, due to its high penetration Moreover, the wide viewing angle and low chromatic aberration characteristics are regarded as one of the potential technologies. Frequency ί ί Γ 辛 1 1 1 1 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , = crystal display: 1 flute 3, 7 $ pass line 1 ^ 11, multiple data, line 17 and - contact map is the first "sample B section of the face is not 5
1281751 睛參閱第1(a)、第1 λ# 式液晶顯示器之製造步驟，(么緣換 並於其上形成共通^12 A下么5先^供一基板n， 11上，並蝕刻兮t /、_人，塗佈一第一金屬層於基板 其中，i:if 與一 示。其後，形成一閘極、=12=接，如第1㈦圖所 極線13與共通線U1。秋後 上，並用以被覆閘 分16於閘極絕緣層14 3，=:通道部们5與-摻雜部 ，侧G 'ί閘極絕緣層上’並被覆住整個基板11。 r;? r ^^：：8 t ί献層18，她雜171處形成接觸孔19。 取後再於鈍化層18上，形成覆蓋接觸孔19之畫素電極⑽。 所示’f知技術之邊緣電場切換式液晶顯 電2與晝素電極之間’有兩層介電層，即 i丘:甬^/、鈍化層18，共通線111則夾於閘極絕緣層14 之間。由於其介電層厚度較厚的緣故，在偶(正） 圖％與奇（負）圖場間的驅動電壓’會變得不平衡，進一步造 成影像殘留（Image Sticking )的問題。 因此，本發明之主要目的，即在於提供一種液晶顯示器， 特別是一種邊緣電場切換式液晶顯示器，以及其製造方法，其 特徵在於將介電層之數目與厚度降低，以克服先前技術中有’關 影像殘留^問題。另外，除了上述優點外，由於本發明所提供 之液晶顯*賴造方法，其細現行之液晶齡^製造方法£ 基礎，進行部分製程之更動，其可行性極高，故具有 可利用性。 < 6 1281751 【發明内容】 -錄達到上述目的，本發明提供—種液晶顯示^，特別是 了ϊί緣電場切換式液晶顯示器，以及其製造方法，可以降低 二通電極與畫素電極間之介電層之數目與厚度，因此可改 善影像殘留的問題。 ^7達到上述目的，本發明所提供之液晶顯示器製造方 1^^下列步驟：提供一基板；形成一第一金屬層於基板上； 金屬層’以形成複數條閘極線；形成—共通電極於 成—第二金屬層於基板上；侧該第二金屬層，以 4電極、一第二電極、一共通線與複數條資料線；以 ,,^旦素電極，其與共通電極重疊，其中閘極線與資料線 ^查=錯·繞形成_晝素區域，共通電極與晝素電極係配置 =旦素區域，第一電極與晝素電極相連接，第二電極則與資料 線之一相連接，且共通電極與共通線直接連接。 、 器 成 八較佳者，液晶顯示器，係為一邊緣電場切換式液晶顯示 其較佳者，共通電極與晝素電極，係由透明導電材料所製 其較佳者，共通線係與資料線平行。 電極佳者，更包含形成一鈍化層，其位於共通電極與晝素 。其較佳者，更包含形成一閘極絕緣層，以被覆閘極線與基 其較佳者，更包含形成一半導體層與一摻雜層於 層與基板上；_半導體層與摻雜層，以形成-通道盘ί 摻雜部分，對應於閘極線之一；形成一第一透 ^ 部分與_絕_上；形成第二金屬層於第— 7 1281751 形成-光阻層於第二金屬層上 -透金屬層與第 第-預定位置⑽應紅電極、料電極，其中 其車父佳者，更包含利用一光阻灰化製 ίΐϊ置i之光阻層’而殘留下來之剩餘光阻層，ΐ對ΐίΐ預 電極、第二電極與共通線。 _應至第- 與-ί較ϊί=包it瓣雜部分，娜成—第—摻雜部分 摻雜粉’其分別對應至第-電極與第二電極；以及 餘刻該第二金屬層，以職共猶。 ㈣，以及 上.ίίίΐ ’更包含移除剩餘細層；形成—鈍化層於基板 -笛餘ί—第二預定位置上之純化層，以形成—接觸孔；形成 土一透明導電層於基板上；以及侧第二透明導電芦，以 成里素電極，其中接觸孔係用以連接第一電極與晝素i極。y 鱼一Ϊ較佳者，更包含蝕刻摻雜部分，以形成一第一摻雜部分 一一弟二摻雜部分，其分別對應至第一電極與第二電極。 ^其較佳者，更包含利用一光阻灰化製程，移除位於第二預 疋位置上之光阻層，而殘留下來之剩餘光阻層，則對應至第一 電極、第二電極與共通線。 其較佳者，更包含蝕刻該第二金屬層，以形成共通線。 .其較佳者，更包含移除剩餘光阻層；形成一鈍化層於基板 ^餘刻一第三預定位置上之鈍化層，以形成一接觸孔；形成 一第二透明導電層於基板上；以及蝕刻第二透明導電層，以形 成晝素電極，其中接觸孔係用以連接第一電極與晝素電極。 8 1281751 通電極與畫素電極間之介電層之數目，改善影像殘留的問題。 【實施方式】 為了更進一步描述本發明所提供之液晶顯示器、邊緣電場 切換式液晶顯示器、以及製造方法，其詳細内容與實施方式， 將會藉由下述之各較佳實施例加以說明。值得注意的是，以下 之各較佳實施例，其目的僅在於說明本發明之詳細内容與實施 方式，使其易於了解，並非用以限縮本發明之申請專利^圍。 透過本發明所提供之液晶顯示器製造方法，其可降低夾於 共通電極與畫素電極間之介電層之數目與厚度，以進一步改善 影像殘留的問題，以達到本發明之預定目的。 第一實施例 明參閱第2 (a)圖，其為本發明所提供之第一實施例中， 某一畫素區域之平面示意圖。每一畫素區域係由複數條閘極線 22與複數條資料線272彼此交錯以圍繞而成，且包含：一共 通電極26、一具有複數個開口之畫素電極21〇、一共通線271 平行於資料線272以及一接觸孔29。 吞月麥閲弟2 (b)圖，為第2 (a)圖沿A-A線之剖面示意 -。現將本發明所提供之第一實施例，其製造方法敘述如下二 首，:提供基板21，並將第一金屬層形成於其上。其次，蝕 刻该第一金屬層，以形成複數條閘極線22，接著再塗敷一閘 ，絕緣層23，以被覆住閘極線22以及部分的基板2卜然後， ^序於閘娜緣層23上，形成通道部分24、摻騎分25與 二通電極26 ’其中摻雜部分25更包含第一摻雜部分251與第 =雜部分252。再者，分別於第一摻雜部分251與第二換雜 I ^\252上，形成第一電極2721、第二電極2722、資料線272 第2/C) _所不之共通線2711，其中第一電極2721若為 源極，則第二電極2722貝〗J可為沒極。其二欠，於第一電極π 1281751 第二電極2722上形成一鈍化層28，並用以被覆住整面基板 21，接著再對鈍化層28進行蝕刻，於第一電極2721上形成接 觸孔29。最後，在鈍化層28上，形成一覆蓋住接觸孔29之 畫素電極210，以連接第一電極2721。 一另外，參考第2(c)圖，其為第2 (a)圖沿B_B線之剖 面不意圖。在本實施例中所提供的液晶顯示器中，於共通電極 26與晝素電極210之間，僅存在一層介電層—鈍化層烈，而 共通線271則是夾於鈍化層28與共通電極26之間，故可藉此 改善影像殘留的現象。在本實施例中，共通電極％與畫素電 _ 極21〇 ’建議由銦錫氧化物（Indium_Tin〇xide ; ΙΤ〇)等透明 導電材料所製成。 第二實施例 第3 (a)〜3 (e)圖為本發明之第二實施例之邊緣電場切 換式液晶顯示器，其利用半色調技術製程（Half_T〇ne ^chnology process) ’以同時定義共通電極與資料線之製程示 意圖。其中’第3 (a)〜3 (e)圖之右半部為第2 (a)圖沿 A-A線之剖面示意圖，而其左半部則為第2 (心圖沿線 之剖面示意圖。 _ 首先如第3 (a)圖所示，依序於閘極絕緣層23與基板21 上，形成半導體層與摻雜層。其次，對半導體層與摻雜層進行 蝕刻，以於一閘極線22之上，形成通道部分24與摻雜部分 253。再者，於摻雜部分253與閘極絕緣層幻上，形成一第一 透明導電層261，並再於其上形成第二金屬層2711。其中，第 ’透明導電層261，亦建議由銦錫氧化物等透明導電材料等所 製成。然後，於第二金屬層2711上，再形成一光阻層31。緊 接著，再利用半色調技術製程，於一第一預定位置上，對光阻 if進行完全侧，而在另—第二預賴置上，對光阻層 進行部分韻刻。 11 1281751 如第3 (b)圖所示，再於第一預定位置上，對第二金屬 層與第一透明導電層261進行蝕刻，以形成第一電極2721、 第二電極2722，以及如第2 (c)圖所示之共通電極26，其中 第一預定位置，係對應至一閘極線22之一。 ^ 如第3 (c)圖所示，糊光阻灰化製程（ph〇t〇Resistance Ashing Process)，移除位於第二預定位置上之光阻層。其中， 殘留下來之剩餘光阻層32，則對應至第一電極2721、第二電 極2722與共通線271。亦即，第二預定位置，係對應至一電 極2721、二電極2722與通線271以外之處。 心 如第3 (d)圖所示，蝕刻摻雜部分253，以形成第一摻雜 部分251與第二摻雜部分252，分別對應至第一電極2721與 第二電極2722，以及蝕刻該第二金屬層2711，以形成共通線 271。或者疋先餘刻該第二金屬層2711，以形成共通線271， 再蝕刻摻雜部分253，以形成第一摻雜部分251與第二摻雜部 分252亦可。 ’ 如第3 (e)圖所示，首先將剩餘光阻層32完全移除後， 形成一鈍化層28，以完全被覆住基板21。其次，再於一第三 預定位置上，對鈍化層28進行蝕刻，以形成接觸孔29。然後， 再於整面基板21上，形成第二透明導電層，而對其蝕刻後， 即可形成畫素電極210。其中，晝素電極21〇可藉由接觸孔29, 而與第一電極2721電性連接。 第三實施例 請參閱第4 (a)圖，其為本發明所提供之第三實施例中， 某一畫素區域之平面示意圖。每一晝素區域係由複數條閘極線 42與複數條資料線462彼此交錯以圍繞而成，且包含··一共 通電極47、一具有複數個開口之畫素電極41〇、一平行於資料 線462之共通線461以及一接觸孔49。 12 1281751 W參閱第4⑻® ’為第4 (a)圖沿a_a 圖。現將本發明所提供之第三實施例，其製 不思 首先’提供基板41，並將第一金屬層形成;^上^^下。 刻該第-金屬層，以形成複數條閘極線42 =，餘 極絕緣層43，以被覆住閘極線42以及部分的基板41、—閘 依序於閘極輯層43上，軸通道部分44^ °乂、j， m部分45更包含第一換雜部分451與第二°摻刀雜二 者，分別於第一摻雜部分451與第二摻雜部分4521 刀 j第-電極462卜第二電極4622、資料線461281751 The eye is referred to the manufacturing steps of the 1st (a) and 1st λ# type liquid crystal displays, (the rim is replaced by a common ^12 A, 5 first) for a substrate n, 11 and etched /, _ person, coating a first metal layer on the substrate, i: if and one. After that, forming a gate, = 12 = connected, as in the first (seven) figure of the line 13 and the common line U1. Afterwards, and used to cover the gate 16 on the gate insulating layer 14 3, =: channel portion 5 and - doped portion, side G 'ί gate insulating layer ' and covered the entire substrate 11. r;? r ^^::8 t 层 layer 18, her 171 is formed with a contact hole 19. After taking on the passivation layer 18, a pixel electrode (10) covering the contact hole 19 is formed. There is two dielectric layers between the liquid crystal display 2 and the halogen electrode, that is, i: 甬^/, the passivation layer 18, and the common line 111 is sandwiched between the gate insulating layers 14. Due to the dielectric layer For thicker thicknesses, the driving voltage ' between the even (positive) graph % and the odd (negative) field becomes unbalanced, further causing problems with image sticking. Therefore, the main object of the present invention That is, it is to provide a liquid crystal display, particularly a fringe field switching liquid crystal display, and a manufacturing method thereof, which are characterized in that the number and thickness of dielectric layers are reduced to overcome the problem of 'off image residuals' in the prior art. In addition, in addition to the above advantages, due to the liquid crystal display method provided by the present invention, the current liquid crystal age manufacturing method is based on the basis of the conventional method, and the modification of the partial process is extremely feasible, so that it is available. < 6 1281751 SUMMARY OF THE INVENTION - The present invention provides a liquid crystal display, in particular, a 电场 缘 edge electric field switching type liquid crystal display, and a manufacturing method thereof, which can reduce the gap between the two-pass electrode and the pixel electrode The number and thickness of the dielectric layer can improve the problem of image sticking. ^7 To achieve the above object, the liquid crystal display manufacturer of the present invention provides the following steps: providing a substrate; forming a first metal layer on the substrate a metal layer 'to form a plurality of gate lines; a common electrode formed on the second metal layer on the substrate; a side second gold The genus layer is composed of a 4-electrode, a second electrode, a common line and a plurality of data lines; and a pixel, which overlaps with the common electrode, wherein the gate line and the data line are checked = wrong and formed around _ In the halogen region, the common electrode and the halogen electrode system are arranged = the denier region, the first electrode is connected to the halogen electrode, the second electrode is connected to one of the data lines, and the common electrode is directly connected to the common line. Preferably, the liquid crystal display is a preferred edge electric field switching liquid crystal display. The common electrode and the halogen electrode are preferably made of a transparent conductive material, and the common line is parallel to the data line. Preferably, the electrode further comprises forming a passivation layer located at the common electrode and the halogen. Preferably, the method further comprises forming a gate insulating layer to cover the gate line and the substrate, and further comprising forming a semiconductor layer and a doping layer on the layer and the substrate; _ semiconductor layer and doping layer Forming a - channel plate ί doped portion corresponding to one of the gate lines; forming a first transparent portion and _ _ _ upper; forming a second metal layer at the first - 7 1281751 forming a photoresist layer in the second The metal layer-transmissive metal layer and the first-predetermined position (10) should be red electrodes and material electrodes, wherein the car-passor is better, and the remaining portion is left by using a photo-resisting ashing layer. The photoresist layer, the ΐ ΐ ΐ ΐ pre-electrode, the second electrode and the common line. _ should be the first - and - ί ϊ = = package it valve part, Na Cheng - the first doped part of the doping powder 'which corresponds to the first electrode and the second electrode respectively; and the second metal layer, I am still in office. (4), and upper. </ RTI> </ RTI> further comprising removing the remaining fine layer; forming a passivation layer on the substrate - a refinement layer at a second predetermined position to form a contact hole; forming a soil-transparent conductive layer on the substrate And a second transparent conductive reed on the side to form an iridium electrode, wherein the contact hole is used to connect the first electrode with the halogen element. Preferably, the y fish further comprises an etch doped portion to form a first doped portion, a second doped portion, which corresponds to the first electrode and the second electrode, respectively. Preferably, the method further comprises: removing the photoresist layer located at the second pre-deposition position by using a photoresist ashing process, and remaining the remaining photoresist layer corresponding to the first electrode and the second electrode; Common line. Preferably, it further comprises etching the second metal layer to form a common line. Preferably, the method further comprises: removing a residual photoresist layer; forming a passivation layer on the substrate to form a passivation layer on a third predetermined position to form a contact hole; forming a second transparent conductive layer on the substrate And etching the second transparent conductive layer to form a halogen electrode, wherein the contact hole is used to connect the first electrode and the halogen electrode. 8 1281751 The number of dielectric layers between the electrode and the pixel electrode improves the image retention problem. [Embodiment] In order to further describe the liquid crystal display, the edge electric field switching type liquid crystal display, and the manufacturing method provided by the present invention, the details and embodiments thereof will be described by the following preferred embodiments. It is to be noted that the following detailed description of the preferred embodiments of the present invention is intended to be illustrative and not restrictive. According to the liquid crystal display manufacturing method provided by the present invention, the number and thickness of the dielectric layers sandwiched between the common electrode and the pixel electrode can be reduced to further improve the image sticking problem to achieve the intended purpose of the present invention. First Embodiment Referring to Figure 2(a), which is a plan view of a pixel region in a first embodiment of the present invention. Each of the pixel regions is formed by interlacing a plurality of gate lines 22 and a plurality of data lines 272, and includes: a common electrode 26, a pixel electrode 21 having a plurality of openings, and a common line 271. Parallel to the data line 272 and a contact hole 29.吞月麦读弟 2 (b), for the 2 (a) diagram along the A-A line -. The first embodiment of the present invention, the manufacturing method thereof, will be described as follows: a substrate 21 is provided, and a first metal layer is formed thereon. Next, the first metal layer is etched to form a plurality of gate lines 22, and then a gate, an insulating layer 23 is applied to cover the gate lines 22 and a portion of the substrate 2, and then On the layer 23, a channel portion 24, a doping portion 25 and a two-pass electrode 26' are formed, wherein the doping portion 25 further comprises a first doping portion 251 and a first doping portion 252. Furthermore, a first electrode 2721, a second electrode 2722, a second line 2/C of the data line 272, and a common line 2711 are formed on the first doping portion 251 and the second impurity I ^\252, respectively. If the first electrode 2721 is a source, the second electrode 2722 can be a pole. Secondly, a passivation layer 28 is formed on the second electrode 2722 of the first electrode π 1281751, and is used to cover the entire substrate 21, and then the passivation layer 28 is etched to form a contact hole 29 on the first electrode 2721. Finally, on the passivation layer 28, a pixel electrode 210 covering the contact hole 29 is formed to connect the first electrode 2721. Further, referring to Fig. 2(c), it is a cross-sectional view taken along line B_B of the second (a) drawing. In the liquid crystal display provided in this embodiment, between the common electrode 26 and the halogen electrode 210, there is only one dielectric layer-passivation layer, and the common line 271 is sandwiched between the passivation layer 28 and the common electrode 26. Therefore, it is possible to improve the phenomenon of image sticking. In the present embodiment, the common electrode % and the pixel electrode 21' are suggested to be made of a transparent conductive material such as indium tin oxide (Indium_Tin〇xide; ΙΤ〇). Second Embodiment 3(a) to 3(e) are diagrams showing a fringe field switching liquid crystal display according to a second embodiment of the present invention, which utilizes a halftone process (Half_T〇ne ^chnology process) to simultaneously define common Schematic diagram of the process of electrodes and data lines. The right half of '3' (a) to 3 (e) is the cross-sectional view of the 2nd (a) diagram along the line AA, and the left half is the 2nd section (the schematic diagram of the section along the heart diagram. _ First As shown in FIG. 3(a), a semiconductor layer and a doped layer are formed sequentially on the gate insulating layer 23 and the substrate 21. Next, the semiconductor layer and the doped layer are etched to form a gate line 22 Above, the channel portion 24 and the doping portion 253 are formed. Further, a first transparent conductive layer 261 is formed on the doped portion 253 and the gate insulating layer, and a second metal layer 2711 is formed thereon. The 'transparent conductive layer 261 is also made of a transparent conductive material such as indium tin oxide. Then, a photoresist layer 31 is formed on the second metal layer 2711. Then, halftone is reused. The technical process is to perform a full side of the photoresist if at a first predetermined position, and to perform a partial rhyme on the photoresist layer on the other second pre-position. 11 1281751 as shown in Figure 3 (b) And etching the second metal layer and the first transparent conductive layer 261 to form the first electrode 2721 at the first predetermined position. a second electrode 2722, and a common electrode 26 as shown in FIG. 2(c), wherein the first predetermined position corresponds to one of the gate lines 22. ^ As shown in FIG. 3(c), the paste The photoresist ashing process (ph〇t〇Resistance Ashing Process) removes the photoresist layer located at the second predetermined position, wherein the remaining remaining photoresist layer 32 corresponds to the first electrode 2721 and the second electrode 2722 and common line 271. That is, the second predetermined position corresponds to an electrode 2721, the second electrode 2722 and the line 271. As shown in the third (d), the doped portion 253 is etched to Forming a first doping portion 251 and a second doping portion 252, respectively corresponding to the first electrode 2721 and the second electrode 2722, and etching the second metal layer 2711 to form a common line 271. The two metal layers 2711 are formed to form the common line 271, and the doped portion 253 is etched to form the first doped portion 251 and the second doped portion 252. ' As shown in Fig. 3(e), the remaining After the photoresist layer 32 is completely removed, a passivation layer 28 is formed to completely cover the substrate 21. Next, The passivation layer 28 is etched at a third predetermined position to form a contact hole 29. Then, a second transparent conductive layer is formed on the entire substrate 21, and after etching, a pixel electrode is formed. 210. The halogen electrode 21 is electrically connected to the first electrode 2721 through the contact hole 29. For the third embodiment, please refer to FIG. 4(a), which is a third embodiment provided by the present invention. A plan view of a pixel region. Each of the pixel regions is formed by interleaving a plurality of gate lines 42 and a plurality of data lines 462, and includes a common electrode 47 and a plurality of pixels. The open pixel electrode 41A, a common line 461 parallel to the data line 462, and a contact hole 49. 12 1281751 W See section 4(8)® ' for the 4th (a) diagram along a_a. The third embodiment of the present invention, which is provided by the present invention, first provides a substrate 41 and forms a first metal layer. The first metal layer is engraved to form a plurality of gate lines 42 =, a residual insulating layer 43 to cover the gate lines 42 and a portion of the substrate 41, the gates are sequentially ordered on the gate layer 43, the axial channel The portion 44^°乂, j, m portion 45 further includes both the first impurity-doping portion 451 and the second-degree doping-knife, respectively, at the first doping portion 451 and the second doping portion 4521, the j-th electrode 462 Bu second electrode 4622, data line 46
St共通線461，其中第一電極4621若為源極則第 電極，則可歧極。再形成共通電極47，並於」t m第二電極4622上形成一鈍化層48，並用以被 基’接著再對純化層48進行侧，於第覆 49。最後，在鈍化層48上，形T =土 奶之畫素電極㈣，以連接第一電極彻。 4接觸孔 ^卜，參考第4 (〇圖，其為第4⑷圖沿b_ 面不思圖。在本實補巾所提供職晶顯 通雷二 47與畫素電極之間，僅存在一層介電層一中純= i3i61貝沒夾於共㈣極47與閘極絕緣層43 “，故可 =改善雜殘㈣現象。在本實施财，魏電極47盥食 素電極41G ’建議由銦錫氧化物等透卿衡料所製成，、旦 ―綜上所述，本發明所提供之第—實施例、第二實施例 :!施^^其ί程之主要重點皆在於蝕刻該第二金屬層，以形 j弟二電極m共麟缝祕料I在本發明之 實施例與第三實施射，第—電極、第二電極、 岐棚_道娜侧製針所形成，而i 中，則是於不同之微影钱刻製輯形成。其 中，第一實施例與第三實施例之差異，在於定義第一電極、第 -電極、共通線與複數條·線，以及定義紐電極之微職 13 1281751 —電^ t n製程’以同_刻出共料極、第 Ί：極第一電極、共通線與複數條資料線。 藉由本發明所提供之液晶顯示器製造方法，可 介電層之數目與厚度，並可 頻干琴的問題。因此’本發明所提供之液晶 顯不态、邊緣電％切換式液晶顯示器、以及其製造方 知技射關賴缺點，故賴示^麵具有不可磨 、貝、’深具產業上之彻價值，絲法提&發日轉利申請。 A以亡所述，·_較佳實棚詳細朗本發明之技術内 谷’而·非_本發_申請專利麵。因此，本發哪由熟 人ί ’任施匠思而為諸般修飾，而作些微的改變與調 仍都應視為本發明之進—步實施狀況。謹請 貝明鑑，並祈惠准，是所至禱。 【圖式簡單說明】 第1 (a)圖為先前技術之平面示意圖； J 1广）圖為第1 (a)圖沿A_A線之剖面示意圖； 。（c)圖為第1⑷圖沿B_B線之剖面示意圖； =圖為本發明之第-實施例之平面示意圖； ^ j )圖為第2⑷圖沿Α_Α線之剖面示意圖； (')圖為第2 (a)圖沿Β_Β線之剖面示意圖； 楚4 iA :i(e)圖為本發明第二實施例之製程示意圖； ί:S圖為t發明第三實施例之平面示意圖； : 圖為第4 (a)圖沿A-A線之剖面示意圖；以及 第4(c)圖為第4(a)圖沿b_b線之剖面示意圖。 1281751 【主要元件符號說明】 11,21,41 基板The St common line 461, wherein the first electrode 4621 is a source and a first electrode, can be a dipole. A common electrode 47 is formed, and a passivation layer 48 is formed on the second electrode 4622, and is used to be side-by-side with respect to the purification layer 48, on the fourth layer 49. Finally, on the passivation layer 48, a T = earthy pixel electrode (4) is formed to connect the first electrode. 4 contact hole ^ Bu, refer to the 4th (Figure, which is the 4th (4) figure along the b_ face is not considered. There is only one layer between the Jingjing Xiantong Lei 47 and the pixel electrode provided by the real towel. The electric layer one pure = i3i61 shell is not sandwiched between the common (four) pole 47 and the gate insulating layer 43 ", so it can be = improve the phenomenon of miscellaneous (four). In this implementation, the Wei electrode 47 盥 电极 electrode 41G 'recommended by indium tin The oxides and the like are made of a transparent material, and in summary, the first embodiment of the present invention, the second embodiment: the main focus of the process is to etch the second The metal layer is formed by the embodiment of the present invention and the third embodiment of the first electrode, the first electrode, the second electrode, and the shackle _Dona. The difference between the first embodiment and the third embodiment is that the first electrode, the first electrode, the common line and the plurality of lines, and the definition of the new electrode are defined. The micro-service 13 1281751 - electric ^ tn process 'to the same _ engraved common pole, the third: the first electrode, the common line and a plurality of data lines. The liquid crystal display manufacturing method provided by the invention can have the number and thickness of the dielectric layers, and can solve the problem of the piano. Therefore, the liquid crystal display, the edge electric % switching liquid crystal display provided by the invention, and the manufacture thereof Fang knows that the technical shoot depends on the shortcomings, so it depends on the inability to grind, the shell, and the deep value of the industry, the silk method and the daily transfer application. A is said to be dead, _ better The shed is detailed in the technology of the invention, and the patent is not patented. Therefore, the hair is modified by the acquaintance ί ', and slight changes and adjustments should be considered. It is the implementation status of the invention. I would like to ask Beimingjian, and pray for the right, it is the prayer. [Simplified illustration] Figure 1 (a) is a schematic diagram of the prior art; J 1 wide) 1(a) is a schematic cross-sectional view taken along line A_A; (c) is a schematic cross-sectional view taken along line B_B of Fig. 1(4); = Fig. 2 is a plan view of the first embodiment of the invention; ^ j) is 2(4) Schematic diagram of the section along the Α_Α line; (') is a schematic diagram of the section along the Β_Β line of the 2nd (a) diagram; iA: i(e) is a schematic diagram of a process according to a second embodiment of the present invention; ί: S is a plan view of a third embodiment of the invention; FIG. 4 is a cross-sectional view along line AA of FIG. 4(a); Figure 4(c) is a schematic cross-sectional view taken along line b_b of Figure 4(a). 1281751 [Description of main component symbols] 11, 21, 41 substrate
12, 26,47 13,22,42 14, 23, 43 15, 24, 44 16, 25, 45, 253 17, 272, 462 18, 28,48 19, 29, 49 31 32 110, 210, 410 111，271，461 171 172 261 251，451 252, 452 2711 2721，4621 2722,4622 共通電極 閘極線 閘極絕緣層 通道部分 摻雜部分 資料線 純化層 接觸孔 光阻層 剩餘光阻層 晝素電極 共通線 源極 汲極 第一透明導電層 第一摻雜部分 第二摻雜部分 第二金屬層 第一電極 第二電極 1512, 26,47 13,22,42 14, 23, 43 15, 24, 44 16, 25, 45, 253 17, 272, 462 18, 28,48 19, 29, 49 31 32 110, 210, 410 111 ,271,461 171 172 261 251,451 252, 452 2711 2721,4621 2722,4622 common electrode gate line gate insulating layer channel partially doped part data line purification layer contact hole photoresist layer residual photoresist layer germanium electrode common line Source drain first transparent conductive layer first doped portion second doped portion second metal layer first electrode second electrode 15