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TWI276037B - Combined inspection circuit and method for inspecting TFT liquid crystal display panels - Google Patents

Combined inspection circuit and method for inspecting TFT liquid crystal display panels Download PDF

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Publication number
TWI276037B
TWI276037B TW93124474A TW93124474A TWI276037B TW I276037 B TWI276037 B TW I276037B TW 93124474 A TW93124474 A TW 93124474A TW 93124474 A TW93124474 A TW 93124474A TW I276037 B TWI276037 B TW I276037B
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TW
Taiwan
Prior art keywords
multiplexers
liquid crystal
crystal display
display panel
combined detection
Prior art date
Application number
TW93124474A
Other languages
Chinese (zh)
Other versions
TW200606801A (en
Inventor
Fu-Yuan Shiau
Chih-Lung Yu
Meng-Chi Liou
Chien-Chih Jen
Original Assignee
Chunghwa Picture Tubes Ltd
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Application filed by Chunghwa Picture Tubes Ltd filed Critical Chunghwa Picture Tubes Ltd
Priority to TW93124474A priority Critical patent/TWI276037B/en
Publication of TW200606801A publication Critical patent/TW200606801A/en
Application granted granted Critical
Publication of TWI276037B publication Critical patent/TWI276037B/en

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

This invention uses a combined circuit to inspect layout in the fabrication of TFT matrix of display panels. In the past, designs of different circuit layouts for inspection are needed for different inspection machines. This invention is designed to use plural circuit switches and connecting wires to introduce a short-ring layout and a shorting-bar layout, or use a multiplexer as well as plural circuit switches and connecting wires to introduce a short-ring layout and a shorting-bar layout. This invention allows switching and selection of various inspection methods via the plural circuit switches, so as to increase utilization rate of the equipment and to reduce cost.

Description

1276037 ' * 1 f , .九、發明說明: 【發明所屬之技術領域】 本發明係對於液晶顯示面板薄膜電晶體陣列(Liquid Crystal Display Thin Film Transistor Array,簡稱 LCD TFT Array ) 製程中,對應於檢測機台所設計之佈線搭配問題所提出之 解決方法。 【先前技術】 液晶顯示裝置之面板檢測過程中,隨著使用不同的檢 測機台設備而需要設計不同電路檢測之佈線,以下為習用 的幾種電路檢測之佈線: 1 · 環狀短路佈線(short-ring lay out ) ••—種適用於曰本 MJC(Micronics Japan CO.,LTD)檢測機台之檢測佈線方式, 如1A圖之液晶顯示面板之顯示元件陣列佈線圖所 示,面板由閘極驅動端G ( gate driver )與資料驅動端 D (datadriver)拉出複數條資料線30與掃描線40相互 垂直交錯形成,而控制晝素顯示之薄膜電晶體丨〇設置 於資料線30與掃描線40交錯之位置,另掃描線40之間 藉有儲存電容20以CS ON GATE方式連接’畫素顯示即 藉此儲存電容20之充放電控制顯示。為檢測各連接薄 膜電晶體10等元件與四周佈線之正確性,該複數條資 料線30與掃描線40各有電路連接外部檢測設備’如圖 1A所示,複數條掃描線40連接有複數個間極端接觸 極板50,複數條資料線30連接有複數個資料端接觸極 板60,此複數個接觸極板(50,60 )係訊號輸入點作為 1276037 . f f f -檢測設備所設之探針所接觸的位置,以檢測其中各顯 示元件疋否良好,該複數個閘極端接觸極板50與資料 端接觸極板60各藉複數個阻抗65連接短路導線環70, 將檢測設備探針與各顯示元件所檢測出之數據導出, 判斷良率,此面板完成檢測後投入下一製程中,會依 面板切割線80方向切下,以繼續下一部分製程。如m 圖所不之環狀短路佈線局部電路示意圖可知,資料線 30或掃描線40連接有複數個接觸極板(5〇,6〇 ),檢測 设備之探針則接觸在接觸極板(5〇,6〇 )上。再藉阻抗 65將較大的靜電擴散至各資料線3〇或掃描線仞,以避 免靜電破壞面板晝素。 2·桿狀短路佈線(shorting_bar layout ): —種適用於pDI 公司檢測機台之檢測佈線方式,如2A圖所示係為習 用技術之桿狀短路佈線電路示意圖,此桿狀短路佈線 檢測方式並不使用探針檢測,缝測各連接薄膜電晶 體等元件與四周佈線之正確性,該複數條資料線或掃 描線各有電路連接外部檢測設備,如2B圖所示,複數 條掃描線經由閘極接觸極板共同連接於同一個短路導 線環,複數條資料線經由資料端接觸極板共同連接於 同一個外部基板電路短路導線環,相鄰兩個極板分別 連接不同的外部基板電路短路導線環。如2A圖所 不,閘極端接觸極板50為面板中閘極驅動端G之掃描 ,40所連接的複數個極板,相鄰兩個極板分別連 奇數閘極線130與偶數閘極線14〇,終端分別連接至 1276037 ,, '' , _可數閘極‘ G1與偶數閘極端G2 ;同理,資料線 連接有複數個資料端接觸極板60,相鄰的極板分別連 接可數資料線11〇與偶數資料線12〇,導線終端連接 有奇數資料端D1與偶數資料端D2 ,而此桿狀短路 佈線電路即藉奇數資料端D1 、偶數資料端D2 、奇 數閘極端G1與偶數閘極端G2將訊號輸入至晝素 内以仏測该面板内部顯示元件使否運作良好。如2b 圖所示係為習用技術之桿狀短路佈線局部電路示意 圖’此圖為2A圖之閘極驅動端g局部電路,其中複 數條掃描線40連接有複數個閘極端接觸極板5〇,相鄰 兩個極板形成奇偶極板分佈,分別連接奇數閘極線 130與偶數閘極線14〇,終端設置有奇數閘極端Q1 與偶數閘極端G2 ,可分別連接奇數端極板與偶數端 極板所傳之檢測訊號,實際實施時並不以分為兩組為 限’為增加檢測效率可分為複數組,即會設置有複數 條導線將分為複數組的極板訊號傳出至終端檢測。 3·為降低環狀短路佈線探針組成本,遂有所開發的 久世代陣列測试技術(Next Generation Array Test,簡稱 NGAT ),此技術可以降低探針的數量,降低成本。 唯此技術只能應用在MJC機台上,無法與PDI的機台 共用。 以上兩種習用檢測方式不同,因此面板中的佈線設計 也會因使用的檢測方式而也所不同,並會因此在佈線上受 限制,又因佈線不同使得製程產能不易搭配,造成光罩之 12760371276037 ' * 1 f , . 9. Description of the Invention: [Technical Field] The present invention relates to a liquid crystal display thin film transistor array (LCD TFT Array) process, corresponding to detection The solution proposed by the wiring design problem of the machine. [Prior Art] In the panel inspection process of a liquid crystal display device, it is necessary to design wirings for different circuit detections as different detection machine devices are used. The following are some conventional circuit detection wirings: 1 · Ring short circuit wiring (short -ring lay out ) ••—A type of inspection wiring method suitable for the MJC (Micronics Japan CO., LTD) inspection machine. The driving driver G (gate driver) and the data driving terminal D (datadriver) pull out a plurality of data lines 30 and the scanning lines 40 to form a vertical interdigitation, and the thin film transistor 昼 for controlling the pixel display is disposed on the data line 30 and the scanning line. At the position of 40 staggered, the storage capacitor 20 is connected to the scan line 40 in a CS ON GATE manner to display the pixel display, thereby charging and discharging the display of the storage capacitor 20. In order to detect the correctness of the components connecting the thin film transistor 10 and the surrounding wiring, the plurality of data lines 30 and the scanning lines 40 are respectively connected to the external detecting device' as shown in FIG. 1A, and the plurality of scanning lines 40 are connected to the plurality of scanning lines 40. During the extreme contact plate 50, a plurality of data lines 30 are connected to a plurality of data terminal contact plates 60, and the plurality of contact plates (50, 60) are signal input points as 1276037. fff - probes for detecting devices The contact position is to detect whether the display elements are good or not. The plurality of gate terminal contact plates 50 and the data terminal contact plates 60 are connected to each other by a plurality of impedances 65 to connect the short-circuit wire loops 70, and the detecting device probes are respectively The data detected by the display component is exported, and the yield is judged. After the panel completes the test and is put into the next process, it is cut according to the direction of the panel cutting line 80 to continue the next part of the process. As shown in the figure of the partial circuit diagram of the ring short circuit of m, the data line 30 or the scan line 40 is connected with a plurality of contact plates (5 〇, 6 〇), and the probe of the detecting device is in contact with the contact plate ( 5〇, 6〇). Then, by using the impedance 65, a large static electricity is diffused to each data line 3 or the scanning line 仞 to prevent static electricity from damaging the panel element. 2. Short-circuit wiring (shorting_bar layout): A kind of detection wiring method suitable for the detection machine of pDI company. As shown in Figure 2A, it is a schematic diagram of the rod-shaped short-circuit wiring circuit of the conventional technology. Without using the probe detection, the correctness of the components such as the connecting film transistor and the surrounding wiring is sewn, and the plurality of data lines or scanning lines are respectively connected to the external detecting device, as shown in FIG. 2B, and the plurality of scanning lines are passed through the gate. The pole contact plates are commonly connected to the same short-circuit wire loop, and the plurality of data wires are connected to the same external substrate circuit short-circuit wire loop via the data terminal contact plates, and the adjacent two plates are respectively connected with different external substrate circuit short-circuit wires. ring. As shown in Fig. 2A, the gate extreme contact plate 50 is a scan of the gate drive end G of the panel, 40 is connected to a plurality of plates, and the adjacent two plates are respectively connected with an odd gate line 130 and an even gate line. 14〇, the terminal is connected to 1276037, respectively, '', _ countable gate 'G1 and even gate extreme G2; similarly, the data line is connected with a plurality of data end contact plates 60, and adjacent plates are respectively connected The data line 11〇 and the even data line 12〇, the wire terminal is connected with the odd data terminal D1 and the even data terminal D2, and the rod short circuit wiring circuit is the odd data terminal D1, the even data terminal D2, the odd gate terminal G1 and The even gate extreme G2 inputs the signal into the pixel to determine whether the internal display component of the panel is functioning well. As shown in Fig. 2b, it is a schematic diagram of a partial circuit of a rod-shaped short-circuit wiring of the conventional technology. This figure is a gate drive circuit g partial circuit of FIG. 2A, in which a plurality of gate lines 40 are connected with a plurality of gate electrode contact plates 5〇, The adjacent two plates form a parity plate distribution, and are connected to the odd gate line 130 and the even gate line 14〇, respectively, and the terminal is provided with an odd gate terminal Q1 and an even gate terminal G2, which can respectively connect the odd end plates and the even ends. The detection signal transmitted by the plate is not limited to two groups when it is actually implemented. In order to increase the detection efficiency, it can be divided into multiple arrays, that is, a plurality of wires are arranged to transmit the plate signals into multiple arrays to Terminal detection. 3. In order to reduce the ring short-circuit wiring probe composition, the Next Generation Array Test (NGAT) has been developed, which can reduce the number of probes and reduce the cost. Only this technology can only be applied to the MJC machine and cannot be shared with the PDI machine. The above two methods of detection are different, so the wiring design in the panel will also be different depending on the detection method used, and therefore it will be limited in wiring, and the process capacity will not be easily matched due to different wiring, resulting in the photomask 1276037

I -切換與購買成本增加。 【發明内容】 由於目前面板線路設計因應檢測方式的不同而必須切 換相異的檢測設備,造成機台的稼動率低。因此本發明的 主要目的在於能不需切換不同的檢測設備即能檢測面板薄 膜電晶體陣列,如此不但能提升檢測設備的稼動率,陣列 製程產能也容易搭配。 本發明的另一目的為提供複數種的檢測方法,以適用 於本面板合併檢測電路,達到以一種檢測電路對不同設備 與佈線進行檢測的功能。 現行運用之檢測電路設備有適用於MJC與PDI兩種機 台设備,其檢測電路分別為環狀短路佈線與桿狀短路佈 線,以及為了降低環狀短路佈線所使用的探針組成本、導 入了次世代陣列測試技術;故本發明將習用的兩種檢測電 路合併,並導入次世代陣列測試技術。將三種檢測佈線方 式整合合併,使設計面板佈線時不受限於檢測設備,又可 藉以比對各檢測方法的優缺點以提供設備廠商改良建議, 如此達到提升其產量、降低成本之目的。本發明乃使用多 工器(multiplexer,簡稱Μυχ)及複數個電路開關與連接導 線導入一環狀短路佈線與一桿狀短路佈線,使面板製造廠 商在設計佈線時,可充分使用任一佈線設備之檢測而不受 限於檢測設備,並可藉該複數個電路開關自由切換各種檢 測方法。 為實現本發明所述目的,本發明利用多工器中的薄膜 1276037 電晶體(Thin Film Transistor,TFT )來當作環狀短路佈 線、桿狀短路佈線和次世代陣列測試技術的轉換開關以控 制使用何種檢測方式與設備來做檢測面板薄膜電晶體陣 列0 當使用於環狀短路佈線做檢測時只需要將探針組放在 A部位(Data pad ’即閘極或資料接觸極板)上,其訊號可 藉由多工器來隔絕,使訊號不會藉由次世代陣列測試技術 及桿狀短路佈線的電路產生干擾。 當使用次世代陣列測試技術檢測時,探針是放在檢測 接觸極板(Testpad)上和控制接觸極板(c〇ntr〇lpad)上來傳送 檢測訊號。 使用桿狀短路佈線來做檢測時,探針只放在控制接觸 極板上,於連接保持薄膜電晶體(HOLTFT)開關之導線上傳 送一高電壓訊號將其導通,以將檢測訊號送至面板内,並 利用夕工為中的保持薄膜電晶體與選擇薄膜電晶體 TFT)分別來隔絕訊號使之不會藉由次世代陣列測試技術的 電路而產生干擾。 【實施方式】 參照圖3所*,為本發明整體線路的佈線概略圖,其 主要為利用多工器來控制使用何種檢測方式與設備以檢測 面板薄膜電晶體陣列。 圖4所示,為一液晶顯示面板合併檢測電路示意 圖,其中包含液晶顯示器之顯示元件陣列佈線,此面板大 小取決於尺寸與解析度大小,面板由閉極驅動端G與資料 1276037 _驅動端D拉出複數條資料線3〇與掃描線4〇相互垂直交錯形 成,而控制晝素顯示之薄膜電晶體1〇設置於資料線3〇與掃 4田線40父錯之位置,另外掃描線4〇之間藉有儲存電容%連 接’晝素顯示及藉由此儲存電容之充放電控制顯示,其中 複數條掃描線40連接有複數個閘極端接觸極板5〇,複數條 貧料線30連接有複數個資料端接觸極板6〇,藉此複數個訊 號極板(50、60)連接外部檢測電路。 為檢測各連接薄膜電晶體1〇等元件與四周佈線之正確 性,並結合上述環狀短路佈線、次世代陣列測試技術之檢 測佈線與桿狀短路佈線。故此外部檢測電路藉由複數個多 ^器180切換所使用之檢測方式。如圖4所示藉由複數個 資料接觸極板150與掃描接觸極板16〇並由控制接觸極板 17〇(即為圖5A中240、250、260)控制複數個多工器 180内薄膜電晶體之開關切換不同之檢測方式,如第3圖 之A部分放大圖第3A圖所示為多工器18〇之内部結構, 而夕工态180中之薄膜電晶體開關乃接收自和控制接觸極 板之訊號,如第3B圖為第3圖B部分之放大,即為多工器 180與控制接觸極板之連接關係。其中多工器18〇切換檢 測方式又因其控制接觸極板佈線配置不同而可為有變化的 佈線方式,如圖5A與6A所示其相異。以下便以切換二 種不同之檢測方式詳細描述之: ' 1·以資料驅動端D而言,在使用於MJC機台時可檢測環 狀短路佈線、次世代陣列測試技術之檢測佈線。當^ 用MJC機台檢測環狀短路佈線時,如圖4所示,探針 1276037 . 接觸在複數個訊號接觸極板50、60。此法同先前所提 環狀短路佈線之檢測原理。同理閘極驅動端G作動方 式亦同。 2·若使用次世代陣列測試技術可減少所使用之探針數 目,其動作方式為,在圖5A中控制接觸極板24()、 250分別為選擇接觸極板(SEL)與保持接觸極板 (HOL)。藉由這些複數個控制接觸極板可以控制訊號 將進入何條資料線3〇,此時檢測訊號由檢測接觸極板 230輸入以對像素進行檢測,在此條資料線檢測結束 後則由選擇接觸極才反24〇輸入對該電晶體為逆向電壓 的訊號將其關閉,打開保持接觸極板250並由奇數或 偶數資料線110、12〇輸入Hv訊號於訊號接觸極板 260進行訊號清除的動作。如圖5β所示訊號線2⑽、 290即為選擇接觸極板與保持接觸極板,所輸 入之訊號佈線,藉由DlDS7與酬··㈣等薄膜電 晶體控制由檢測接觸極板23〇所輸入之訊號。如此即 可減少原環狀短路佈線所使用之探針數目。同理資料 驅動端D之作動方式亦同 對於PDI枝口所檢測之桿狀短路佈線而言,所需要的 訊號共計有七條1D、2D、1G、2g、ci、c^ V_訊號。以資料驅動端〇而言所需要訊號計有 ID、2D、C2、C1 與 Vcom 訊號。1D 與 2D 訊號 係藉由訊號接觸極板21〇與22〇輸入,並由控制接觸 極板携送入C1訊號來控制薄膜電晶體270,藉此控 l276〇37 、制由控制接觸極板200所輸入之訊號C2能否藉由佈線 、290進入’將DH0."DH7薄膜電晶體開啟使經由控制 接觸極板2!0、220所輪入之出、犯訊號可輸入 面内,此時DS0JS7薄膜電晶體為關閉,可防止訊號 干擾至鄰近的資料線。換言之此時DH〇〜DH7薄膜電 曰曰體所扮决之角色為選擇控制,控制1D 、2〇訊號 送入藉此來判斷面板運作是否良好。而以閘極驅動端 G而言,其原理相同,不同點在於ID 、2D訊號切 換成1G 、2G訊號,其餘作動原理相同。此外次世籲 代陣列測试技術之佈線所使用之佈線組可以與桿狀短 路佈線共用,其原理為原探針所接觸之控制接觸極板 14原-人世代陣列測試技術之佈線相同,不同點在於所 輸入之訊號不同。 對應於多工器180控制接觸極板佈線之配置不同而有 不同佈線方式。以資料驅動端D而言,如圖6A與圖6B所 示,這兩種佈線方式不同點在於後者中將前者中的薄膜電 晶體270改置於訊號極板60之後,即為圖6A與圖6β中所 _ 示之薄膜電晶體310 ,並另外引出一訊號線3〇〇至控制接 觸極板330。另外將次世代陣列測試技術之佈線時所使用 之HV訊號另外引出一條訊號線32〇。藉由控制接觸極板 33〇所輸入之訊號決定薄膜電晶體310之開關狀態。而 - PDI檢測機台所需之訊號1D 、2D則獨立引出兩條訊號 ‘ 線接至訊號接觸極板340、350。當使用環狀短路佈線、 a世代陣列測试技術之檢測佈線之]VUC機台時,這此複數 12 1276037 .個薄膜電晶體310為長開之狀態,其他之原理皆與前述相 同而貝料驅動端D佈線方式與資料驅動端D相同。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之實施範圍。熟悉本技術之人士應明白各種不同 ^實施例與變化得在不脫離本發明之概括精神與範圍之下 施行,本發明之範圍乃由隨附之申請專利範圍所限定,與 本發明之申請專利範圍意義相等及在申請專利範圍之内所 做之各種修改均被視為包含於本㈣之申請專·圍内。 【圖式簡單說明】 圖式簡單說明 第1A圖為一習知的環狀短路佈線示意圖。 第1B圖為一習知的環狀短路佈線局部電路示意圖。 第2A圖為一習知的桿狀短路佈線示意圖。 第2B圖為一習知的桿狀短路佈線局部電路示意圖。 第3圖為本發明整體佈線圖概略。 ^ 3A圖為本發明佈線圖3A中八部分的放大圖。 第3B圖為本發明佈線圖3Α 部分的放大圖。 第4圖為本發明顯示面板合併檢測電路示意圖。 第5A圖為本發明顯示面板合併檢測電路佈線種類1 局部不意圖。 f 5B圖為本發明之多玉器種類丨佈線電路示意圖。 第6A圖為本發明顯示面板合併檢測電路佈線種類2 局部示意圖。 第6B圖為本發明之多工器種類2佈線電路示意圖。 13 1276037I - Switching and purchase costs increase. SUMMARY OF THE INVENTION Since the current panel circuit design has to switch different detection devices depending on the detection mode, the utilization rate of the machine is low. Therefore, the main object of the present invention is to be able to detect a panel thin film transistor array without switching different detecting devices, so that not only the detection rate of the detecting device can be improved, but also the array process capacity can be easily matched. Another object of the present invention is to provide a plurality of detection methods for use in the panel-integrated detection circuit to achieve the function of detecting a different device and wiring by a detection circuit. The currently used detection circuit equipment is applicable to both MJC and PDI machine equipment, and the detection circuits are ring short circuit wiring and rod short circuit wiring, and probe composition and introduction for reducing the ring short circuit wiring. The next generation array testing technique; therefore, the present invention combines the two conventional detection circuits and introduces them into the next generation array testing technique. The three types of detection wiring are integrated and combined, so that the design panel wiring is not limited to the detection equipment, and the advantages and disadvantages of each detection method can be compared to provide improvement suggestions of the equipment manufacturer, thereby achieving the purpose of increasing the output and reducing the cost. The invention introduces a ring short circuit and a rod short circuit by using a multiplexer (multiplexer) and a plurality of circuit switches and connecting wires, so that the panel manufacturer can fully use any wiring device when designing the wiring. The detection is not limited to the detecting device, and various detection methods can be freely switched by the plurality of circuit switches. In order to achieve the object of the present invention, the present invention utilizes a thin film 1276037 transistor (TFT) in a multiplexer as a switch for a ring short circuit, a rod short circuit, and a next generation array test technique to control Which detection method and equipment are used for the detection panel film transistor array 0 When using the ring short circuit for detection, it is only necessary to place the probe group on the A site (Data pad 'ie gate or data contact plate) The signal can be isolated by the multiplexer so that the signal does not interfere with the circuit of the next generation array test technology and the rod short circuit. When tested using the next generation array test technique, the probe is placed on the test contact pad (Testpad) and on the control contact pad (c〇ntr〇lpad) to transmit the detection signal. When using the rod short circuit for detection, the probe is placed only on the control contact plate, and a high voltage signal is transmitted on the wire connected to the HOLTFT switch to turn it on to send the detection signal to the panel. Internally, the thin film transistor and the selective thin film transistor TFT are respectively used to isolate the signal so as not to interfere with the circuit of the next generation array test technology. [Embodiment] Referring to Fig. 3, there is shown a schematic diagram of a wiring of an overall circuit of the present invention, which mainly uses a multiplexer to control which detection method and apparatus are used to detect a panel thin film transistor array. 4 is a schematic diagram of a liquid crystal display panel combined detection circuit, which includes a display element array wiring of a liquid crystal display. The size of the panel depends on the size and the resolution. The panel is closed by the driving end G and the data 1276037 _ driving end D Pulling out a plurality of data lines 3〇 and a scanning line 4〇 are formed perpendicularly to each other, and the thin film transistor 1昼 for controlling the display of the element is disposed at a position where the data line 3〇 and the sweep 4 line 40 are in the wrong position, and the scanning line 4 Between the 〇, the storage capacitor % is connected to the 昼 prime display and the charge and discharge control display by the storage capacitor, wherein the plurality of scan lines 40 are connected with a plurality of gate terminal contact plates 5 〇, and the plurality of lean lines 30 are connected There are a plurality of data terminals contacting the electrode plates 6〇, thereby connecting a plurality of signal plates (50, 60) to the external detecting circuit. In order to detect the correctness of the components such as the connection of the thin film transistor and the surrounding wiring, and in combination with the above-mentioned ring short wiring, the next generation array test technology, the detection wiring and the rod short circuit wiring. Therefore, the external detection circuit switches the detection mode used by the plurality of multiplexers 180. As shown in FIG. 4, a plurality of data contacts the plate 150 and the scanning contact plate 16 and controls the contact dies 17 (ie, 240, 250, 260 in FIG. 5A) to control the film in the plurality of multiplexers 180. The switch of the transistor switches different detection modes, as shown in Fig. 3, part A of the enlarged view, Fig. 3A shows the internal structure of the multiplexer 18〇, and the thin film transistor switch in the evening state 180 is received and controlled. The signal of the contact plate, as shown in Fig. 3B is the enlargement of the part of Fig. 3, which is the connection relationship between the multiplexer 180 and the control contact plate. Among them, the multiplexer 18 〇 switching detection mode can be changed according to the configuration of the control contact plate wiring, which is different as shown in Figs. 5A and 6A. The following is a detailed description of switching between two different detection methods: '1. For data driver D, it can detect ring shorting wiring and detection wiring of next generation array testing technology when used in MJC machine. When the ring short circuit wiring is detected by the MJC machine, as shown in FIG. 4, the probe 1276037 is contacted with the plurality of signal contact plates 50, 60. This method is the same as the detection principle of the previously mentioned ring short-circuit wiring. Similarly, the driving method of the gate drive G is the same. 2. If the next generation array test technique is used, the number of probes used can be reduced by operating the contact pads 24(), 250 in FIG. 5A as selecting contact pads (SEL) and holding contact plates, respectively. (HOL). The plurality of control contact plates can control which data line the signal will enter. At this time, the detection signal is input by the detecting contact plate 230 to detect the pixel, and after the detection of the data line is selected, the contact is selected. The LED is turned on to reverse the voltage of the transistor, and the signal is turned off by the contact plate 250 and the Hv signal is input from the odd or even data lines 110 and 12 to the signal contact plate 260 for signal clearing. . As shown in FIG. 5β, the signal lines 2(10) and 290 are selected to contact the contact plate and the contact contact plate, and the input signal wiring is input by the detecting contact plate 23〇 by the thin film transistor such as DlDS7 and Res (4). Signal. This reduces the number of probes used in the original loop shorting wiring. Similarly, the driving mode of the driving terminal D is also the same as that for the rod-shaped short-circuit wiring detected by the PDI branch. The total number of signals required is seven 1D, 2D, 1G, 2g, ci, c^V_ signals. For data-driven devices, the signal meter requires ID, 2D, C2, C1 and Vcom signals. The 1D and 2D signals are input by the signal contact plates 21〇 and 22〇, and the thin film transistor 270 is controlled by the control contact plate carrying the C1 signal, thereby controlling the contact plate 200. Whether the input signal C2 can be entered by wiring 290, and the DH0."DH7 thin film transistor is turned on, so that the signal can be input into the plane through the control contact plates 2!0, 220. The DS0JS7 thin-film transistor is turned off to prevent signal interference to adjacent data lines. In other words, the role of the DH〇~DH7 thin film electric body is the selection control, and the 1D and 2〇 signals are sent to determine whether the panel is operating well. In the case of the gate drive terminal G, the principle is the same. The difference is that the ID and 2D signals are switched to 1G and 2G signals, and the other actuation principles are the same. In addition, the wiring group used in the wiring of the next generation array test technology can be shared with the rod-shaped short-circuit wiring. The principle is that the original probe is in contact with the control contact plate 14 of the original-human generation array test technology. The point is that the signal entered is different. There are different wiring patterns corresponding to the configuration in which the multiplexer 180 controls the contact pad wiring. In the case of the data driving terminal D, as shown in FIG. 6A and FIG. 6B, the two wiring manners differ in that the thin film transistor 270 in the former is placed after the signal plate 60, that is, FIG. 6A and FIG. The thin film transistor 310 is shown in 6β, and a signal line 3 is further drawn to the control contact plate 330. In addition, the HV signal used in the wiring of the next generation array test technology is additionally led out by a signal line 32〇. The switching state of the thin film transistor 310 is determined by controlling the signal input from the contact pad 33A. - The signals 1D and 2D required by the PDI detection machine independently lead to two signals ‘wires connected to the signal contact plates 340 and 350. When using a ring-shaped short-circuit wiring, a generation of array testing technology to detect the wiring of the VUC machine, the plurality of 12 1276037. The thin film transistor 310 is in a long open state, and the other principles are the same as described above. The driving terminal D wiring method is the same as the data driving terminal D. The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention. A person skilled in the art should understand that various embodiments and variations can be made without departing from the spirit and scope of the invention, and the scope of the invention is defined by the scope of the appended claims. The scope of the changes and the various modifications made within the scope of the patent application are deemed to be included in the application for this (4). BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic diagram of a conventional ring short circuit wiring. FIG. 1B is a schematic diagram of a conventional partial circuit of a ring short circuit. Fig. 2A is a schematic view of a conventional rod-shaped short circuit wiring. FIG. 2B is a schematic partial circuit diagram of a conventional rod-shaped short-circuit wiring. Figure 3 is a schematic view of the overall wiring diagram of the present invention. ^ 3A is an enlarged view of eight portions of the wiring diagram 3A of the present invention. Fig. 3B is an enlarged view of a portion of the wiring diagram of the present invention. FIG. 4 is a schematic diagram of a display panel merge detection circuit of the present invention. FIG. 5A is a partial view of the display panel merge detection circuit wiring type 1 of the present invention. f 5B is a schematic diagram of a multi-jade type 丨 wiring circuit of the present invention. FIG. 6A is a partial schematic view showing the wiring type 2 of the display panel merge detection circuit of the present invention. Fig. 6B is a schematic view showing the wiring circuit of the multiplexer type 2 of the present invention. 13 1276037

4 ' I 主要部分代表符號說明 -〔習知〕 10 :薄膜電晶體 20 :儲存電容 30 :資料線 40 :掃瞄線 50 :閘極端接觸極板 60 :資料端接觸極板 65 :阻抗 70 :短路導線環 80 :面板切割線 90 :探針 110 :奇數資料線 120 :偶數資料線 130 :奇數閘極線 140 :偶數閘極線 D1 :奇數資料端 D2 :偶數資料端 G1 :奇數閘極端 G2 :偶數閘極端 〔本發明〕 150 :資料接觸極板 160 :掃瞄接觸極板 170 :控制接觸極板 :多工器 :Cl控制接觸極板 :C2訊號接觸極板 :1D訊號接觸極板 :2D訊號接觸極板 :檢測接觸極板 :選擇接觸極板 :保持接觸極板 :HV訊號接觸極板 :薄膜電晶體 :薄膜電晶體 :薄膜電晶體 :控制訊號輸入線 :薄膜電晶體 :訊號輸入線 :CP控制接觸極板 :1D訊號接觸極板 :2D訊號接觸極板 :HV訊號接觸極板 154 ' I Main part representative symbol description - [Practical] 10 : Thin film transistor 20 : Storage capacitor 30 : Data line 40 : Scan line 50 : Gate terminal contact plate 60 : Data terminal contact plate 65 : Impedance 70 : Short-circuit wire loop 80: panel cutting line 90: probe 110: odd data line 120: even data line 130: odd gate line 140: even gate line D1: odd data terminal D2: even data terminal G1: odd gate extreme G2 : even gate extreme [invention] 150: data contact plate 160: scan contact plate 170: control contact plate: multiplexer: Cl control contact plate: C2 signal contact plate: 1D signal contact plate: 2D signal contact plate: Detect contact plate: Select contact plate: keep contact plate: HV signal contact plate: thin film transistor: thin film transistor: thin film transistor: control signal input line: thin film transistor: signal input Line: CP control contact plate: 1D signal contact plate: 2D signal contact plate: HV signal contact plate 15

Claims (1)

1276037 ‘ . I 十、申請專利範圍: L 一種液晶顯示器面板合併檢測電路,其包含有: 複數個多工器; 一像素陣列; 衩數個閘極端接觸極板,上述的像素陣列係經由該 複數個閘極端接觸極板連接至該複數個多工器;以及 複數個檢測接觸極板與複數個控制接觸極板連接至 該複數個多工器。 2·如申請專利第1項所述之液晶顯示器面板合併檢測電 路’其中該複數個多工器係由複數個電晶體以並聯方式 連接所組成。 3·如申請專利第1項所述之液晶顯示器面板合併檢測電 路’其中該複數個多工器係由複數個電晶體串聯連接後 再與其他串聯電路並聯連接所組成。 4·如申請專利第1項所述之液晶顯示器面板合併檢測電 路,其中該複數個多工器所使用之電晶體為雙極性之電 晶體。 5·如申請專利第1項所述之液晶顯示器面板合併檢測電 路’其中该複數個控制接觸極板係連接該複數個多工器 中之電晶體。 6·如申請專利第1項所述之液晶顯示器面板合併檢測電 路,其中依該複數個多工器之位元數決定其内部串聯電 路與複數個控制接觸極板之數量,該複數個控制接觸極 板則依功能相異分為複數組。 7 ·如申清專利弟1項所述之液晶顯不為面板合併檢測電 16 1276037 ί I _路,其中該複數個控制接觸極板與連接之訊號線依檢測 電路之不同型態以接收不同用途之訊號。 - 8·如申明專利第1項所述之液晶顯示器面板合併檢測電 路,其中該複數個多工器所使用之複數個電晶體開啟時 導通訊號,關閉時可隔絕外部電路之訊號。 9· 一種液晶顯示器面板合併檢測電路,其包含有: 複數個多工器; 一像素陣列; 複數個資料端接觸極板,上述的像素陣列經由該複_ 數個資料端接觸極板連接至該複數個多工器;以及 複數個檢測接觸極板與複數個控制接觸極板連接至 該複數個多工器。 10·如申明專利第9項所述之液晶顯示器面板合併檢測電 路,其中該複數個多工器係由複數個電晶體以並聯方式 連接所組成。 11·如申請專利第9項所述之液晶顯示器面板合併檢測電 路,其中該複數個多工器係由複數個電晶體串聯連接後 再與其他串聯電路並聯連接所組成。 12·如申請專利第9項所述之液晶顯示器面板合併檢測電 路,其中該複數個多工器所使用之電晶體為雙極性之電 晶體。 13·如申請專利第9項所述之液晶顯示器面板合併檢測電 路’其中該複數個控制接觸極板係連接該複數個多工器 中之電晶體。 M·如申請專利第9項所述之液晶顯示器面板合併檢測電 171276037 '. I. Patent application scope: L A liquid crystal display panel combined detection circuit, comprising: a plurality of multiplexers; a pixel array; a plurality of gate terminals contacting the plates, wherein the pixel array is via the plurality A gate extreme contact plate is coupled to the plurality of multiplexers; and a plurality of sense contact pads and a plurality of control contact plates are coupled to the plurality of multiplexers. 2. The liquid crystal display panel combined detection circuit as described in claim 1, wherein the plurality of multiplexers are composed of a plurality of transistors connected in parallel. 3. The liquid crystal display panel combined detection circuit according to claim 1, wherein the plurality of multiplexers are composed of a plurality of transistors connected in series and then connected in parallel with other series circuits. 4. The liquid crystal display panel combined detection circuit according to claim 1, wherein the plurality of transistors used in the plurality of multiplexers are bipolar transistors. 5. The liquid crystal display panel combined detection circuit of claim 1, wherein the plurality of control contact plates are connected to the plurality of transistors in the plurality of multiplexers. 6. The liquid crystal display panel combined detection circuit according to claim 1, wherein the number of the internal series circuit and the plurality of control contact plates are determined according to the number of bits of the plurality of multiplexers, and the plurality of control contacts The plates are divided into complex arrays according to their functions. 7 · If the liquid crystal display according to the claim 1 of the patent clearing is not the panel combined detection power 16 1276037 ί I _ road, wherein the plurality of control contact plates and the connected signal lines are different according to different types of detection circuits to receive Signal of use. The liquid crystal display panel combined detection circuit according to claim 1, wherein the plurality of transistors used by the plurality of multiplexers turn on the communication number, and the signal of the external circuit can be isolated when the signal is turned off. A liquid crystal display panel combined detection circuit, comprising: a plurality of multiplexers; a pixel array; a plurality of data end contact plates, wherein the pixel array is connected to the pixel array via the plurality of data contact pads a plurality of multiplexers; and a plurality of detecting contact plates and a plurality of control contact plates connected to the plurality of multiplexers. 10. The liquid crystal display panel combined detection circuit according to claim 9, wherein the plurality of multiplexers are composed of a plurality of transistors connected in parallel. 11. The liquid crystal display panel combined detection circuit according to claim 9, wherein the plurality of multiplexers are composed of a plurality of transistors connected in series and then connected in parallel with other series circuits. 12. The liquid crystal display panel combined detection circuit of claim 9, wherein the plurality of multiplexers use a transistor that is a bipolar transistor. 13. The liquid crystal display panel combined detection circuit of claim 9, wherein the plurality of control contact plates are connected to the plurality of transistors in the plurality of multiplexers. M. The liquid crystal display panel combined detection power as described in claim 9
TW93124474A 2004-08-13 2004-08-13 Combined inspection circuit and method for inspecting TFT liquid crystal display panels TWI276037B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI406241B (en) * 2008-10-30 2013-08-21 Chunghwa Picture Tubes Ltd Inspection circuit and display device thereof
US9905144B2 (en) 2014-11-27 2018-02-27 Au Optronics Corp. Liquid crystal display and test circuit thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7346259B2 (en) * 2019-11-18 2023-09-19 株式会社日本マイクロニクス measurement system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI406241B (en) * 2008-10-30 2013-08-21 Chunghwa Picture Tubes Ltd Inspection circuit and display device thereof
US9905144B2 (en) 2014-11-27 2018-02-27 Au Optronics Corp. Liquid crystal display and test circuit thereof

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