TWI270295B - Signal auto-detection module and method - Google Patents
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!27〇295九、發明說明: 【發明所屬之技術領域 1!27〇2959, invention description: [Technical field to which the invention belongs 1
本發明是有關於一種訊號自動偵測模組以及方法,且 特別是有關於-種影音訊號之自動制模組以及方法。 【先前技術】 現在一般使用者所使用的影音播放裝置大都接收多個 訊號源。例如一個電視可能同時接上來自DVD影訊號、來 f有線電視的訊號、來自錄影帶的訊號、或來自CD播放 器訊號。過去使用者必須利用—遙控器自行決定要選哪一 個輸入裝置。大部分遙控器在電視螢幕上所顯示的選項為 色差端子輸人、AV輸人、音源輸人這樣的字眼。對一個不 熟悉聲音、影像輸人格式的使用者來說,經f要不斷嘗試 每们4項,最後才發現原來是某一個輸入格式才是正確 的’相當不方便。 因此,為了避免上述的問題,非常需要—種智慧型的 訊號偵測裝置,能夠自動為偵測並播放訊號,免除使用者 【發明内容】 因此本發明的目的就是在提供一種訊號自動债測模組 以及方法,能自動债測多個訊號源是否有符合特定格式之 訊號輸入。 ^發明的另—目的是在提供—種訊號自動偵測模組以 及方法,當有符合特定格式之減輸人時能夠自動播放此 5 1270295 符合特定格式之訊號。 本务明的又一目的是為蔣/α ^ Ά卞、匕 八一種訊號自動偵測模組以 及方法,可以具有非常省電的功能。 根據本發明之上述目的, έ日,Κ认㈢ 敌出種成唬自動偵測模 " 用於一 W音播放裝置。依昭本癸明齡社者 號自動偵測模组包括一“二月一較佳實施例’訊 。 數位轉換器、-第二類比 數位轉換态以及一處理器。 當第一類比數位轉換器接收一喚醒訊號時,第一類比 數位轉換器將一第一 頰比汛唬轉換為一第一數位訊號。當 二數位轉換器接收喚醒訊號時,第二類比數位轉換 σσ 弟一類比訊號轉換為一第二數位訊號。 處理器產生此喚醒訊號。此處理器選擇第一數位訊號 =㈣二數位訊號其中之一為一播放訊號。處理器檢查 播放Μ是否符合特定格式之後再供影音㈣I置播放。 根據本發明之目的,提出一種自動摘測訊號的方法。 依照本發明一較佳實施例,自動偵測訊號的方法包括下列 ^驟。利用複數個類比數位轉換器分別連接複數個類比訊 =輸=。發出一喚醒訊號以喚醒至少一類比數位轉換器, 7中田一類比數位轉換器受喚醒時,此類比數位轉換器將 2應之類比訊號轉換為一數位訊號。檢查此數位訊號是否 符合特定格式再供影音播放裝置播放。 ^根據本發明之另一目的,提出一種訊號自動偵測模 2。依照本發明一較佳實施例,訊號自動偵測模組包括一 第電壓債測電路、一第一類比數位轉換器、一第二電壓 偵測電路、一第二數位類比轉換器以及一處理器。 1270295 ;心..I,壤 ‘The invention relates to a signal automatic detection module and method, and in particular to an automatic module and method for a video signal. [Prior Art] Most video and audio playback devices used by general users now receive multiple sources of signals. For example, a TV may be connected to a signal from a DVD, a cable to a cable, a signal from a video tape, or a signal from a CD player. In the past, the user had to use the remote control to decide which input device to select. Most of the options displayed on the TV screen by the remote control are the words of the color difference terminal input, the AV input, and the input of the audio source. For a user who is unfamiliar with the sound and image input format, it is necessary to constantly try each of the four items, and finally find that it is the correct one of the input formats. 'It is quite inconvenient. Therefore, in order to avoid the above problems, it is highly desirable to have a smart signal detecting device that can automatically detect and play signals, exempting the user. [Inventive content] Therefore, the object of the present invention is to provide a signal automatic debt testing module. The group and method can automatically measure whether multiple signal sources have signal input conforming to a specific format. Another purpose of the invention is to provide an automatic signal detection module and method for automatically playing the 5 1270295 signal conforming to a specific format when there is a reduction in the specific format. Another purpose of this service is to provide a very power-saving function for the automatic detection module and method of Jiang/α^ Ά卞 and 八8. According to the above object of the present invention, the next day, the confession (3) enemy automatic detection mode is used for a W-player. The automatic detection module of the Yi Ming Ben Ming Ming Society includes a "February 1 Preferred Embodiment" signal. A digital converter, a second analog-to-digital conversion state, and a processor. When the first analog-to-digital converter When receiving a wake-up signal, the first analog-to-digital converter converts a first cheek to a first digit signal. When the two-digit converter receives the wake-up signal, the second analog-to-digital conversion σσ is converted into an analog signal. a second digit signal. The processor generates the wake-up signal. The processor selects the first digit signal = (four) two digit signals, one of which is a playback signal. The processor checks whether the playback frame conforms to a specific format and then provides audio and video (4) I play. According to an object of the present invention, a method for automatically extracting a signal is provided. According to a preferred embodiment of the present invention, a method for automatically detecting a signal includes the following steps: using a plurality of analog-to-digital converters to connect a plurality of analog signals respectively. Input =. A wake-up signal is sent to wake up at least one analog-to-digital converter. When the 7-field analog-to-digital converter is awakened, such a ratio converter Converting the analog signal of 2 to a digital signal. Checking whether the digital signal conforms to a specific format and then playing it for the video playback device. ^ According to another object of the present invention, an automatic signal detection module 2 is proposed. In a preferred embodiment, the automatic signal detection module includes a first voltage debt measuring circuit, a first analog digital converter, a second voltage detecting circuit, a second digital analog converter, and a processor. 1270295; .I, soil'
— V 。::電壓偵測電路供偵測一第一類比訊號之電壓差 值田第類比數位轉換器接收一喚醒訊號時,第一類比 數,轉換器將第-類比訊號轉換為-第-數位訊號。第二 電鋈偵測私路供偵測一第二類比訊號之電壓差值。當第二 類=數位轉換益接收喚醒訊號時,第二類比數位轉換器將 第二類比訊號轉換為一第二數位訊號。 、2理S產生此喚醒訊號。此處理器選擇第_數位訊號 以及第—數位訊號其中之—為-播放訊號供影音播放裝置 播放。其中處理器利用第一類比訊號之電壓差值以及第二 =比訊號之電壓差值決定播放訊號是否符合特定格式再供 影音播放裝置播放。第一電壓偵測電路以及該第二電壓偵 測電路分別可以包括一峰值保持電路(peak hold circuit)或 底值保持電路(bottom hold circuit)。 本發明至少具有下列優點,其中每一實施例可以具有 個或夕個優點。本發明之訊號自動偵測模組以及方法, =動_多個訊號源是否有符合特定格式之訊號輸入。 當有符合特定格式之訊號輸入時訊號自動偵測模組以及方 法月b夠自動播放此符合特定袼式之訊號。本發明之自動偵 測模組以及方法,可以具有非常省電的功能。 【實施方式】 第1圖繪示本發明之一應用示意圖。請參照第丨圖, 一般使用者的影音播放裝置110通常接了許多訊號源,例 如衛星接收器訊號102、DVD光碟機訊號1〇4、錄放影機訊 l27〇295 咸106或有線電視(機上盒訊號)。這麼多的訊號源輸入相同 的影音播放裝置1 10,需要有一種智慧型且省電的裝置來處 理這些輸入訊號,因此本發明提供一種訊號偵測模組,可 以非常方便的處理這些訊號。— V. :: Voltage detection circuit for detecting the voltage difference of a first analog signal. When the analogy digital converter receives a wake-up signal, the first analogy converts the first analog signal into a - digital signal. The second eMule detects a private path for detecting a voltage difference of a second analog signal. When the second type=digital conversion benefits receiving the wake-up signal, the second analog-to-digital converter converts the second analog signal into a second digital signal. 2, S to generate this wake-up signal. The processor selects the _ digital signal and the first-digit signal, wherein - the playback signal is played by the video playback device. The processor uses the voltage difference of the first analog signal and the voltage difference of the second = specific signal to determine whether the broadcast signal conforms to a specific format and is then played by the video playback device. The first voltage detecting circuit and the second voltage detecting circuit may respectively include a peak hold circuit or a bottom hold circuit. The present invention has at least the following advantages, each of which may have advantages or advantages. The signal automatic detection module and method of the invention, whether the signal sources of the specific format are input or not. When there is a signal input that conforms to a specific format, the automatic signal detection module and the method month b are sufficient to automatically play the signal that meets the specific style. The automatic detection module and method of the present invention can have a very power saving function. Embodiment 1 FIG. 1 is a schematic view showing an application of the present invention. Please refer to the figure. The general user's video playback device 110 usually receives a lot of signal sources, such as satellite receiver signal 102, DVD player signal 1〇4, recording and playback machine, l27〇295, salt 106 or cable TV. Box signal). Since so many signal sources are input to the same video playback device 1 10, a smart and power-saving device is required to process the input signals. Therefore, the present invention provides a signal detection module that can process these signals very conveniently.
第2圖繪示本發明之一實施例之示意圖。請參照第2 圖’訊號自動偵測模組200用於一影音播放裝置224。訊號 自動偵測模組200包括一第一類比數位轉換器206、一第二 類比數位轉換器208以及一處理器202。 一個影音播放裝置224(例如一電視)通常可以接收許 多影像或聲音的來源。舉例來說,訊號源226可以是一個 DVD光碟機的影像來源,訊號源228可以是一個有線電視 (機上盒訊號)的影像來源,訊號源230可以是一個CD播放 器的聲音來源。 過去使用者必須透過遙控器的按叙,或者是電視螢幕 上的選擇鈕來選擇輸入的訊號源。本發明可以利用智慧型 的自動偵測來省去由人工自行選擇的困擾。 在一貫施例中,影音播放裝置是處於關機狀態,但是 處理态202此時會定期掃描類比數位轉換器2〇6、2〇8以及 210。換句話說,處理器202會輪流喚醒(wake up)類比數 位轉換器206、208以及210以檢查是否有訊號輸入。例如 當使用者將DVD片放入DVD光碟機開始播放時,訊號源 226便產生輸入訊號。此時第一類比訊號212就是訊號源 226的訊號。此時處理器202就會偵測到訊號輸入的改變。 备第一類比數位轉換器206接收唤醒訊號216時,第 一類比數位轉換器206將第一類比訊號212轉換為一第一Figure 2 is a schematic view showing an embodiment of the present invention. Please refer to FIG. 2 for the automatic signal detection module 200 for a video playback device 224. The signal auto-detection module 200 includes a first analog-to-digital converter 206, a second analog-to-digital converter 208, and a processor 202. A video playback device 224 (e.g., a television) can typically receive a source of many images or sounds. For example, the signal source 226 can be an image source of a DVD player, the signal source 228 can be an image source of a cable television (on-board signal), and the source 230 can be a source of sound for a CD player. In the past, the user had to select the input signal source through the remote control's navigation or the selection button on the TV screen. The invention can utilize the intelligent automatic detection to save the trouble of manual selection. In a consistent embodiment, the video playback device is off, but the processing state 202 periodically scans the analog digital converters 2〇6, 2〇8, and 210. In other words, processor 202 will wake up analog digital converters 206, 208, and 210 in turn to check for signal input. For example, when the user puts the DVD into the DVD player and starts playing, the signal source 226 generates an input signal. At this time, the first analog signal 212 is the signal of the signal source 226. At this point, the processor 202 detects a change in the signal input. When the first analog-to-digital converter 206 receives the wake-up signal 216, the first analog-to-digital converter 206 converts the first analog signal 212 into a first
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1270295 數位訊號214。第一數位訊號214輸入一處理器202,處理 器202可以檢查第一數位訊號214是否符合特定袼式。若 符合特定格式,則喚醒(打開)影音播放裝置224並將第一數 位訊號214當作播放訊號222送至影音播放裝置224進行 播放’若不符合特定格式,則忽略第一數位訊號214。喚醒 影音播放裝置224之後,處理器202可以自動將影音播放 裝置224之音量調整至適當大小,以避免突然產生巨大聲 音。 上述判斷第一數位訊號是否符合特定格式的方法例如 下列幾種方式。處理器202可以判斷播放訊號214的型樣 (pattern)以決定是否符合特定格式。處理器202可以檢查經 第一類比數位轉換器206轉換過的播放訊號214的電壓差 值以決定是否有信號輸入、也可以檢查經第一類比數位轉 換為206轉換過的播放訊號214的同步訊號(sync signal)以 决疋疋否為符合特定格式的輸入信號、還可以檢查經第一 類比數位轉換器206轉換過的播放訊號214的頻率以決定 是否為符合特定格式的輸入信號。 同理,若訊號源228也接收了輸入訊號,當第二類比 數位轉換器208接收喚醒訊號216時,第二類比數位轉換 器208將一第二類比訊號218轉換為一第二數位訊號22〇。 處理器202也檢查第二數位訊號22〇是否符合特定格式, 以決定是否將第二數位訊號22〇轉成播放訊號222以供影 音播放裝置224播放。 處理态202例如一影像處理器(video processor)232或 微處理器(microprocessor)2〇3或兩者的整合。當輸入訊號1270295 Digital signal 214. The first digital signal 214 is input to a processor 202, and the processor 202 can check whether the first digital signal 214 conforms to a particular mode. If the specific format is met, the video playback device 224 is woken up (on) and the first digital signal 214 is sent to the video playback device 224 as a playback signal 222 for playback. If the specific format is not met, the first digital signal 214 is ignored. After waking up the video playback device 224, the processor 202 can automatically adjust the volume of the video playback device 224 to an appropriate size to avoid sudden loud sounds. The above method of determining whether the first digital signal conforms to a specific format is as follows. Processor 202 can determine the pattern of playback signal 214 to determine if a particular format is met. The processor 202 can check the voltage difference of the playback signal 214 converted by the first analog-to-digital converter 206 to determine whether there is a signal input, and can also check the synchronization signal of the playback signal 214 converted to 206 by the first analog digital conversion. The (sync signal) may also check the frequency of the playback signal 214 converted by the first analog-to-digital converter 206 to determine whether it is an input signal conforming to a specific format, in order to determine whether the input signal conforms to a specific format. Similarly, if the signal source 228 also receives the input signal, when the second analog-to-digital converter 208 receives the wake-up signal 216, the second analog-to-digital converter 208 converts a second analog signal 218 into a second digital signal 22. . The processor 202 also checks if the second digit signal 22 is in a particular format to determine whether to convert the second digit signal 22 into the playback signal 222 for playback by the video playback device 224. The processing state 202 is, for example, a video processor 232 or a microprocessor 2, 3 or an integration of both. When inputting signals
1270295 疋音源訊號時,也可以具有相同的功能。例如訊號源230 是一聲音訊號,聲音類比訊號234可以經由類比數位轉換 器210轉換成聲音數位訊號236,再經由聲音處理器204 進行處理,最後送至聲音輸出裝置238(例如喇π八)播放。類 比數位轉換器210也可經由喚醒訊號216喚醒之後才進行 聲音數位訊號236符合特定格式的偵測。 上述之影音播放裝置可以是一電視。上述之類比數位 轉換器206、208、210平時處於關閉或待命(standby)狀態, 此時消耗的功率非常小、僅需數豪瓦。一但接收到了喚醒 訊號216,這些類比數位轉換器206、208、210可以分別開 始工作,將類比訊號轉為數位訊號。此時處理器2〇2也開 始進行數位訊5虎的符合特定格式之判斷。一但發現符合特 疋格式的訊號輸入,處理器可以立刻喚醒影音播放裝置 (224或23 8)加以播放。這種方法的效率非常高、且極為省 電。 • 在另一實施例中,影音播放裝置正在播放由訊號源226 而來的號,但是另一訊號源228也輸入。經過符合特定 格式之檢持之後,發現訊號源228也屬於符合特定格式之 訊號。此時處理器2〇2在影音播放裝置224顯示一螢幕顯 示(〇SD,on screen display)或子母視窗(ριρ,咖加e & 、 Pkture / P〇P,Picture⑽Picture)供挑選訊號。使用者可以挑 、 選維持原來訊號或者是切換至新來的訊號。當榮幕顯干缚 [段時間未受選擇時,此榮幕顯示自動關閉榮幕以 在另一實施例中,處理器202不進行類比數位轉換器 喚醒工作。此時喚醒的工作交由一電壓偵測電路進行。例 1270295 S& 9.211The 1270295 can also have the same function when the source signal is selected. For example, the signal source 230 is an audio signal, and the audio analog signal 234 can be converted into the audio digital signal 236 via the analog digital converter 210, processed by the sound processor 204, and finally sent to the sound output device 238 (eg, π8). . The analog digital converter 210 can also wake up via the wake-up signal 216 before the sound digital signal 236 is detected in accordance with a particular format. The above video playback device may be a television. The above analog digital converters 206, 208, 210 are normally in a closed or standby state, and the power consumed at this time is very small, requiring only a few kilowatts. Upon receipt of the wake-up signal 216, the analog-to-digital converters 206, 208, 210 can begin to operate, converting the analog signal to a digital signal. At this time, the processor 2〇2 also starts to judge the specific format of the digital message 5 tiger. Once the signal input conforming to the special format is found, the processor can immediately wake up the video playback device (224 or 23 8) for playback. This method is very efficient and extremely power efficient. • In another embodiment, the video playback device is playing a number from the source 226, but another source 228 is also input. After checking for a specific format, it is found that the source 228 is also a signal that conforms to a particular format. At this time, the processor 2〇2 displays a screen display (〇SD, on screen display) or a parent window (ριρ, 咖加e, Pkture/P〇P, Picture(10) Picture) for selecting signals on the video playback device 224. The user can pick, choose to maintain the original signal or switch to the new signal. When the time is unselected, this glory display automatically closes the glory. In another embodiment, the processor 202 does not perform an analog digital converter wake-up operation. The wake-up work at this time is carried out by a voltage detecting circuit. Example 1270295 S& 9.211
如’在第一數位類比轉換器206之前加上一第一電壓偵測 電路240,在第二數位類比轉換器2〇8之前加上一第二電壓 偵測電路242。第一電壓偵測電路240偵測第一類比訊號 212的電壓峰值(peak)與底值(b〇tt〇m)以得知電壓差值,此 電壓偵測電路240可喚醒處理器202來判斷第一類比訊號 212疋否符合特定格式。同理,第二電壓偵測電路242也可 以進行相同的功能。偵測電壓峰值(peak)與底值(b〇u〇m)可 以利用峰值保持電路(peak h〇ld circuit)或底值保持電路 (bottom hold circuit)進行。第2圖中任兩個裝置都可以利用 IIC介面當作通訊之用。For example, a first voltage detecting circuit 240 is added before the first digital analog converter 206, and a second voltage detecting circuit 242 is added before the second digital analog converter 2'8. The first voltage detecting circuit 240 detects the voltage peak and bottom value (b〇tt〇m) of the first analog signal 212 to know the voltage difference, and the voltage detecting circuit 240 can wake up the processor 202 to determine. The first analog signal 212 does not conform to a particular format. Similarly, the second voltage detecting circuit 242 can perform the same function. The detection voltage peak and bottom value (b〇u〇m) can be performed using a peak h〇ld circuit or a bottom hold circuit. Any two devices in Figure 2 can use the IIC interface for communication.
本發明亦提供一種自動偵測訊號的方法,用於一影音 播放裳置。第3 會示本發明之—實施例之流程圖。請參 照第3圖,此方法包括下列步驟。利用複數個類比數位轉 換器分別連接複數個類比訊號輸人。發出—喚醒訊號以喚 醒至少一數位類比轉換器,其中當一類比數位轉換器受唤 醒蚪,此數位類比轉換器將對應之類比訊號轉換為一數位 訊號(步驟304、306、308)。檢查數位訊號是否符合特定本 式再供影音播放裝置播放(步驟314)。 以下對此流程圖做更詳細的描述。處理器發出一喚函 訊號喚醒每一個睡眠狀態的類比數位轉換器(步驟304):考 -類比數位轉換器掃描輸入訊號源(步驟3〇6)。接著決定是 否有訊號輸人(步驟遍)。如果沒有,則類比數位轉換器= 入睡眠狀態(步驟31G),進人睡眠狀態之後每隔—段時間再 掃描(步驟3°4,)。如果有,則檢查訊號是否 為付4定格式之訊號(步驟314)。如果訊號是符合特定格The invention also provides a method for automatically detecting a signal for use in a video playback. Section 3 will show a flow chart of an embodiment of the present invention. Please refer to Figure 3, which includes the following steps. A plurality of analog digital converters are used to connect a plurality of analog signals to each other. A wake-up signal is issued to wake up at least one digit analog converter, wherein when the analog converter is awakened, the digital analog converter converts the corresponding analog signal into a digital signal (steps 304, 306, 308). It is checked whether the digital signal conforms to the specific form and is then played by the video playback device (step 314). This flow chart is described in more detail below. The processor issues a call signal to wake up each sleep state analog digital converter (step 304): the analog-to-digital converter scans the input signal source (steps 3-6). Then decide whether there is a signal to lose (steps). If not, the analog digital converter = goes to sleep (step 31G), and scans every other time after entering the sleep state (step 3 ° 4,). If so, it is checked whether the signal is a 4 formatted signal (step 314). If the signal is in a specific cell
I % 9.2H 1270295 式,則查看影音播放裝置(例如電視)是否為開啟狀態(active) (步驟316)。如果不是,則將影音播放裝置喚醒(步驟318), 並自動將音量調至適當大小(步驟32〇),接著播放影像(步 驟332)。如果是,則顯示一螢幕顯示(cm screen display)或 子母視 _ (PIP,picture in picture / pop,picture picture) (步驟322)供使用者挑選。如果使用者未挑選,隔一段時間 後則將螢幕顯示關閉(步驟328)。若使用者挑選其中一訊 號,則切換至所選的訊號源(步驟33〇),接著進行播放(步 驟332)。播放之後設定暫存器(步驟3)句,接著重複喚醒睡 眠狀悲的類比數位轉換器以及掃描的動作(步驟3丨2、3〇4、 306)。本流程所對應的硬體裝置如第2圖之實施例所述。 第4圖繪示一峰值保持底值保持電路的範例電路圖。 在峰值保持(peak hold)的部分,當輸入訊號4〇2小於節點 404的電壓時,切換器412關閉(〇ff),切換器414導通(〇n), 工2 V通,使得電容406處於緩速放電狀態。當輸入訊號4〇2 大於節點404的電壓時,切換器412導通(〇n),切換器414 關閉(off),I!導通,使得電容4〇6處於快速充電狀態,可 以迅速追上輸入訊號4〇2,而將輸入訊號的峰值電壓保持 住。其中L» 12。 在底值保持(bottom hold)的部分,當輸入訊號402大於 節點408的電壓時,切換器422導通(〇n),切換器424關閉 (off),I3導通,使得電容418處於緩速充電狀態。當輸入 成號402小於節點408的電壓時,切換器422關閉(off), 切換裔424導通(on),I4導通,使得電容4〇8處於快速放電 狀悲,可以迅速追上輸入訊號4〇2,而將輸入訊號4〇2的底 12I % 9.2H 1270295, then check if the video playback device (such as TV) is active (step 316). If not, the video playback device is woken up (step 318), and the volume is automatically adjusted to an appropriate size (step 32), and then the image is played (step 332). If so, a screen display (cm screen display) or picture in picture (pop picture) is displayed (step 322) for the user to select. If the user has not selected, the screen display is turned off after a period of time (step 328). If the user selects one of the signals, it switches to the selected source (step 33) and then plays (step 332). After the playback, the scratchpad (step 3) sentence is set, and then the analog digital converter that wakes up the sleep and the scanning action are repeated (steps 3丨2, 3〇4, 306). The hardware device corresponding to this flow is as described in the embodiment of Fig. 2. Figure 4 is a diagram showing an example circuit diagram of a peak hold bottom value hold circuit. In the peak hold portion, when the input signal 4〇2 is less than the voltage of the node 404, the switch 412 is turned off (〇ff), and the switch 414 is turned on (〇n), so that the capacitor 406 is at Slow discharge state. When the input signal 4〇2 is greater than the voltage of the node 404, the switch 412 is turned on (〇n), the switch 414 is turned off (off), and the I! is turned on, so that the capacitor 4〇6 is in a fast charging state, and the input signal can be quickly caught up. 4〇2, while holding the peak voltage of the input signal. Where L» 12. In the bottom hold portion, when the input signal 402 is greater than the voltage of the node 408, the switch 422 is turned on (〇n), the switch 424 is turned off (off), and the I3 is turned on, so that the capacitor 418 is in a slow state. . When the input voltage 402 is smaller than the voltage of the node 408, the switch 422 is turned off, the switching 424 is turned on, and the I4 is turned on, so that the capacitor 4 〇 8 is in a fast discharge state, and the input signal 4 can be quickly caught up. 2, and will enter the bottom of the signal 4〇2 12
1270295 值電壓保持住 ^峰值保持電壓值428減去底值保持電壓43〇大於參 考,壓432日守,比較器434會輸出邏輯!訊號以喚醒ADC(例 如第2圖的類比數位轉換器206)。 _第5圖繪示一峰值保持電壓之波形圖。利用第4圖所 不電路的峰值保持部分,輸入電壓4〇2與峰值保持電壓似 的波开> 關係如第5圖所示。 第6圖繪示峰值底值保持電路之應用方塊圖。峰值底 值保持電路602接收一類比訊號6〇8,輸出一個經過峰值底 值保持作用的輸出類比訊號61G,再經過—類比數位轉換器 6〇6可以將輸出類比訊號61〇轉換為一數位訊號。nc電路 也可以用來將峰值底值保持電路6〇2的結果輸出至一 MCU。 、,第7圖繪示一峰值底值保持電路之範例動作流程圖。 首先重設峰值底值保持電路(步驟7〇2以及7〇4)。接著對於 輸入的類比訊號進行峰值以及底值保存的動作(步驟 7〇6)接著決定峰值保持電壓(外响與底值保持電壓 (ottom)之差值疋否大於參考電壓值(Vref)(步驟708)。若 是,則表示有訊號輸人;若^ ’難新進行峰值以及底值 保存的動作(步驟706)。當有訊號輸入時,將喚醒aDc(數 位類比轉換器)的訊號(ADC-Enable)設為丨(步驟7丨〇)。接著 向一 MCU發送一喚醒訊號(步驟712)。接著,檢查是否 =DC—Enable = !或 MCU=1(步驟 714)。若是,則喚醒:dc ; 若否則重新進行峰值以及底值保存的動作(步驟706)。 第8圖繪示應用峰值底值保持電路於第2圖之訊號自 13 1270295 - 3 2rij 卑·月曰修(蛳正替換頁 動偵測模組電路之範例操作流程圖。首先,利用一峰值底 值保持電路自動偵測輸入之影像或視訊訊號(步驟804、步 驟804)。決定是否有視訊訊號(vide〇 signai)輸入(步驟 )右疋’則進行步驟8 0 8 ;若否,則重新利用峰值底值 保持電路進行偵測(步驟804)。若有視訊訊號輸入,則喚醒 MCU以及ADC(步驟8〇8)。接著檢查影像或視訊訊號源以 及其型樣(pattern)以決定是否為符合特定格式之視訊訊號 (步驟810)。若為符合特定格式之型樣,則偵測電視是否為 開啟狀態(active)(步驟812)。若不為符合特定格式之型 樣,則重新偵測(步驟804)。若電視為關閉狀態,則喚醒電 視(v驟814) ’並降低音量(步驟8丨6)。若電視為開啟狀態, 則顯不OSD (on screen display)和訊號源,或顯示 PIP(picture in picture)’ 或顯示 p〇p(picture〇npicture)讓使 用者選擇(步驟818)。若使用者無反應(n。resp()nse)的時間 超過一預定時間,則關閉0SD(步驟828),接著設定暫存器 (步驟830) ’然後重新偵測(步驟8〇4)。若使用者選擇一訊 號源(步驟822),則切換至使用者選定的訊號源(步驟824), 然後播放視訊訊號(步驟826),重設暫存器(步驟83〇),然 後重複_的動作(步驟804)。藉此,使用者可以隨時知: 新的訊號源的出現’也能夠在電視螢幕上方便地選擇這些 新的訊號源。 一 本發明至少具有下列優點,其中每—實施例可以呈有 -個或多個優點。本發明之訊號自動偵測模組以及方法, 能自動偵測多個訊號源是否有符合特定格式之訊號輸入。 當有符合特定格式之訊號輸人時訊號自動偵測模組以及方 14 12702951270295 value voltage hold ^ peak hold voltage value 428 minus bottom value hold voltage 43 〇 is greater than the reference, press 432 days, comparator 434 will output logic! The signal wakes up the ADC (e.g., the analog to digital converter 206 of Figure 2). _ Figure 5 shows a waveform of a peak hold voltage. With the peak holding portion of the circuit of Fig. 4, the relationship between the input voltage 4〇2 and the peak holding voltage is as shown in Fig. 5. Figure 6 is a block diagram showing the application of the peak value hold circuit. The peak value hold circuit 602 receives an analog signal 6〇8, outputs an output analog signal 61G that has been subjected to the peak value hold, and converts the output analog signal 61〇 into a digital signal through the analog-to-digital converter 6〇6. . The nc circuit can also be used to output the result of the peak value hold circuit 6〇2 to an MCU. FIG. 7 is a flow chart showing an example operation of a peak value holding circuit. First, the peak value hold circuit is reset (steps 7〇2 and 7〇4). Then, the peak and bottom value preservation actions are performed on the input analog signal (step 7〇6), and then the peak hold voltage is determined (the difference between the external sound and the bottom value hold voltage (ottom) is greater than the reference voltage value (Vref) (step 708). If yes, it means that there is a signal input; if it is difficult to perform the peak and bottom value saving operation (step 706), when there is signal input, the signal of aDc (digital analog converter) will be awakened (ADC- Enable) is set to 丨 (step 7 丨〇). A wake-up signal is then sent to an MCU (step 712). Next, it is checked if = DC - Enable = ! or MCU = 1 (step 714). If so, wake up: dc If otherwise, the peak and bottom value save actions are performed (step 706). Figure 8 shows the application of the peak value hold circuit in Figure 2 from 13 1270295 - 3 2rij ··月曰修 (蛳正换页An example operation flowchart of the motion detection module circuit. First, the input peak image holding circuit automatically detects the input image or video signal (step 804, step 804) to determine whether there is a video signal (vide〇signai) input ( Step) right 疋' Go to step 8000; if not, re-use the peak value hold circuit for detection (step 804). If there is video signal input, wake up the MCU and ADC (step 8〇8). Then check the image or video signal source. And a pattern to determine whether the video signal conforms to the specific format (step 810). If the pattern conforms to the specific format, it is detected whether the television is active (step 812). If the pattern conforms to the specific format, it will be re-detected (step 804). If the TV is off, wake up the TV (v 814) ' and lower the volume (step 8丨6). If the TV is on, it will not show OSD (on screen display) and signal source, or display PIP (picture in picture)' or display p〇p (picture〇npicture) for the user to select (step 818). If the user does not respond (n.resp()nse If the time exceeds a predetermined time, the 0SD is turned off (step 828), then the register is set (step 830) 'and then re-detected (step 8〇4). If the user selects a source (step 822), then Switch to the signal source selected by the user (step 824) Then, the video signal is played (step 826), the register is reset (step 83), and then the action of _ is repeated (step 804). Thereby, the user can know at any time: the appearance of the new signal source can also These new sources of signal are conveniently selected on a television screen. One invention has at least the following advantages, each of which may have one or more advantages. The signal automatic detection module and method of the invention can automatically detect whether a plurality of signal sources have signal input conforming to a specific format. Automatic signal detection module and party when there is a signal corresponding to a specific format. 14 1270295
去忐夠自動播放此符合特定格式之訊號。本發明之自動偵 測模組以及方法,可以具有非常省電的功能。 、 、雖然本發明已以一較佳實施例揭露如上,然其並非用 以限疋本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例 更明顯易懂,所附圖式之詳細說明如下: 第1圖繪示本發明之一應用示意圖; 第2圖繪示本發明之一實施例之示意圖; 第3圖繪示本發明之一實施例之流程圖; 第4圖繪示一峰值保持底值保持電路的範例電路圖; 第5圖繪示一峰值保持電壓之波形圖; • 第6圖繪示峰值底值保持電路之應用方塊圖; 第7圖繪示一峰值底值保持電路之範例動作流程圖; 以及 第8圖繪示應用峰值底值保持電路於第2圖之訊號自 動偵測模組電路之範例操作流程圖。 \ 【主要元件符號說明】 、 102 :衛星接收器訊號 104 : DVD光碟機訊號 106 :錄放影機訊號 200 :訊號自動偵測模組 202 :處理器 15 1270295Go to the automatic playback of this signal in a specific format. The automatic detection module and method of the present invention can have a very power saving function. The present invention has been described above in terms of a preferred embodiment, and is not intended to limit the invention, and various modifications and changes may be made without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other objects, features, advantages and embodiments of the present invention more obvious, the detailed description of the drawings is as follows: FIG. 1 is a schematic diagram of an application of the present invention; The figure shows a schematic diagram of an embodiment of the present invention; FIG. 3 is a flow chart of an embodiment of the present invention; FIG. 4 is a schematic circuit diagram of a peak hold bottom value holding circuit; Maintaining the waveform of the voltage; • Figure 6 shows the application block diagram of the peak value hold circuit; Figure 7 shows an example action flow chart of the peak value hold circuit; and Figure 8 shows the application of the peak value hold An example operation flow chart of the circuit automatic detection module circuit in the second figure. \ [Main component symbol description], 102: Satellite receiver signal 104: DVD player signal 106: Video recorder signal 200: Signal auto detection module 202: Processor 15 1270295
203 206 210 214 218 222 微處理器 弟一類比數位轉換器 類比數位轉換器 第一數位訊號 第二類比訊號 播放訊號 226、228、230 :訊號源 234 :聲音類比訊號 240 ·第一電壓偵測電路 204 :聲音處理器 208 :第二類比數位轉換器 212 :第一類比訊號 216 ·喚醒訊號 220 :第二數位訊號 224 :影音播放裝置 232 :影像處理器 236 :聲音數位訊號 242 :第二電壓偵測電路 244、246、248、250 : lie 介 面203 206 210 214 218 222 microprocessor analog analog converter analog digital converter first digital signal second analog signal playback signal 226, 228, 230: signal source 234: sound analog signal 240 · first voltage detection circuit 204: Sound processor 208: second analog digital converter 212: first analog signal 216, wake-up signal 220: second digital signal 224: video playback device 232: image processor 236: sound digital signal 242: second voltage detection Measuring circuit 244, 246, 248, 250: lie interface
402 :輸入訊號 406 ··電容 412 :切換器 418 :電容 424 :切換器 430 :底值保持電壓 434 :比較器 602 :峰值底值保持電路 61〇 :輸出類比訊號 404 ··節點 408 :節點 414 :切換器 422 :切換器 428:當峰值保持電壓值 432 :參考電壓 6〇8 :類比訊號 16402: input signal 406 · capacitor 412: switch 418: capacitor 424: switch 430: bottom value hold voltage 434: comparator 602: peak value hold circuit 61 〇: output analog signal 404 · · node 408: node 414 : Switch 422: Switch 428: When peak hold voltage value 432: Reference voltage 6〇8: analog signal 16
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| TW94114440A TWI270295B (en) | 2005-05-04 | 2005-05-04 | Signal auto-detection module and method |
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| TW94114440A TWI270295B (en) | 2005-05-04 | 2005-05-04 | Signal auto-detection module and method |
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| TW200640256A TW200640256A (en) | 2006-11-16 |
| TWI270295B true TWI270295B (en) | 2007-01-01 |
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