1269459 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種覆晶封裝構造，特別係有關於一 種需要點塗熱固性密封膠（sealant)之覆晶封裝構造。 【先前技術】 覆晶封裝係為目前最廣泛使用之半導體封裝技術，在 覆晶封裝技術中，通常會形成一底部填充膠於一覆晶晶片 • 與一基板之間，其中在烘烤底部填充膠使其熟化之步驟 • 時’由於基板與底部填充膠之熱膨脹係數不一樣，因此會 導致基板發生翹曲之情形，為防止基板發生翹曲通常會在 基板上设置固定環（stiffener)。 如第1圖所示，習知覆晶封裝構造1 〇〇主要包含一基 板110、一覆晶晶片120、一底部填充膠13〇及一散熱板 140。該基板11〇係具有一上表面hi以及一下表面丨丨之， 該覆晶晶片12 0係設置於該基板11 〇之該上表面1丨丨，該 φ 覆晶晶片120係具有一主動面121及一背面122，該主動 面121上係形成有複數個凸塊123,以接合該覆晶晶片12〇 與該基板110，該底部填充膠130係形成於該覆晶晶片120 與該基板110之間，該散熱板140係藉由一導熱介面物質 124熱耦合於該覆晶晶片120之該背面122，以加強該覆 晶晶片12 0之散熱效果，且該散熱板14 0係具有一結合部 141，該結合部141係以一黏著膠113結合於該基板11〇 之該上表面111周邊，最後於該基板11〇之該下表面112 設置複數個銲球150以供外接一電路板。雖然在該基板11〇 1269459 * . 上設置具有該結合部141之該散熱板140可降低該基板 -110之翹曲現象，但是卻導致生產成本的增加，且在封裝 過程中需將該散熱板140之該結合部141平整地貼附於該 基板110之該上表面111亦增加製程之困難。 【發明内容】 本發明之主要目的係在於提供一種覆晶封裝構造，一 基板之一上表面係設置有一覆晶晶片，該基板之一下表面 籲係形成有至少-溝槽，該溝槽内係形成有一膠材，該膠材 . 係可防止形成在該基板與該覆晶晶片間之一熱固性密封 膠於烘烤熟化時造成該基板發生魏曲。因此，該基板不需 要於該上表面設置-以環（stiffener)或散熱板，以達到在 不變更封裝外觀尺寸以及車交低製造成本下防止基板勉曲 之功效。 本發明之次一目的係在於提供一種覆晶封裝構造，直 中該溝槽係鄰近該基板之該下表面之一邊緣，形成於該溝 ·#之該膠材係具有熱固性，其可與該熱固性密封膠具有相 同之材質，使該熱固性密封膠在烘烤熟化之過程中，同時 …、化4膠材，以使該基板之上、下表面達到熱應力平衡， 而防止基板發生翹曲。 依據本發明，一種覆晶封裝構造主要包含一基板、一 覆晶晶片及一膠材。該基板係具有一上表面以及一下表 i覆日日日日片係没置於該基板之該上表面，該覆晶晶片 與忒基板之間係形成有一熱固性密封膠，該基板之該下表 面係形成有至少一溝槽，且在該溝槽内係形成有一膠材， 6 1269459 以防止該基板於該熱固性 【實施方式】 密封膠烘烤熟化時產生翹曲 請參閱第2圖，在本發明之一具體實施例中，-覆晶 封裝構以200主要包含一基板21〇、一覆晶晶片及一 膠材謂。該基板21〇係具有一上表面2ιι以及一下表面 212,該覆晶晶片22G係設置於該基板21()之該上表面 211，該覆晶晶片220之一主動面221上係形成有複數個 凸塊222 ’以接合該覆晶晶片220與該基板210，一埶固 性密封膠230係形成於該覆晶晶片咖與該基板21〇、之 間，以保護該些凸塊222，該熱固性密封膠23〇係可為底 部填充膠、異方性導電膠或熱固性非導電膠，在本實施例 中，該熱固性密封膠230係為底部填充膠。該基板21〇之1269459 IX. Description of the Invention: [Technical Field] The present invention relates to a flip chip package structure, and more particularly to a flip chip package structure requiring a point-coating thermosetting sealant. [Prior Art] The flip chip package is currently the most widely used semiconductor package technology. In flip chip packaging technology, an underfill is usually formed on a flip chip and a substrate, which is filled in the baking bottom. Step of curing the glue • When 'the substrate and the underfill have different thermal expansion coefficients, which may cause the substrate to warp. To prevent the substrate from warping, a stiffener is usually placed on the substrate. As shown in FIG. 1, the conventional flip chip package structure 1 includes a substrate 110, a flip chip 120, an underfill 13 and a heat sink 140. The substrate 11 has an upper surface hi and a lower surface. The flip chip 120 is disposed on the upper surface 1 of the substrate 11. The φ flip chip 120 has an active surface 121. And a back surface 122, the active surface 121 is formed with a plurality of bumps 123 for bonding the flip chip 12 and the substrate 110. The underfill 130 is formed on the flip chip 120 and the substrate 110. The heat dissipation plate 140 is thermally coupled to the back surface 122 of the flip chip 120 by a thermal interface material 124 to enhance the heat dissipation effect of the flip chip 120, and the heat dissipation plate 140 has a joint portion. 141, the bonding portion 141 is bonded to the periphery of the upper surface 111 of the substrate 11 by an adhesive 113. Finally, a plurality of solder balls 150 are disposed on the lower surface 112 of the substrate 11 for external connection to a circuit board. Although the heat dissipation plate 140 having the bonding portion 141 on the substrate 11 〇 1269459 * can reduce the warpage of the substrate - 110, it leads to an increase in production cost, and the heat dissipation plate is required during the packaging process. The bonding of the bonding portion 141 to the upper surface 111 of the substrate 110 also increases the difficulty of the process. SUMMARY OF THE INVENTION The main object of the present invention is to provide a flip chip package structure, a top surface of a substrate is provided with a flip chip, and a lower surface of the substrate is formed with at least a trench, and the trench is Forming a rubber material, which prevents the thermosetting sealant formed between the substrate and the flip chip from causing the warpage of the substrate during baking and curing. Therefore, the substrate does not need to be provided with a stiffener or a heat sink on the upper surface to prevent the substrate from being distorted without changing the package size and the low manufacturing cost. A second object of the present invention is to provide a flip chip package structure in which the trench is adjacent to an edge of the lower surface of the substrate, and the adhesive material formed on the trench has thermosetting property, which can be The thermosetting sealant has the same material, so that the thermosetting sealant is in the process of baking and curing, and the 4 adhesive material is simultaneously adjusted to achieve thermal stress balance on the upper and lower surfaces of the substrate to prevent warpage of the substrate. According to the present invention, a flip chip package structure mainly comprises a substrate, a flip chip and a glue. The substrate has an upper surface and a surface of the substrate is not disposed on the upper surface of the substrate. A thermosetting sealant is formed between the flip chip and the substrate, and the lower surface of the substrate is formed. Forming at least one groove, and forming a glue material in the groove, 6 1269459 to prevent the substrate from being warped when the sealant is cooked and cured. Referring to FIG. 2, in the present In one embodiment of the invention, the flip chip package 200 comprises a substrate 21, a flip chip and a glue. The substrate 21 has an upper surface 2 ι and a lower surface 212. The flip chip 22G is disposed on the upper surface 211 of the substrate 21, and a plurality of active surfaces 221 of the flip chip 220 are formed. A bump 222 ′ is formed to bond the flip chip 220 and the substrate 210 , and a tamping sealant 230 is formed between the flip chip and the substrate 21 to protect the bumps 222 . The sealant 23 can be an underfill, an anisotropic conductive adhesive or a thermosetting non-conductive adhesive. In the embodiment, the thermosetting sealant 230 is an underfill. The substrate 21
該下表面212係形成有至少一溝槽213，該溝槽213係鄰 近該基板210之該下表面212之其中至少一邊緣214為 佳，在本實施例中，如第3圖所示，該溝槽213係可為環 狀且鄰近於該基板210之該下表面212之四周邊緣，該溝 槽213係可為「口」形。在不同之具體實施例中，該溝槽 213的數量與形狀可作適當的變化，如第‘A圖所示，該 溝槽2 1 3係為複數個對稱型態之溝槽，例如為「1 1」形、 或如第4B圖所示，該溝槽213之型態可為「〔〕」形、另 如第4C圖所示，該溝槽213之型態為「[]」形。該膠材 240係形成於該溝槽213，其係可填滿該溝槽2丨3且具有 熱固性。此外，在該覆晶封裝構造2〇〇中，該基板21 〇之 該下表面212係可設置有複數個銲球250，並且形成於該 .1269459 _ 溝槽213之該膠材240之高度應低於該些銲球25〇，以利 * 該些銲球250連接一外部電路板（圖未繪出）。較佳地， - 該膠材240與該熱固性密封膠23〇係為相同之材質，該膠 材240係具有與該熱固性密封膠23"目同之熱膨脹係數： 於烘烤熟化該熱固性密封膠230之過程中，可同時熟化該 膠材240，使该基板2 1 〇上、下表面之熱應力達到平衡， 以增進該基板210之抗麵曲效果。 • 請參閱第5A至5D圖，其係為本實施例中該覆晶封裝 '構造200於製造過程中之截面示意圖。首先，請參閱第5A 圖，提供一基板210，該基板210係具有一上表面211以 及一下表面212,其中該基板210之該下表面212係形成 有複數個溝槽213，在本實施例中，該些溝槽213係為對 稱型態，其係鄰近於該基板21〇之該下表面212之一邊緣 214。接著，請參閱第5B圖，設置一覆晶晶片22〇於該基 板210之該上表面211，該覆晶晶片22〇係具有一主動面 鲁221，該主動面221上係形成有複數個凸塊222，可利用回 銲或是熱壓合使該些凸塊222電性連接該基板21〇與該覆 晶晶片220。之後，請參閱第5C圖，以一點膠器1〇形成 一熱固性密封膠230於該覆晶晶片22〇與該基板21〇之 間，以保護該些凸塊222，本實施例中，該熱固性密封膠 230係為底部填充膠。接著，請參閱第5D圖，在熟化該 熱固性密封膠230之前，係以該點膠器1〇形成一膠材24〇 於該些溝槽213，且該膠材240係可填滿該些溝槽213， 該膠材240係與該熱固性密封膠23〇相同材質。之後，熟 8 1269459 化該熱固性密封膠23〇與該膠材。複數個輝球…係 設置於該基板210之該下表面212，以製得如第2圖所示 之覆晶封裝構造2GG。由於該溝槽213内所形成之該 24〇與該熱固性密封膠23〇材質相同，因此在烘烤孰切 熱固性密封膠230與該膠材⑽時，該基板21()之上^ 表面之熱應力能達到平衡，且在同__個步驟中供烤熟化該 膠材24G與③熱固性密封膠23()，以減少封裝構造之製程。The lower surface 212 is formed with at least one trench 213 adjacent to at least one of the edges 214 of the lower surface 212 of the substrate 210. In this embodiment, as shown in FIG. 3, the bottom surface 212 is formed. The trench 213 may be annular and adjacent to the peripheral edge of the lower surface 212 of the substrate 210. The trench 213 may be in the shape of a "mouth". In different embodiments, the number and shape of the trenches 213 may be appropriately changed. As shown in FIG. 4A, the trenches 2 1 3 are a plurality of symmetrical trenches, for example, 1 1", or as shown in Fig. 4B, the shape of the groove 213 may be "[]", and as shown in Fig. 4C, the shape of the groove 213 is "[]". The glue 240 is formed in the groove 213, which fills the groove 2丨3 and has thermosetting properties. In addition, in the flip chip package structure 2, the lower surface 212 of the substrate 21 can be provided with a plurality of solder balls 250, and the height of the glue 240 formed in the 1269459 _ trench 213 should be Below the solder balls 25 〇, to facilitate * the solder balls 250 are connected to an external circuit board (not shown). Preferably, the rubber material 240 and the thermosetting sealant 23 are the same material, and the rubber material 240 has the same thermal expansion coefficient as the thermosetting sealant 23: baking and curing the thermosetting sealant 230 During the process, the adhesive material 240 can be matured at the same time to balance the thermal stress of the upper and lower surfaces of the substrate 2 1 to improve the surface resistance of the substrate 210 . • Refer to Figures 5A through 5D, which are schematic cross-sectional views of the flip chip package structure 200 in the manufacturing process in the present embodiment. First, referring to FIG. 5A, a substrate 210 is provided. The substrate 210 has an upper surface 211 and a lower surface 212. The lower surface 212 of the substrate 210 is formed with a plurality of trenches 213, in this embodiment. The trenches 213 are in a symmetrical state adjacent to one of the edges 214 of the lower surface 212 of the substrate 21 . Next, referring to FIG. 5B, a flip chip 22 is disposed on the upper surface 211 of the substrate 210. The flip chip 22 has an active surface 221, and the active surface 221 is formed with a plurality of convex portions. The bumps 222 can be electrically connected to the substrate 21 and the flip chip 220 by reflow or thermal bonding. Then, referring to FIG. 5C, a thermosetting sealant 230 is formed between the flip chip 22 and the substrate 21A to protect the bumps 222. In this embodiment, the bump 222 is formed. The thermosetting sealant 230 is an underfill. Next, referring to FIG. 5D, before the curing of the thermosetting sealant 230, a glue 24 is formed on the dispenser 1 to form the adhesive 214, and the adhesive 240 can fill the grooves. In the groove 213, the glue 240 is made of the same material as the thermosetting sealant 23〇. After that, the cooked thermosetting sealant 23 was rubbed with the adhesive. A plurality of glow balls are disposed on the lower surface 212 of the substrate 210 to produce a flip chip package structure 2GG as shown in Fig. 2. Since the 24 〇 formed in the trench 213 is the same material as the thermosetting sealant 23 ,, when the thermosetting sealant 230 and the adhesive (10) are baked, the surface of the substrate 21 is heated. The stress can be balanced, and the glue 24G and the 3 thermosetting sealant 23() are baked and cured in the same step to reduce the packaging structure.
本發明之保護範圍當視後附之巾請專利範圍所界定 =為準，任何熟知此項技藝者，在不脫離本發明之精神和 範圍内所作之任何變化與修改，均屬於本發明之保護範 圍0 【圖式簡單說明】 第1 圖·習知覆晶封裝構造之截面示意圖。 第2 圖·依據本發明之一具體實施例，一種覆晶封 裝構造之截面示意圖。 第3 圖·依據本發明之一具體實施例，該覆晶封裝 構造之基板底視圖。 第4A至4C圖：依據本發明，在不同具體實施例中，該覆 晶封裝構造之基板底視圖。 第5 A至5D圖：依據本發明之一具體實施例，該覆晶封裝 構造於製造過程中之截面示意圖。 【主要元件符號說明】 1 〇 點膠器 100覆晶封裝構造 .1269459 110 基板 111 上表面 112 下表面 113 黏著膠 120 覆晶晶片 121 主動面 122 背面 123 凸塊 124 導熱介面物質 130 底部填充膠 140 散熱板 141 結合部 150 辉球 200 覆晶封裝構造 210 基板 211 上表面 212 下表面 213 溝槽 214 邊緣 220 覆晶晶片 221 主動面 222 凸塊 230 熱固性密封膠 240 膠材 250 銲球The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are protected by the present invention. Range 0 [Simplified description of the drawings] Fig. 1 is a schematic cross-sectional view of a conventional flip chip package structure. Fig. 2 is a schematic cross-sectional view showing a flip chip mounting structure in accordance with an embodiment of the present invention. Figure 3 is a bottom plan view of the flip chip package structure in accordance with an embodiment of the present invention. 4A through 4C are views of a substrate bottom view of the flip chip package structure in accordance with the present invention, in various embodiments. 5A to 5D are views showing a cross-sectional view of the flip chip package structure in a manufacturing process in accordance with an embodiment of the present invention. [Main component symbol description] 1 〇 dispenser 100 flip-chip package structure. 1269459 110 substrate 111 upper surface 112 lower surface 113 adhesive 120 flip chip 121 active surface 122 back 123 bump 124 thermal interface material 130 underfill 140 Heat sink 141 joint 150 glow ball 200 flip chip package structure 210 substrate 211 upper surface 212 lower surface 213 trench 214 edge 220 flip chip 221 active surface 222 bump 230 thermosetting sealant 240 glue 250 solder ball
1010