[go: up one dir, main page]

TWI263417B - Array processing for linear system solutions - Google Patents

Array processing for linear system solutions

Info

Publication number
TWI263417B
TWI263417B TW091133255A TW91133255A TWI263417B TW I263417 B TWI263417 B TW I263417B TW 091133255 A TW091133255 A TW 091133255A TW 91133255 A TW91133255 A TW 91133255A TW I263417 B TWI263417 B TW I263417B
Authority
TW
Taiwan
Prior art keywords
cholesky factor
scalar
processors
linear system
array processing
Prior art date
Application number
TW091133255A
Other languages
Chinese (zh)
Other versions
TW200302640A (en
Inventor
Peter E Becker
Stephan Shane Supplee
Original Assignee
Interdigital Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interdigital Tech Corp filed Critical Interdigital Tech Corp
Publication of TW200302640A publication Critical patent/TW200302640A/en
Application granted granted Critical
Publication of TWI263417B publication Critical patent/TWI263417B/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/11Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
    • G06F17/12Simultaneous equations, e.g. systems of linear equations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7097Interference-related aspects
    • H04B1/7103Interference-related aspects the interference being multiple access interference
    • H04B1/7105Joint detection techniques, e.g. linear detectors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60Control of cameras or camera modules
    • H04N23/66Remote control of cameras or camera parts, e.g. by remote control devices
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60Control of cameras or camera modules
    • H04N23/667Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7097Interference-related aspects
    • H04B1/7103Interference-related aspects the interference being multiple access interference
    • H04B1/7105Joint detection techniques, e.g. linear detectors
    • H04B1/71055Joint detection techniques, e.g. linear detectors using minimum mean squared error [MMSE] detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Operations Research (AREA)
  • Computing Systems (AREA)
  • Multimedia (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Processing elements are utilized for solving linear systems. One embodiment projects matrix elements along a diagonal of the matrix onto scalar processing elements to determine a Cholesky factor. Another embodiment uses a two-dimensional scalar array to determine a Cholesky factor. A third embodiment uses a reconfigurable scalar linear array to determine a Cholesky factor and perform forward and backward substitution. For matrices having a limited bandwidth, the processors used in these embodiments may be scaled down. Folding of the processors may be used to reduce the number of processors used in the embodiments. Another embodiment is a processing element capable of being reconfigured to determine a Cholesky factor and perform backward and forward substitution.
TW091133255A 2001-11-14 2002-11-13 Array processing for linear system solutions TWI263417B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US33295001P 2001-11-14 2001-11-14
US8318902A 2002-02-26 2002-02-26
US10/172,113 US7218624B2 (en) 2001-11-14 2002-06-14 User equipment and base station performing data detection using a scalar array

Publications (2)

Publication Number Publication Date
TW200302640A TW200302640A (en) 2003-08-01
TWI263417B true TWI263417B (en) 2006-10-01

Family

ID=27374484

Family Applications (6)

Application Number Title Priority Date Filing Date
TW091133255A TWI263417B (en) 2001-11-14 2002-11-13 Array processing for linear system solutions
TW095141569A TWI325240B (en) 2001-11-14 2002-11-13 Method for determining cholesky factor, method for recovering data from data signals and method for use in solving linear equation
TW091218230U TW581368U (en) 2001-11-14 2002-11-13 Base station using an array processsing for data detection
TW091218229U TW588890U (en) 2001-11-14 2002-11-13 User equipment using an array processing for data detection
TW092127558A TWI268667B (en) 2001-11-14 2002-11-13 Array processing for linear system solutions
TW094140364A TWI314405B (en) 2001-11-14 2002-11-13 Array processing for linear system solutions

Family Applications After (5)

Application Number Title Priority Date Filing Date
TW095141569A TWI325240B (en) 2001-11-14 2002-11-13 Method for determining cholesky factor, method for recovering data from data signals and method for use in solving linear equation
TW091218230U TW581368U (en) 2001-11-14 2002-11-13 Base station using an array processsing for data detection
TW091218229U TW588890U (en) 2001-11-14 2002-11-13 User equipment using an array processing for data detection
TW092127558A TWI268667B (en) 2001-11-14 2002-11-13 Array processing for linear system solutions
TW094140364A TWI314405B (en) 2001-11-14 2002-11-13 Array processing for linear system solutions

Country Status (11)

Country Link
US (2) US7218624B2 (en)
EP (1) EP1444798A4 (en)
JP (3) JP2005509959A (en)
KR (9) KR100858466B1 (en)
CN (3) CN1582544A (en)
CA (1) CA2466684A1 (en)
DE (2) DE20217636U1 (en)
MX (1) MXPA04004486A (en)
NO (1) NO20042407L (en)
TW (6) TWI263417B (en)
WO (1) WO2003043236A1 (en)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7437135B2 (en) 2003-10-30 2008-10-14 Interdigital Technology Corporation Joint channel equalizer interference canceller advanced receiver
US7400692B2 (en) 2004-01-14 2008-07-15 Interdigital Technology Corporation Telescoping window based equalization
US7657846B2 (en) * 2004-04-23 2010-02-02 Microsoft Corporation System and method for displaying stack icons
US20060083291A1 (en) * 2004-10-15 2006-04-20 Zheng Hongming Receiver apparatus, and associated method, for operating upon data communicated in a MIMO, multi-code, MC-CDMA communication system
US7633913B2 (en) * 2004-11-05 2009-12-15 Nextel Communications Inc. Wireless communication system using joint detection to compensate for poor RF condition based on user priority
CN100383781C (en) * 2004-11-26 2008-04-23 北京天碁科技有限公司 Cholesky Decomposition Algorithm Device
US7924778B2 (en) * 2005-08-12 2011-04-12 Nextel Communications Inc. System and method of increasing the data throughput of the PDCH channel in a wireless communication system
JP4172807B2 (en) * 2006-09-08 2008-10-29 インターナショナル・ビジネス・マシーンズ・コーポレーション Technology that supports the discovery of the cause of failure
US8589467B2 (en) * 2007-11-22 2013-11-19 Nec Corporation Systolic array and calculation method
KR100986179B1 (en) * 2008-06-16 2010-10-07 유택성 Power LED Module for Street Light
KR100986178B1 (en) * 2008-06-16 2010-10-07 유택성 Street light with power LED
US8417758B1 (en) 2009-09-01 2013-04-09 Xilinx, Inc. Left and right matrix multiplication using a systolic array
US8510364B1 (en) 2009-09-01 2013-08-13 Xilinx, Inc. Systolic array for matrix triangularization and back-substitution
US8473540B1 (en) 2009-09-01 2013-06-25 Xilinx, Inc. Decoder and process therefor
US8473539B1 (en) 2009-09-01 2013-06-25 Xilinx, Inc. Modified givens rotation for matrices with complex numbers
US8416841B1 (en) 2009-11-23 2013-04-09 Xilinx, Inc. Multiple-input multiple-output (MIMO) decoding with subcarrier grouping
US8620984B2 (en) 2009-11-23 2013-12-31 Xilinx, Inc. Minimum mean square error processing
US8406334B1 (en) 2010-06-11 2013-03-26 Xilinx, Inc. Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding
US8443031B1 (en) 2010-07-19 2013-05-14 Xilinx, Inc. Systolic array for cholesky decomposition
US9088521B2 (en) * 2013-02-21 2015-07-21 Litepoint Corporation System and method for testing multiple data packet signal transceivers concurrently
CN111998854B (en) * 2020-08-31 2022-04-15 郑州轻工业大学 Cholesky decomposition calculation-based accurate expansion Stirling interpolation filtering method
US12235793B2 (en) * 2020-09-25 2025-02-25 Intel Corporation Programmable spatial array for matrix decomposition

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4964126A (en) 1988-09-30 1990-10-16 Massachusetts Institute Of Technology Fault tolerant signal processing machine and method
JPH03141480A (en) * 1989-10-27 1991-06-17 Mitsubishi Heavy Ind Ltd Systolic array for band matrix computation
JPH0752748B2 (en) * 1989-12-14 1995-06-05 株式会社グラフィカ 3D device simulation device
JPH0628324A (en) * 1992-07-06 1994-02-04 Toshiba Corp Parallel computer and compiler
US5630154A (en) 1994-10-11 1997-05-13 Hughes Aircraft Company Programmable systolic array system arranged in a found arrangement for passing data through programmable number of cells in a time interleaved manner
JPH103468A (en) 1996-06-14 1998-01-06 Toyo Commun Equip Co Ltd Parallel processing system
US6061706A (en) 1997-10-10 2000-05-09 United Microelectronics Corp. Systolic linear-array modular multiplier with pipeline processing elements
US6313786B1 (en) 1998-07-02 2001-11-06 Snaptrack, Inc. Method and apparatus for measurement processing of satellite positioning system (SPS) signals
EP0971485A1 (en) * 1998-07-08 2000-01-12 Siemens Aktiengesellschaft Multiuser detection in CDMA using a correlation matrix
US6675187B1 (en) 1999-06-10 2004-01-06 Agere Systems Inc. Pipelined linear array of processor elements for performing matrix computations
US6714527B2 (en) * 1999-09-21 2004-03-30 Interdigital Techology Corporation Multiuser detector for variable spreading factors
US6870882B1 (en) * 1999-10-08 2005-03-22 At&T Corp. Finite-length equalization over multi-input multi-output channels
FR2800948B1 (en) * 1999-11-08 2002-03-01 Mitsubishi Electric Inf Tech JOINT DETECTION METHOD
MXPA02006668A (en) * 2000-01-07 2002-09-30 Interdigital Tech Corp Channel estimation for time division duplex communication systems.
US6707864B2 (en) * 2001-01-25 2004-03-16 Interdigital Technology Corporation Simplified block linear equalizer with block space time transmit diversity
US6625203B2 (en) * 2001-04-30 2003-09-23 Interdigital Technology Corporation Fast joint detection
FR2838582B1 (en) * 2002-04-12 2004-05-21 Commissariat Energie Atomique METHOD AND DEVICE FOR DETECTING DATA TRANSMITTED BY SPECTRUM SPREAD
CN1723629A (en) * 2003-01-10 2006-01-18 美商内数位科技公司 Generalized two-stage data estimation

Also Published As

Publication number Publication date
KR20070116287A (en) 2007-12-07
KR200310933Y1 (en) 2003-04-18
CA2466684A1 (en) 2003-05-22
CN1582544A (en) 2005-02-16
CN2686248Y (en) 2005-03-16
US7218624B2 (en) 2007-05-15
WO2003043236A1 (en) 2003-05-22
KR20040015312A (en) 2004-02-18
CN2579091Y (en) 2003-10-08
TW200415862A (en) 2004-08-16
NO20042407L (en) 2004-06-09
TWI268667B (en) 2006-12-11
KR20050096874A (en) 2005-10-06
DE20217636U1 (en) 2003-04-03
TW200635264A (en) 2006-10-01
TWI325240B (en) 2010-05-21
TW200302640A (en) 2003-08-01
US7606207B2 (en) 2009-10-20
TW200742284A (en) 2007-11-01
TW588890U (en) 2004-05-21
JP2008077682A (en) 2008-04-03
KR20050090349A (en) 2005-09-13
KR20050090084A (en) 2005-09-12
US20030091007A1 (en) 2003-05-15
DE20217637U1 (en) 2003-03-20
KR20040016941A (en) 2004-02-25
KR100858466B1 (en) 2008-09-16
KR100809993B1 (en) 2008-03-07
US20070206543A1 (en) 2007-09-06
JP2005509959A (en) 2005-04-14
TWI314405B (en) 2009-09-01
MXPA04004486A (en) 2004-08-11
KR200303640Y1 (en) 2003-02-11
JP2012150827A (en) 2012-08-09
TW581368U (en) 2004-03-21
KR20040053297A (en) 2004-06-23
EP1444798A4 (en) 2007-12-12
EP1444798A1 (en) 2004-08-11

Similar Documents

Publication Publication Date Title
TWI263417B (en) Array processing for linear system solutions
AU2002234101A1 (en) Non-integral multiple size array loop processing in simd architecture
GB0008691D0 (en) Input and output systems for data processing
AU2002259323A1 (en) Active transaction generation, processing, and routing system
GB0101429D0 (en) Compound order handling in an anonymous trading system
AU3226893A (en) Input/output system for parallel processing arrays
CA2333839A1 (en) Static mixer
DE60102247D1 (en) EDGE-RESISTANT IMPROVEMENT OF SEISMIC IMAGES BY NON-LINEAR ANISOTROPICAL DIFFUSION
EP2239667A3 (en) Multiprocessor with specific pathways creation
DE60122854D1 (en) Linear cuvette matrix, two-dimensional cuvette matrix built therewith, and such two-dimensional cuvette matrices
EP1742154A3 (en) Manifold array processor
WO2002071248A8 (en) Methods and devices for treating and/or processing data
GB2379039B (en) Transaction processing in a distributed data processing system
AU2003245906A1 (en) Loosely-biased heterogeneous reconfigurable arrays
WO1999030225A3 (en) Signal processing arrangement and method for predictable data
AU2001258545A1 (en) Distributed processing multi-processor computer
Yamauchi et al. Architecture and implementation of a highly parallel single-chip video DSP
AU2002343180A8 (en) Data processing system having multiple processors
TW346595B (en) Single-instruction-multiple-data processing with combined scalar/vector operations
DE60222765D1 (en) LOCKING SOURCE REGISTERS IN A DATA PROCESSING DEVICE
AU2002241759A1 (en) Handling conditional processing in a single instruction multiple datapath processor architecture
EP0680191A3 (en) Digital imaging system using two-dimensional input sensor array and output light valve.
GB0101423D0 (en) Configurable anonymous trading system
GB2348981A8 (en) Parallel data processing system with SIMD array
WO2004044766A3 (en) Device for parallel data processing as well as a camera system comprising such a device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees