1262348 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種形成電晶體的方法，特別是 源極/汲極接觸阻抗的方法。 、種降低 【先前技術】 目前主流的液晶顯示器都是使用薄膜電晶體作 薄膜電晶體的製程中’會奪涉到許多的薄膜沉積，微影== 驟在餘刻步驟之後，通常會有洗淨製程，然後才會 沉積的步驟。 ,漘腺 一種洗淨製程U電漿表面處理的方法，主要是針對降低薄膜電 晶體源極沒極和氧化銦録之接觸阻抗。之前國際電氣提出一種利用 He電漿來對氧化石夕膜、氮化石夕膜、非晶形石夕膜，n+非晶形石夕膜、單 結晶石夕膜等㈣處理。而三星電子制He電漿處理是在乾式飯刻機 台中’係處理分隔的源極及汲極表面。另外，三菱電機在㈣接觸膜 表面之氮化處理係使用N2以及He混合氣體電漿處理，使接觸膜表面 而，這些方法都有不足之處，就是無法增加導線的傳導能力以 及降低接觸阻抗的電阻率。尤其是在高解析度或是大尺寸面板中，對 於cl遲的要求疋相當嚴格的，因而面板電路需要更低的電阻率。 為了往下個顯不面板的世代前進，需要提供一種能同時降低電阻率的 電漿表面處理方式。 【發明内容】 雲於上述之發明背景中，傳統的電漿處理方式所產生的不足，本 發明主要的目的在於降低源極/汲極的接觸阻抗，及增加導線的傳導 能力，因而提出另一種利用在化學氣相沉積的反應室中以ΝΑ氣體電 1262348 沉積保護層成膜之前，針對 子鈍化效果做處理以降低接 的電漿處理方式相比較可以 漿處理方法。本發明主要是在以化學氣相 薄膜電晶體源極/汲極接觸表面進行氮原 觸阻抗，其中接觸阻抗在本發明中與傳統 降低約14%-50%。 本發明的另一 低源極/没極與透明 間。 ▼ , — I工 ^ 厂 電極之間的接觸阻枋，；隹 Θ 才几進而侍到更低的RC延遲時 本發明的又一目的在於本發明的方法可以應用到大尺寸或是高 解析度液晶顯不面板。 根據以上所述之目的’本發明提供了—種在形成保護層之前處理% 液晶顯示器之薄膜電晶體表面的方法，其中之薄膜電晶體包含一閘極 位於-底材上，一閘極絕緣層位於閘極上，一島狀半導體層位於閘極 絕緣層上及在閘極正上方，—源極與—沒極位於島狀半導體上。本發 明的方法包含一導入氨氣電漿至該源極與汲極的表面上以鈍化之。 本發明同時提供一種形絲膜電晶冑的方法，包含在一底材上形 成一閘極。之後，一閘極絕緣層形成在閘極與底材上。然後，一島狀 半導體層形成在閘極絕緣層上以及在閘極正上方，並且一源極與一汲 極形成在島狀半導體層上，其中一通道區域位於島狀半導體層上以及φ 源極與汲極之間。接著，導入氨氣電漿至源極與汲極表面上以鈍化 之，並且將位於通道區域表面之受損的懸吊鍵（dangHng ^^心）結修 補。之後，一保護層形成在源極與汲極上，並且一接觸窗形成在保護 -層中以電氣地連接汲極。 【貫施方式】 本發明的一些實施例會詳細描述如下。然而，除了詳細描述外， 本發明還可以廣泛地在其他的實施例施行，且本發明的範圍不受限 定，其以之後的專利範圍為準。 1262348 在薄膜電晶體液晶顯示器（TFT-LCD)的製作過程中，物理氣相沉 積（PVD)製程與乾式触刻處理之後會在源極汲極之金屬接觸面積和通 道（channel)表面上，會有蝕刻後所留下來的微粒，殘留物和氧化物。 雖然經洗淨處理，但是對於金屬表面之氧化物，還是無法清除乾淨， 造成阻抗過高，影響導線的傳導能力。 因此，本發明利用一種NH3氣體電漿處理方法步驟，在以化學氣 相沉積法形成保護層成膜之前針對薄膜電晶體源極汲極金屬接觸面 積使用NH3氣體電漿處理表面處理方法，去除蝕刻後留下的微粒，殘 留物和氧化物，以降低金屬接觸阻抗。同時用NH3氣體電漿處理表面 處理方法，在通道中因為NH3電漿處理中的氮原子基（nitr〇gen 以(11(^18)具有鈍化效果（1^^¥^0116订^〇，特別是經由後續回火製程 後以形成氮氧化矽保護層。另外，在蝕刻製程的轟擊過程中，通道表 1的非晶矽會有受損的懸吊鍵（dangling b〇nds)和被撞擊成較弱的鍵 結。藉由氫原子基（hydrogen radicals)來做修補，可以得到一個穩定的 鍵結結構。這些鈍化效果與修補鍵結的效果不但可以降低金屬表面的 接觸阻抗，還可以使薄膜電晶體元件與面板電路更加穩定。 本發明主要是提供-種降低液晶顯示器之薄膜電晶體源極沒極 接觸阻抗的方法，其方法是在薄膜電晶體上形成—保護層之前導入包 含氮原子與氫原子氣體之電漿至源極與沒極的表面上以純化之。在本 發明中導人的氣體包含氨氣（Nh3) ’而這個步驟通常也稱為表面處理 γ驟位於源極與沒極之間的通道區域，其表面的受損的懸吊鍵 (8 lng b〇nds)可以在這個表面處理的步驟中修復（satlxrate)。保護層 的材質是氮切，而上述之表面處理的步驟可以在形成氮切的反應 室中進行。 、上述之薄膜電晶體包含一位於底材上之問極，一閘極絕緣層在前 述之閘極上，-島狀半導體層在閘極絕緣層上以及閘極正上方，一源 和及極在島狀半導體上’以及—在島狀半導體層上的通道區域係位 H、汲極之間。源極與汲極的形成方式是先沉積一導體層在島狀 1262348 半導體層上，然後以圖案轉移以蝕刻導體層形成上述之源極與汲極。 如述圖案轉移蝕刻步驟後產生的微粒，殘留物，與氧化物，可由本發 明之表面處理步驟移除。 本發明同時提供一種形成薄膜電晶體的方法，包含在一底材上形 成一閘極。之後，一閘極絕緣層形成在閘極與底材上。然後，一島狀 半導體層形成在閘極絕緣層上以及在閘極正上方，並且一源極與一汲 極形成在島狀半導體層上，其中一通道區域位於島狀半導體層上以及 源極與汲極之間。接著，導入氨氣電漿至源極與汲極表面上以鈍化 之，並且將位於通道區域表面之受損的懸吊鍵結修補。之後，一保護 層形成在源極與汲極上，並且一接觸窗形成在保護層中以電氣地連接 汲極。其中上述之保護層的材質為氮化矽，而導入該氨氣電漿的步驟 是在形成氮化矽層的反應室中進行。 接下來，係根據本發明所描述的方式所提供的一個較佳實施例。 參照第一圖，在一底材10上形成一閘極12。當使用背光源作為 液晶顯示器的光源，則底材10 一定要使用透明材質，例如透明玻璃 或是透明塑膠。當液晶顯示器的光源為前光源時，底材1〇並不一定 需要使用透明材質。閘極12，可以使用金屬或是任何的導電材質， 例如鋁或是鋁合金、鉬或鉬鎢合金、鉻或是鈕。其形成的方式是先使 用濺鍍方式沉積-層導體層，然後使用微影與㈣製程使得閘極圖案 可以在預定的位置形成。當閘極圖案形成在底材1〇上的時候，閘極 線（未顯示在圖中）也同時形成在底材10上。 一覆蓋式絕緣層14形成在前述之底材10上以覆蓋閘極12。覆蓋 式絕緣層U，又稱為閘極絕緣層，主要的材般是使用氮化石夕， 是以覆毯式的方式覆蓋在閘極12以及底材1〇上。絕緣層Μ在薄膜 電晶體中是作為閘極介電層，而在其他的區域提供了閘極線的絕緣隔 離。絕緣層14的形成方式使用一般的化學氣相沉積法。 1262348 -島狀半導體層16，形成在前述之絕緣層14上以及在閘極i2 的正上方。半導體層16主要是作為電晶體的通道區域。在薄膜電晶 體液晶顯示器中，通道區是在閘極12的上面，又稱為背端通道區㈤二 -η1161 ^而）。半導體層1 6主要使用的材質為兩層複合的材質，底 下的非晶石夕層Μ以及上層換雜n+型導電型態的的非晶石夕層心。 底下的非晶…“主要是提供電晶體的通道區域，而上層的摻雜 n +型導電型㈣非晶㈣16_2，主要是提供金屬與半導體材質之間的 歐姆接觸，用以降低金屬材質的源極和没極與半導體之間的阻抗。 一導體層18，用以作為源極與没極，係、形成在島狀半導體層16 上，因而形成一薄膜電晶體。導體層18的材質可以為銘或是铭 ::或：鶴合金、鉻或是纽。源極與没極的形成方式是在島狀半導體層 16與問極絕緣層上沉積-覆蓋式導體層上，然後進行一微影Si 移除部份的導體層1 8留下泝極盥⑺★ 卜/原桎與，及極。由於這個製程包含了蝕刻步 驟，許多微粒，殘留物盥氧化物形# 之門的、甬、…… 與汲極，位於源極與汲極 t 道域與閘極絕緣層14的表面上。再者，移除-部份η+非 曰曰矽之後，在蝕刻步驟中會產生受損的懸吊鍵。 請參照第二圖’對薄膜電晶體表面進行—表面處理步驟。這個表 面處理步驟主要是導入氣體電聚 .^ 电日日體表面的微粒，殘留铷， 與氧化物，其中導入氣體包含 殘留物， ⑽。氨氣電浆會被分解成m與氮原子。較佳的氣體是氨氣 曰伋刀解成虱原子基與氮原子基。 移除電晶體表面的微粒，殘留物 ’、土 更進一步’通道表面在之後的回火步驟中會在上 的表面 化物保護層。氫原子基是用來修補n+非曰石… 4的亂乳 鍵。 /補非曰日矽層16-2表面受損的懸吊 本發明的表面處理步料以在形成 沉積前的潔淨工作可以變的更理想。在一實施I應…订，而在 約為2_到50_ SCCM ’題3乳體的流量 應室㈣力約為。·4到。8微巴約為5〇°到_瓦，反 微巴而反應時間約為3到10秒之間。 I262348 =進行表面處理的步驟之後，薄膜電晶體元件的電氣特性不會受到影 ^因為薄膜電晶體在執行表面處理的步驟之前已經形成。而源㈣ ^ 一乳化銦錫之間的接觸阻抗在本發明中可以降低至不到3Ω，與傳 =的電聚處理方式相比較，接觸阻抗降低的幅度約為14%_观。面板 二路的RC延遲因而可以被更進_步的降低使得本發明可以應用到下 一世代的大尺寸面板或是高解析度面板。 徂广照第三圖’一保護層20沉積在導電I 18上以保護電晶體。 ::二層20可以是氮化矽，並且使用化學氣相沉積法形成。之後，進 行微影製程以形成供汲極端以及顯示面板週邊的端子使用之接觸孔。 本發明的表面處理方法確有許多的優點’主要是在化學氣相沉積 保護層成膜之前制ΝΗ3氣體電浆針對薄膜電晶體源極/沒極接觸表 =進行氮原子鈍化效果做處理以降低源極级極的接觸阻抗，及增加 導線的傳導能力，其中接觸阻抗在本發明中與傳統的電㈣理方式相 比較可以降低約14%_5〇%。另外，本發明在不影響薄膜電晶體的元件 特下可以得到更低的队延遲時間，這表示本發明適用於大尺寸 或是高解析度液晶顯示面板，因為大尺寸或是高解析度液晶顯示面板 為要更低的RC延遲時間。 以上所述僅為本發明之較佳實施例而已，並非用以限定本發明之 申明專利範圍，凡其它未脫離本發明所揭示之精神下所完成之等效改 變或修飾，均應包含在下述之申請專利範圍内。 【圖式簡單說明】 第一圖係根據本發明之薄膜電晶體在一底材上顯示之示意圖，其 中微粒，殘留物與氧化物在金屬蝕刻步驟之後形成在其表面上；’、 第二圖係根據本發明之進行一氨電漿處理薄膜電晶體表面之示 意圖；及 9 1262348 第三圖係根據本發明之一保護層形成在薄膜電晶體之示意圖 【主要元件符號說明】 10 底材 12 閘極 14 絕緣層 16 非晶矽層 18 導電層 20 保護層 30 氨氣電漿 101262348 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a method of forming a transistor, particularly a source/drain contact impedance. [Previous technology] At present, the mainstream liquid crystal display is a process of using a thin film transistor as a thin film transistor. 'It will take a lot of film deposition, lithography == After the remaining steps, there will usually be a wash. The net process is then the step of deposition. , Parotid gland A cleaning process U plasma surface treatment method, mainly to reduce the contact impedance of the thin film transistor source pole and indium oxide recorded. Prior to the International Electric, a method was used to treat the oxidized stone film, the nitrite film, the amorphous stone film, the n+ amorphous stone film, and the single crystal stone film (4). The He Plasma treatment by Samsung Electronics is used to process the separated source and drain surfaces in the dry rice cooking machine. In addition, Mitsubishi Electric's nitriding treatment on the surface of the contact film is treated with N2 and He mixed gas plasma to make contact with the surface of the film. These methods have inadequacies in that they cannot increase the conductivity of the wire and reduce the contact resistance. Resistivity. Especially in high-resolution or large-size panels, the requirement for cl-delay is quite strict, and thus the panel circuit requires a lower resistivity. In order to move toward the next generation of panels, it is necessary to provide a plasma surface treatment that simultaneously reduces the resistivity. SUMMARY OF THE INVENTION In the above-mentioned background of the invention, the deficiencies caused by the conventional plasma processing method, the main object of the present invention is to reduce the contact resistance of the source/drain and increase the conductivity of the wire, thus proposing another Before the deposition of the protective layer by the helium gas electric 1262348 in the chemical vapor deposition reaction chamber, the sub-passivation effect is treated to reduce the plasma processing method compared to the slurry processing method. The present invention is primarily directed to nitrogen source contact resistance at the source/drain contact surface of a chemical vapor film transistor wherein the contact resistance is reduced by about 14% to 50% in the present invention. Another low source/dipole and transparent of the present invention. ▼ , — I work ^ Contact resistance between the electrodes of the factory; 隹Θ 进而 进而 侍 侍 更低 更低 更低 更低 更低 更低 更低 更低 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一 又一The LCD does not display a panel. According to the above objects, the present invention provides a method for treating a surface of a thin film transistor of a % liquid crystal display prior to forming a protective layer, wherein the thin film transistor comprises a gate on a substrate, a gate insulating layer Located on the gate, an island-shaped semiconductor layer is on the gate insulating layer and directly above the gate, and the source and the gate are on the island-shaped semiconductor. The method of the present invention comprises introducing an ammonia gas plasma onto the surface of the source and the drain to passivate. The invention also provides a method of forming a wire film electro-silicon wafer comprising forming a gate on a substrate. Thereafter, a gate insulating layer is formed on the gate and the substrate. Then, an island-shaped semiconductor layer is formed on the gate insulating layer and directly above the gate, and a source and a drain are formed on the island-shaped semiconductor layer, wherein one channel region is located on the island-shaped semiconductor layer and the φ source Between the pole and the bungee. Next, an ammonia gas plasma is introduced onto the source and drain surfaces to passivate, and the damaged dangling bonds (dangHng ^^ core) on the surface of the channel region are repaired. Thereafter, a protective layer is formed on the source and the drain, and a contact window is formed in the protective layer to electrically connect the drain. [Complex Mode] Some embodiments of the present invention will be described in detail below. However, the present invention can be widely practiced in other embodiments, and the scope of the present invention is not limited, and the scope of the following patents will prevail. 1262348 In the fabrication of thin film transistor liquid crystal displays (TFT-LCDs), the physical vapor deposition (PVD) process and the dry lithography process will be on the metal contact area and channel surface of the source drain. There are particles, residues and oxides left behind after etching. Although it is washed, the oxide on the metal surface cannot be removed, causing the impedance to be too high and affecting the conductivity of the wire. Therefore, the present invention utilizes an NH3 gas plasma treatment method step to use a NH3 gas plasma treatment surface treatment method for the thin film transistor source gate metal contact area before the formation of the protective layer by chemical vapor deposition to remove the etching. The particles, residues and oxides left behind to reduce the metal contact resistance. At the same time, the surface treatment method is treated with NH3 gas plasma, and the nitrogen atom base in the treatment of NH3 plasma in the channel (nitr〇gen has a passivation effect of (11(^18)) (1^^¥^0116) After the subsequent tempering process, a protective layer of ruthenium oxynitride is formed. In addition, during the bombardment process of the etching process, the amorphous germanium of the channel table 1 has damaged dangling b〇nds and is struck into Weak bonds. Repaired by hydrogen radicals, a stable bond structure can be obtained. These passivation effects and repair bonding effects can not only reduce the contact resistance of the metal surface, but also make the film The transistor element and the panel circuit are more stable. The invention mainly provides a method for reducing the source-pole contact resistance of a thin film transistor of a liquid crystal display by introducing a nitrogen atom and a protective layer before forming a protective layer on the thin film transistor. Purifying the plasma of the hydrogen atom gas to the source and the surface of the electrode. The gas introduced in the present invention contains ammonia gas (Nh3)' and this step is also commonly referred to as surface treatment. The channel area between the source and the pole, the damaged suspension key (8 lng b〇nds) on the surface can be repaired (satlxrate) in the surface treatment step. The material of the protective layer is nitrogen cut, and the above The surface treatment step may be performed in a reaction chamber for forming a nitrogen cut. The thin film transistor includes a gate on the substrate, a gate insulating layer on the gate, and an island semiconductor layer on the gate. On the pole insulating layer and directly above the gate, a source and a pole are on the island semiconductor and the channel region on the island-shaped semiconductor layer is between the base H and the drain. The source and the drain are formed. First, a conductor layer is deposited on the island-shaped 1262348 semiconductor layer, and then patterned to etch the conductor layer to form the source and drain electrodes. The particles, residues, and oxides generated after the pattern transfer etching step can be The surface treatment step of the invention is removed. The invention also provides a method of forming a thin film transistor comprising forming a gate on a substrate. Thereafter, a gate insulating layer is formed on the gate and the substrate. The semiconductor layer is formed on the gate insulating layer and directly above the gate, and a source and a drain are formed on the island-shaped semiconductor layer, wherein a channel region is located on the island-shaped semiconductor layer and the source and the drain are Then, an ammonia gas plasma is introduced onto the surface of the source and the drain to passivate, and the damaged suspension bond on the surface of the channel region is repaired. Thereafter, a protective layer is formed on the source and the drain. And a contact window is formed in the protective layer to electrically connect the drain. The protective layer is made of tantalum nitride, and the step of introducing the ammonia plasma is performed in a reaction chamber forming a tantalum nitride layer. Next, a preferred embodiment is provided in accordance with the teachings of the present invention. Referring to the first figure, a gate 12 is formed on a substrate 10. When using a backlight as the light source for the liquid crystal display, the substrate 10 must be made of a transparent material such as transparent glass or transparent plastic. When the light source of the liquid crystal display is the front light source, the substrate 1 does not necessarily need to use a transparent material. The gate 12 can be made of metal or any conductive material such as aluminum or aluminum alloy, molybdenum or molybdenum tungsten alloy, chrome or button. This is formed by first depositing a layer conductor layer by sputtering and then using a lithography and (4) process so that the gate pattern can be formed at a predetermined position. When the gate pattern is formed on the substrate 1 闸, a gate line (not shown) is also formed on the substrate 10. A blanket insulating layer 14 is formed on the aforementioned substrate 10 to cover the gate 12. The overlying insulating layer U, also known as the gate insulating layer, is mainly made of nitride nitride in the form of a blanket, covering the gate 12 and the substrate 1 in a blanket manner. The insulating layer is used as a gate dielectric layer in the thin film transistor and provides insulating isolation of the gate lines in other regions. The manner in which the insulating layer 14 is formed is a general chemical vapor deposition method. 1262348 - An island-shaped semiconductor layer 16 is formed on the aforementioned insulating layer 14 and directly above the gate i2. The semiconductor layer 16 is mainly used as a channel region of the transistor. In a thin film transistor liquid crystal display, the channel region is above the gate 12, also referred to as the back channel region (5) 2-n1161^). The material used for the semiconductor layer 16 is a two-layer composite material, the amorphous austenite layer underneath, and the amorphous layer of the upper layer replaced with an n+ type conductivity type. The underlying amorphous... "mainly provides the channel region of the transistor, while the upper layer is doped n + -type conductivity type (4) amorphous (four) 16_2, mainly providing ohmic contact between the metal and the semiconductor material to reduce the source of the metal material The impedance between the pole and the pole and the semiconductor. A conductor layer 18 is used as a source and a gate, formed on the island-shaped semiconductor layer 16, thereby forming a thin film transistor. The material of the conductor layer 18 may be Ming or Ming:: or: He alloy, chrome or neon. The source and the immersion are formed on the island-like semiconductor layer 16 and the interposer insulating layer on the covered conductor layer, and then a lithography Si removes part of the conductor layer 18 leaving the tracer (7) ★ 卜 / original 桎 and , and the pole. Since this process contains etching steps, many particles, residues 盥 oxide shape # 的, 甬, ... and the drain, on the surface of the source and drain b-channels and the gate insulating layer 14. Further, after removing - part of η + non-曰曰矽, it will be damaged during the etching step. Suspension key. Please refer to the second figure 'For the surface of the thin film transistor - Table Processing step. This surface treatment step is mainly to introduce gas electropolymerization. The particles on the surface of the electric solar cell, residual ruthenium, and oxides, wherein the introduced gas contains residues, (10). The ammonia gas plasma is decomposed into m and nitrogen. Atom. The preferred gas is an ammonia gas cleavage solution into a ruthenium atom and a nitrogen atom. The particles on the surface of the transistor are removed, and the residue ', the soil is further'. The channel surface will be in the subsequent tempering step. The surface protective layer of the surface of the present invention is used to repair the n+ non-vessels. The clean work before deposition can be changed more ideally. In an implementation I should be set, and in the case of about 2_ to 50_ SCCM '3, the flow rate of the milk should be room (four) force is about .·4 to 8. 8 microbaro For 5 〇 ° to _ watt, the reaction time is about 3 to 10 seconds. I262348 = After the surface treatment step, the electrical characteristics of the thin film transistor component are not affected by the film transistor The surface treatment step has been formed before. The source (four) ^ one The contact resistance between indium tin and tin can be reduced to less than 3 Ω in the present invention, and the contact impedance is reduced by about 14% compared with the electropolymerization treatment method. The RC delay of the panel two channels can be The reduction in the step size allows the invention to be applied to the next generation of large-sized panels or high-resolution panels. 徂Guang Zhao Figure 3 A protective layer 20 is deposited on the conductive I 18 to protect the transistor. The second layer 20 may be tantalum nitride and formed using a chemical vapor deposition method. Thereafter, a lithography process is performed to form contact holes for the terminals of the germanium and the terminals around the display panel. The surface treatment method of the present invention does have many The advantage of 'mainly is to process the chemical vapor deposition protective layer before forming the film. 3 gas plasma for the thin film transistor source / immersion contact table = nitrogen atom passivation effect to reduce the contact resistance of the source level, and The conductivity of the wire is increased, wherein the contact resistance can be reduced by about 14% to about 5% in the present invention compared to the conventional electric (four) mode. In addition, the present invention can obtain a lower team delay time without affecting the components of the thin film transistor, which means that the present invention is applicable to a large-sized or high-resolution liquid crystal display panel because of a large-sized or high-resolution liquid crystal display. The panel is for a lower RC delay time. The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the invention, and all equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following. Within the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a schematic view showing a thin film transistor according to the present invention on a substrate in which fine particles, residues and oxides are formed on the surface thereof after the metal etching step; ', second diagram A schematic diagram of the surface of a thin film transistor treated with an ammonia plasma according to the present invention; and 9 1262348. The third figure is a schematic diagram of a protective layer formed on a thin film transistor according to the present invention. [Main Component Symbol Description] 10 Substrate 12 Gate Pole 14 Insulation layer 16 Amorphous layer 18 Conductive layer 20 Protective layer 30 Ammonia plasma 10