TWI259531B - Method of etching dual anti-reflection layer - Google Patents
Method of etching dual anti-reflection layer Download PDFInfo
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- TWI259531B TWI259531B TW93110084A TW93110084A TWI259531B TW I259531 B TWI259531 B TW I259531B TW 93110084 A TW93110084 A TW 93110084A TW 93110084 A TW93110084 A TW 93110084A TW I259531 B TWI259531 B TW I259531B
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000005530 etching Methods 0.000 title claims abstract description 35
- 230000009977 dual effect Effects 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 claims abstract description 12
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 claims abstract description 8
- 239000007789 gas Substances 0.000 claims abstract description 5
- 230000003667 anti-reflective effect Effects 0.000 claims description 32
- 229920002120 photoresistant polymer Polymers 0.000 claims description 19
- 239000012495 reaction gas Substances 0.000 claims description 5
- 239000002131 composite material Substances 0.000 claims description 3
- CREMABGTGYGIQB-UHFFFAOYSA-N carbon carbon Chemical compound C.C CREMABGTGYGIQB-UHFFFAOYSA-N 0.000 claims 1
- 239000011203 carbon fibre reinforced carbon Substances 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 238000001028 reflection method Methods 0.000 claims 1
- 239000003153 chemical reaction reagent Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 95
- 238000001459 lithography Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000006117 anti-reflective coating Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910000078 germane Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000035807 sensation Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
12595311259531
五、發明說明(1) 發明所屬之技術領域: 本案相關前案為中華民國90年8月13曰提出申請之中 華民國專利案號第9 〇丨丨9 7 9 5號,其發明名稱為「具雙層阻 劑製程之颠刻方法」。本發明係有關於一種半導體掣程 特別是有關於一種使用雙層抗反射層之蝕刻方法,以辦加 微影製程容許度(process window)並改善介層洞之幹廊 (prof i 1 e ) ° * 先前技術:V. INSTRUCTIONS INSTRUCTIONS (1) Technical field to which the invention belongs: The relevant case in this case was the application for the Republic of China Patent No. 9 〇丨丨9 7 9 5 of the Republic of China on August 13, 1990, whose invention name is " An indentation method with a two-layer resist process." The present invention relates to a semiconductor process, and more particularly to an etching method using a double-layer anti-reflection layer for processing a process window and improving a via hole (prof i 1 e ) ° * Previous technology:
隨著半導體積體電路元件積集度(integration)的 增加,微影製程的發展愈顯的重要,為了增加微影製程 之解析度,曝光所需要的光源波長以縮短至2〇〇奈米(nm )以下的深紫外光(DUV )。由於半導體製程中所使用的 基底或形成於機體上的金屬層為高反射材料,因而造成駐 波效應及光學鄰近效應等問題而降低微影解析度及 義的圖案失真。As the integration of semiconductor integrated circuit components increases, the development of lithography processes becomes more and more important. In order to increase the resolution of the lithography process, the wavelength of the light source required for exposure is shortened to 2 nanometers ( Deep ultraviolet light (DUV) below nm). Since the substrate used in the semiconductor process or the metal layer formed on the body is a highly reflective material, problems such as standing wave effect and optical proximity effect are caused to reduce the lithography resolution and the pattern distortion.
為了縮小光阻層中曝光光源反射所造成的不良影響, 通常需於光阻層與被定義層之間額外形成一抗反射層 (anti-reflective coating, ARC),如此便可控制光阻 層之曝光效果。傳統上,抗反射層種類分為有機類與無機 類兩種°别者以旋轉塗佈(s p i n c 〇 a t i n g )的方式形成, 性質類似於光阻層,因此具有表面平坦化的效果而有助於 光源聚焦。後者以化學氣相沉積(c h e m i c a 1 v a ρ 〇 r deposition,CVD)或濺鍍的方式形成,其可調整折射率In order to reduce the adverse effects caused by the reflection of the exposure light source in the photoresist layer, an anti-reflective coating (ARC) is usually formed between the photoresist layer and the defined layer, so that the photoresist layer can be controlled. Exposure effect. Conventionally, the types of anti-reflection layers are classified into organic and inorganic types, and are formed by spin coating, which is similar in nature to a photoresist layer, and thus has the effect of surface flattening. The light source is focused. The latter is formed by chemical vapor deposition (c h e m i c a 1 v a ρ 〇 r deposition, CVD) or sputtering, which can adjust the refractive index
1259531 五、發明說明(2) (η )及消光係數(k )。然而,單一抗反射層的效果以無 法提昇微影製程之解析度及有效地改善定義圖形之側壁條 紋(sidewall striation)等問題,尤其是在線寬〇1〇微 米(// m )或以下的製程。 為了進一步提昇微影製程的容許度,因此有雙層阻劑 或使用雙層抗反射層的技術提出。然而,前者容易在製程 中產生光阻殘留(scum)或關鍵圖形尺寸(critical dimension,CD )偏移過大的問題。而後者則需增加姓刻 步驟以分別去除雙層抗反射層,如此將使製程複雜化。1259531 V. Description of invention (2) (η) and extinction coefficient (k). However, the effect of a single anti-reflective layer is such that it does not improve the resolution of the lithography process and effectively improves the sidewall striation of the defined pattern, especially in processes with a line width of 1 μm (//m) or less. . In order to further enhance the tolerance of the lithography process, there is a double-layer resist or a technique using a double-layer anti-reflection layer. However, the former is prone to problems of scum or excessive critical dimension (CD) shift in the process. The latter requires an additional step to remove the double-layer anti-reflective layer, which complicates the process.
發明内容: 有鑑於此,本發明之目的在於提供一種使用雙層抗反 射層之#刻方法,其結合習知之單一無機抗反射層或有機 抗反射層以增加微影製程容許度。 本發明之另一目的在於提供一種使用雙層抗反射層之 蝕刻方法,藉由單一蝕刻步驟以同時蝕刻雙層抗反射層而 簡化製程步驟。 θSUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a method of using a two-layer anti-reflective layer in combination with a conventional single inorganic anti-reflective layer or organic anti-reflective layer to increase the lithography process tolerance. Another object of the present invention is to provide an etching method using a double-layer anti-reflection layer which simplifies the process steps by simultaneously etching a double-layer anti-reflection layer by a single etching step. θ
根據上述之目的,本發明提供一種使用雙層抗反射層 之#刻方法,首先提供一基底,基底上形成有一被定義 層。接著’在被定義層上形成一第一抗反射層。隨後,在 第一抗反射層上形成一第二抗反射層。接下來,在第二抗 反射層上形成一光阻圖案層,此光阻圖案層具有至少一開 口。最後,同時蝕刻開口下方之第二及第一抗反射層以^ 出被定義層表面,其中使用CF4、CJ6、CHF3、 〇2及Ar作為In accordance with the above objects, the present invention provides a method of etching using a double-layered anti-reflective layer, first providing a substrate on which a defined layer is formed. Next, a first anti-reflective layer is formed on the defined layer. Subsequently, a second anti-reflection layer is formed on the first anti-reflection layer. Next, a photoresist pattern layer is formed on the second anti-reflection layer, the photoresist pattern layer having at least one opening. Finally, the second and first anti-reflective layers under the opening are simultaneously etched to define the surface of the layer, wherein CF4, CJ6, CHF3, 〇2 and Ar are used as
1259531 、發明說明(3) 餘刻反應氣體。上述被定義層係一導電層或一介電層,上 述第一抗反射層係一厚度在3〇 〇〜8〇〇埃範圍之無機抗反射 曰 且苐一抗反射層係一厚度在300〜800埃範圍之有機抗 反射層。 為讓本發明之上述目的、特徵和優點能更明顯易懂, 下文特舉較佳實施例,並配合所附圖式,作詳細說明如 下: 實施方式:1259531, invention description (3) Residual reaction gas. The layer defined above is a conductive layer or a dielectric layer, and the first anti-reflective layer is an inorganic anti-reflection layer having a thickness of 3 〇〇 8 8 Å and a thickness of the anti-reflective layer is 300 〜 An organic anti-reflective layer in the 800 angstrom range. The above described objects, features and advantages of the present invention will become more apparent and understood from
以下配合第1到4圖說明本發明實施例之使用雙層抗反 射層之蝕刻方法。 首先’請參照第1圖,提供一基底1 〇 〇,例如一晶圓, 其形成有主動元件、被動元件或其他熟知之半導體元件以 及金屬内連線等。此處為簡化圖式,僅繪示出一平整基 底。接著,在基底1 〇上形成一被定義層丨〇 2,在本實施例 中’係以鑲嵌(damascene )製程中定義介電洞(contact =1 e )作範例,此被定義層1 〇 2係指一介電層。然而需注 =的是本發明並未受限於此,本發明亦適用於定義溝槽或 疋義導體層,而導體層可以是銅、鋁金屬層或複晶矽層。Hereinafter, an etching method using a double-layer anti-reflection layer according to an embodiment of the present invention will be described with reference to Figs. First, please refer to Fig. 1 to provide a substrate, such as a wafer, which is formed with active components, passive components or other well-known semiconductor components, and metal interconnects. Here, for the sake of simplicity, only a flat substrate is shown. Next, a defined layer 丨〇2 is formed on the substrate 1 ,. In the present embodiment, the dielectric hole (contact =1 e ) is defined in the damascene process as an example, and the defined layer 1 〇 2 Refers to a dielectric layer. However, it is to be noted that the present invention is not limited thereto, and the present invention is also applicable to defining a trench or a germane conductor layer, and the conductor layer may be a copper, aluminum metal layer or a germanium layer.
^ 接下來’請參照第2圖,藉由習知沉積技術,例如化 學氣相沉積法(CVD ),在介電層1 〇2上形成一厚度在 30 0: 800埃範圍的第一抗反射層1〇4。在本實施例中,使用 ,第一抗反射層1 04係一無機抗反射層,例如氮化矽層或 氮氧化矽層。之後,再藉由旋轉塗佈法以在第一抗反射層^ Next, please refer to Figure 2, to form a first anti-reflection in the range of 30 0: 800 angstroms on the dielectric layer 1 〇 2 by a conventional deposition technique such as chemical vapor deposition (CVD). Layer 1〇4. In this embodiment, the first anti-reflective layer 104 is an inorganic anti-reflective layer such as a tantalum nitride layer or a hafnium oxynitride layer. Thereafter, by spin coating to the first anti-reflection layer
1259531 五、發明說明(4) 1 0 4上形成一厚度在3 0 0〜8 0 0埃範圍的第二抗反射層1 〇 6。 此處所使用的使用的第二抗反射層1 0 6係一有機抗反射 層,例如Novolak 及BARLi (bottom anti-reflective layer for i-line)等。此雙層抗反射層1〇4,1〇6係構成 一複合式抗反射層1 0 7。接著,在複合式抗反射層1 〇 7上方 形成一光阻層1 0 8,之後,藉由實施一微影步驟而形成具 有複數開口 1 0 9之光阻圖案層並露出第二抗反射層丨0 6表 面。1259531 V. INSTRUCTION DESCRIPTION (4) A second anti-reflection layer 1 〇 6 having a thickness in the range of 300 to 800 angstroms is formed on the 1 0 4 . The second anti-reflective layer 106 used herein is an organic anti-reflective layer such as Novolak and BARLi (bottom anti-reflective layer for i-line). The double-layer anti-reflection layer 1〇4,1〇6 constitutes a composite anti-reflection layer 107. Next, a photoresist layer 110 is formed over the composite anti-reflective layer 1 〇7, and then a photoresist pattern layer having a plurality of openings 109 is formed by exposing a lithography step to expose the second anti-reflection layer.丨 0 6 surface.
接下來’清參照苐3圖’藉由實施一乾餘刻以去除位 於這些開口 109下方的複合式抗反射層1〇7而露出介電層. 1 0 2表面。在本實施例中,為了能夠同時去除第二及第一 抗反射層1 0 6,1 0 4而達到簡化製程步驟的目的,故使用使 用CF4、QF6、CHF3、〇2及Ar作為蝕刻反應氣體並配合使用 二極的反應離子餘刻(reactive i〇n etching,rie)機 台。其中,CF4、C4F6、CHF3、〇2 &Ar之流率分別在40〜100 seem、4〜10 seem、1〇 〜30 sccm、ι〇 〜4〇 sccm&i〇 〜1〇〇 seem的範圍。再者,蝕刻反應之工作壓力在5〜5〇 mt的範 圍,電源功率在100〜90 0 W的範圍且偏壓功率在9〇〇〜2〇〇〇 W的範圍。Next, the reference layer 3 is exposed to remove the dielectric anti-reflective layer 1〇7 under the openings 109 to expose the dielectric layer. In this embodiment, in order to simultaneously remove the second and first anti-reflective layers 1 0 6 , 1 0 4 to achieve the purpose of simplifying the process steps, CF4, QF6, CHF3, 〇2, and Ar are used as etching reaction gases. In conjunction with the use of a two-pole reactive ion re-etching (rie) machine. Among them, the flow rates of CF4, C4F6, CHF3, 〇2 & Ar are in the range of 40~100 seem, 4~10 seem, 1〇~30 sccm, ι〇~4〇sccm&i〇~1〇〇seem . Further, the working pressure of the etching reaction is in the range of 5 to 5 〇 mt, the power of the power is in the range of 100 to 90 0 W, and the bias power is in the range of 9 〇〇 2 〇〇〇 W.
最後,请參照第4圖,藉由習知之蝕刻步驟以去除露 出的介電層102而在開口1〇9下方形成一介層洞11〇並露出 基底1 00表面。接著,藉由習知之光阻剝除法,例如氧電 漿灰化法,去除光阻圖案層1〇8。此除,由於第二抗反射 層106係屬有機物,因此在剝除光阻圖案層m時會一併除Finally, referring to Fig. 4, a dielectric hole 102 is formed under the opening 1〇9 by a conventional etching step to remove the exposed dielectric layer 102 and expose the surface of the substrate 100. Next, the photoresist pattern layer 1 〇 8 is removed by a conventional photoresist stripping method such as an oxygen plasma ashing method. In addition, since the second anti-reflection layer 106 is an organic substance, it is removed when the photoresist pattern layer m is removed.
!259531 五、發明說明(5) 去而留下第一抗反射層1 〇 4。如此一來,便完成介層洞之 製作。 相較 層之技術 成的駐波 程之容許 作介層洞 洞之輪廓 去除此雙 此並不會 雖然 限定本發 神和範圍 當視後附 於習知 ,本發 效應問 度。亦 時在其 及外型 層抗反 增加製 本發明 明,任 内,當 之申請 使用單一無機抗反射層 明之雙層 題並提供 即,可增 側壁產生 。再者, 射層而不 程步驟。 已以較佳 何熟習此 可作更動 專利範圍 抗反射層可同 較佳的表面平 加微影製程之 條紋(s t r i a t 本發明可使用 需個別餘刻此 實施例揭露如 項技藝者,在 與潤飾,因此 所界定者為準 時解決基底反射造 坦度以增加微影製 解析度並防止在製 i 〇n )而改善介層 單一蝕刻步驟同時 雙層抗反射層,因 上’然其並非用C 不脫離本發明之賴 本發明之保護範圍!259531 V. Description of the invention (5) To leave the first anti-reflection layer 1 〇 4. In this way, the production of the via hole is completed. The effect of the standing wave of the layer-by-layer technique is to make the outline of the hole. Removing this pair does not limit the scope of this and the scope of the effect. In the present invention, it is also possible to increase the sidewall generation in the application of the single inorganic antireflection layer. Furthermore, the shot layer is not a step. It has been better to know that this can be used as a modified patent range. The anti-reflection layer can be used with the preferred surface to add the lithography process stripe. (Striat can be used in the present invention. This embodiment is disclosed by the skilled person, in the retouching Therefore, the defined one is to solve the base reflection sensation on time to increase the lithography resolution and prevent the single layer etch step from being improved while the double layer anti-reflection layer is improved. The scope of protection of the present invention is not deviated from the present invention.
1259531 圖式簡單說明 第1圖係繪示出根據本發明實施例之在一基底上形成 一被定義層之剖面示意圖。 第2圖係繪示出在第1圖中之被定義層上依序形成雙層 抗反射層及光阻圖案層之剖面示意圖。 第3圖係繪示出蝕刻第2圖中雙層抗反射層之剖面示意 圖。 第4圖係繪示出蝕刻第3圖中被定義層之剖面示意圖。 符號說明: 100〜基底; 1 0 2〜介電層; 1 0 4〜第一抗反射層; 1 0 6〜第二抗反射層; 1 0 7〜複合式抗反射層; 1 0 8〜光阻圖案層; I 0 9〜開口; II 0〜介層洞。1259531 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing the formation of a defined layer on a substrate in accordance with an embodiment of the present invention. Fig. 2 is a schematic cross-sectional view showing the formation of a double-layered antireflection layer and a photoresist pattern layer on the defined layer in Fig. 1. Fig. 3 is a schematic cross-sectional view showing the etching of the double-layered antireflection layer in Fig. 2; Figure 4 is a schematic cross-sectional view showing the layer defined in the etching of Figure 3. DESCRIPTION OF REFERENCE NUMERALS: 100~substrate; 1 0 2~dielectric layer; 1 0 4~first anti-reflection layer; 1 0 6~second anti-reflection layer; 1 0 7~compositive anti-reflection layer; 1 0 8~ light Resistive pattern layer; I 0 9~ opening; II 0~ interlayer hole.
0503-7906TWF(Nl) ; TSMC2001-1711 ; SPIN.ptd 第 9 頁0503-7906TWF(Nl) ; TSMC2001-1711 ; SPIN.ptd Page 9
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