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TWI259020B - Pixels in an AMOLED (active matrix organic light-emitting diode) panel - Google Patents

Pixels in an AMOLED (active matrix organic light-emitting diode) panel Download PDF

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Publication number
TWI259020B
TWI259020B TW94112530A TW94112530A TWI259020B TW I259020 B TWI259020 B TW I259020B TW 94112530 A TW94112530 A TW 94112530A TW 94112530 A TW94112530 A TW 94112530A TW I259020 B TWI259020 B TW I259020B
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transistor
signal
switch
pseudo
pixel
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TW94112530A
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Chinese (zh)
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TW200638786A (en
Inventor
Yu-Wen Chiou
Chien-Hsiang Huang
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Himax Tech Ltd
Chi Mei El Corp
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Abstract

A pixel structure in an active matrix organic light-emitting diode (AMOLED) panel is disclosed. The pixel includes a 2TIC (2 transistors and one storage capacitor) structure and a dummy switch transistor controlled by an inverted scan signal. Furthermore, a scan signal with sloped/step rising edges is used to control on/off of switch transistors. In the invention, clock feed-through (CFT) effects are cancelled, capacitance of the storage capacitor is reduced, and aperture ratios of the pixel are improved.

Description

1259020 16029twf.doc/g 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種應用於主動驅動式有機發光二 極體(Active Matrix Organic Light-Emitting Diode ^ AMOLED)面板之晝素(pixel)結構,且特別是一種利用偽電 晶體(dummy transistor)來降低時脈饋入效應之晝素結構。 【先前技術】 近幾年來,平面顯示技術的發展不斷的推陳出新,其 中有機發光二極體(Organic Light_Emitting Diode, OLED) ’ 又稱為有機電激發光(〇rganiCEiectr〇iuminesence, 〇EL),擁有其他平面顯示器技術不易達到之新一代技術, 包括省電、超薄厚度、重量輕、自發光、無視角限制、反 應速度快、光電效率高、無需背光結構與彩色濾光片結構、 局對比、rij輝度效率、高亮度、多色及彩色(RGB)元件製 作此力、使用溫度範圍廣等優點,被視為是未來最具有發展 潛力的平面顯不技術之'—。 OLED的發光原理是利用材料的特性,將電子傳輸層 Electron Transport Layer,ETL}、電洞傳輸層(二 Transport Layer,HTL)和發光材料層(Emiuing Μ_Γί&11259020 16029twf.doc/g IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a substrate for an Active Matrix Organic Light-Emitting Diode (AMOLED) panel ( Pixel) structure, and in particular, a pixel structure that utilizes a dummy transistor to reduce the clock feed effect. [Prior Art] In recent years, the development of flat panel display technology has been continuously updated. Among them, Organic Light_Emitting Diode (OLED) is also called organic electroluminescence (〇rganiCEiectr〇iuminesence, 〇EL), and has other A new generation of technologies that are difficult to achieve with flat panel display technology, including power saving, ultra-thin thickness, light weight, self-illumination, no viewing angle limitation, fast response speed, high photoelectric efficiency, no need for backlight structure and color filter structure, bureau contrast, rij Brightness efficiency, high brightness, multi-color and color (RGB) components make this force, the use of a wide temperature range, etc., is considered to be the most promising planar display technology in the future. The principle of OLED illumination is to use the characteristics of the material, the electron transport layer Electron Transport Layer, ETL}, the hole transport layer (HTL) and the luminescent material layer (Emiuing Μ_Γί&1

Layer,EML)結合,將電子激發的形式降回基態,並將多 餘的能量以光波的形式_ ’因而相不同波長的發光元 件的產生。 目前OLED主要是用在行動電話手機、車用顯示器、 PDA的面板。而〇LED依其驅動方式可區分為:主動驅動 1259020 16029twf.doc/g 式〇LED(active matrix OLED,AMOLED)與被動驅動式 OLED(passive matrix OLED,PMOLED)。 OLED中之畫素(pixel)結構比如為2T1C(雙電晶體+單 電容)。 圖1顯示應用於主動驅動式有機發光二極體(active matrix OLED,AMOLED)面板之習知畫素之電路圖。 -如圖1所示,畫素10包含:開關電晶體(Switch 鲁 transistor)MP卜驅動電晶體(Drive transistor )MP2、儲存電容 (Storage capacitor)CST 1與有機發光二極體元件〇LEm。圖} 之晝素10係採用2T1C的結構。 .· 開關電晶體Μρι可作為影像資料進入儲存電容CST工 t開關及定址之電晶體MP2可·存在儲存電 .=Sfl上的電壓值轉換成電流,最後才連續驅動有機發 件〇LED1’同時藉由調變不同電流值進而控制 顯不為的灰階。 2關電晶體MP1之源極接收影像資料信號VDATA, MP Ϊ 信號SCAN,纽極連接至驅動電日曰日體 極。源電壓vdd輕合至驅動電晶體mP2之源 %^CST 1耦接於電源電壓VDD盥驅動電曰邮 光二==間0^ 〇職之^檐光二極體元件 10 ^ ^ΛΝ 位’開關电晶體ΜΡ1會導通,且代表亮度資 ⑧ 6 1259020 16029twf.doc/g =之資料位準會施加至資料信號vdat^此時, = CST 1會被充電或放電,而且驅動電晶體MP2 : 壓會被拉至資料信號VDATA。 甲極电 % 2i=-activate)畫素10時’掃描信號叱额各 電晶體MP2之閘極電壓會被儲存電容m = ,動電晶體MP2之間極-源極電壓會產生流經⑽rnt k。OLED1會根據此電流而產生亮度。 兒 當掃描信號SCAN之電位由邏輯低電 位日”_電晶體MP1 t為關閉態,但是邏:;: 的知“域SCAN會透過開關電晶體刪之閘極_汲極聲 生電容而麵合至驅動電晶體Mp2之問極電壓,使得驅 ,體,2之閘極電齡意外提高。此電壓_合量會根據轉 ,電容CST1與開關電晶體Μρι之寄生電容值之比例而 =。亦即,當(儲存電容CST1)/(開關電晶體1^]?1之寄生電 容值)之比值愈大時,此電壓耦合量會愈小;反之亦然。此 效應稱為時脈饋入(cl〇ck feed_thr〇ugh,CFT)現象。cFT規 象會影響到驅動電晶體MP2之閘極電壓,進而影響纠 OLED1之電流與亮度。現有兩種習知做法來避免cft規 象。 第一,採用大電容Cst以降低CFT之電壓耦合量,梃 大電谷Cst會佔很大的布局(iay〇ut)面積,進而降低開口率。 第二’預測可能的CFT效應,將輸入信號VDATA後 不同的k號值做位移(shift)。比如原本應該為2V的 1259020 16029twf.doc/g VDATA,力口入CFT考量後,將VDATA位移成1V。但是, 因為製程漂移量未必每次都相同,所以此做法很難有一貫 位移值。另外,甚至會提高畫素之驅動電路之設計複雜度。 故而,需要一種應用於AMOLED面板中之新晝素結 構’其可避免時脈饋入效應並具有南開口率。 【發明内容】 本發明提供一種應用於AMOLED面板之晝素,其利 用偽開關電晶體與反相後掃描信號之組合來抵消/克服時 脈饋入效應。 本發明也提供一種應用於AMOLED面板之晝素,其 利用笔谷性電晶體,來更一步減少儲存電容之電容值。 本發明更提供一種應用於AMOLED面板之晝素,其 利用緩升式/步階式掃描信號來更一步減少儲存電容之+ 容值。 i 為此,本發明提出-種應用於一發光二極體面板之晝 素,包括:開關模組,接收影像資料信號VDATA,其 關狀態係受控則彻㈣SCAN; _ _組,_至: =莫組,其開/關狀態係受控於另—掃描信號sc纖,並 :掃描信號SCAN之轉態會造崎描錢SCANB之轉 及驅動/發光模組,耗接至偽開關模組, ^接^^至關模組,其根據該影像資料信號而發光i 中,由%描k號SCAN之轉態對驅動 脈饋入效應被掃描信號SCANB之^ = ^成之時 造成之時祕人效應所抵消。轉峰鶴/發光模組所Layer, EML) combines the form of electron excitation back to the ground state, and the excess energy is generated in the form of light waves _' thus illuminating elements of different wavelengths. Currently, OLEDs are mainly used in mobile phone handsets, car displays, and PDA panels. The LEDs can be distinguished according to their driving methods: active driving 1259020 16029twf.doc/g type active diode OLED (AMOLED) and passive driving OLED (PMOLED). The pixel structure in the OLED is, for example, 2T1C (dual transistor + single capacitor). FIG. 1 shows a circuit diagram of a conventional pixel applied to an active-drive organic light-emitting diode (AMOLED) panel. - As shown in FIG. 1, the pixel 10 includes a switching transistor (MP), a driving transistor (MP2), a storage capacitor (CST 1), and an organic light-emitting diode element (LEm). Fig. 10 is a 2T1C structure. .. Switching transistor Μρι can be used as image data to enter the storage capacitor CST t switch and address the transistor MP2 can exist · stored electricity. = Sfl voltage value is converted into current, and finally drive organic hairpin 〇 LED1 ' at the same time The gray scale is not controlled by modulating different current values. 2 The source of the transistor MP1 receives the image data signal VDATA, MP Ϊ signal SCAN, and the button is connected to the driving electric pole. The source voltage vdd is lightly coupled to the source of the driving transistor mP2. %CST1 is coupled to the power supply voltage VDD盥 driving the electric mail and the second light === 0^ 〇 之^ 檐 二 二 ^ ^ ^ ^ ^ ' ' ' The crystal ΜΡ1 will turn on, and the data level representing the brightness of 8 6 1259020 16029twf.doc/g = will be applied to the data signal vdat^ at this time, = CST 1 will be charged or discharged, and drive the transistor MP2: the pressure will be Pull to the data signal VDATA. The total gate voltage of each transistor MP2 will be stored by the capacitance m = , and the pole-source voltage between the moving transistors MP2 will flow through (10) rnt k . OLED1 will produce brightness based on this current. When the potential of the scanning signal SCAN is set by the logic low potential day _ transistor MP1 t is off state, but the logic ":" knows that the domain SCAN will be closed by the switching transistor to cut the gate _ 汲 声 声 电容The voltage of the gate electrode of the driving transistor Mp2 is such that the gate electrode of the drive body and the body 2 is unexpectedly increased. This voltage _ combined amount will be based on the ratio of the parasitic capacitance of the switching capacitor CST1 to the switching transistor Μρι. That is, when the ratio of the (storage capacitance CST1) / (the parasitic capacitance value of the switching transistor 1^] 1) is larger, the voltage coupling amount is smaller, and vice versa. This effect is called the clock feed (cl〇ck feed_thr〇ugh, CFT) phenomenon. The cFT specification affects the gate voltage of the driving transistor MP2, which in turn affects the current and brightness of the OLED1. There are two conventional practices to avoid cft specs. First, the large capacitance Cst is used to reduce the voltage coupling amount of the CFT, and the large electric valley Cst will occupy a large layout (iay〇ut) area, thereby reducing the aperture ratio. The second 'predicts the possible CFT effect, shifting the different k-values after the input signal VDATA. For example, the 1259020 16029twf.doc/g VDATA should be 2V. After the CFT is considered, the VDATA is shifted to 1V. However, because the process drift is not necessarily the same every time, it is difficult to have a consistent displacement value. In addition, it will even increase the design complexity of the driver circuit of the pixel. Therefore, there is a need for a novel germanium structure applied to an AMOLED panel which avoids the clock feed effect and has a south aperture ratio. SUMMARY OF THE INVENTION The present invention provides a pixel applied to an AMOLED panel that utilizes a combination of a pseudo-switching transistor and an inverted post-scanning signal to cancel/overcome the clock feed effect. The present invention also provides a halogen for use in an AMOLED panel, which utilizes a pen-transistor transistor to further reduce the capacitance of the storage capacitor. The invention further provides a pixel applied to an AMOLED panel, which uses a ramp-up/step scan signal to further reduce the + capacitance of the storage capacitor. For this reason, the present invention proposes a pixel applied to a light-emitting diode panel, comprising: a switch module that receives an image data signal VDATA, and whose off state is controlled by a (four) SCAN; _ _ group, _ to: = Mo group, its on/off state is controlled by another scan signal sc fiber, and: the scan signal SCAN transition state will make the SCANB transfer and drive / illumination module, which is connected to the pseudo switch module , ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The secret effect is offset. Peak Crane / Light Module

開關電曰曰體MP3之源極接收影像資料信號vdata, ”閘極接收第-掃描信號SCAN,其祕連接至内部節點I 1259020 ]6029twf.doc/g 依照本發明的較佳實施例所述之晝素結構,掃描信號 SCANB為掃描信號scan之反相後信號,或反相-延遲後 信號,或反相-位移後信號。 依照本發明的較佳實施例所述之畫素結構,開關模組 包括開關電晶體。 依照本發明的較佳實施例所述之晝素結構,偽開關電 曰曰曰體包括一個或數個偽開關電晶體。偽開關電晶體更包括 一電容性電晶體。 依照本發明的較佳實施例所述之畫素結構,掃描信號 SCAN之上升邊緣為斜線,或為步階式。 本舍明因採用偽電晶體(dummy transistor),因此可降 低時脈饋入效應,也能使電容值大幅縮小,並使得開口率 (aperture rati〇)增大很多,有助於小尺寸面板之量產。 為讓本發明之特徵和優點能更明顯易懂,下文特舉較 佳實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 底下將列舉數個較佳實施例,以說明本發明之主要精 神與架構。 明芩考圖2,其顯示根據本發明第一較佳實施例之電 路方塊圖。如圖2所*,應用於AM0LED面板之畫素2〇 ·開關兒晶體MP3與MP4,驅動電晶體MI>5,儲存 黾容CST 2與有機發光二極體元件〇led2。 9 ⑧ 1259020 16029twf.doc/g μ開關電晶體MP4之源極連接至内部節點川,其間極接 收第二掃描信號SCANB,其汲極則浮接。 1驅動電晶體MP5之閘極連接至内部節點N卜其源極輕合 至^源電壓VDD,其没極連接至有機發光二極體元件〇咖2 之陽極。有機發光二極體元件〇LED2之陰極則接地娜。 儲存電容CST 2之-端連接至驅動電晶體MP5之問極, 其另一端則耗合至電源電壓VDD。 • ^請芩考圖3,其顯示掃描信號SCAN與SCANB之波 形關係圖。由圖3可看出,將掃描信號^崩反相後可得 到掃描信號SCANB。或者將掃描信號SCAN反相後再細 • 輯可得聊描錢SCANB,。或者將職錢SCAN ^ : 相後再經位移可得到掃描信號SCANB,,。所以,圖2、圖4 與圖5中之掃描信號SCANB可用scanb,或scanb,, 來取代,仍可達成本發明之功效。 上要致能(選擇)晝素2〇時(亦即此時之掃描信號scan 由高電位變為低電位),開關電晶體MP3會導通,而另— 開關電晶體MP4會關閉。此時,驅動電晶體Mp5之閉極 1壓(亦即節點N1之電位)會被拉至VDATA之電位。驅動 t晶體MP5之閘極_源極電壓會造成流經有機發光二極體The source of the switching body MP3 receives the image data signal vdata, "the gate receives the first-scan signal SCAN, and the secret is connected to the internal node I 1259020] 6029 twf.doc / g according to a preferred embodiment of the present invention The pixel structure, the scan signal SCANB is an inverted signal of the scan signal scan, or an inverted-delayed signal, or an inverted-displaced signal. The pixel structure, switching mode according to the preferred embodiment of the present invention. The set includes a switching transistor. According to the halogen structure of the preferred embodiment of the present invention, the pseudo-switching electrical body includes one or more dummy switching transistors. The pseudo-switching transistor further includes a capacitive transistor. According to the pixel structure of the preferred embodiment of the present invention, the rising edge of the scan signal SCAN is a diagonal line or a step type. Benming uses a dummy transistor to reduce clock feed. The effect can also greatly reduce the capacitance value and increase the aperture ratio (Aperture rati〇), which is beneficial to the mass production of small-sized panels. In order to make the features and advantages of the present invention more obvious, the following is a special More The embodiments are described in detail below with reference to the accompanying drawings. [Embodiment] Several preferred embodiments will be described below to illustrate the main spirit and architecture of the present invention. The circuit block diagram of the first preferred embodiment, as shown in Fig. 2, is applied to the pixels of the AM0 LED panel, the switches MP3 and MP4, the driving transistor MI>5, the storage capacitor CST 2 and the organic light emitting diode 2 The body element 〇led2. 9 8 1259020 16029twf.doc/g The source of the μ switch transistor MP4 is connected to the internal node, the pole receives the second scan signal SCANB, and the drain of the gate is floating. 1 drive transistor MP5 The gate is connected to the internal node N, and its source is lightly coupled to the source voltage VDD, which is not connected to the anode of the organic light emitting diode element 2. The cathode of the organic light emitting diode element 〇LED2 is grounded. The end of CST 2 is connected to the terminal of the driving transistor MP5, and the other end is consumed to the power supply voltage VDD. • Please refer to Figure 3, which shows the waveform relationship between the scanning signals SCAN and SCANB. See that the scan signal is inverted After that, the scan signal SCANB can be obtained. Or the SCANB can be obtained by inverting the scan signal SCAN, or the scan signal SCANB can be obtained by shifting the SCAN ^ : and then shifting. 2, the scanning signal SCANB in Figure 4 and Figure 5 can be replaced by scanb, or scanb,, can still achieve the effect of the invention. On the enable (select) 昼素 2〇 (that is, the scanning signal at this time) Scan changes from high to low), the switching transistor MP3 turns on, and the other switch transistor MP4 turns off. At this time, the closed-pole 1 voltage of the driving transistor Mp5 (i.e., the potential of the node N1) is pulled to the potential of VDATA. Driving the gate of the t crystal MP5_source voltage causes the organic light emitting diode to flow through

凡件OLED2之電流,進而使麵發光二極體元件qled2發 光。 X 結合圖2與圖3可知,當要失能畫素2〇時,掃描信 號SCAN纟低電位變為高電位而另一掃描信號scanb ^ 向電位變為低電位。所以,開關電晶體Mp3會關閉但另— ⑧ 10 1259020 開關電晶體MP4會導通。如上述般,當掃描信號SCAN 轉態(由低電位變為高電位)時,由開關電晶體Mp3之寄生 電容所導致之時脈饋入效應原本應該會使得驅動電晶體 MP5之閘極電壓暫態地被向上拉;但是,由開關電晶體 MP4之可生電容所導致之時脈饋入效應亦會使得驅動電 晶體MP5之間極電壓暫態地被向下拉。亦即,可視為開關 電晶體MP3之寄生電容之時脈饋入效應被開關電晶體 MP4之寄生電容之時脈饋入效應所本質抵消。故而,當要 失晝素20日寺,亦即掃描信號SCAN由低電位變成^電 位日π ’由於CTT效應本質上独消或其影響效應很低,驅 動電晶體ΜΡ5之閘極電壓會本質上維持在VDATA之# 位。 ^外,如圖2所示,本發明之晝素2〇也可視為包括: 開關模組21,偽開關模組22與驅動/發光模組力。其中, =核组21至少包括開關電晶體Mp3。偽開關模組至 =ST2,驅動電晶體MP5與有機發光二極體元件 描述可知,根據本發明第—實施例,利用所增The current of the OLED 2, in turn, causes the surface-emitting diode element qled2 to emit light. As can be seen from the combination of Fig. 2 and Fig. 3, when the pixel 2 is to be disabled, the scanning signal SCAN is turned to a high potential and the other scanning signal scanb is turned to a low potential. Therefore, the switching transistor Mp3 will be turned off but the other 8 10 1259020 switching transistor MP4 will be turned on. As described above, when the scan signal SCAN transitions (from low potential to high potential), the clock feed effect caused by the parasitic capacitance of the switching transistor Mp3 should originally cause the gate voltage of the driving transistor MP5 to be temporarily suspended. The state is pulled up; however, the clock feed effect caused by the biodegradable capacitance of the switching transistor MP4 also causes the pole voltage between the driving transistors MP5 to be temporarily pulled down. That is, the clock feed effect, which can be regarded as the parasitic capacitance of the switching transistor MP3, is substantially offset by the clock feed effect of the parasitic capacitance of the switching transistor MP4. Therefore, when the temple is to be lost, the scanning signal SCAN changes from a low potential to a potential π '. Since the CTT effect is essentially exclusive or its effect is very low, the gate voltage of the driving transistor ΜΡ5 will be essentially Maintain the #DATA bit in VDATA. In addition, as shown in FIG. 2, the pixel 2 of the present invention can also be regarded as including: the switch module 21, the pseudo switch module 22 and the driving/lighting module force. Wherein, the =core group 21 includes at least the switching transistor Mp3. The pseudo-switch module to =ST2, the driving transistor MP5 and the organic light-emitting diode element are described. According to the first embodiment of the present invention, the utilization is increased.

括偽開關電晶體MP4。驅動,發光模組23至少 存電容CST2,驅叙雷旦μ 一… U OLED2 〇A dummy switch transistor MP4 is included. Drive, the light-emitting module 23 at least stores the capacitor CST2, and drives the Leidan μ... U OLED2 〇

1259020 16029twf.doc/g :月’考ϋ4’其為圖2之變化例。驅動電晶娜 汲極係輕接至電晶體ΜΡ6之源極與命;之 閘極耗接至另一參考電壓V1。^之 电曰曰體ΜΡ6之 調整,以讓電晶體Mp5之間私接艮=要而 VDATA之電位。 1更加接近>、料信號 組二:iHf4,畫素4。也可視為包括··開關模 /偽開關核組42與驅動/發光模組43。 = Ξ 11 βΘβ 11ΜΡ3 ^ ^ ^ ^ ^ ί 43至電容性電晶體ΜΡ6 °驅動/發光模組 - _已括儲存電谷CST2,驅動電晶體ΜΡ5與有機^ 一極體7L件OLED2。 ,、句蚀^忐 =電晶體MP6具有刪電容的功效,所以 所電容CST2之電容值,亦即可減少儲存電容 产甘^局面積。如此一來,圖4所示之畫素40之布局面 貝亚:會因為加入電晶體MP6而變大。 路方ίίΐ考圖5 ’其顯示根據本發明第二較佳實施例之電 ^塊圖。如圖5所示,應祕AM〇LED面板中之; 儲力^括.開關電晶體MP7〜MP9,驅動電晶體Mp 1 〇, 錯存笔容CST 3與有機發光二極體元件⑽D3。 Α門,關電晶體MP7之源極接收影像資料信號VDATA, 接收第—掃描信號SCAN,其汲極連接至内部節點N3。 開,電晶體MP8之源極連接至内部節點N3,其間極接 弟掃描k號SCAN,其汲極連接至内部節點N4。 開關電晶體MP9之源極連接至内部節點N3,其閘極接 ⑧ 12 1259020 16029twf.doc/g 收第一掃描信號SCANB,其汲極連接至内部節點蝌。 驅動包曰曰體MP10之間極連接至内部節點N4,1源極搞 合至電源電壓獅,魏極賴至有舰光:極體元件 OLED3之陽極。錢發光二極體元件GLED3之陰極則連接 至接地端VSS。 儲存電谷CST 31禺接於驅動電晶體MP1 〇之間極 壓VDD之間。 ”包’了、包 圖5中之掃描信號SCAN與scanb間之關係可如圖3 所示。 —要致能畫素50時(亦即此時之掃描信號SCAN由高電 位變為低電位),開關電晶體贈與謂會導通,而另一 開關電晶體赠會關閉。此時,驅動電晶體娜1〇之間極 電壓⑽即節點N4之電位)會被拉至VDATA之電位。驅動 電晶體MP1G H源㈣壓會造成流經⑽出之電 流’進而使OLED3發光。 結合圖5與圖3可知,要失能晝素5〇時,掃描信號 S^AN之電位會從邏輯低電位變成邏輯高電㈣另一掃描 信號SCANB之電位會從邏輯高電位變成邏輯低電位。此 時,開關電晶體MP7與]^8會_,而開關電晶體Mp9 會導通。 由開關電晶體MP 7與MP 8之寄生電容所導致之時脈 饋入效應將會被開關電晶體MP9之寄生電容所導致之士 脈饋入效應抵消。如此一來,驅動電晶體Μρι〇2閘極電 壓’亦即節點N4之電壓,仍可保持為vDATA之電位。 ⑧ 13 開關才莫 開關模1259020 16029twf.doc/g: Month's test 4' is a variation of Figure 2. The driver is connected to the source of the transistor ΜΡ6; the gate is connected to another reference voltage V1. ^ The adjustment of the electric body ΜΡ 6 to allow the private connection between the transistors Mp5 要 = to the potential of VDATA. 1 is closer to > material signal group 2: iHf4, pixel 4. It can also be considered as including the switch mode/pseudo-switch core set 42 and the drive/light-emitting module 43. = Ξ 11 βΘβ 11ΜΡ3 ^ ^ ^ ^ ^ ^ ί 43 to capacitive transistor ΜΡ 6 ° drive / illuminating module - _ already included storage valley CST2, drive transistor ΜΡ 5 and organic ^ one pole body 7L OLED2. , sentence 忐 ^ 忐 = transistor MP6 has the effect of deleting capacitance, so the capacitance value of the capacitor CST2 can also reduce the storage capacitance. As a result, the layout surface of the pixel 40 shown in FIG. 4 is increased by the addition of the transistor MP6. A diagram showing an electric block diagram according to a second preferred embodiment of the present invention is shown. As shown in Fig. 5, it should be secreted in the AM 〇 LED panel; the memory is included. The switching transistor MP7~MP9, the driving transistor Mp 1 〇, the stray capacitor CST 3 and the organic light emitting diode element (10) D3. The gate, the source of the off-cell crystal MP7 receives the image data signal VDATA, receives the first scan signal SCAN, and its drain is connected to the internal node N3. On, the source of the transistor MP8 is connected to the internal node N3, and the poles of the transistor are scanned for the k-number SCAN, and the drain is connected to the internal node N4. The source of the switching transistor MP9 is connected to the internal node N3, and its gate is connected to the first scan signal SCANB, and its drain is connected to the internal node 蝌. The driver package body MP10 is connected to the internal node N4, and the source is integrated with the power supply voltage lion. Wei Lilai has the ship light: the anode element of the OLED3. The cathode of the money LED component GLED3 is connected to the ground terminal VSS. The storage valley CST 31 is connected between the driving voltage of the driving transistor MP1 VDD. The relationship between the scan signals SCAN and scanb in the package diagram can be as shown in Fig. 3. - When the pixel 50 is enabled (that is, the scan signal SCAN changes from high to low at this time) The switch transistor gift is turned on, and the other switch transistor gift is turned off. At this time, the pole voltage (10) of the driving transistor Na 1 is pulled to the potential of VDATA. The driving transistor The voltage of the MP1G H source (4) will cause the current flowing through (10) to further illuminate the OLED 3. As shown in Fig. 5 and Fig. 3, when the pixel is disabled, the potential of the scanning signal S^AN changes from a logic low to a logic. High power (4) The potential of the other scan signal SCANB will change from logic high to logic low. At this time, the switching transistor MP7 and ]^8 will be _, and the switching transistor Mp9 will be turned on. Switching transistor MP 7 and MP The clock feed effect caused by the parasitic capacitance of 8 will be offset by the parasitic feed effect caused by the parasitic capacitance of the switching transistor MP9. Thus, the driving transistor Μρι〇2 gate voltage 'is the node N4 The voltage can still be maintained at the potential of vDATA. 8 13 Switch Momo switch mode

l259〇2〇 16029twf. doc/g 外,再次參考圖5,晝素5〇也可視為包括: 、、且5:!,偽開關模組52與驅動/發光模組幻。其 組51至少包括開關電晶體MP7。偽開關模%52 $ 偽開關電晶體MP8/MP9。驅動/發光模組53 =包括 電容CST3,驅動電晶體Mm與 = 諸存 0LED3。 知疋—極體元件 由上述描述可知,根據本發明第二實施例 加之偽電晶體MP8/MP9,其可在採用小儲存電 ^斤增 來克服/抵消時脈效應,因此可減少電路所 ^兄下 積,進而增加開口率。 來局面 梦sr另二方t ’為更—步增加本發明之功效,可將掃描作 &SCAN之波形變成如圖6(A)與圖6(B)。在圖% 二L259〇2〇 16029twf. doc/g In addition, referring to FIG. 5 again, the pixel 5〇 can also be regarded as including: , , and 5:!, the pseudo-switch module 52 and the driving/lighting module are magic. Its group 51 includes at least a switching transistor MP7. Pseudo-switching mode %52 $ pseudo-switching transistor MP8/MP9. The driving/lighting module 53 = includes a capacitor CST3, which drives the transistors Mm and = and stores 0 LED3. Knowing the polar body element from the above description, according to the second embodiment of the present invention, the dummy transistor MP8/MP9 can be used to overcome/compensate the clock effect by using a small storage voltage, thereby reducing the circuit. Brothers down, and then increase the aperture rate. The situation is that the other two sides of the dream sr are added to the effect of the present invention, and the waveform of the scanning & SCAN can be changed as shown in Fig. 6(A) and Fig. 6(B). In the figure % two

=信號SCAN之上升邊緣具有斜線式波形。在圖 Y 掃描信號SCAN之上升邊緣具有步階式波形。其中圖6(Α) 之vth代表是開關電晶體(如ΜΡ3)之臨界電壓。而圖6(叫 之V2可設成稍微大於開關電晶體(如Μρ3)之臨界電壓。 底下將說明將圖6(A)與圖6(B)之波形導入圖2之電路 所^進之功效。睛再次參考圖2與圖6(A),在時間τΐ内, 開關電晶體MP3仍尚未完全關閉,驅動電晶體Μρ5之閘 極電壓可拉至VDATA。至於在時間Τ2内,開關電晶體 MP3會逐漸關閉。 請再次參考圖2與圖6(B),在時間Τ3内,開關電晶 14 ⑧ 1259020 16029twf.doc/g 體MP3仍尚未完全關閉,驅動電晶體Mp5之閘極電壓可 拉至VDATA。至於在時間T4内及T4之後,開 MP3會完全關閉。 利用圖6(A)與(Β)之波形,可使得開關電晶體Μρ3呈 現漸進式關閉,在MP3尚未完全關閉前,驅動電晶體Μρ5 之閘極電壓可拉至VDATA,更進—步減少因為開關電晶 體MP3 _所導致之CFT效應。而且應㈣6⑷與⑻= The rising edge of the signal SCAN has a diagonal waveform. There is a stepped waveform at the rising edge of the scanning signal SCAN of the figure Y. The vth of Figure 6 (Α) represents the threshold voltage of the switching transistor (such as ΜΡ3). And Figure 6 (called V2 can be set to be slightly larger than the threshold voltage of the switching transistor (such as Μρ3). The effect of introducing the waveforms of Figure 6 (A) and Figure 6 (B) into the circuit of Figure 2 will be explained below. Referring again to FIG. 2 and FIG. 6(A), in time τΐ, the switching transistor MP3 is still not fully turned off, and the gate voltage of the driving transistor Μρ5 can be pulled to VDATA. As for the switching transistor MP3 in time Τ2 Will gradually close. Please refer to Figure 2 and Figure 6 (B) again, in time Τ3, the switch transistor 14 8 1259020 16029twf.doc / g body MP3 has not been completely closed, the gate voltage of the drive transistor Mp5 can be pulled VDATA. As for the MP3 will be completely turned off after time T4 and after T4. Using the waveforms of Figure 6(A) and (Β), the switching transistor Μρ3 can be progressively turned off, and the drive is driven before the MP3 is completely turned off. The gate voltage of the crystal Μρ5 can be pulled to VDATA, and the CFT effect caused by the switching transistor MP3 _ is further reduced, and (4) 6(4) and (8)

波形醜,可更-進步降低贿電容之電容值,進而提 圖6(A)與6(B)之波形圖亦可應用至圖4盥圖5 之架構中,此時,補償效果可以進一步提昇。甚至,圖 直接應用至圖1之架射,亦能得到補償 效果,此蚪电路結構可以完全不經修改。 在^"兒月中,開關電晶體與驅動電晶體以Ρ型電晶 體(觸S)為例做說明,當然本發明並不受限於此。比^ Z開關電晶體與驅動電晶體改成N型電晶體(NM0S)。 二二:=1號SCAN的波形與儲存電容之連接方式也必 需做相對應改變。 種發曰月亦可應用至需要降低/抵消CFT效應之其他 中?體元細D)之開關/驅動模式。在本發明 人,,戈,,門接m/"! /輕合所代表意思為元件間,,直接耦接/耦 }或間接耦接/_合”。 負向本發明中’利用偽開闕電晶體所導致之 、 Ί/或緩升式/步階式掃描信號,來克服/抵消 ⑧ 15 1259020 16029tvvf.doc/g 原有開關電晶體之CFT效應。如此,可在利用小儲存〜 的情況下,抵消CFT效應並提高開σ率,而且 = 增加電路面積。 "大幅 雖然本發明已以較佳實施例揭露如上,然其並 、 限^本發明,任何㈣此技藝者,在不脫離本發明之精= 和範圍内,當可作些許之更動與潤飾,因此本發明之^ 範圍當視後附之申請專利範圍所界定者為準。 Μ% 【圖式簡單說明】 圖1减不應用於主動驅動式有機發光二極體(active matrix OLED,AM0LED)面板中之習知晝素之電路圖。 圖2顯示根據本發明第一較佳實施例之應用於 AMOLED之晝素之電路圖。 圖3顯示掃描信號SCAN與SCANB之波形圖。 圖4顯示根據本發明第一較佳實施例之應用於 AMOLED面板中之另一種晝素電路圖。 圖5顯示根據本發明第二較佳實施例之應用於 AMOLED面板中之畫素之電路圖。 圖6(A)與6(B)顯示掃描信號SCAN之另一種波形圖。 【主要元件符號說明】 10,20,40,50 :畫素 21 ’ 41,51 :開關模組 22 ’ 42 ’ 52 :偽開關模組 23 ’ 43 ’ 53 :驅動/發光模組 MP1,MP2,MP3,MP4,MP5,MP6,MP7,MP8, 16 ⑧ 1259020 16029twf.doc/g MP9,MP10 :電晶體 CST1,CST2,CST3 :儲存電容 OLED卜0LED2,0LED3 :有機發光二極體 SCAN,SCANB :掃描信號 VDATA :影像資料信號The waveform is ugly, but it can be further improved to reduce the capacitance of the bribe capacitor. The waveforms of Figures 6(A) and 6(B) can also be applied to the structure of Figure 4 and Figure 5. At this time, the compensation effect can be further improved. . Even if the graph is directly applied to the shot of Figure 1, the compensation effect can be obtained, and the circuit structure can be completely unmodified. In the case of ^", the switching transistor and the driving transistor are exemplified by a Ρ-type electric crystal (touch S), but the invention is not limited thereto. The ratio Z-transistor transistor and the driving transistor are changed to an N-type transistor (NM0S). 22: The connection between the waveform of SCAN and the storage capacitor must also be changed accordingly. The seeding month can also be applied to the switching/driving mode of other medium-body element D) that needs to reduce/offset the CFT effect. In the present inventor, the "gate", m/"! / light combination means "inter-component, direct coupling / coupling" or indirect coupling /_ combination". In the present invention, the use of pseudo The Ί/ or ramp-up/step scan signal caused by the opening of the transistor is used to overcome/compensate the CFT effect of the original switching transistor of 8 15 1259020 16029tvvf.doc/g. Thus, it can be used in small storage~ In the case of the CFT effect, the sigma ratio is increased and the sigma ratio is increased, and the circuit area is increased. The present invention has been disclosed in the preferred embodiment as above, but it is limited to the invention, and any (four) skilled person The scope of the present invention is defined by the scope of the appended claims. Μ% [Simple description of the drawings] Fig. 1 does not depart from the spirit and scope of the present invention. A circuit diagram of a conventional element in an active-mode OLED (AM0LED) panel. FIG. 2 is a circuit diagram of a halogen applied to an AMOLED according to a first preferred embodiment of the present invention. Figure 3 shows the waveforms of the scan signals SCAN and SCANB 4 is a circuit diagram of another pixel applied to an AMOLED panel according to a first preferred embodiment of the present invention. FIG. 5 is a circuit diagram of a pixel applied to an AMOLED panel according to a second preferred embodiment of the present invention. 6(A) and 6(B) show another waveform diagram of the scanning signal SCAN. [Main component symbol description] 10, 20, 40, 50: pixel 21 ' 41, 51 : switch module 22 ' 42 ' 52 : Pseudo-switch module 23 ' 43 ' 53 : drive / lighting module MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, 16 8 1259020 16029twf.doc / g MP9, MP10: transistor CST1, CST2, CST3 : Storage Capacitor OLED Bu 0LED2, 0LED3: Organic Light Emitting Diode SCAN, SCANB: Scanning Signal VDATA: Image Data Signal

1717

Claims (1)

1259020 16029twf.doc/g 十、申請專利範圍: 1. 一種應用於一發光二極體面板之晝素,包括: 一開關單元,接收一影像資料信號,並受控於一第一 掃描信號; 一偽開關單元,耦接至該開關單元,並受控於一第二 掃描信號,其中該第一掃描信號之轉態會造成該第二掃描 信號之轉態; 一驅動單元,搞接至一電源電壓與該偽開關單元; ^ 一儲存單元,搞接至該電源電壓與該驅動單元;以及 一發光單元,輕接於該驅動單元與一接地端之間; . 其中,由該第一掃描信號之轉態對該驅動單元所造成 • 之耦合效應被該第二掃描信號之轉態對該驅動單元所造成 \ 之耦合效應所實質降低。 2. 如申請專利範圍第1項所述之晝素,其中該第二掃 描信號為該第一掃描信號之一反相後信號、一反相-延遲後 信號與一反相-位移後信號間之三者擇一。 • 3.如申請專利範圍第1項所述之晝素,其中該開關單 元包括一開關電晶體,具有:接收該影像資料信號之一源 極,接收該第一掃描信號之一閘極,以及一汲極。 4. 如申請專利範圍第3項所述之晝素,其中該偽開關 單元包括一第一偽開關電晶體,具有:耦接至該開關電晶 體之汲極之一源極,接收該第二掃描信號之一閘極,以及 及極。 5. 如申請專利範圍第4項所述之畫素,其中該偽開關 ⑧ 18 1259020 16029twf.doc/g 單元更包括一電容性電晶體,具有:連接至該第一偽開關 電晶體之汲極之源極與汲極,以及接收一參考電壓之一閘 極。 6.如申請專利範圍第3項所述之晝素,其中該偽開關 單元更接收該第一掃描信號,以及 該偽開關單元包括·· 一第二偽開關電晶體,具有:耦接至該開關電晶體 之汲極之一源極,接收該第一掃描信號之一閘極,以及一 * 汲極;以及 一第三偽開關電晶體,具有:耦接至該開關電晶體 之汲極之一源極,接收該第二掃描信號之一閘極,以及耦 * 接至該第二偽開關電晶體之汲極之一汲極。 ; 7.如申請專利範圍第1項所述之晝素,其中該第一掃 描信號之上升邊緣為斜線。 8.如申請專利範圍第1項所述之晝素,其中該第一掃 描信號之上升邊緣為步階式。 • 9·如申請專利範圍第1項所述之晝素,其中該發光二 極體面板為一主動驅動式有機發光二極體(AMOLED)面 板。 1(λ —種應用於一發光二極體面板之晝素,包括: 一開關模組,接收一影像資料信號,並受控於一第一 掃描信號; 一偽開關模組,耦接至該開關模組,並受控於一第二 掃描信號,其中該第一與第二掃描信號之間具有既定相位 ⑧ 19 1259020 16029twf.doc/g 關係;以及 組 一驅動續光模組,接至該開_組與該偽開關模 w由該第—掃描信號之轉態對該驅動/發 X弟—知拈k號之轉態對該驅動/發光 杈組所造成之耦合效應所抵消。 尤 其中該第二 一反相-延遲 其中該開關 寻11·如申請專利範圍第1〇項所述之畫素 掃描信號為該第—槁少,於% > 弟抑抦仏唬之—反相後信號 後“唬與一反相-位移後信號間之三者擇一。 广么申°月專利祀圍第10項所述之畫素,其中該開關 =1:開關電晶體’具有:接收該影像資料信號之一 源極,接收該第―掃描信號之—閘極,以及-没極。 价」32請專利範圍第12項所述之晝素,其中該偽開 L雕帛—偽開關電晶體’具有:祕至該開關電 二、、'圣之源極,接收該第二掃描信號之-問極,以 及·〉及極。 14·如巾請專利範圍第13項所述之晝素,其中該偽開 閗:曰Α谷性電晶體,具有:連接至該第一偽開 極之祕與祕,以及接收—參考€壓之一 15.如申凊專利範圍第12項所述之晝素,其中該偽開 J杈組更接收該第—掃描信號,以及 該偽開關模組包括: —弟二偽開關電晶體’具有:純至該開關電晶體 ⑧ 20 1259020 16029twf.doc/g 之汲極之一源極,接收該第一掃描信號之一閘極,以及一 汲極;以及 一第三偽開關電晶體,具有:耦接至該開關電晶體 之汲極之一源極,接收該第二掃描信號之一閘極,以及耦 接至該第二偽開關電晶體之汲極之一汲極。 16. 如申請專利範圍第10項所述之畫素,其中該驅動/ 發光模組包括: 一驅動電晶體,具有:耦接至一電源電壓之一源極, 耦接至該偽開關模組之一閘極,以及一汲極; 一儲存電容,耦接於該電源電壓與該驅動電晶體之閘 極之間;以及 一發光元件,耦接於該驅動電晶體之汲極與一接地端 之間。 17. 如申請專利範圍第10項所述之晝素,其中該第一 掃描信號之上升邊緣為斜線。 18. 如申請專利範圍第10項所述之畫素,其中該第一 掃描信號之上升邊緣為步階式。 19. 如申請專利範圍第10項所述之晝素,其中該發光 二極體面板為一主動驅動式有機發光二極體(AMOLED)面 板。 ⑧ 211259020 16029twf.doc/g X. Patent application scope: 1. A pixel applied to a light-emitting diode panel, comprising: a switch unit that receives an image data signal and is controlled by a first scan signal; a dummy switch unit coupled to the switch unit and controlled by a second scan signal, wherein a transition state of the first scan signal causes a transition state of the second scan signal; and a driving unit is coupled to a power source a voltage and the pseudo-switching unit; a storage unit coupled to the power supply voltage and the driving unit; and a lighting unit that is lightly connected between the driving unit and a grounding terminal; wherein the first scanning signal The coupling effect of the transition state on the driving unit is substantially reduced by the coupling effect caused by the transition state of the second scanning signal to the driving unit. 2. The pixel according to claim 1, wherein the second scan signal is an inverted signal of the first scan signal, an inverted-delayed signal, and an inverted-shifted signal. Choose one of the three. 3. The pixel as described in claim 1, wherein the switch unit comprises a switch transistor having: receiving a source of the image data signal, receiving a gate of the first scan signal, and A bungee. 4. The pixel as described in claim 3, wherein the pseudo-switching unit comprises a first pseudo-switching transistor having: a source coupled to one of the drains of the switching transistor, receiving the second Scan the gate of one of the signals, as well as the pole. 5. The pixel of claim 4, wherein the dummy switch 8 18 1259020 16029 twf.doc/g unit further comprises a capacitive transistor having: a drain connected to the first dummy switching transistor The source and the drain, and the gate that receives a reference voltage. 6. The pixel of claim 3, wherein the pseudo-switching unit further receives the first scan signal, and the pseudo-switching unit comprises: a second pseudo-switching transistor having: coupled to the a source of one of the drains of the switching transistor, receiving a gate of the first scan signal, and a drain; and a third dummy switch transistor having: a drain coupled to the transistor of the switch a source receiving a gate of the second scan signal and a drain connected to one of the drains of the second dummy switch transistor. 7. The halogen as described in claim 1, wherein the rising edge of the first scanning signal is a diagonal line. 8. The element as claimed in claim 1, wherein the rising edge of the first scanning signal is stepped. • 9. The element as claimed in claim 1, wherein the light emitting diode panel is an active driven organic light emitting diode (AMOLED) panel. 1 (λ) is applied to a pixel of a light emitting diode panel, comprising: a switch module that receives an image data signal and is controlled by a first scan signal; and a pseudo switch module coupled to the The switch module is controlled by a second scan signal, wherein the first and second scan signals have a predetermined phase 8 19 1259020 16029 twf.doc/g relationship; and the group-driven continuous light module is connected to the The open-group and the pseudo-switching mode w are offset by the coupling effect of the transition state of the first-scanning signal on the driving/light-emitting state of the driving/light-emitting group. The second inversion-delay is wherein the switch scans the signal of the pixel as described in item 1 of the patent application scope as the first-thickness, after %> After the signal, the three elements between the 唬 and an inversion-displacement signal are selected. The pixel described in item 10 of the patent application, wherein the switch = 1: the switch transistor 'has: receives the a source of the image data signal, receiving the gate of the first scan signal, - 极极. Price" 32 Please refer to the element mentioned in item 12 of the patent scope, wherein the pseudo-opening L-pseudo-pseudo-switching transistor has: secret to the switch, the second source, the receiving source The second scanning signal - the question pole, and the > and the pole. 14 · For the towel, please refer to the element mentioned in the 13th patent range, wherein the pseudo-opening: the glutinous crystal, having: connected to the a pseudo-opening secret and secret, and receiving - reference one of the pressures 15. According to the claim 12, the pseudo-opening J 杈 group receives the first scanning signal, and the The pseudo switch module comprises: a second pseudo switch transistor having: a source of one of the drains of the switch transistor 8 20 1259020 16029 twf.doc/g, receiving a gate of the first scan signal, and And a third dummy switching transistor having: a source coupled to one of the drains of the switching transistor, receiving a gate of the second scanning signal, and coupled to the second dummy switch One of the poles of the transistor is a drain. 16. The pixel according to claim 10, The driving/lighting module comprises: a driving transistor having: a source coupled to a power supply voltage, a gate coupled to the dummy switching module, and a drain; a storage capacitor coupled Between the power supply voltage and the gate of the driving transistor; and a light emitting element coupled between the drain of the driving transistor and a ground. 17. As described in claim 10 The pixel of claim 10, wherein the rising edge of the first scan signal is a step. 19. The ten-dimensional element, wherein the light-emitting diode panel is an active-drive organic light-emitting diode (AMOLED) panel. 8 21
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