1257653 九、發明說明： 【發明所屬之技術領域】 本發明係有關於半導體積體電路的製造，特別是有關於一種利 用次常壓化學氣相沈積(sub-atmospheric pressure chemical vapor deposition，SACVD)技術形成無縫(seamless)淺溝渠絕緣區域之製 程。 【先前技術】 近年來，隨著半導體製程設計線寬的持續縮小，實施在半導體 基材表面上，用以有效地電性隔離元件的溝渠隔離或者稱作淺溝 絕緣(shallow trench isolation，STI)製程也儼然成為越來越重要的謀 題，而如何有效的填滿日益狹窄的絕緣溝渠亦已成為該技術領域 的一大挑戰。 傳統的淺溝絕緣製程乃先利用化學氣相沈積(也6111丨(^1 vapor d印〇Siti〇n，CVD)方法，將形成於基材表面的絕緣溝渠中填滿介電 層’然後再回蝕刻或者以化學機械研磨(CMP)方式去除絕緣溝渠外 多出來的介電層’形成平坦的紐表面。但隨著轉體製程進入 深次微米世代’積體電路密度的不斷提高而元件尺寸日漸縮小的 發展’使㈣述的化學氣減積方法所能提供_梯覆蓋(卿 _零)能力已财足喊財縣的高寬比㈣eetrati雜大的 情況，也就是不容易將介電層完全填滿溝渠。 1257653 為改善上述問題，有多種改良式的化學氣相沈積技術被提出 末其中以臭氣辅助次常壓化學氣相沈積(ozone-assisted SACVD) 技術經過部分研究而被證實具備有良好的階梯覆蓋能力以及均勾 度。上述的臭氧辅助次常壓化學氣相沈積技術乃是利用臭氧以及 四乙基石夕甲烧(TE〇s)作献應起始氣體，在例如反應壓力約為6〇 托耳(torr)的次常壓條件下沈積均厚的矽氧層，且通常伴隨著後續 的兩溫回火步驟，例如在溫度l〇〇〇°C左右以及氮氣環境中將所沈 積的矽氧層緻密化。 d而，别述的臭氧辅助次常壓化學氣相沈積技術在實際應用上 部仍有諸多缺點而翻p進—步的克服與改善。以習知的臭氧辅助 -人系壓化學氣相沈積技術所沈積的矽氧薄膜本身在高溫下會收 縮’例如在1050°C下處理30分鐘後會有高達約7〇/〇左右的收縮幅 而且SACVD石夕氧薄膜的特性也較差，例如，濕姓刻率較快。 ^外，如第1圖所示，臭氧辅助次常壓化學氣相沈積技術另一較 $重的問題是由於次常壓化學氣相沈積薄膜成長雜主要是由溝 渠2〇的側壁22向中間成長而填滿溝渠，因此，最終會在基底10 的溝渠20中間形成緊密接縫(seam)50,而此接縫缺陷50並無法以 傳統的氮氣環境回火方式去除，且容^遭受職續清洗步驟的侵 钱’導致連财槽的形成以及乡晶⑦雜路等問題。 【發明内容】 因此，本發明之主要目的在提供一種改良的淺溝渠絕緣區域之 1257653 ‘矛利用人#壓化學氣相沈積技術以及低溫蒸氣回火(steam anneal)製程，達到無缝填充絕緣溝渠的目的。 為達本發明之上述目的，本發明提供一種溝渠絕緣區域製程。 先提供-半導體基底，其上形成有—遮蔽層；進行—微影以及茲 刻製权’於該遮蔽層中形成一開口，暴露出部分的該半導體基底； • 經由該開口蝴該轉體基底，形成-絕緣溝渠；進行次常壓化 • 學氣相沈積(SACVD)製程，於該半導體基底上沈積-石夕氧層，並 填滿該絕緣溝渠，該魏層於親緣溝渠巾形成—接縫；進行一 低zm瘵氣回火製程，在氫氣/氧氣環境中以及回火溫度低於 的條件下’ >肖_接縫；最後進行—高溫回火製程，在溫度高於 900 C的惰性氣體環境中緻密化該矽氧層。 為了使貴審查委員能更清楚瞭解本發明之特徵及技術内 容，請參閱以下有關本發明之詳細說明與附圖。然而所附圖式僅 供參考與辅助說明用，並非用來對本發明加以限制者。 【實施方式】 為了進-步清楚說明本發明次常壓化學氣相沈積技術形成無 縫淺溝渠絕雜域之縣之内容，以下即參照第2至6圖詳細說 明其製造流程與步驟，其中第2至5圖綠示的是本發明較佳實施 例形成無縫淺溝渠絕緣區域之製程的剖面示意圖，第6圖為本發 明較it貝把例形成無缝淺溝渠絕緣區域之製程的流程圖。 8 1257653 首先，如第2圖所示，在一本墓骑其忘 疋1J 傾相沈積法或熱氧化成長方式形成。隨後，在塾氧化 層f上覆蓋—厚度約為·埃至遞埃的贱切層34，並與 墊氧化層32共同作為遮蔽層30。 ，如第3圖所示，接著以微影製程以及侧製程在遮蔽層％中 形成開π 36，然後再细遮蔽層3()作為_遮罩經由開口 ％向 下钕刻暴露出來的半導縣底1G，形成絕緣溝渠2g，1深度Η約 ^於纖埃至麵埃⑼。姆树_紐實細，絕緣溝 渠2〇的高寬比(亦即絕緣溝渠2〇的深度Η與寬度w的比钔大於 接下來，進行一熱氧化製程，以於絕緣溝渠的侧壁μ與 底部24表面上形成熱氧化襯墊層42。 如第4圖所示，接著進行次常墨化學氣相沈積製程，使用臭氧 以及四乙基矽甲烷(TE0S)作為反應起始氣體，在例如反應壓力約 為60托耳(t〇rr)的次常壓條件下沈積均厚的臭氧-四乙基石夕甲烷矽 氧層52。臭氧-四乙基石夕甲烧石夕氧層52覆蓋在遮蔽層邓上並且填 滿絕緣溝渠2〇。如前所述，由於次常壓化學氣相沈積薄膜成長特 性主要是由絕緣溝渠2〇的侧壁22向中間成長而填滿溝渠，因此， 最終會在溝渠2〇中間形成緊密接缝50，而此接縫缺陷無法以傳統 的氮氣環境回火方式去除，且容易遭受到後續清洗步驟的侵蝕， 導致連通溝槽的形成以及多晶矽線短路等問題。 1257653 根據本發明之另一較佳實施例，臭氧_四乙基矽甲烷矽氧層52 可以在不同的臭氧-四乙基矽甲烷比例下進行沈積。相較於以相同 的臭氧_四乙基矽甲烷比例一次沈積到所要厚度的臭氧-四乙基矽 甲烧石夕氧層，以多次不同臭氧_四乙基石夕甲烧比例步驟沈積的臭氧· 四乙基石夕甲烧石夕氧層，其薄膜特性較佳。 • 如第5圖所示，為解決上述問題，以達到無縫填充絕緣溝渠的 • 目的，接著進行低溫蒸氣回火(steamanneal)製程，其係在高溫爐 管(圖未示)中通入高流量的氫氣及氧氣，氫氣及氧氣的流量比約為 1·2至3:1之間，在500°C至800°C的溫度下進行、約30分鐘至6〇 分鐘左右。根據本發日月之較佳實施例，在沈積臭氧_四乙基石夕甲燒 石夕氧層52之後，將流量5至20升/分鐘(L/min)，例如15升/分鐘， 的氫氣以及流量5至20升/分鐘，例如1〇升/分鐘 度約為·。C的爐管中進行至少30分鐘以上的回火， 縫填充絕緣溝渠，消除掉接縫5〇。 需特別注意的是’若上述的蒸氣回火溫度高於麵。C以上則 反而會使絕緣溝渠20的角落56被明顯地氧化，造成絕緣溝論 角落圓化(comerromiding)效應，並因此影響到主動區域的面積大 小，因此並不適合高於8G(rc以上的溫度進行絲氣回火貝牛 驟。此外，從實驗結果來看’在上述的低溫蒸氣回火製麵財， 維持氫氣/A氣的高㈣亦有其必，目為需要轉高流 氣/氧氣才能有效地消除掉接缝50。 乳 1257653 才繼續以較高的温度，例如900 °〇至1100它的高溫，1257653 IX. Description of the Invention: [Technical Field] The present invention relates to the manufacture of a semiconductor integrated circuit, and more particularly to a sub-atmospheric pressure chemical vapor deposition (SACVD) technique. A process for forming a seamless shallow trench isolation region. [Prior Art] In recent years, as the line width of semiconductor process design continues to shrink, trench isolation for effective electrical isolation of components is performed on the surface of a semiconductor substrate, or referred to as shallow trench isolation (STI). Processes have become an increasingly important issue, and how to effectively fill increasingly narrow insulated trenches has become a major challenge in this area of technology. The traditional shallow trench insulation process is to first fill the dielectric trenches in the insulating trenches formed on the surface of the substrate by chemical vapor deposition (also 6111 〇 Siti〇n, CVD). Etching or chemical mechanical polishing (CMP) to remove the extra dielectric layer outside the insulating trenches to form a flat neodymium surface. However, as the transfer process enters the deep sub-micron generation, the density of the integrated circuit increases and the component size The diminishing development of 'the chemical gas depletion method described in (4) can provide _ ladder coverage (Qing _ zero) ability has been enough to call the county's aspect ratio (four) eethati mixed, that is, it is not easy to put the dielectric layer Completely filling the ditch. 1257653 In order to improve the above problems, a number of improved chemical vapor deposition techniques have been proposed, and some of them have been confirmed by odor-assisted sub-atmospheric chemical vapor deposition (Ozone-assisted SACVD) technology. It has good step coverage and uniformity. The above-mentioned ozone-assisted sub-atmospheric chemical vapor deposition technique uses ozone and tetraethyl stellate (TE〇s) as the starting gas, for example, in the reverse A thick helium oxide layer is deposited under a sub-atmospheric pressure of about 6 torr, and is usually accompanied by a subsequent two-temperature tempering step, such as at a temperature of about 10 ° C and in a nitrogen atmosphere. The deposited helium oxide layer is densified. d, the ozone-assisted sub-atmospheric pressure chemical vapor deposition technique described above still has many shortcomings in the practical application, and the conventional ozone is overcome. The helium oxide film deposited by the auxiliary-human pressure chemical vapor deposition technique itself shrinks at high temperatures. For example, after 10 minutes of treatment at 1050 ° C, there will be a shrinkage of up to about 7 〇 / 而且 and SACVD The characteristics of the film are also poor, for example, the wetness is faster. ^ In addition, as shown in Fig. 1, another problem of ozone-assisted sub-atmospheric chemical vapor deposition is due to the sub-atmospheric chemical vapor phase. The deposition film growth is mainly caused by the side wall 22 of the trench 2 向 growing in the middle to fill the trench, and therefore, a tight seam 50 is finally formed in the middle of the trench 20 of the substrate 10, and the seam defect 50 cannot be The traditional nitrogen environment tempering method is removed, and the capacity is The intrusion of the occupational cleaning step has led to problems such as the formation of the financial channel and the ridges and the like. [Invention] Therefore, the main object of the present invention is to provide an improved shallow trench isolation region of 1257653 'spear users. The process of seamlessly filling the insulating trenches is achieved by the pressure chemical vapor deposition technique and the steam anneal process. In order to achieve the above object of the present invention, the present invention provides a trench isolation region process. Forming a shielding layer thereon; performing a lithography and engraving to form an opening in the shielding layer to expose a portion of the semiconductor substrate; • projecting the rotating substrate through the opening to form an insulating trench; Performing a sub-atmospheric pressure vapor deposition (SACVD) process, depositing a layer of lithium oxide on the semiconductor substrate, and filling the insulating trench, the Wei layer forming a seam at the edge ditch; performing a low zm Helium tempering process, under hydrogen/oxygen environment and tempering temperature below conditions> > _ _ seam; finally - high temperature tempering process, at temperatures above 900 C The silicon oxide layer is densified in an inert gas environment. In order to provide a clearer understanding of the features and technical aspects of the present invention, the following detailed description of the invention and the accompanying drawings. The drawings are to be considered in all respects as illustrative and not restrictive. [Embodiment] In order to clearly explain the contents of the county in which the sub-atmospheric pressure chemical vapor deposition technology of the present invention forms a seamless shallow trench impurity, the manufacturing process and steps are described in detail below with reference to FIGS. 2 to 6. 2 to 5 are green cross-sectional views showing a process for forming a seamless shallow trench isolation region in accordance with a preferred embodiment of the present invention, and FIG. 6 is a flow chart showing a process for forming a seamless shallow trench isolation region in accordance with the present invention. Figure. 8 1257653 First, as shown in Figure 2, a tomb ride is forgotten by the 1J phase deposition method or thermal oxidation growth mode. Subsequently, a tantalum layer 34 having a thickness of about angstroms to angstroms is covered on the tantalum oxide layer f, and is used as the masking layer 30 together with the pad oxide layer 32. As shown in FIG. 3, the π 36 is formed in the shielding layer % by the lithography process and the side process, and then the thin layer 3 ( ) is used as the semi-guided etched through the opening %. At the bottom of the county, 1G, forming an insulating trench 2g, 1 depth Η about the fiber to the surface (9).姆树_纽实细, the aspect ratio of the insulated trench 2〇 (that is, the ratio of the depth Η to the width w of the insulating trench 2〇 is greater than the next, a thermal oxidation process is performed to the sidewall of the insulating trench μ A thermal oxide liner layer 42 is formed on the surface of the bottom portion 24. As shown in Fig. 4, a secondary ink chemical vapor deposition process is followed, using ozone and tetraethylphosphonium methane (TEOS) as the reaction starting gas, for example, in the reaction. A thick-thick ozone-tetraethyl sulfonate layer 52 is deposited under a sub-atmospheric pressure of about 60 Torr (t〇rr). The ozone-tetraethyl stellite layer 52 is covered in the shielding layer. Deng Shang and fill the insulating trench 2〇. As mentioned above, since the growth characteristics of the sub-atmospheric chemical vapor deposited film are mainly filled by the sidewall 22 of the insulating trench 2 to fill the trench, it will eventually A tight joint 50 is formed in the middle of the trench 2, and the joint defect cannot be removed by the conventional nitrogen environment tempering, and is easily eroded by the subsequent cleaning step, resulting in the formation of the communication groove and the short circuit of the polysilicon line. According to another aspect of the present invention In a preferred embodiment, the ozone-tetraethylphosphonium methane oxide layer 52 can be deposited at different ozone-tetraethylmethane ratios than once in the same ratio of ozone to tetraethylmethane. The thickness of the ozone-tetraethyl lanthanum lanthanum oxide layer, which is deposited in a plurality of different ozone _ tetraethyl sulphide ratio steps, has better film properties. • As shown in Figure 5, in order to solve the above problems, to achieve the purpose of seamlessly filling the insulated trenches, a low-temperature steam anneal process is followed, which is carried out in a high-temperature furnace tube (not shown). The flow rate of hydrogen and oxygen, hydrogen and oxygen flow ratio is about 1-2 to 3:1, at a temperature of 500 ° C to 800 ° C, about 30 minutes to 6 〇 minutes. According to this date In a preferred embodiment of the month, after depositing ozone _ tetraethyl stellite calcite layer 52, a flow rate of 5 to 20 liters per minute (L/min), for example 15 liters per minute, of hydrogen and a flow rate of 5 to 20 liters / minute, for example, 1 liter / minute is about · · C furnace tube for at least 30 minutes or more Tempering, filling the insulated trench and eliminating the seam 5〇. It is necessary to pay special attention to 'if the above steam tempering temperature is higher than the surface. C or more will cause the corner 56 of the insulating trench 20 to be obviously oxidized, resulting in Insulation trenches have a comerromiding effect and thus affect the area of the active area. Therefore, it is not suitable for wire tempering above 8G (temperature above rc. In addition, from the experimental results, 'in the experimental results The above-mentioned low-temperature steam tempering and face-making, maintaining the high hydrogen/A gas (4) also has its necessity, and it is necessary to turn high gas/oxygen to effectively eliminate the seam 50. The milk 1257653 continues to have a higher temperature. For example, 900 ° 〇 to 1100 its high temperature,
在完成低溫錢畔製程之後 在氮氣環境或者惰性氣體環境中進行臭氧_ 。上述的低温蒸氣回火製程以及 一爐管中(in-situ)前後進行，或者也可 以刀别在不同回火⑦備中進行’並不特別限制。後續的平坦化製 程’例如化學機械研磨程序，則與習知技藝相同，不再贅述。 雜 π參财6 ® ’其繪示的是本發明較佳實施_成無缝淺溝渠 絕^區域之製㈣流賴。本發彡成無戰溝祕緣區域之製 程流程60主要包括有四個步驟，其中步驟62為絕緣溝渠蚀刻以 及熱氧化襯塾層的形成；步驟Μ為以臭氧辅助SACV〇製程填滿 絕緣溝渠，步驟66為接缝消除步驟，係將以臭氧辅助SACVD製 程所沈積的CVD絕緣層在高流量的氳氣/氧氣環境中以相對較低 溫(600°C〜800°〇進行蒸氣回火；最後，步驟66為高溫氮氣回火製 程，用以緻密化填滿絕緣溝渠的CVD絕緣層。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 11 1257653 【圖式簡單說明】 第1圖繪不的是習知淺溝渠絕緣區域的剖面示意圖。 第2至5圖繪示的是本發明較佳實施例形成無缝淺溝渠絕緣區 域之製程的剖面示意圖。 第6圖為本發明健實關軸無賤舰鱗區域之製程的 流程圖。 # 【主要元件符號說明】 2〇 絕緣溝渠 24 溝渠底部 32墊氧化層 36 蘭口 5〇接縫 10半導體基底 22溝渠側壁 30遮蔽層 34墊氮化石夕層 42熱氧化概魯層 52臭氧_四乙基石夕甲歸氧層56溝渠角落 12After completing the low-temperature money-making process, ozone is carried out in a nitrogen atmosphere or an inert gas atmosphere. The above-described low-temperature steam tempering process and the in-situ process are performed before or after the in-situ, or the knives may be carried out in different tempering conditions, which is not particularly limited. Subsequent planarization processes, such as chemical mechanical polishing procedures, are the same as those of the prior art and will not be described again. Miscellaneous π 参 财 6 ® ' ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” The process flow 60 of the present invention is mainly composed of four steps, wherein step 62 is etching trench etching and thermal oxidation of the lining layer; step Μ is filling the insulating trench with the ozone assisted SACV 〇 process Step 66 is a seam elimination step of vapor tempering of the CVD insulating layer deposited by the ozone-assisted SACVD process at a relatively low temperature (600 ° C to 800 ° ; in a high flow helium/oxygen atmosphere; Step 66 is a high temperature nitrogen tempering process for densifying the CVD insulating layer filling the insulating trench. The above is only a preferred embodiment of the present invention, and the equal variation and modification of the patent application scope according to the present invention It should be within the scope of the present invention. 11 1257653 [Simplified description of the drawings] Fig. 1 is a schematic cross-sectional view showing a conventional shallow trench isolation region. Figs. 2 to 5 are diagrams showing a preferred embodiment of the present invention. A schematic cross-sectional view of a process for forming a seamless shallow trench isolation region. Fig. 6 is a flow chart showing the process of the robust and off-axis-free ship scale area of the present invention. # [Main component symbol description] 2〇Insulated trench 24 trench A bottom pad oxide layer 36 blue 32 5〇 joint port 10 of the semiconductor substrate trench 22 sidewalls 30 fossil shielding layer 34 nitrogen pad thermal oxide layer 42 almost Xi Lu ozone layer 52 _ tetraethylammonium A cornerstone Tokyo normalized trench oxide layer 56 corner 12