1248660 九、發明說明： 【發明所屬之技術領域】 本發明係提供一種於氟矽玻璃(FSG)層中形成一導電體的方 法0 【先前技術】 為因應半導體製程線寬縮小的趨勢，目前各金屬内連線層間的 介電層大多是由介電常數較低、填溝能力(gap-filHng pr〇perties)良 好的氟石夕玻璃(fluorinated silicate glass，FSG)所構成。因為氟是一種 強陰電性原子(electronegative atom)，故可有效地減少氧化石夕 (silicon oxide)介電層中之Si-0-F網狀結構(Si〇F network)的極性 (polarizability)，進而降低該氧化矽介電層的介電常數，避免寄生 電容影響介電層上下方訊號傳遞的速度。此外，由於氟也是一種 強触刻介質(etching species)，所以在沉積氟矽玻璃層時，氟會蝕刻 先前所沉積的氟矽玻璃薄膜，產生沈澱/浸蝕效應 (deposition/etching effect)，進而能在線寬越來越細的半導體製程 中’形成一無孔洞(void-free)的氟石夕玻璃層。 然而氟矽玻璃層的性質卻不是非常穩定的。因為隨著時間的增 加，該氟矽玻璃層會產生特性上的變化。舉例來說，當形成有氟 石夕玻璃層的半導體晶片直接暴露於一較濕的大氣(atm〇sphere)中， 或是長時間暴露在一乾燥的空氣下，該氟矽玻璃層表面通常會形 成一雲狀薄霧(cloudyhaze)或許多平坦的氣泡(evenbubbies)，增加 1248660 該氣石夕玻璃層的介電常數，甚至妨礙後續的半導體晶®製程。而 且存在於氟频璃層之⑽G lattice)中或是累積在該氟石夕玻璃 層表面的自域(free fluGrine)也會轉容胃於該㈣玻璃層沈積 製程或與來自域巾的水分減合，形錢驗(hy—c狀丨d， HF)，造成後續所形成之金屬導線或抗反射層的腐樹e_si〇n)與 損毀。 因此，目前在沉積完該氟矽玻璃層之後，大多會直接再於沉積 艙(chamber)中進行一烘烤製程(baJdng)，以去除該氟矽玻璃層可能 於該沈積製程t所吸收到的水分，並且於該㈣玻璃層表面形成 一未摻雜矽玻璃(undoped silicon giass，USG)層，當作頂保護層㈣ layer)，以阻止水分子進入該氟石夕玻璃層中。 然而後續在進行多重金屬化製程時，必須於這些介電層内形成 許多的插塞洞(plug hole)，用來製作各式接觸插塞(c〇ntact plug)或 介層插塞(via plug)，作為電連接各M〇s電晶體與金屬導線層間的 導線，因此氟矽玻璃層的表面仍然會直接暴露出來。 請參考圖一至圖三，圖一至圖三為習知於氟矽玻璃層中形成一 接觸插塞的製程示意圖。如圖一所示，半導體晶片1〇包含有一底 導電層12，一氟矽玻璃層14設於底導電層12上，以及一利用加 強型電漿化學氣相沈積法chemical vapor deposition，PECVD)所形成之未摻雜矽玻璃層15設於氟矽玻璃層 1248660 14之上。如圖二所示，習知在製作接觸插塞24時，是先利用微影 (photolithography)及蝕刻等製程，於氟矽玻璃層14中形成一通達 至底V電層12表面之插塞洞16。接著進行一清洗製程，去除插塞 /同16内的鬲分子物質以及半導體晶片⑴表面之光阻層。然後如 圖三所示，於半導體晶片1〇以及插塞洞16表面依序沉積一鈦金 屬層18、一氮鈦層20以及一鎢所構成之導電層22。最後利用一 化學機械研磨法(chemical mechanic polish，CMP)對半導體晶片1〇 進行表面處理，均勻地去除未摻雜矽玻璃層15表面的導電層22、 氮鈦層20以及鈦金屬層18,以於插塞洞16内形成一接觸插塞24。 如圖一所述之步驟，在完成插塞洞16的餘刻製程之後，該用 來當作頂保護層(cap layer)的未摻雜矽玻璃層15將會被蝕穿，形成 新鮮的氟砍玻璃表面直接暴露於插塞洞16的側壁表面。如此， 隨後接踵而至的清洗製程將不只去除插塞洞16内的高分子物質， 同時也會讓大量的水分子直接接觸至插塞洞16側壁表面的氟矽玻 璃層14，產生氫氟酸(HF)或雲狀薄霧(cloudy haze)等缺陷，造成後 續所形成之金屬導線或抗反射層的腐姓(corrosion)與損毀，降低該 接觸插塞製程的良率(yield rate)。 【發明内容】 因此本發明之主要目的在於提供一種於氟矽玻璃(FSG)層中形 成一導電體的方法，以改善習知技術的缺失。該導電體可為一接 觸插塞(contact plug)、介層插塞(via plug)、導線或一具有雙鑲後 7 1248660 (dual damascene)結構的導線。 在本發明之最佳實施例中’ 一半導體基底表面依序包含有一第 一阻障層，一氟矽玻璃(fluoride silicate glass, FSG)層以及一未摻雜 矽玻璃(undoped silicon glass，USG)層。首先於該未摻雜石夕玻璃層以 及該默石夕玻璃層中形成一#刻槽，接著於該钱刻槽表面進行一 NH3電漿處理(NH3 plasma treatment)製程。最後於該蝕刻槽中依序 填入一第二阻障層以及一金屬導電層，以完成該導電體的製程。 由於本發明方法係利用一 NH3電漿處理製程去除殘留於該钱刻槽 表面之高分子物質以及水分，因此可以取代習知進行之濕式清洗 製程，以避免該濕式清洗製程中的水分子與存在於氟矽玻璃層之 晶格(FSG lattice)中或是累積在該钱刻槽表面的自由氟(free fluorine)相結合，形成氫氟酸(HF)。同時，該胃;電漿處理製程係 用來於該蝕刻槽側壁之該氟矽玻璃層表面形成一薄膜，因此可以 避免第二阻障層直接細該氟⑪玻璃層而發生反應，進而增加半 導體產品的可靠度㈣iability)。該薄膜亦可以有效阻齡氟石夕玻璃 層中之氟離子於後續熱處理製程中向外擴散(out_diffusion)，進而 與環境中的水分子結合形錢_(HF)，造錢續之啡層或是 金屬導線的腐贿損毀。此外，該親處理製程亦可以修補該触 刻槽底部秘_或是清洗f飾娜，進而改善 第-阻障層與第二阻障層之間的附著情形，並降低該導電體之有 效阻值(effective resistivity)。 1248660 【實施方式】 本發明方法之主要目的是提供一種於氟矽玻璃(FSG)層中形成 一導電體的方法。該導電體可為接觸插塞(c〇ntactplug)、介層插塞 (Via Plug)、導線或一具有雙鑲嵌(dual damascene)結構的導線。以 下利用一介層插塞的製程來對本發明方法作一最佳實施例說明。 請參考圖四至圖七，圖四至圖七為利用本發明方法形成一介層 插塞的製程示意圖。半導體晶片包含有一基底3〇，基底3〇表面包 含有一第一阻障層32，一氟矽玻璃層34設於基底30以及第一阻 障層32的上方，以及一利用加強型電漿化學氣相沈積法 (plasma-enhanced chemical vapor deposition，PECVD)所形成之未摻 雜矽玻璃層36設於氟矽玻璃層34之上，用來當作氟矽玻璃層34 的頂保護層(cap layer)。其中，第1阻障層32係由一鈦金屬層、氮 化鈦層或疋由鈦/氮化鈦、鈦/氮化鈦/鈦上下重疊構成。 如圖四所示，本發明形成該介層插塞的方法是先利用一黃光 (lithography)製程，於未摻雜矽玻璃層36上方均勻地塗佈(⑺紐叩） 一層光阻(photoresist)層(未顯示），並於該光阻層中定義該介層插塞 t(via pattern) 〇 ^^^f-##^^(anisotrop^ etch)製程，以去除未被該圖案化光阻層覆蓋之未換雜石夕玻璃層％ 以及氟树璃層34，形成-通達至第―阻障層32表_飯刻曰槽， 用來當作插塞洞37。隨後並利用一光阻剝除製程㈣对如卯 完全去除該光阻層。 9 1248660 接著如圖五所示，於插塞洞37表面進行一 NH3電漿處理(NH3 plasma treatment)製程，以於插塞洞37側壁之氟矽玻璃層34表面 形成一由低氟濃度之未摻雜氧化層(undoped-oxide-like layer with low fluorine concentration)構成之薄膜38，且薄膜38之厚度約為 30〜50埃。該NH3電漿處理係利用一流量約為5000標準立方公分 每分鐘(standard cubic centimeter per minute，seem)的氨氣以及流量 約為1500 seem之氮氣當作反應氣體。此外，該nh3電漿處理製 私之參數範圍包含·南頻無線電波頻率⑻或fre(jUenCy radi〇 frequency, HFRF)約為2000瓦特(Watts);低頻無線電波頻率(1〇w frequency radio frequency，LFRF)約為300瓦特；操作壓力約為2托 耳(Torr);以及溫度約為4〇〇°C。 如圖六所示，接著於基底30表面依序形成一第二阻障層4〇以 及-金屬導電層42 ’以填滿插塞洞37。其中，第二阻障層4〇係 由鈦金屬層、氮化鈦層或是由鈦/氮化鈦上下重疊構成。最後 如圖七所不，_-化學频研雜程將未摻财玻璃層％表面 的金屬導電層42以及第二阻障層⑼完全磨除，以形成一頂端約 略與未摻雜矽玻璃層36表面切齊之介層插塞44。 —由於本發明利用該腿3電漿處理製程於氟额璃層表面形成 之涛膜具有輯_子向外舰轉觀中的水分子結合形成氫 亂酸_的功用，因此在本發明之另—實施例中 代未換雜侧層作為氣蝴層之頂保護層，進而二: 1248660 晶圓的製造程序，提昇產量(throughput)。如圖八所示，半導體晶 片包含有一基底50,基底50表面包含有一由鈦金屬或是氮化鈦構 成之阻障層52，一氟矽玻璃層54設於基底50以及阻障層52的上 方。首先利用上述方法於氟矽玻璃層54中形成一插塞洞，然後利 用一 NH3電漿處理製程於氟矽玻璃層54表面形成一薄膜56，薄 膜56不但可以用來阻隔後續填入插塞洞之導電材料與氟矽玻璃層 54表面直接接觸，亦可以用來當作氟矽玻璃層54的頂保護層(cap layer)。最後利用上述方法於插塞洞中填入導電材料，以形成一介 層插塞58。 本發明方法係利用一 NH3電漿處理製程去除殘留於插塞洞37 表面之高分子物質以及水分，因此可以取代習知進行之濕式清洗 製程以避.免該濕式清洗製程中的水分子與存在於氟矽玻璃晶格 (FSG lattice)中或是累積在插塞洞37表面的自由氟伽e ㈣相 結合’形成氫氟酸(HF)。同時，該戦電漿處理製程於插塞洞37 側壁表面形成之_ 38’可以避免第二阻_ 4()直接接職石夕玻 璃層34❿發生反應，進而增加半導體產品的可靠度㈣滿㈣。 薄膜38亦可以有效__玻_ 34中之氟離子於後續熱處理 製程中向外擴散(〇Ut-diffusi〇n)，進而與環境中的水分子結合形成 氫氟酸(HF) ’造錢續之阻騎或是金料__與損毀。此 =該電«理製程亦可以修補插絲37底部由於侧或是清洗 而姆之第-阻障層32,進而改善第—随障層％與第二阻障 曰之間的附著情形，並降低介層插塞44之有效阻值(.We 1248660 resistivity) 〇 相較於習知於氟矽玻璃層中形成一導電體的方法，本發明不但 可有效避免氟矽玻璃層之氟離子向外擴散而與水分子相結合，形 成氫氟酸(HF)腐蝕金屬導線，進而增加半導體產品的可靠度並且 提昇製程良率，同時可以改善阻障層之間的附著能力，並降低導 電體之電阻值。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 所做之均等變化與修飾，皆應屬本發明專利之涵蓋範圍。 【圖式簡單說明】 .圖一至圖三為習知於氟矽玻璃層中形成一接觸插塞的製程示 意圖。 圖四至圖八為本發明於氟矽玻璃層中形成一介層插塞的製程 示意圖。 【主要元件符號說明】 10 半導體晶片 12 底導電層 14 氟矽玻璃層 15 未摻雜矽玻璃層 16 插塞洞 18 鈦金屬層 20 氮鈦層 22 导電層 24 接觸插塞 12 1248660 30 基底 32 34 氟矽玻璃層 36 37 插塞洞 38 40 第二阻障層 42 44 介層插塞 50 基底 52 54 氟矽玻璃層 56 58 介層插塞 第一阻障層 未摻雜矽玻璃層 薄膜 金屬導電層 阻障層 薄膜 131248660 IX. Description of the Invention: [Technical Field] The present invention provides a method for forming an electric conductor in a fluorocarbon glass (FSG) layer. [Prior Art] In order to cope with the trend of narrowing the width of a semiconductor process, each Most of the dielectric layers between the metal interconnect layers are composed of fluorinated silicate glass (FSG) which has a low dielectric constant and good gap-filling ability (FSG). Since fluorine is a strong electron atom, it can effectively reduce the polarizability of the Si-0-F network (Si〇F network) in the silicon oxide dielectric layer. Further, the dielectric constant of the yttrium oxide dielectric layer is lowered to prevent the parasitic capacitance from affecting the speed of signal transmission on the upper and lower sides of the dielectric layer. In addition, since fluorine is also a strong etching species, when depositing a fluorocarbon glass layer, fluorine etches the previously deposited fluorocarbon glass film to cause a deposition/etching effect, which in turn enables In the thinner and thinner semiconductor process, a void-free fluorite glass layer is formed. However, the properties of the fluorocarbon glass layer are not very stable. Because of the increase in time, the fluorocarbon glass layer undergoes a change in properties. For example, when a semiconductor wafer formed with a fluorocarbon glass layer is directly exposed to a relatively wet atmosphere (atm〇sphere) or exposed to a dry air for a long time, the surface of the fluorocarbon glass layer is usually The formation of a cloud haze or many flat bubbles (evenbubbies) increases the dielectric constant of the 1248660 glass layer and even hinders the subsequent semiconductor wafer process. Moreover, the free fluGrine existing in the (10)G lattice of the fluorocarbon layer or accumulated on the surface of the fluorite glass layer may also be transferred to the (four) glass layer deposition process or the water loss from the domain towel. In combination, the shape of the money (hy-c-shaped 丨d, HF), causing the subsequent formation of the metal wire or anti-reflective layer of the rot tree e_si〇n) and damage. Therefore, after depositing the fluorocarbon glass layer, a baking process (baJdng) is often performed directly in the chamber to remove the fluorocarbon glass layer which may be absorbed by the deposition process t. Moisture, and an undoped silicon giass (USG) layer is formed on the surface of the (four) glass layer as a top protective layer (4) layer to prevent water molecules from entering the fluorite glass layer. However, in the subsequent multi-metallization process, a large number of plug holes must be formed in these dielectric layers to make various types of contact plugs or via plugs. ), as a wire between the M〇s transistor and the metal wire layer, so that the surface of the fluorocarbon glass layer is still directly exposed. Please refer to FIG. 1 to FIG. 3 . FIG. 1 to FIG. 3 are schematic diagrams showing a process for forming a contact plug in a fluorocarbon glass layer. As shown in FIG. 1, the semiconductor wafer 1 includes a bottom conductive layer 12, a fluorine-fluoride glass layer 14 is disposed on the bottom conductive layer 12, and a chemical vapor deposition (PECVD) method is used. The undoped bismuth glass layer 15 is formed over the fluorocarbon glass layer 1248660. As shown in FIG. 2, in the fabrication of the contact plug 24, a plug hole is formed in the fluorocarbon glass layer 14 to the surface of the bottom V electrical layer 12 by a process such as photolithography and etching. 16. Next, a cleaning process is performed to remove the germanium molecular material in the plug/same 16 and the photoresist layer on the surface of the semiconductor wafer (1). Then, as shown in FIG. 3, a titanium metal layer 18, a titanium nitride layer 20, and a conductive layer 22 made of tungsten are sequentially deposited on the surface of the semiconductor wafer 1 and the plug hole 16. Finally, the semiconductor wafer 1 is surface-treated by a chemical mechanical polish (CMP) to uniformly remove the conductive layer 22, the titanium nitride layer 20, and the titanium metal layer 18 on the surface of the undoped germanium glass layer 15 to A contact plug 24 is formed in the plug hole 16. As shown in FIG. 1, after the completion process of the plug hole 16, the undoped bismuth glass layer 15 used as a cap layer will be etched through to form fresh fluorine. The chopped glass surface is directly exposed to the sidewall surface of the plug hole 16. In this way, the subsequent cleaning process will not only remove the polymer material in the plug hole 16, but also directly contact a large amount of water molecules to the fluorocarbon glass layer 14 on the sidewall surface of the plug hole 16 to generate hydrofluoric acid. Defects such as (HF) or cloud haze cause corrosion and damage of the subsequently formed metal wire or anti-reflective layer, reducing the yield rate of the contact plug process. SUMMARY OF THE INVENTION It is therefore a primary object of the present invention to provide a method of forming an electrical conductor in a fluorocarbon glass (FSG) layer to improve the deficiencies of the prior art. The electrical conductor can be a contact plug, a via plug, a wire, or a wire having a dual inlaid rear 7 1248660 (dual damascene) structure. In a preferred embodiment of the invention, a semiconductor substrate surface sequentially includes a first barrier layer, a fluorinated silicate glass (FSG) layer, and an undoped silicon glass (USG). Floor. First, a ## groove is formed in the undoped Shishi glass layer and the MOS glass layer, and then an NH3 plasma treatment process is performed on the surface of the money groove. Finally, a second barrier layer and a metal conductive layer are sequentially filled in the etching trench to complete the process of the electrical conductor. Since the method of the present invention utilizes an NH3 plasma treatment process to remove the high-molecular material and moisture remaining on the surface of the money groove, it can replace the conventional wet cleaning process to avoid water molecules in the wet cleaning process. Hydrofluoric acid (HF) is formed in combination with a free fluorine present in the lattice of the fluorocarbon glass layer or accumulated on the surface of the money groove. At the same time, the plasma treatment process is used to form a film on the surface of the fluorocarbon glass layer on the sidewall of the etching groove, thereby preventing the second barrier layer from directly reacting the fluorine 11 glass layer to react, thereby increasing the semiconductor Product reliability (4) iability). The film can also effectively diffuse the fluoride ions in the fluorine-containing glass layer in the subsequent heat treatment process (out_diffusion), and then combine with the water molecules in the environment to form a layer of money (HF). It is the corruption of the metal wire. In addition, the pro-treatment process can also repair the bottom of the engraved groove or clean the f, to improve the adhesion between the first barrier layer and the second barrier layer, and reduce the effective resistance of the conductor. Effective resistivity. 1248660 [Embodiment] The main object of the method of the present invention is to provide a method of forming an electrical conductor in a fluorocarbon glass (FSG) layer. The electrical conductor can be a contact plug, a Via plug, a wire or a wire with a dual damascene structure. A preferred embodiment of the method of the present invention will now be described using a via plug process. Please refer to FIG. 4 to FIG. 7 . FIG. 4 to FIG. 7 are schematic diagrams showing a process for forming a via plug by the method of the present invention. The semiconductor wafer comprises a substrate 3, the surface of the substrate 3 includes a first barrier layer 32, a fluorine-containing glass layer 34 is disposed above the substrate 30 and the first barrier layer 32, and a reinforced plasma chemical gas is utilized. An undoped bismuth glass layer 36 formed by plasma-enhanced chemical vapor deposition (PECVD) is disposed on the fluorocarbon glass layer 34 and serves as a cap layer of the fluorocarbon glass layer 34. . The first barrier layer 32 is formed by superposing a titanium metal layer, a titanium nitride layer or tantalum from titanium/titanium nitride and titanium/titanium nitride/titanium. As shown in FIG. 4, the method for forming the via plug of the present invention is to first uniformly coat ((7) Newton) a photoresist (photoresist) on the undoped bismuth glass layer 36 by a lithography process. a layer (not shown), and defining a via pattern 〇^^^f-##^^(anisotrop^ etch) process in the photoresist layer to remove the patterned light The unreplaced stone layer % and the fluoro-glass layer 34 covered by the resist layer form a pass-to-block layer 32, which is used as a plug hole 37. Subsequently, the photoresist layer is completely removed by a photoresist stripping process (4). 9 1248660 Next, as shown in FIG. 5, an NH3 plasma treatment process is performed on the surface of the plug hole 37 to form a low fluorine concentration on the surface of the fluorine germanium glass layer 34 on the sidewall of the plug hole 37. The film 38 is composed of an undoped-oxide-like layer with low fluorine concentration, and the film 38 has a thickness of about 30 to 50 angstroms. The NH3 plasma treatment utilizes ammonia gas having a flow rate of about 5,000 standard cubic centimeters per minute (seem) and nitrogen gas having a flow rate of about 1500 seem as a reaction gas. In addition, the parameter range of the nh3 plasma processing system includes: south frequency radio wave frequency (8) or fre (jUenCy radi〇 frequency, HFRF) is about 2000 watts (Watts); low frequency radio frequency (1〇w frequency radio frequency, LFRF) is approximately 300 watts; operating pressure is approximately 2 Torr; and temperature is approximately 4 Torr. As shown in FIG. 6, a second barrier layer 4 and a metal conductive layer 42' are sequentially formed on the surface of the substrate 30 to fill the plug holes 37. The second barrier layer 4 is composed of a titanium metal layer, a titanium nitride layer or a titanium/titanium nitride layer. Finally, as shown in Figure 7, the _-chemical frequency is used to completely remove the metal conductive layer 42 and the second barrier layer (9) on the surface of the undoped glass layer to form a top and approximately undoped bismuth layer. 36 surface-cut via plug 44. - Because the present invention utilizes the leg 3 plasma treatment process to form a film on the surface of the fluorine-receiving layer, the function of the water molecules in the transition to the outer ship is combined to form hydrogen chaotic acid, and thus is another in the present invention. - In the embodiment, the unsubstituted side layer is used as the top protective layer of the gas butterfly layer, and further, the manufacturing process of the 1248660 wafer is used to increase the throughput. As shown in FIG. 8, the semiconductor wafer includes a substrate 50. The surface of the substrate 50 includes a barrier layer 52 made of titanium or titanium nitride. The fluorocarbon glass layer 54 is disposed on the substrate 50 and the barrier layer 52. . First, a plug hole is formed in the fluorocarbon glass layer 54 by the above method, and then a film 56 is formed on the surface of the fluorocarbon glass layer 54 by an NH3 plasma treatment process. The film 56 can be used not only to block the subsequent filling of the plug hole. The conductive material is in direct contact with the surface of the fluorocarbon glass layer 54 and can also be used as a cap layer of the fluorocarbon glass layer 54. Finally, the plug hole is filled with a conductive material by the above method to form a via plug 58. The method of the invention utilizes an NH3 plasma treatment process to remove the polymer material and moisture remaining on the surface of the plug hole 37, thereby replacing the conventional wet cleaning process to avoid water molecules in the wet cleaning process. Hydrofluoric acid (HF) is formed in combination with free fluorine gamma (tetra) present in the FSG lattice or accumulated on the surface of the plug hole 37. At the same time, the tantalum plasma processing process formed on the sidewall surface of the plug hole 37 can avoid the second resistance _ 4 () directly accepting the reaction of the Shi Xi glass layer 34 ,, thereby increasing the reliability of the semiconductor product (4) full (four) . The film 38 can also effectively diffuse fluoride ions in the __glass_34 into the subsequent heat treatment process (〇Ut-diffusi〇n), and then combine with water molecules in the environment to form hydrofluoric acid (HF). The resistance is riding or gold material __ and damage. This = the electric process can also repair the bottom of the wire 37 due to the side or the cleaning of the first - barrier layer 32, thereby improving the first - with the barrier layer % and the second barrier 曰 adhesion, and Reducing the effective resistance of the interlayer plug 44 (.We 1248660 resistivity) 本 Compared with the conventional method for forming an electric conductor in the fluorocarbon glass layer, the present invention can effectively prevent the fluorine ion of the fluorocarbon glass layer from being outwardly removed. Diffusion and combination with water molecules to form hydrofluoric acid (HF) to corrode metal wires, thereby increasing the reliability of semiconductor products and improving process yield, while improving the adhesion between barrier layers and reducing the resistance of the conductors. value. The above is only the preferred embodiment of the present invention, and all changes and modifications made by the scope of the present invention should be covered by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 to Fig. 3 are schematic diagrams showing the process of forming a contact plug in a fluorocarbon glass layer. 4 to 8 are schematic views showing a process for forming a via plug in a fluorocarbon glass layer according to the present invention. [Main component symbol description] 10 semiconductor wafer 12 bottom conductive layer 14 fluorocarbon glass layer 15 undoped bismuth glass layer 16 plug hole 18 titanium metal layer 20 titanium nitride layer 22 conductive layer 24 contact plug 12 1248660 30 substrate 32 34 fluorocarbon glass layer 36 37 plug hole 38 40 second barrier layer 42 44 via plug 50 substrate 52 54 fluorocarbon glass layer 56 58 via plug first barrier layer undoped bismuth glass film metal Conductive layer barrier film 13