404002 A7 B7 經濟部中央標準局貝工消費合作社印製 五、發明説明（ 善明領AJ- 本發明係有關於半導體製程， 符别疋利用氧化矽/氮 氧化矽複合層製作淺溝渠絶緣阻隔之方法。 發明貧景.」. 絶緣阻隔於半導體製程中是 尺用於k供個别半導體元 件之間的隔離結構。因此，爲了 裏造有效的積體電路 (I C s )，隔離元件必須先形成於梦甚 /基材中，無效的隔離作 用將造成漏電流，即使一個元件的 ιτ町少量漏電可導致極超 大型積體電路（ULSI)中全部電踗 τ王句是路明顯的功率消耗，許多 不同的隔離技術已被提出，包括局部氧化梦製程㈤… 〇X1datl〇n of Sllicon’ L0C0S)、淺溝渠隔離（π】）、其 他以LOCOS爲基礎發展之隔離製程 —衣狂，例如 poly-buffered LOCOS (PBL)及罩幕式 PBL # ^ .404002 A7 B7 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (Shenming collar AJ- This invention relates to the semiconductor manufacturing process, and the method of using silicon oxide / silicon oxynitride composite layers to make shallow trench insulation barriers The invention is poor. ". Insulation barriers are used in semiconductor processes to provide isolation structures for individual semiconductor components. Therefore, in order to build effective integrated circuits (ICs), the isolation components must be formed first. In the dream / substrate, the ineffective isolation will cause leakage current, even if a small amount of current leakage from a component of ιτ can cause all electric power in the ultra-large integrated circuit (ULSI). Different isolation technologies have been proposed, including the partial oxidation dream process ㈤ 〇 × 1datl〇n of Sllicon 'L0C0S), shallow trench isolation (π)), other isolation processes developed based on LOCOS — clothes mad, such as poly-buffered LOCOS (PBL) and curtain PBL # ^.
狄術（framed-mask PBL technologies) 〇 當元件之尺寸縮小至次微朱時，傳統l〇c〇s隔離已 無法符合uLSI製程之需求。舉例而言，一般所稱之l〇c〇s 之“鳥嘴”效應便對絶緣功能上造成—嚴重之破壞。在此 效應中，形成隔物的過程中氡化劑在氮化矽層邊緣向側 邊擴散，氧化層在氮化層邊緣下方形成並使氮化矽層邊 緣隆起，此種場氧化層側邊擴張造成場氧化層大量侵佔 -2· 本紙張尺度適用中國國家橾準（CNS } Α4規格（210X297公釐） ---------裝------1T------^ f請先閲讀背面之注意事項ί寫本頁} 404002 A7 B7 五、發明说明（） 入元件主動區域’對几SI而言是無法接受的。再者，其 表面之平坦性亦不適合次微米微影需要 經濟部中央標準局負工消費合作社印袋 淺溝渠絶緣阻隔（s h a 1 1 〇 w t r ( 爲最…VLS…⑴中隔離元件，並自此被視爲取 代傳統L〇C〇S隔離。其次，淺溝渠隔離正流行於四分之 一微米技術，在STI基本技術中，迤 是溝渠隔離以非等向 性独刻入矽基材’接著-CVD氧化屠被沉積在基材上， 然後以化學機械研磨（CMP)製程或回蝕法平坦化。 在發展淺溝渠絶緣阻隔亦面臨一些必須克服之困 難，例如，隔離依賴一有效而具挑戰性之cMP製程，STI 以CMP衍生的結果之一爲寬溝渠之磲形效應（d i sh i e f f e c t ) ’碟形效應使其難獲得一平坦的表面，此外，亦 影響隨後製程之控制，例如微影及離子佈植。—先前技 術利用一假圖案（dummy pattern)幾乎解決此問題，雖然 利用此傳統方法可改善CMP平坦化結果。但它使工作變 複雜包括使用额外的微影及蚀刻步驟。 此外，第一圖顯示傳統製程中晶圓1中之溝渠填充 物3鄰近溝渠之邊緣將會於製程中形成凹陷部份5，此凹 陷部份5將會對元件造成不正常之元件特性。因此目前 ο 1 a t i 〇 η J ST I ) (請先閲讀背面之注意事項再填寫本頁) 裝· 訂 -3· 本紙張尺度適用中國國家標準（CNS ) A4规格（210X297公楚） 4〇4〇〇2Framed-mask PBL technologies 〇 When the size of the device is reduced to the sub-micron level, the traditional CMOS isolation cannot meet the requirements of the uLSI process. For example, the so-called "bird's beak" effect of lOcos causes severe damage to the insulation function. In this effect, the chelating agent diffuses to the sides of the silicon nitride layer during the formation of the spacer, and an oxide layer is formed below the edge of the nitride layer and bulges the edge of the silicon nitride layer. The expansion caused a large amount of field oxide layer to occupy -2. This paper size is applicable to the Chinese National Standard (CNS) Α4 size (210X297 mm) --------- installation ----- 1T ----- -^ f Please read the note on the back first to write this page} 404002 A7 B7 V. Description of the invention () The active area of the component is unacceptable for several SI. Furthermore, the flatness of the surface is not suitable Micron lithography requires insulation barriers (sha 1 1 0wtr (shave the most ... VLS ...) insulation elements in the printed bag shallow trench of the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives, and has since been considered as a replacement for traditional LOC0S isolation Secondly, shallow trench isolation is popular in the quarter-micron technology. In the basic STI technology, trench isolation is etched into the silicon substrate with anisotropy, and then -CVD oxidation is deposited on the substrate. It is then planarized by a chemical mechanical polishing (CMP) process or an etch-back method. Marginal barriers also face some difficulties that must be overcome. For example, isolation relies on an efficient and challenging cMP process. One of the STI-derived results of CMP is the wide-channel trench effect (dishieffect). It is difficult to obtain a flat surface, and in addition, it also affects the control of subsequent processes, such as lithography and ion implantation.-The previous technology used a dummy pattern to almost solve this problem, although using this traditional method can improve CMP planarization. The result. But it complicates the work including the use of additional lithography and etching steps. In addition, the first figure shows that the trench filling 3 in the wafer 1 in the traditional process and the edge adjacent to the trench will form a recessed part 5 in the process ， This recessed part 5 will cause abnormal component characteristics to the component. So at present ο 1 ati 〇η J ST I) (Please read the precautions on the back before filling this page) Binding · Order-3 · This paper size Applicable to China National Standard (CNS) A4 specification (210X297)
、申請專利範圍 需要地爲一種無凹陷結構之溝渠式絶緣 的及概述： 气上所述本發明之主要目的爲提供一種溝渠式绝 緣阻隔之方法’本發明之再一目的爲提供—形成無凹陷 結構之溝渠絶緣阻隔之方法。 阻隔製程 經濟部中央標準局員工消費合作社印製 本發明揭露一種利用形成一淺溝渠絶緣阻隔隔離 (STI)<方法，本發明之步驟包含形成墊氧化層（第一氧 化層)/氮化矽層於晶圓之上，接著，一氮氧化矽層形成 ;氧化層之上做爲抗反射塗佈（ARC )，一光阻利用微 免製程形成於於氮氮化矽層上以定義隔離區域，執行一 蝕刻製程利用上述之光阻做爲罩幕將氮氧化矽層、氧化 層以及氮化矽層蝕刻以曝露出垫氧化層，隨後將光阻去 除。再上迷4結構形成另一氧化層於其上並執行回蝕刻 以形成間隙壁來提昇製程之STI角落圓形化（couer rounding)之可控制性’在間隙壁形成之過程中亦可同 時將氮氧化矽層去除以避免其後續熱氧化過程造成之應 力問題。利用上述之被蝕刻後結構與間隙壁做爲蝕刻罩 幕以乾式蚀刻技術形成複數個淺溝渠於晶圓之中。氧化 層以及間隙壁分别將其移除。執行一熱處理製程將其尖 本紙張尺度逋用中國國家橾隼（CNS ) Α4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁} 裝2. The scope of the patent application requires a trench-type insulation without a recessed structure and an overview: The main purpose of the present invention described above is to provide a method of trench-type insulation barrier. Another object of the present invention is to provide- Method for trench insulation and mitigation of recessed structures. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economy of the Barrier Process The present invention discloses a method for forming a shallow trench insulation barrier isolation (STI) < method. The steps of the present invention include forming a pad oxide layer (first oxide layer) / silicon nitride Layer on the wafer, and then, a silicon oxynitride layer is formed; an anti-reflection coating (ARC) is formed on the oxide layer; a photoresist is formed on the silicon oxynitride layer using a micro-free process to define an isolation region An etching process is performed using the above photoresist as a mask to etch the silicon oxynitride layer, the oxide layer and the silicon nitride layer to expose the pad oxide layer, and then the photoresist is removed. On the structure, another oxide layer is formed thereon and etch-back is performed to form a gap wall to improve the controllability of the STI corner rounding of the process. During the process of forming the gap wall, The silicon oxynitride layer is removed to avoid stress problems caused by its subsequent thermal oxidation process. A plurality of shallow trenches are formed in the wafer using the dry etching technique by using the etched structure and the partition wall as the etching mask. The oxide layer and the spacer are removed separately. Perform a heat treatment process to cut the size of the paper (CNS) Α4 size (210X297 mm) (Please read the precautions on the back before filling this page}
、1T 線· 4Q40Q2五、發明説明（） 之 銳物 邊 σ 開 圓 或 化 化 質 物 充 填 渠 溝 隔 緣 絶 爲 作 成 形 上 層 矽 化 氮 於 並 渠 溝 入 填 化化 氧一 如， 例用 :離 。 將 份中 部 之 上液 之刻 質蚀 物於 充浸 填圓 渠晶 溝將 去著 除接 於， 用層 驟矽 步化 氮 除 磨去 研酸 械磷 機熱 學以Line 1T · 4Q40Q2 V. Explanation of the invention () The sharp object edge σ open circle or chemical substance filling trench separation edge must be used to form the upper layer of silicide nitrogen and fill the trench with filling oxygen as in the example: . The etched material in the upper part of the middle part is immersed in the filling canal. The ditch will be removed, and the silicon oxide will be used to remove nitrogen.
Ρ Μ C 邊 D 開 質 /--ν 物化 充形 填圓 渠化si 之有 上具 圓成 晶形 出以 超俾 除 去 並 除 去 渠 溝 之 層 化 。 氧隔 墊阻 之緣 明 説 式 圈 單 簡 式 圖 之 附 隨 同 連 及 明 説： 述中 下其 考， 參解 了 於 易 更 明 發 本 使 將 形 中 程 製 隔 阻 緣 絶 渠 溝 於 所 程 製 統 傳 據 依 。 爲構 圖 結 一 陷 第凹 之 成 圖 面 。 剖圖 之面 驟剖 步之 層 層 合合 複複 成該 形刻 之蝕 明明 發發 本本 爲爲 圖 圖 二三 第第 圖 〇 面圖 剖面 之剖 壁之 隙渠 間溝 成成 形形 明明 發發 本本 爲爲 圖圖 四五 第第 (請先閣讀背面之注意事項再填寫本頁) .裝. ,11 線 經濟部中央標準局員工消費合作社印製 圖 間一 除行 去執 明明 成 形 明 本本夂 爲爲爲 圖圖圖 六七八 第第第 面 剖 之 中 渠 0 C圖读 圖面於 面剖物 剖之充 之理填 壁處渠 隙熱溝 面 剖 之 程 製 磨 研 械 機 學 化 1 行 執 明 發 本 爲 圖 九 第 I •5 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 404002 at _ B7 五、發明説明（） 圖 第十圖爲本發明去除氮化矽層'墊氧化層之剖面圖 眘明掸鈿説明： 本發明揭露一種利用氧化矽/氮氧化矽形成淺溝渠隔 絶緣阻隔（ST I )之方法，再者，本發明氮氧化矽層來擴大 微影製程之窗口。此方法亦利用間隙壁來提昇製程之STI 角落圓形化（C 〇 r n e r r 0 U n d i n g )之可控制性，及避免凹 結構之形成。本發明如下所示，此技術可用以製造淺 渠絶緣阻隔。 陷溝 經濟部中央揉準局貝工消費合作社印製 參考第二圖，於較佳實施例中，準備一具有<1〇〇〉結 晶方向之石夕晶圓2，形成一薄的氧化層4於晶圓2之上 爲墊氧化層。二氧化矽層4通常利用於氧環境中熱氧 法形成’例如，利用一氧-蒸氣環境形成二氧化矽層 溫度約8 0 0至1 1 0 0 *C ’二氧化矽層4亦可選擇利用任 適合的CVD形成，在此實施例中，二氧化妙層之厚度约 至 50〇A。 隨後沉積一氮化矽層6於墊氧化層4之上， 作 化 4 何 赴*氮化 矽層6可利用任何合適的製程沉積，氮化矽層之厚度約 •6- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ----------1------1T------ii (請先閣讀背面之注意事項寫本頁) 經濟部中央標準局員工消費合作社印製 404002 at __ B7 五、發明説明（） 5至2〇〇〇A，再者，形成氮化矽層6之溫度範圍約在攝 氏〇 〇至1 0 0 0度。在較佳實施例中，用以形成氮化石夕層 6 之氣體可選擇 SiH4, NH3, N2, N20 或 SiH2cl2, nh3, N” N2〇。-厚度約爲5〇。至1〇。。之氧化層8接續形成於氮化 矽層6之上。此氧化層8將可以防止氮化矽層6於矽底 材之蝕刻過程中流失。 接著，一氮氧化矽層1()形成於氧化層8之上做爲抗 反射塗佈URC)，其厚度可以爲1〇〇至5〇〇埃。通常此膜 層可以利用化學氣相沈積法於NO或n2〇中形成。 仍參閱第二圖，一光阻i 2利用微影製程形成於於氮 氮化矽層10上以定義隔離區域。參閲第三囷，執行一蝕 刻製程利用上述之光阻做爲罩幕將氮氧化矽層1〇、氧 化層8以及氮化矽層6蝕刻以曝露出墊氧化層4。隨後將 光阻12去除則形成一由氮氧化矽層’i 〇、氧化層8以及氣 化石夕層6所組成之被姓刻後結構，如第三圖所示。 參閲第四圖，間隙壁1 4形成於蝕刻後之結構側壁上， 一般此爲習知之製程’例如可以先行利用TE0S爲反應物 沈積一氧化層於其上’再利用一非等向性乾蚀刻製程將 可以形成上述之間隙壁14»上述之間隙壁14爲用來提昇 -Ί- 本紙張尺度逋用中國國家標準（CNS ) A4规格（210X297公釐） I I I I I ill 訂 I— I I 線 (請先閲讀背面之注意事項寫本頁) 經濟部中央標準局負工消费合作社印製 404002 Λ7 B7 五、發明説明（） 製程之STI角落圓形化（c〇rner r〇unding)之可控制性。 而被視爲對前述製程有不良影響之氮氧化矽層亦可在 間隙壁蝕刻的過度蚀刻（〇Ver etching)予以去除。 利用上述之被蝕刻後結構與間隙壁1 4做爲蝕刻罩幕 以乾式蝕刻技術形成複數個淺溝渠1 6於晶圓2之中，以 一實施例’本發明可以採用cf4 + 〇2之電萊#刻。 如第6圖所示，氧化層8以及間隙壁i *分别將其移 除。一般而言，氧化層8、Η可以利用叮或B〇E(buffer oxide etching)溶液將其去除。請注意由第六圖可知溝 渠開口邊緣1 8十分之尖銳。 下一步驟爲將其尖銳；開口邊緣i S鈍化或圓形化。 再一較佳之實施例中可以利用一熱處理製程達到上述之 目的’如第七圖所示，溝渠開口之邊緣2〇已被圓形化或 純化。此熱處理步驟於氧環境中以溫度至11S().C下 執行。 下接第八圖，一溝渠填充物質例如氧化物）填入 溝渠I6並於氣化珍層6上形成作爲絶緣隔離用，溝渠填 充物質可利用化學氣相沈積法形成或其他適合之製程加 -8- 本紙張尺度適用中國國家橾準（CNS ) Λ4規格（----- I I I I I I n I I n I I n I I n 線 (請先閱讀背面之注意事項3寫本頁) 404002 A7 B7 0 0 五、發明説明（ 以製作，形成溝渠塡充物質Μ之較佳溫度範圍约攝氏* 至 6 〇 〇。。。 參閲第九圖，一化學機械研磨（CMP)步驟用於除去溝 渠塡充物質22之上部份。部份之墊氧化& *仍殘留於晶 圓2之表面。氮化石夕；| 6做爲研磨之停止谓測作用。參 閲第十圖’以熱嶙酸去除氮化…。接著將晶圓浸於触 刻液之中將超出晶® 2上之溝渠填充物質22去除並去除 殘餘之塾氧化I “卑以形成具有鈍化（圓形化）開口邊緣 之溝渠絶緣阻隔。以-較佳實施例而言，V以使用时或 BOE溶液。 本發明以-較佳實施例説明如上，僅用於藉以幫助 了解本發明之實施，非用以限定本發明之精神，而熟悉 此領域技藝者於領悟本發明之精神後，在不脱離本發明 之精神範圍内’當可作些許更動潤飾及等同之變化替換·， 其專利保護範圍當視後附之申請專利範園及其等同領域 而定。 ----------^------1T------^ (請先閲讀背面之注意事項為填寫本頁) 經濟部中央標準局員工消費合作社印裝 -9· 本紙張尺度逋用中國國家標準（CNS ) A4^格（210X297公釐〉Ρ Μ C side D qualitative / --ν physical filling filling circular channelization si has a circular crystal form on top to remove and remove the layering of trenches. The attached diagram of the simple explanation of the oxygen septum resistance and the circle diagram are as follows: According to the process, the system is passed. Draw a concave surface for the composition. The section of the sectional view is layered and laminated step by step to restore the shape of the etched clear hair. The book is a gap between the canals of the cross-section wall of the cross-section of the figure. The issued version is as shown in Figure 4-5 (please read the precautions on the back before filling out this page). Install., 11 Line Ministry of Economic Affairs, Central Standards Bureau, Employee Consumer Cooperatives Printing Room This book is a grinding and grinding machine for the process of filling the trench gap and hot groove at the wall. The first version of Xuehua 1 was issued as shown in Figure 9. • The paper size is applicable to the Chinese National Standard (CNS) A4 (210X297 mm) 404002 at _ B7 5. Description of the invention () Figure 10 shows the removal of the invention Sectional view of the silicon nitride layer 'pad oxide layer Caution: The present invention discloses a method for forming a shallow trench isolation edge barrier (ST I) by using silicon oxide / silicon oxynitride. Furthermore, the silicon oxynitride layer of the present invention To expand the window of the lithography process. This method also uses the spacer wall to improve the controllability of the STI corner rounding (C0 r n r r 0 U n d i n g) of the process, and to avoid the formation of concave structures. The invention is shown below. This technique can be used to make shallow trench insulation barriers. Printed with reference to the second figure by the Central Bureau of the Gully Economy, the Shellfish Consumer Cooperative, in a preferred embodiment, a Shi Xi wafer 2 with a crystal orientation of <100> is prepared to form a thin oxide layer 4 on the wafer 2 is a pad oxide layer. The silicon dioxide layer 4 is usually formed using a thermal oxygen method in an oxygen environment. For example, a silicon dioxide layer is formed using an oxygen-steam environment. The temperature is about 8 0 to 1 1 0 0 * C. The silicon dioxide layer 4 is also optional. It is formed by any suitable CVD. In this embodiment, the thickness of the SiO 2 layer is about 50 Å. Subsequently, a silicon nitride layer 6 is deposited on the pad oxide layer 4. Where to go * The silicon nitride layer 6 can be deposited by any suitable process. The thickness of the silicon nitride layer is about 6--6. This paper is applicable to China National Standard (CNS) A4 Specification (210X297 mm) ---------- 1 ------ 1T ------ ii (Please read the precautions on the back to write this page) Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 404002 at __ B7 V. Description of the invention () 5 to 2000A, in addition, the temperature range for forming the silicon nitride layer 6 is about 00 to 100 ° C degree. In a preferred embodiment, the gas used to form the nitrided layer 6 can be selected from SiH4, NH3, N2, N20 or SiH2cl2, nh3, N "N2O.-The thickness is about 50 to 10. Oxidation The layer 8 is successively formed on the silicon nitride layer 6. This oxide layer 8 can prevent the silicon nitride layer 6 from being lost during the etching process of the silicon substrate. Then, a silicon oxynitride layer 1 () is formed on the oxide layer 8 It is used as an anti-reflection coating (URC), and its thickness can be 100 to 500 angstroms. Usually this film layer can be formed in NO or n20 by chemical vapor deposition. Still referring to the second figure, a The photoresist i 2 is formed on the silicon nitride nitride layer 10 using a lithography process to define an isolation region. Referring to the third step, an etching process is performed using the above photoresist as a mask to cover the silicon nitride oxide layer 10, The oxide layer 8 and the silicon nitride layer 6 are etched to expose the pad oxide layer 4. Subsequently, the photoresist 12 is removed to form a surname composed of a silicon oxynitride layer 'i 0', an oxide layer 8 and a gasified stone layer 6. The structure after the engraving is shown in the third figure. Referring to the fourth figure, the partition wall 14 is formed on the sidewall of the structure after the etching, which is generally known. For example, the process can use TEOS to deposit an oxide layer on the reactants, and then use an anisotropic dry etching process to form the above-mentioned spacer 14. The above-mentioned spacer 14 is used to promote-提升- This paper size uses Chinese National Standard (CNS) A4 specification (210X297 mm) IIIII ill Order I-II line (please read the notes on the back first to write this page) Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 404002 Λ7 B7 V. Description of the invention () Controllability of the roundness (corner runding) of the STI corner of the process. The silicon oxynitride layer, which is considered to have an adverse effect on the aforementioned process, can also be excessively etched in the gap wall. 〇 Ver etching is removed. Using the etched structure and the spacer 14 as the etching mask, a plurality of shallow trenches 16 are formed in the wafer 2 by dry etching technology. The invention can adopt cf4 + 〇2 的 电 莱 # 刻. As shown in Fig. 6, the oxide layer 8 and the spacer i * are removed separately. Generally, the oxide layer 8 and the ytterbium can be made of Ding or BOE. (buffer oxide etching) It is removed. Please note from the sixth figure that the opening edge of the trench is 18 tenths sharp. The next step is to sharpen it; the opening edge i S is passivated or rounded. In another preferred embodiment, a heat treatment process can be used to achieve The above purpose 'as shown in the seventh figure, the edge 20 of the trench opening has been rounded or purified. This heat treatment step is performed in an oxygen environment at a temperature of 11S (). C. Following the eighth figure, a Trench filling materials (such as oxides) are filled into trench I6 and formed on the gasification layer 6 for insulation and isolation. Trench filling materials can be formed by chemical vapor deposition or other suitable processes. -8- This paper applies to China National Standards (CNS) Λ4 specifications (----- IIIIII n II n II n II n cable (please read the note on the back 3 to write this page) 404002 A7 B7 0 0 5. Description of the invention (to make and form The preferred temperature range for the channel filling material M is about Celsius * to 600. . . Referring to Fig. 9, a chemical mechanical polishing (CMP) step is used to remove a portion of the channel filling material 22. Part of the pad is oxidized & * still remains on the surface of wafer 2. Nitride stone eve; | 6 is used as a pre-measurement to stop grinding. Refer to the tenth figure 'to remove nitridation with hot acetic acid ... Next, the wafer is immersed in the etching solution to remove the trench filling material 22 on the wafer 2 and remove the remaining tritium oxide I. "To form a trench insulation barrier with a passivated (rounded) opening edge. With- For a preferred embodiment, V is used or a BOE solution. The present invention is described above with a preferred embodiment, and is only used to help understand the implementation of the present invention, not to limit the spirit of the present invention, but to be familiar with this field. After comprehending the spirit of the present invention, the artist can replace it with some modifications and equivalents without departing from the spirit of the present invention. The scope of patent protection shall be the attached patent application park and its equivalent It depends on the field. ---------- ^ ------ 1T ------ ^ (Please read the notes on the back to fill out this page first) Staff Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs Printed-9 · This paper uses Chinese National Standard (CNS) A4 ^ grid (210X297 mm)