TW202538405A - In-situ process monitoring of photoresist using optical sensor - Google Patents

Abstract

An optical sensor system performs in-situ process monitoring of one or more photoresist processes. Photoresist processes may include deposition of photoresist, development, bevel edge and/or backside clean, bake, etch, and chamber clean operations. The optical sensor system may include a broadband light source and a spectral reflectometer. As the photoresist process proceeds, the optical sensor system provides incident light on a semiconductor substrate and receives reflected light. The spectral reflectometer measures an intensity of the reflected light over time, where changes in the intensity to the reflected light correlates with changes to a thickness or other material property of the photoresist over time, thereby monitoring a progress of the photoresist process and/or determining an endpoint of the photoresist process.

Description

In-situ process monitoring of photoresist using a photosensor

This disclosure relates to photoresist processing in semiconductor manufacturing, and more specifically, to in-situ process monitoring of photoresist processing in semiconductor manufacturing operations such as deposition, beveling and/or backside cleaning, baking, developing, chamber cleaning, and other photoresist-related operations.

For example, the fabrication of semiconductor components in integrated circuits involves a multi-step photolithography process. Generally, the process includes depositing material on a wafer and patterning the material using photolithography to form the structural features of the semiconductor components (e.g., transistors and circuits). Typical photolithography steps in this technology include: preparing a substrate; applying photoresist, for example by rotational coating; exposing the photoresist to light in the desired pattern, making the exposed areas of the photoresist more or less soluble in a developer solution; performing development by applying a developer solution to remove the exposed or unexposed areas of the photoresist; and subsequent processing to generate features on the substrate areas where the photoresist has been removed, such as by etching or material deposition.

The development of semiconductor design has created and has been driven by the need to form increasingly smaller features on semiconductor substrate materials. This technological advancement has been described in Moore's Law as the doubling of transistor density in densely integrated circuits every two years. Indeed, chip design and manufacturing have advanced to the point that modern microprocessors can contain billions of transistors and other circuit features on a single chip. Individual features on such chips can be on the order of 22 nanometers (nm) or smaller, and in some cases smaller than 10 nm.

One of the challenges in manufacturing devices with such small features is the ability to reliably and reproducibly produce photolithography masks with sufficient resolution. Current photolithography processes typically use 193 nm ultraviolet (UV) light to expose the photoresist. The wavelength of this light is significantly larger than the desired size of the feature (to be generated on the semiconductor substrate), which presents inherent problems. Achieving feature sizes smaller than the wavelength requires complex resolution enhancement techniques, such as multipatterning. Therefore, there is great interest and research focused on developing photolithography techniques using shorter wavelengths of light (e.g., extreme ultraviolet radiation (EUV)) with wavelengths from 10 nm to 15 nm (e.g., 13.5 nm).

However, EUV photolithography presents challenges, including low power output and light loss during patterning. Traditional organic chemical amplified photoresists (CARs) (similar to those used in 193 nm UV lithography) have potential drawbacks when used in EUV lithography, particularly due to their low absorption coefficient in the EUV region and the diffusion of photoactivated chemical species, which can lead to blurring or line edge roughness. Furthermore, the small feature sizes patterned in conventional CAR materials can result in high aspect ratios with a risk of pattern collapse in order to provide the etching resistance required for patterning the underlying element layers. Therefore, there is still a need for improved EUV photoresists with properties such as reduced thickness, higher absorption, and greater etching resistance.

The prior art presented herein serves to provide background information for this invention. The scope of the inventor's work described in this prior art section, as well as the implementation of prior art that was not worthy of application, are not directly or indirectly recognized as prior art that contradicts this invention.

This paper presents a method for monitoring a photoresist fabrication process on a semiconductor substrate. The method includes: performing a photoresist fabrication process in a process chamber, involving the semiconductor substrate having a metal-containing EUV photoresist material; exposing the semiconductor substrate to incident radiation using an optical sensor; and using the optical sensor to monitor the changes of the metal-containing EUV photoresist material on the semiconductor substrate in the process chamber over time.

In some embodiments, performing the photoresist process includes: depositing the metal-containing EUV photoresist material on the semiconductor substrate. In some embodiments, performing the photoresist process includes: baking the semiconductor substrate on which the metal-containing EUV photoresist material is formed. In some embodiments, performing the photoresist process includes: developing the metal-containing EUV photoresist material formed on the semiconductor substrate. In some embodiments, monitoring the change of the metal-containing EUV photoresist material over time includes: receiving reflected radiation in the process chamber at an optical sensor; and measuring the intensity of the reflected radiation, wherein the change of the intensity of the reflected radiation over time is used to determine the progress of the photoresist process. In some embodiments, the change in the intensity of the reflected radiation is related to a change in the thickness of the metal-containing EUV photoresist material. In some embodiments, the method further includes determining the end point of the photoresist fabrication process by determining that the intensity of the reflected radiation reaches a threshold. In some embodiments, the optical sensor includes a spectroreflectometer. In some embodiments, the optical sensor includes a broadband light source. In some embodiments, the broadband light source is configured to radiate radiation in a broadband range of wavelengths between approximately 200 nm and approximately 900 nm. In some embodiments, the incident radiation is provided perpendicular to the surface of the semiconductor substrate. In some embodiments, the metal-containing EUV photoresist material includes organotin oxide. In some embodiments, the method further includes using a Fourier transform infrared (FTIR) spectrometer or an ultraviolet (UV) spectrometer to detect changes in functional groups on the semiconductor substrate during the photoresist fabrication process. In some embodiments, the incident radiation is provided via optical coupling to a window of the process chamber. In some embodiments, the method further includes heating the window to limit the deposition or condensation of byproducts or other materials on the window. In some embodiments, the window is configured to block the transmission of UV radiation into the process chamber. In some embodiments, the method further includes flowing one or more nonreactive gases in an area adjacent to the window to limit the deposition or condensation of byproducts or other materials on the window. In some embodiments, the method further includes exposing the window to plasma in the process chamber to perform in-situ cleaning of the material formed on the window. In some embodiments, using the optical sensor to monitor the change of the metal-containing EUV photoresist material includes using a first optical sensor to monitor the change of the metal-containing EUV photoresist material at a first location on the semiconductor substrate over time; and using a second optical sensor to monitor the change of the metal-containing EUV photoresist material at a second location on the semiconductor substrate over time. In some embodiments, the first location corresponds to the center of the semiconductor substrate, and the second location corresponds to the edge of the semiconductor substrate. In some implementations, the optical sensor is integrated with a spray head in the process chamber.

This paper also proposes an apparatus for performing a photoresist fabrication process. The apparatus includes: a process chamber having a substrate support configured to support a semiconductor substrate; a vacuum line coupled to the process chamber; a gas line coupled to the process chamber; one or more photosensors optically coupled to the process chamber; and a controller configured with a plurality of instructions for performing the following operation: performing a photoresist fabrication process in the process chamber, wherein the photoresist fabrication process includes depositing a metal-containing EUV photoresist material onto the semiconductor substrate. The semiconductor substrate on which the metal-containing EUV photoresist material is formed is baked, or the metal-containing EUV photoresist material formed on the semiconductor substrate is developed; the semiconductor substrate is exposed to incident radiation using an optical sensor; and the progress of the photoresist process is determined by monitoring the change of the metal-containing EUV photoresist material on the semiconductor substrate over time using one or more optical sensors.

In some embodiments, each of the one or more optical sensors includes a spectroreflectometer and a broadband light source. In some embodiments, the controller configured with a plurality of instructions for determining the progress of the photoresist process is configured with a plurality of instructions to perform the following operations: receiving reflected radiation in the process chamber at the one or more optical sensors; and measuring the intensity of the reflected radiation, wherein the change in the intensity of the reflected radiation over time is used to determine the progress of the photoresist process. In some embodiments, the controller is further configured with a plurality of instructions to perform the following operation: determining the end point of the photoresist process by determining that the intensity of the reflected radiation has reached a threshold. In some embodiments, the metal-containing EUV photoresist material includes organotin oxide. In some embodiments, the apparatus further includes a window optically coupled to the process chamber, through which the incident radiation is emitted into the process chamber. In some embodiments, the controller is further configured with a plurality of instructions to perform the following operations: heating the window to limit the deposition or condensation of by-products or other materials on the window. In some embodiments, the controller is further configured with a plurality of instructions to perform the following operations: flowing one or more non-reactive gases in an area adjacent to the window to limit the deposition or condensation of by-products or other materials on the window. In some embodiments, the one or more optical sensors include: a first optical sensor configured to monitor changes in the metal-containing EUV photoresist material at a first location on the semiconductor substrate; and a second optical sensor configured to monitor changes in the metal-containing EUV photoresist material at a second location on the semiconductor substrate.

Definition

The term "inert gas" generally refers to a gaseous material that does not react with other chemicals in the processing chamber during substrate processing. Exemplary inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe), as well as nitrogen ( _N2 ) in some processes.

The term "plasma" generally refers to a gas containing cations, free radicals, and free electrons. The term "in-situ plasma" generally refers to plasma formed at a processing station within a processing chamber. The term "remote plasma" generally refers to plasma formed at a location remote from a processing station within a processing chamber.

The term "plasma generator" generally refers to a combination of components that can be used to form plasma. Exemplary components include a radio frequency power source, an impedance matching network, and one or more electrodes.

The term "precursor" typically refers to a chemical substance adsorbed onto the substrate surface during ALD or CVD processes. The precursor reacts with reactants to convert the adsorbed precursor into a film.

The term "process chamber" or "processing chamber" generally refers to a housing in which chemical and/or physical processes are performed on a substrate. The pressure, substrate temperature, and gas composition within the process chamber can be controlled to perform chemical and/or physical processes.

The term "processing equipment" can generally refer to a processing chamber and a machine configured to enable processing to be performed within the processing chamber.

The term "processing station" usually refers to the location of the substrate within the processing chamber during processing.

The term "reactant" generally refers to the chemical species that reacts with precursors adsorbed onto the substrate surface in ALD or CVD processes to form a film. In various processes, the reaction between reactants and precursors can be promoted by heat and/or plasma.

When used herein, the term "semiconductor substrate" means a substrate at any stage of semiconductor device fabrication that contains semiconductor material throughout its structure. It should be understood that the semiconductor material within the semiconductor substrate does not need to be exposed. An example of a semiconductor substrate is a semiconductor wafer having multiple layers covering the semiconductor material with other materials (e.g., dielectrics). The following detailed description assumes that the disclosed embodiments are implemented on a semiconductor wafer, such as a 200 mm, 300 mm, or 450 mm semiconductor wafer. However, the disclosed embodiments are not limited to these. Workpieces can have various shapes, sizes, and materials. Besides semiconductor wafers, other workpieces that can utilize the disclosed embodiments include various products, such as printed circuit boards.

The embodiments disclosed below relate to substrates, such as wafers, semiconductor substrates, or other workpieces. Workpieces can have various shapes, sizes, and materials. In this context, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer at any stage of the many stages of integrated circuit manufacturing. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. Unless otherwise stated, the process details described herein (e.g., flow rate, power level, etc.) relate to a 300 mm diameter substrate or a process chamber used for a 300 mm diameter substrate and are scalable to fit substrates or chambers of other sizes. Other workpieces that can be used in addition to semiconductor wafers include various objects such as printed circuit boards, etc., in addition to the embodiments disclosed herein. The processes and equipment described can be used to manufacture semiconductor devices, displays, LEDs, photovoltaic panels, etc.

When used herein, the term "photoresist" and its derivatives refer to a photosensitive material used in processes (e.g., photolithography, photoetching, or photolithography) to form a patterned coating on a surface. When a photoresist material is exposed to light of certain wavelengths, its solubility relative to wet developing chemicals or its etching selectivity relative to dry developing chemicals changes.

For the purposes of this disclosure, the term "metal" as used in the context should be understood to mean a conductor having a strength of 500 microohms per centimeter, including metals and conductive metal salts, especially conductive metal nitrides such as TiN.

When used herein, "containing metal photoresist" includes, but is not limited to, metal photoresist, metal-like photoresist, metal oxide photoresist, or organometal oxide photoresist.

In this document, "tin oxide" is defined as including any and all stoichiometric possibilities of Sn _x O _y , including both integer and non-integer values of x and y. For example, "tin oxide" includes compounds having the formula SnO _n , where 1 < n < 2, and n can be an integer or a non-integer value. "Tin oxide" can include substoichiometric compounds, such as SnO _1.8 . "Tin oxide" also includes tin dioxide (SnO ₂ or tin oxide (IV)) and tin monoxide (SnO or tin oxide (II)). "Tin oxide" also includes both natural and synthetic variants, and includes any and all crystalline and molecular structures. "Tin oxide" also includes amorphous tin oxides.

When used in this text, the phrase "at least one of A, B and C" should be interpreted as indicating logic using the non-exclusive logic "or" (A or B or C), and should not be interpreted as indicating "at least one of A, at least one of B, and at least one of C".

When used herein, the word "about" is understood to mean taking into account small increases and/or decreases beyond a specified value that will not significantly affect the expected function of the parameter beyond the specified value. In some cases, "about" includes +/- 10% of any specified value. When used herein, this term modifies any specified value, range of values, or endpoints of one or more ranges.

When used in this document, the terms "top,""bottom,""above,""below,""above," and "below" are used to provide relative relationships between structures. The use of these terms does not imply or require that a particular structure must be located in a specific position within the device. Introduction

This disclosure generally pertains to the field of semiconductor processing. In a specific instance, this disclosure pertains to processes and equipment used for processing photoresists (e.g., EUV-sensitive photoresists containing metals and/or metal oxides). Such photoresist processing may involve the deposition of photoresist material, beveling and/or back-side cleaning of photoresist material, baking of photoresist material, development of photoresist material, or processing of photoresist material. Although the following discussion may focus on EUV photoresists, it is evident that the photoresists discussed herein are also applicable to radiation of other wavelengths, and the techniques and equipment discussed herein are not limited to EUV photoresist manufacturing.

In semiconductor manufacturing, patterning of thin films during semiconductor processing is often an important step. Patterning involves photolithography. In conventional photolithography techniques (e.g., 193 nm photolithography), the pattern is printed by emitting photons from a photon source onto a mask and printing the pattern onto a photosensitive photoresist, thereby inducing a chemical reaction in the photoresist, and then removing portions of the photoresist after development to form the pattern. The patterned and developed photoresist film can then be used as an etching mask to transfer the pattern to an underlying film composed of metals, oxides, etc.

Advanced technology nodes (as defined in the International Semiconductor Technology Roadmap) include 22 nm, 16 nm, and others. At the 16 nm node, for example, the width of a typical interface window or line in an embedded structure is typically no more than about 30 nm. The scaling of features on advanced semiconductor integrated circuits (ICs) and other components drives lithography to improve resolution.

Extreme ultraviolet (EUV) lithography extends lithography by moving to imaging source wavelengths smaller than those achievable with conventional optical lithography methods. EUV sources with wavelengths of approximately 10–20 nm or 11–14 nm (e.g., 13.5 nm) can be used in advanced lithography tools (also known as scanners). EUV radiation is strongly absorbed in many solid and fluid materials, including quartz and water vapor, and therefore can be operated in a vacuum.

EUV lithography uses EUV photoresist, which is patterned to form a mask for etching underlying layers. EUV photoresist can be polymer-based chemically amplified photoresist (CAR), produced by liquid-based spin coating. An alternative to CAR is a directly photopatternable metal oxide film, available for example from Inpria, Corvallis, OR, and described in, for example, U.S. Patent Publications US 2017/0102612, US 2016/021660, and US 2016/0116839, which are incorporated herein by reference, at least because they disclose photopatternable metal oxide films. Such films can be produced by spin coating or dry vapor deposition. Metal oxide films can be directly patterned in a vacuum environment by EUV exposure (i.e., without using a separate photoresist), providing a patterning resolution of less than 30 nm. For example, U.S. Patent No. 9,996,004, entitled "EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARDMASKS", published on June 12, 2018, and/or PCT/US2019/31618, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS", filed on May 9, 2019, which disclose at least the composition, deposition, and patterning of directly photopatternable metal oxide films to form EUV photoresist masks, and are incorporated herein by reference. Typically, patterning involves exposing EUV photoresist to EUV radiation to form a light pattern in the photoresist, and then removing a portion of the photoresist according to the light pattern by developing the photoresist to form a mask.

It should also be understood that although this disclosure relates to lithography techniques and materials, exemplified by EUV lithography, it is also applicable to other next-generation lithography technologies. Besides EUV (including the standard 13.5 nm EUV wavelength currently in use and under development), the radiation sources most relevant to such lithography are DUV (deep ultraviolet), generally referring to the use of 248 nm or 193 nm excimer laser sources; X-rays, which in turn include EUV in the lower energy range of the X-ray range; and electron beams, which may cover a wide energy range. Specific methods may depend on the particular materials and applications used in the semiconductor substrate and the final semiconductor device. Therefore, the methods described in this application are merely examples of methods and materials applicable to the present technology.

Directly photo-patternable EUV or DUV photoresists can be composed of, or contain, metals and/or metal oxides mixed within an organic composition. The metals/metal oxides can enhance EUV or DUV absorption, generate secondary electrons, and/or exhibit increased etch selectivity for underlying film stacks and device layers. These photoresists can be developed using a wet (solvent) process, which requires moving the wafer to a track, exposing it to a developing solvent, drying, and then baking. Such photoresists can also be developed using a dry process, or a combination of wet and dry processes.

Generally, patterning involves exposing an EUV photoresist to EUV radiation to form a light pattern within the photoresist, followed by development to remove a portion of the photoresist according to the light pattern to form a mask. By controlling the solubility or reactivity of the chemicals and/or developer in the photoresist, the photoresist can be used as either a positive or negative photoresist. It is advantageous to have EUV or DUV photoresists that can function as either negative or positive photoresists.

In semiconductor device manufacturing, monitoring and tracking the semiconductor manufacturing process is crucial. Typically, semiconductor manufacturing processes involve the deposition, processing, or removal of certain materials. One important step in these processes is triggering a process when specific conditions are met. Another important step is terminating a process when specific conditions are met, such as reaching a target thickness or a change in material properties. The technique for determining when a process should be terminated is called "endpoint detection." Endpoint detectors can terminate a process in response to signals indicating that target conditions have been met.

Real-time process monitoring and endpoint detection provide crucial control in photolithography. Various photolithography operations or photoresist processing involve photoresist deposition, beveling and/or backside cleaning, baking, and development. Without accurate monitoring and endpoint detection, the photoresist process cannot proceed fully or excessively. This can lead to defective wafers, increased ownership costs, and time losses. For example, underdevelopment can result in an excessively large line critical dimension (line CD), while overdevelopment can result in an excessively small line critical dimension (line CD). Ex-situ process monitoring can be problematic because the wafer must be removed from the tooling for analysis. This results in a large amount of wafers being wasted and a large number of experiments being conducted to analyze the wafers, further increasing processing time and costs.

Optical emission spectroscopy (OES) is commonly used for end-point control in various semiconductor manufacturing processes. Volatile atoms from a sample are brought to a high-energy state in a discharge plasma. The excited atoms and ions in the discharge plasma produce unique emission spectra characteristic of each element. Optical emission spectroscopy monitors the emission intensity of light at predetermined wavelengths in real time. This method can identify wavelengths corresponding to chemical species present in the semiconductor process, such as volatile byproducts or reactive substances in the discharge plasma. Analysis of the generated signals detects significant changes in emission intensity, which can be correlated with the completion of the semiconductor process. For example, when the film interface is reached during the etching process, the emission species associated with film etching will decrease (in the case of volatile byproducts) or increase (in the case of reactive species).

Conventional endpoint detection systems (e.g., OES) may rely on plasma to monitor changes in the semiconductor substrate over time. However, OES may not be suitable for photoresist fabrication processes, where plasma exposure can damage the photoresist material. For photoresist materials, especially EUV photoresist materials, alternative monitoring and endpoint detection technologies are needed. In-situ process monitoring of photoresist fabrication is crucial .

This disclosure presents in-situ process monitoring and endpoint detection for photoresist fabrication using an optical sensor. The optical sensor may include a spectroreflectometer. The optical sensor may further include a light source, such as a broadband light source. This optical technique can be applied to photoresist deposition, beveling and/or backside cleaning, post-application baking, post-exposure baking, development, or chamber cleaning operations. In some embodiments, this optical technique is an in-situ technique performed in the same chamber as the photoresist fabrication process. Incident light is provided to the semiconductor substrate, and the reflected light is received by a spectroreflectometer. The progress of the photoresist fabrication process is determined based on changes in the intensity of the reflected light, which are related to changes in the thickness of the photoresist or other material properties. In some implementations, photoresist materials include metal-containing EUV photoresist materials.

Figure 1 presents a flowchart of the steps of a conventional method for deposition, development, and photoresist treatment. The operations of treatment 100 can be performed in different sequences and/or with different, fewer, or additional operations. One or more operations of treatment 100 can be performed using the apparatus described in any of Figures 4 and 9-12. In some embodiments, the operations of treatment 100 can be performed at least in part based on software stored in one or more non-transient computer-readable media. In some embodiments, dry chamber cleaning can be performed after deposition, bevel and/or backside cleaning, post-baking, exposure, post-exposure baking, dry development, or dry development followed by baking.

At block 102 of process 100, a photoresist layer is deposited. This can be a dry deposition process (e.g., vapor deposition) or a wet process (e.g., spin deposition). In one embodiment, the metal precursor can be deposited in solution using a liquid-based spin coating technique. In another embodiment, the metal precursor can be deposited in gaseous form using a dry technique (e.g., chemical vapor deposition). Although this disclosure often shows the metal precursor as a tin-containing precursor, other metal atoms may be used.

The photoresist can be a metal-containing EUV photoresist. EUV-sensitive metal-containing or metal oxide films can be deposited on semiconductor substrates using any suitable technique, including wet (e.g., spin coating) or dry (e.g., CVD) deposition techniques. For example, the aforementioned treatment has been proven effective for organotin oxide-based EUV photoresist compositions, suitable for both commercially available spin-coated formulations (e.g., available from Inpria Corp, Corvallis, OR) and formulations coated using dry vacuum deposition techniques, as further described below.

Semiconductor substrates may comprise any material composition suitable for photolithography, particularly for the fabrication of integrated circuits and other semiconductor devices. In some embodiments, the semiconductor substrate is a silicon wafer. The semiconductor substrate may be a silicon wafer on which features (“below features”) have already been formed, having an irregular surface morphology. As described herein, the “surface” of the substrate is the surface on which the film of the present disclosure is to be deposited, or the surface to be exposed to EUV during processing. The below features may include areas where material has been removed (e.g., by etching) during processing prior to implementing the methods of the present disclosure, or areas where material has been added (e.g., by deposition). Such prior processing may include the methods of the present disclosure, or other processing methods in iterative processing for forming two or more layers of features on a substrate.

In some embodiments, the membrane is a radiation-sensitive membrane (e.g., an EUV-sensitive membrane). This membrane can then serve as an EUV photoblock, as further described herein. In certain embodiments, the layer or membrane may include one or more ligands (e.g., EUV-unstable ligands) that can be removed, cleaved, or crosslinked by radiation (e.g., EUV or DUV radiation).

The precursor may provide a radiation-sensitive, patternable membrane (or a patterned radiation-sensitive membrane or a photo-patternable membrane). Such radiation may include EUV radiation, DUV radiation, or UV radiation provided by irradiation through a patterned shield, thereby becoming patterned radiation. The membrane itself may be altered by exposure to such radiation, making the membrane radiation-sensitive or photosensitive. In a particular embodiment, the precursor is an organometallic compound containing at least one metal center.

Precursors may have any useful number and type of ligands. In some embodiments, the ligands are characterized by their ability to react in the presence of the relative reactant or in the presence of patterned radiation. For example, a precursor may include ligands that react with the relative reactant, which may introduce linkages (e.g., -O- linkages) between metal centers. In another case, a precursor may include ligands that are eliminated in the presence of patterned radiation.

Precursors may include metals or metalloids or atoms having a highly patterned radiation absorption cross section (e.g., an EUV absorption cross section equal to or greater than 1 x ^{10⁷ cm²} /mol). In some embodiments, M is tin (Sn), bismuth (Bi), tellurium (Te), cesium (Cs), antimony (Sb), indium (In), molybdenum (Mo), iron (Hf), iodine (I), zirconium (Zr), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), silver (Ag), platinum (Pt), and lead (Pb).

In certain embodiments, the precursor includes tin. Non-limiting tin precursors include _SnF₂ , _SnH₄ , _SnBr₄ , _SnCl₄ , _SnI₄ , tetramethyltin ( _SnMe₄ ), tetraethyltin ( _SnEt₄ ), trimethyltin chloride (SnMe₃Cl), dimethyltin dichloride ( _SnMe₂Cl₂ ), methyltin trichloride ( _SnMeCl₃ ), tetraallyltin, tetravinyltin, hexaphenylditin(IV) ( _Ph₃Sn - _SnPh₃ , where Ph is phenyl), dibutyldiphenyltin ( _SnBu₂Ph₂ ), trimethyl( _{phenyl ) tin} ( _SnMe₃Ph ), trimethyl(phenylethynyl)tin, tricyclohexyltin hydroxide, and tributyltin hydroxide (SnBu₃ ₎ . H), dibutyltin diacetate (SnBu ₂ (CH ₃ COO) ₂ ), acetoacetone tin(II) (Sn(acac) ₂ ), tributyltin ethanol (SnBu ₃ (OEt)), dibutyltin dimethylethanol (SnBu ₂ (OMe) ₂ ), tributyltin methanol (SnBu ₃ (OMe)), tert-butanol tin(IV) (Sn( t -BuO) ₄ ), tributanol n-butyltin (Sn( n -Bu)( t -BuO) ₃ ), tetra(dimethylamino)tin (Sn(NMe ₂ ) ₄ ), tetra(ethylmethylamino)tin (Sn(NMeEt) ₄ ), tetra(diethylamino)tin(IV) (Sn(NEt ₂ ) ₄ ) _Sn (Me)3(NMe2) (dimethylamino)trimethyltin(IV) (Sn(Me) ₃ ( _NMe2 )), Sn( i -Pr)(NMe2) ₃ , Sn( n -Bu)(NMe2) ₃ , Sn( s - _Bu )( _NMe2 ) ₃ , Sn( i -Bu)(NMe2) ₃ , _Sn ( t - _Bu )( _NMe2 ) ₃ , Sn( t -Bu) ₂ (NMe2) ₂ , Sn( t - _Bu )(NEt2) ₃ , Sn(tbba), Sn(II)(1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-( 4R ,5R ) ()-1,3,2-diazastan-2-yl), or bis[bis(trimethylsilyl)amino]tin (Sn[N(SiMe ₃ ) ₂ ] ₂ ).

Exemplary deposition techniques (e.g., for membranes) include any of those described herein, such as ALD (e.g., thermal ALD and plasma-enhanced ALD), spin deposition, PVD including PVD co-sputtering, CVD (e.g., PE-CVD or LP-CVD), sputtering deposition, electron beam deposition including electron beam co-evaporation, or combinations thereof, such as discontinuous ALD-like processes, wherein the precursor and the corresponding reactant are separated in time or space.

Further description of the deposition as a precursor and method applicable to the EUV photoresist film disclosed herein can be found in International Application No. PCT/US19/31618, disclosed in International Publication No. WO 2019/217749, filed on May 9, 2019, and entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS". In addition to the precursor and the corresponding reactant, the film may also include selective materials to modify the chemical or physical properties of the film, such as modifying the film's sensitivity to EUV or enhancing its etching resistance. Such selective materials can be introduced, for example, by doping before deposition on the substrate, during deposition on the substrate, and/or during vapor phase formation after film deposition. In some embodiments, a mild distal _H₂ plasma can be introduced to, for example, replace some Sn-L bonds with Sn-H, which can increase the photoresistivity under EUV. In other embodiments, _CO₂ can be introduced to replace some Sn-O bonds with Sn- _CO₃ bonds, which can be more resistant to wet development.

Various atoms present in the precursor and/or the corresponding reactant can be provided within the capping layer, which in turn is disposed on any useful layer or structure. The capping layer can have any useful thickness (e.g., any thickness described herein, including from about 0.1 nm to about 5 nm).

Furthermore, two or more different precursors may be used within each layer (e.g., a film or capping layer). For example, two or more of any metal-containing precursors described herein may be used to form an alloy. Other exemplary EUV-sensitive materials and treatment methods and apparatus are described in U.S. Patent No. 9,996,004, International Patent Publication WO 2020/102085, and International Patent Publication WO 2019/217749, the entire contents of each of which are incorporated herein by reference and for all purposes.

At block 104, an optional cleaning process is performed to clean the back side and/or bevel of the semiconductor substrate. Alternatively, edge beads of photoresist deposited in a previous step can be removed. The removal process may include processing the wafer using a wet metal oxide (MeOx) edge bead removal (EBR) step. Back side and/or bevel cleaning can non-selectively etch the EUV photoresist film to uniformly remove films with different degrees of oxidation or cross-linking on the back side and bevel of the substrate. During the application of the EUV patternable film (via wet or dry deposition), some undesirable photoresist material may deposit on the substrate bevel and/or back side. Unintended deposition can lead to unwanted particles subsequently migrating to the top surface of the semiconductor substrate and becoming particulate defects. Furthermore, bevel and backside deposition can cause downstream processing problems, including contamination of patterning (scanner) and developing tools. Traditionally, bevel and backside deposits are removed using wet cleaning techniques. For spin-coated photoresist materials, this process is called edge bead removal, which is performed by guiding solvent flow from above and below the bevel while the substrate is rotated. The same process can be applied to soluble organotin oxide-based photoresists deposited using vapor deposition techniques.

The cleaning of the substrate bevel and/or back side can also be a dry cleaning process. In some embodiments, the dry cleaning process involves vapors and/or plasmas containing one or more of the following gases: HBr, HCl, _BCl3 , SOCl2, _Cl2 , _BBr3 , _H2 , _O2 , _PCl3 , _CH4 , methanol, ammonia, formic acid, _NF3 , and HF. In some embodiments, the dry cleaning process can use the same chemicals as those used in the dry developing process described _herein . For example, hydrogen halide developing chemicals can be used for bevel and/or back side cleaning. For bevel and/or backside cleaning, vapor and/or plasma must be confined to specific areas of the substrate to ensure that only the backside and bevel are removed, without any film degradation on the front side of the substrate. Bevel and/or backside cleaning can be performed using Coronus® tools available from Lam Research Corporation, Fremont, CA, but a wider range of treatment conditions can be used depending on the capabilities of the processing reactor.

Beveling and/or backside cleaning can alternatively extend to complete photoresist removal or photoresist "rework," in which the applied EUV photoresist is removed and the substrate is ready for photoresist recoating, for example, when the original photoresist is damaged or otherwise defective. Photoresist rework should be performed without damaging the underlying semiconductor substrate, therefore oxygen-based etching should be avoided. Alternatively, organic vapor chemicals or variants containing halogenated chemicals can be used. It should be understood that photoresist rework operations can be applied at any stage during processing 100. Therefore, photoresist rework operations can be applied after deposition, after beveling and/or backside cleaning, after PAB treatment, after EUV exposure, after PEB treatment, after development, or after hard baking. In some implementations, photoresist reprocessing can be performed to non-selectively remove exposed and unexposed areas of the photoresist, but selectively on the underlying layers.

At block 106 of process 100, after photoresist deposition and before EUV exposure, optional post-application baking (PAB) is performed. This treatment improves the etching resistance of the unexposed material to aqueous or non-aqueous solutions. In one case, such treatment may enhance the chemical composition difference (or contrast) between unexposed and exposed areas, thus requiring PAB. In another case, such treatment may reduce the chemical composition difference (or contrast) between unexposed and exposed areas, thus eliminating the need for PAB. In yet another case, PAB is used to remove residual moisture from the layer to form a cured photoresist film. PAB may involve combinations of heat treatment, chemical exposure, and/or moisture to increase the EUV sensitivity of the membrane, thereby reducing the amount of EUV agent required to form patterns within the membrane. In certain embodiments, the PAB step is performed at a temperature greater than about 100°C, or at a temperature between about 100°C and about 200°C, or between about 100°C and about 250°C. In other embodiments, the PAB step is performed at a temperature between about 190°C and about 350°C in the absence of oxygen-containing gas. In another embodiment, the post-treatment includes exposing the membrane to an inert gas or _CO2 , which may optionally include cooling or heating. The use of an inert gas provides metal-oxygen-metal species, and the use of _CO2 provides metal carbonate species within the membrane.

At block 108 of process 100, the film is exposed to EUV radiation to form a pattern. Generally, EUV exposure causes a change in the chemical composition of the film, creating an etch-selective contrast that can be used to remove a portion of the film. Such a contrast provides positive photoresist. However, it should be understood that EUV exposure can alternatively create a contrast that allows unexposed areas to be selectively removed. Such a contrast provides negative photoresist, as described herein. EUV exposure may include, for example, exposure in a vacuum environment with wavelengths in the range of about 10 nm to about 20 nm (e.g., about 13.5 nm in a vacuum environment).

Not limited to the mechanism, function, or application of this technology, EUV exposure (e.g., at doses from 10 mJ/ ^cm² to 100 mJ/ ^cm² ) causes Sn-C bond breakage, thereby losing alkyl substituents, reducing steric hindrance, and causing low-density films to collapse. Furthermore, reactive metal-H bonds generated in the β-hydrogen elimination reaction can react with adjacent active groups (e.g., hydroxyl groups) in the film, leading to further crosslinking and densification, and creating a chemical contrast between exposed and unexposed areas. After exposing the photoresist to EUV light, a photopatterned EUV photoresist is provided. The photopatterned metal-containing EUV photoresist includes both EUV-exposed and unexposed areas.

At block 110 of process 100, post-exposure baking (PEB) is performed on the exposed film to further remove residual moisture, promote chemical condensation within the film, or increase the contrast of etching selectivity of the exposed film; or to perform post-treatment of the film in any useful way. In one case, such treatment may reduce the difference (or contrast) in chemical composition between unexposed and exposed areas, so the PEB operation is not performed. In another case, the exposed film may be heat-treated (e.g., at low temperatures and/or optionally in the presence of various chemicals) to promote reactivity in the EUV-exposed or non-EUV-exposed portions of the photoresist upon exposure to a stripper or a positive-tone developer (e.g., a halogen-based aqueous acid, such as HCl, HBr, HI, or combinations thereof). In yet another case, the exposed film may be heat-treated (e.g., at low temperatures) to further cross-link the ligands in the non-EUV-exposed portions of the photoresist, thereby providing EUV-exposed portions that can be selectively removed upon exposure to a stripper (e.g., a positive-tone developer). In yet another case, PEB is omitted.

At block 112 of process 100, a photoresist pattern is developed using positive-tone or negative-tone development to form a photoresist mask. In various embodiments, exposed areas are removed (positive-tone), or unexposed areas are removed (negative-tone). In some embodiments, development can be performed with exposure to etching gases, including halogen-containing chemicals. In some embodiments, development can be performed without igniting the plasma. Alternatively, development can be performed with the flow of one or more halogen-containing etching gases activated in a remote plasma source or activated by exposure to remote UV radiation. Photoresists used for developing can include elements selected from the group consisting of tin, iron, tellurium, bismuth, indium, antimony, iodine, and germanium. These elements can have a highly patterned radiation absorption cross-section. In some embodiments, the element can have a high EUV absorption cross-section. In some embodiments, metal-containing EUV photoresists can have a total absorption rate greater than 30%. In all-dry lithography processes, this provides more efficient utilization of EUV photons, enabling the development of thicker and less opaque EUV photoresists.

In certain embodiments, the developing step is a wet process applied to tin-based membranes. In other embodiments, the developing step is a dry process applied to tin-based membranes. For example, the dry process includes halogenated chemicals.

After block 112, a post-visualization check can be performed. If necessary, a rework can be performed by going back to repeat block 102.

At block 114 of process 100, the photoresist undergoes treatment before pattern transfer. Treatment may include heat treatment, plasma treatment, chemical treatment, selective deposition treatment, or a combination of the above. Heat treatment exposes the photoresist to elevated temperatures between approximately 200°C and approximately 300°C to reduce defect rate and LWR. Plasma treatment exposes the photoresist to a plasma, such as a direct (in-situ) plasma or a remote plasma, to densify the photoresist and reduce LWR. Chemical treatment exposes the photoresist to reactive chemicals, such as halogen-based species (e.g., tungsten hexafluoride) or carbon-containing precursors (e.g., carbon monoxide, metal organic precursors), to improve etch resistance, reduce outgassing, and increase line CD. Selective deposition processing exposes photoresist to chemical precursors to selectively deposit protective coatings on the photoresist, reducing DtS, improving etch resistance, reducing gas release, and increasing line CD. Performing one or more of these processing steps on the photoresist after development improves its performance during pattern transfer.

At block 116 of process 100, a photoresist mask is used to etch one or more substrate layers for pattern transfer. These substrate layers are located beneath the photoresist mask and can be removed by photolithography. Pattern transfer etching etches material to a desired depth to form a plurality of patterned features. In some embodiments, one or more substrate layers may include amorphous carbon (aC), amorphous silicon (a-Si), tin oxide (e.g., SnO _x ), silicon oxide (e.g., SiO ₂ ), silicon nitride (e.g., SiO _x N _y ), silicon carbide (e.g., SiO _{x Cy} ), silicon nitride (e.g., Si ₃ N ₄ ), titanium oxide (e.g., TiO ₂ ), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W doped C), tungsten oxide (e.g., WO _x ), iron oxide (e.g., HfO ₂ ), zirconium oxide (e.g., ZrO ₂ ), and aluminum oxide (e.g., Al ₂ O ₃ ). During pattern transfer etching, any defects or CD variations in the photoresist mask will be replicated into the material being patterned. Furthermore, poor etching resistance during the etching process can adversely affect the pattern transfer to the underlying substrate layer. Post-development processing of the photoresist mask mitigates these problems to ensure successful pattern transfer during pattern transfer etching.

After the pattern is transferred, an etched inspection can be performed. If necessary, block 102 can be reworked by returning to it.

According to some implementation examples, Figures 2A-2C present cross-sectional schematic diagrams of different processing stages, including photoresist development and pattern transfer. As shown in Figure 2A, wafer 200 includes substrate 202 and substrate layer 204 to be etched. The patterned structure can include any useful substrate. For example, a substrate surface with a desired material can be fabricated on the wafer to which the photoresist pattern is transferred. Although the choice of material may vary depending on the integration, it is generally desirable to choose a material that can be etched with high selectivity (i.e., much faster) for EUV photoresist or imaging layers.

In some embodiments, the substrate is a hard mask used in the photolithography etching of the underlying semiconductor material. The hard mask may include any of a variety of materials, including amorphous carbon (aC), tin oxide (e.g., SnO _x ), silicon oxide (e.g., SiO _x , including SiO ₂ ), silicon nitride (e.g., SiO _x N _y ), silicon carbide (e.g., SiO _{x Cy} ), silicon nitride (e.g., Si ₃ N ₄ ), titanium oxide (e.g., TiO ₂ ), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W doped carbon), tungsten oxide (e.g., WO _x ), iron oxide (e.g., HfO ₂ ), zirconium oxide (e.g., ZrO ₂ ), and aluminum oxide (e.g., Al ₂ O ₃ ). Suitable substrate materials may include various carbon-based _films (e.g., ashingable hard mask (AHM)), silicon-based films (e.g., SiO_{_x}, SiC_x , SiO_{_x}C_y, SiO _x _N _{_y}, _SiO _xC_yN_{_z} , a-Si:H, polycrystalline silicon, or SiN), or any other (usually sacrificial) films used to facilitate patterning processes. For example, the substrate may preferably comprise SnO_{_x} , such as SnO_₂. In various embodiments, the thickness of the layer may be from 1 nm to 100 nm, or from 2 nm to 10 nm.

In some embodiments, substrate layer 204 includes an ashedable hard mask (e.g., amorphous carbon, spin-coated carbon) or other materials (e.g., silicon, silicon oxide, silicon nitride, silicon carbide, etc.). In some embodiments, substrate layer 204 may be a stack disposed on substrate 202. Wafer 200 further includes a photo-patterned metal-containing EUV photoresist film 206. For example, the photo-patterned metal-containing EUV photoresist film 206 may be an organometallic layer disposed on substrate layer 204 to be etched. The photo-patterned metal-containing EUV photoresist film 206 may have a thickness between about 5 nm and about 50 nm, or between about 10 nm and about 30 nm. After photopatterning in an EUV scanner and/or after PEB processing, a photopatterned metal-containing EUV photoresist film 206 can be provided in the process chamber. The photopatterned metal-containing EUV photoresist film 206 includes an unexposed EUV area 206a and an EUV exposed area 206b.

As shown in Figure 2B, during the developing process, the unexposed EUV-exposed area 206a of the photopatterned metal EUV photoresist film 206 is removed. Developing can be performed using wet or dry developing chemicals. When using dry developing chemicals, dry developing can be performed with or without igniting the plasma. In some embodiments, dry developing chemicals may include halogen-containing chemicals. After developing by removing the unexposed EUV-exposed area 206a, a photoresist mask of the photopatterned metal EUV photoresist film 206 is formed. Although Figures 2A-2C depict negative-tone developing, it should be understood that positive-tone developing can alternatively be used in this disclosure.

As shown in Figure 2C, a photoresist mask 208 is used to etch the substrate layer 204 to form recessed features defined by the photoresist mask 208 in the wafer 200. The wafer 200 undergoes pattern transfer etching, in which the etchant selectively removes the substrate layer 204 relative to the chemically modified photoresist mask 208. Pattern transfer etching can be performed using dry etching or wet etching. For example, dry etching can be performed using a fluorine-based plasma etching process or an oxygen-based plasma etching process. Pattern transfer etching can etch through the substrate layer 204 according to the pattern defined by the photoresist mask 208. In some embodiments, after pattern transfer etching, the photoresist mask 208 maintains, or at least substantially maintains, the increased line CD.

Optical emission spectroscopy has been integrated into plasma etching chambers for real-time detection and monitoring of the etching process. Optical emission spectroscopy requires plasma ignition because it monitors the intensity of light emission from the active species generated by the plasma. However, optical emission spectroscopy can easily damage photoresist materials (e.g., metal-containing EUV photoresist materials) through the ions and UV light generated by plasma ignition.

Photoresist materials (e.g., metal-containing EUV photoresist materials) may be subjected to any of the photolithography steps described in process 100 of FIG. 1 and shown in FIG. 2A-2C. In-situ process monitoring can be applied to photolithography processes to control deposition, baking, developing, and other photoresist patterning or processes. Therefore, the in-situ process monitoring of this disclosure can be integrated with a chamber used for deposition, baking, developing, or other photoresist patterning or processes. One or more optical sensors can be integrated with such a chamber. The in-situ process monitoring of this disclosure enables accurate endpoint detection, reduces process development costs, improves accuracy and repeatability, and controls process and chamber variations.

According to some embodiments, Figures 3A-3D present cross-sectional schematic diagrams of the progress of photoresist development. In Figure 3A, wafer 300 includes substrate 302 and substrate layer 304 to be etched. In some embodiments, substrate layer 304 includes an ashedable hard mask, such as amorphous carbon, spin-coated carbon, or other materials, such as silicon, silicon oxide, silicon nitride, silicon carbide, etc. In some embodiments, substrate layer 304 includes a bake-sensitive underlying layer, such as a carbon-containing film, a silicon-containing film, a doped carbon-containing film, or a doped silicon-containing film. Wafer 300 further includes a photoresist film 306 above substrate layer 304. In some embodiments, the photopatterned metal-containing EUV photoresist film includes an organometallic material, such as organotin oxide.

After photopatterning in an EUV scanner and/or after PEB processing, a photoresist film 306 can be provided on a wafer 300. After scanning, the photoresist film 306 includes an unexposed area 306a and an exposed area 306b. The unexposed area 306a may be an unexposed EUV area, and the exposed area 306b may be an EUV exposed area. A wafer 300 having the photoresist film 306 (which has unexposed areas 306a and exposed areas 306b) can be provided to a process chamber for performing development (e.g., dry development). The unexposed area 306a may represent a patterned structure of a patterned mask with predetermined lines CD. Before development, the lines CD of the unexposed area 306a may be the target lines CD1. The target line CD1 can be the desired half pitch of the patterned structure.

In Figure 3B, wafer 300 begins development. Unexposed areas 306a are partially removed by exposure to developing chemicals. Development can involve wet or dry developing chemicals. When using dry developing chemicals, dry development can be performed with or without ignited plasma. In some embodiments, dry development may be performed by first exposing to hot dry development (plasma-free dry development), followed by plasma dry development. In some embodiments, dry development may be performed by first exposing to plasma dry development, followed by hot dry development. In some embodiments, dry development may be performed by plasma dry development alone, or by hot dry development alone. In some instances, dry developing chemicals may include halogenated chemicals, such as hydrogen chloride (HCl), hydrogen bromide (HBr), or combinations thereof. Although Figures 3B-3D depict negative-tone development, it should be understood that positive-tone development may be used alternatively in this disclosure. The line CD2 in Figure 3B may be larger than the target line CD1 in Figure 3A.

In Figure 3C, wafer 300 continues to undergo development. Development of the photoresist film 306 is not yet complete. A significant portion of the unexposed areas 306a has been removed by exposure to developing chemicals. In some embodiments, the "significant portion" of the removed unexposed areas 306a constitutes at least 60%, at least 70%, at least 80%, or at least 90% of the volume of the unexposed areas 306a of the photoresist film 306. Some unexposed areas 306a remain on the substrate layer 304 and on the sidewalls of the exposed areas 306b as residue. Line CD3 in Figure 3C may be larger than the target line CD1 in Figure 3A.

In Figure 3D, wafer 300 has undergone development. After development, the unexposed area 306a is completely removed. After development is completed by removing the unexposed area 306a, a photoresist mask 308 is formed. The photoresist mask 308 represents a patterned structure composed of the exposed areas 306b. The photoresist mask 308 has a line CD4, which may be the same as or smaller than the target line CD1.

Typically, misalignment monitoring of photoresist development is achieved by comparing the line CD of a wafer sample with the target line CD1. The target line CD1 represents the desired half-pitch (HP) of the patterned structure of wafer 300. In Figure 3B, line CD2 may be much larger than the target line CD1 or the desired half-pitch. Because the unexposed area 306a has not been completely removed, the remaining portion of the unexposed area 306a may increase the line CD. In Figure 3B, wafer 300 is underdeveloped. In Figure 3C, line CD3 may still be much larger than the target line CD1 or the desired half-pitch. Similarly, the remaining portion of the unexposed area 306a may increase the line CD. Therefore, in Figure 3C, wafer 300 is still underdeveloped. In Figure 3D, line CD4 may be the same as or smaller than the target line CD1 or the desired half-pitch. If line CD4 is equal to or substantially equal to the desired half-pitch, the wafer is neither underdeveloped nor overdeveloped. This represents the end of the development process. However, if line CD4 is smaller than the desired half-pitch, then the wafer is overdeveloped.

The in-situ monitoring technique disclosed herein can be used to determine the development endpoints in Figures 3A-3D. This allows for in-situ monitoring of wafer 300 during development, preventing underdevelopment or overdevelopment of wafer 300. This determination can be performed in-situ, eliminating the need for numerous wafers and experiments to compare line CD with the target line CD1.

According to some embodiments, Figure 4 depicts a process chamber for processing photoresist and an optical sensor optically coupled to the process chamber for in-situ process monitoring of the photoresist. The photoresist processing apparatus 400 includes a process chamber 450. An optical sensor 410 is optically coupled to the process chamber 450. In some embodiments, the optical sensor 410 may be located outside the process chamber 450. In other embodiments, the optical sensor 410 may be located within the process chamber 450, wherein the optical sensor 410 may be integrated with hardware components (e.g., a spray nozzle). In some embodiments, the optical sensor 410 may be optically coupled to the process chamber 450 through a window 420.

The optical sensor 410 may include a light source 412 and a spectroreflectometer 414. The light source 412 may emit radiation into the process chamber. A window 420 may be optically transparent to the radiation. The incident radiation emitted by the light source 412 may be provided to a substrate 430 within the process chamber 450. The substrate 430 may be supported on a substrate support 440 (e.g., an electrostatic discharge clamp, ESC). In some embodiments, the incident radiation emitted by the light source 412 may be provided perpendicular to the surface of the substrate 430. The radiation is reflected by the substrate 430 as reflected radiation. The reflected radiation is detected by the spectroreflectometer 414. The interference pattern is measured by the spectroreflectometer 414.

Light source 412 may emit radiation over a broad band of discontinuous or continuous wavelengths. In some embodiments, light source 412 may include a lamp, such as an arc discharge lamp. Other suitable lamps may include, but are not limited to, mercury vapor lamps, doped mercury vapor lamps, electrode lamps, excimer lamps, pulsed xenon lamps, xenon flash lamps, and doped xenon lamps. In some embodiments, light source 412 may include a light-emitting diode (LED) or an LED array. Light source 412 may produce broad-spectrum radiation, from UV to infrared, but light source 412 may emit a narrower spectrum. In some implementations, the light source 412 is used to radiate radiation in a wide bandgap range, between approximately 200 nm and approximately 900 nm, between approximately 200 nm and approximately 800 nm, between approximately 300 nm and approximately 800 nm, or between approximately 400 nm and approximately 800 nm. However, it should be understood that the light source 412 can be used to radiate radiation with wavelengths greater than approximately 900 nm. By having a wide bandgap wavelength range, the light source 412 can advantageously radiate different wavelengths, wherein the phase shift will vary depending on the wavelength when the radiation is reflected. This effectively enables the spectroreflectometer 414 to measure more variations in the reflected radiation, as the measurement is not limited to a single wavelength, thereby providing the spectroreflectometer 414 with greater flexibility and accuracy.

A spectroreflectometer 414 acts as a detector of reflected radiation, collecting spectral data related to the light reflected from the substrate 430. In some embodiments, the spectroreflectometer 414 includes a charge-coupled device (CCD), which is a photosensitizing detector. The spectroreflectometer 414 measures the light intensity as a function of wavelength. More specifically, the spectroreflectometer 414 receives reflected radiation and measures its intensity. The change in the intensity of the reflected radiation over time is related to the change in the thickness of one or more films on the substrate 430. The change in thickness can determine the progress of photoresist processing in the process chamber 450. For example, when photoresist is developed, the change in photoresist thickness during development may be related to the change in the intensity of reflected radiation. Therefore, the endpoint can be determined when the intensity of reflected radiation reaches a threshold.

Figure 5 shows a schematic diagram of a substrate with multiple interfaces for spectral reflection of light incident normally. As described above, the optical sensor 410, including the light source 412 and the spectrometer 414, uses the optical principles shown in Figure 5 to perform broadband in-situ reflectance measurement. When a light beam is incident on the film, a portion of the beam is reflected at the surface, while the remaining portion propagates through and impacts the boundary of the substrate beneath the film. A portion of the remaining beam is reflected back. When the two reflected beams (one from the film surface and the other from the boundary) meet, they interfere. Data is extracted from the constructive or destructive interference patterns of varying degrees. A model is adapted to the relationship between reflection intensity and wavelength to determine the film thickness. As shown in Figure 5, the reflection of light incident from normals passing through multiple interfaces will cause interference. By analyzing the interference using a spectrophotometer, the reflection intensity can be determined, thereby determining the film thickness. Changes in film thickness can correspond to the progress of photoresist manufacturing processes (e.g., photoresist deposition, baking, and developing).

Returning to Figure 4, the light source 412 and the spectrometer 414 can be electrically coupled via optical cable 416.

Radiation emitted by light source 412 can penetrate or at least partially penetrate window 420. Incident radiation passes through window 420 and is reflected back from substrate 430 as reflected radiation passing through window 420. In some embodiments, window 420 is made of quartz (e.g., high-purity silica quartz). In some embodiments, window 420 is made of some other dielectric material. In some examples, window 420 may be composed of (or doped with) a material that reduces the transmission of certain wavelengths. Therefore, the spectrum of radiation transmitted through window 420 can be controlled to block or reduce the transmission of shorter wavelengths. For example, window 420 can be used to reduce or block the transmission of wavelengths smaller than about 400 nm. Alternatively, a cutoff filter can be used to reduce or block transmission at wavelengths less than approximately 400 nm. Many photoresist materials are susceptible to damage in the UV range (i.e., 100–400 nm). By using certain materials for the window 420 or by using a cutoff filter, such high-energy wavelengths can be prevented from damaging the photoresist material on the substrate 430.

In some embodiments, window 420 may be thermally coupled to one or more heating elements (not shown). Unwanted material deposition may occur on window 420. Unwanted byproducts or materials from process chamber 450 may accumulate on window 420. In some cases, film deposition may occur on window 420 during photoresist dry deposition. In some cases, byproduct deposition may occur on window 420 during photoresist developing or baking processes. Unwanted byproducts or films on window 420 may adversely affect the performance of optical sensor 410. One or more heating elements can heat the window 420 to an elevated temperature to cause the evaporation of unwanted materials to clean the window 420, or otherwise prevent the condensation/deposition of unwanted materials on the window 420.

In some embodiments, a gas curtain can prevent unwanted material from depositing on window 420 or remove unwanted material from window 420. One or more gas inlets may be coupled to process chamber 450 for delivering one or more nonreactive gases toward window 420. One or more nonreactive gases may be allowed to flow into an area near window 420 to limit the deposition or condensation of byproducts or other materials. In some embodiments, the nonreactive gas may include helium, neon, argon, krypton, xenon, nitrogen, or combinations thereof. For example, the nonreactive gas may include argon, nitrogen, or a combination of argon and nitrogen. In some embodiments, a gas curtain of one or more nonreactive gases may be used in conjunction with a heated window 420 to limit the deposition of unwanted material on window 420.

The process chamber 450 includes a substrate support 440 for supporting the substrate 430. In some embodiments, the substrate support 440 is a base or an electrostatic chuck (ESC). In some embodiments, the substrate support 440 includes one or more temperature control elements (not shown) for heating and/or cooling the substrate 430. The substrate 430 is located below the photosensitive sensor 410. A light source 412 can provide incident radiation to the substrate 430, perpendicular to the surface of the substrate 430. The substrate 430 may have a photoresist material formed on the substrate 430, such as a metal-containing EUV photoresist material. For example, the metal-containing EUV photoresist material may include an organometallic material, such as an organotin oxide. The process chamber 450 is used to process photoresist materials during photolithography processes. The process chamber 450 can be used for depositing photoresist material onto a substrate 430, baking the substrate 430 on which photoresist material is formed, developing the photoresist material formed on the substrate 430, or performing edge and/or back-side cleaning of the photoresist material formed on the substrate 430. Therefore, the process chamber 450 can be a deposition chamber, a baking chamber, a developing chamber, or an edge and/or back-side cleaning chamber. An optical sensor 410 is used for in-situ monitoring of the photoresist processing on the substrate 430 within the process chamber 450.

The device 400 may include a controller 460 for controlling the process conditions and hardware status of the device 400. The controller 460 may include one or more memory devices and one or more processors. The controller 460 may control photoresist processing in the process chamber 450 and in-situ process monitoring using the optical sensor 410. The controller 460 may include system control software with instructions to control process activities and conditions in the process chamber 450, such as timing, gas mixing, gas flow rate, chamber pressure, chamber temperature, substrate temperature, target power level, RF power level, substrate support position, window temperature, curtain gas flow, process monitoring, spectral measurement, and other processes implemented by the device 400. The controller 460 may be configured with instructions to perform photoresist processing, such as photoresist deposition, baking, developing, beveling, and/or back-side cleaning, within the process chamber 450. The controller 460 may also be configured with instructions to perform in-situ monitoring of the photoresist processing within the process chamber 450 using an optical sensor 410. The progress of the photoresist process (e.g., deposition, baking, developing, etc.) can be determined by using incident radiation from the light source 412 and detecting reflected radiation at a spectroreflectometer 414. In some embodiments, the controller 460 is configured with instructions to use the spectroreflectometer 414 to determine the end point of the photoresist process. For example, the end point of the photoresist process can be determined when the intensity of the reflected radiation reaches a threshold.

Figure 6 shows a graph illustrating the change in reflected radiation intensity over time during photoresist development, based on some implementation examples. The cross-sectional schematic shows the development progress of the photoresist at different times. During photoresist development, interferometric measurements of the reflectivity of the substrate surface or broadband in-situ reflectance measurements can be performed. A light beam can be emitted onto the substrate surface during photoresist development, and the intensity of reflected light at multiple wavelengths can be measured. The measured intensity of reflected light is recorded over time. The light beam can be provided perpendicular to the substrate surface.

Information on reflected light intensity as a function of time is collected. Based on this, a series of intensity changes are obtained. This information will show the intensity changes that occur while the photoresist material is being developed. This information can be used to determine the endpoint of the photoresist development. In some implementations, the spectral data can be linked to critical dimension measurements, linewidth, pitch, spacing, and other measurable parameters.

Photoresist on a substrate is being developed, for example, by dry development. The photoresist may include metal-containing EUV photoresist materials, such as organometallic materials. For example, metal-containing EUV photoresist materials may include organotin oxides. The thickness of the metal-containing EUV photoresist material may be between about 10 nm and about 50 nm, or between about 15 nm and about 40 nm, or between about 20 nm and about 30 nm. Dry development of metal-containing EUV photoresist materials may involve flowing halogenated gases. For example, dry development chemicals may include hydrogen halides, such as hydrogen fluoride (HF), hydrogen chloride (HCl), hydrogen bromide (HBr), hydrogen iodide (HI), or combinations thereof. Dry developing processes can be performed at suitable temperatures, for example, between approximately -30°C and approximately 150°C, between approximately -20°C and approximately 120°C, or between approximately -10°C and approximately 100°C. Dry developing processes can also be performed at suitable pressures, for example, between approximately 5 mTorr and approximately 2000 mTorr, between approximately 10 mTorr and approximately 1000 mTorr, or between approximately 20 mTorr and approximately 800 mTorr.

As photoresist development progresses, the thickness of the photoresist material changes. The variation in reflected light intensity may be related to this variation in thickness. For example, at t = 50 seconds, the normalized value of the reflected light intensity is approximately 340. Based on the off-line CD measurement results at 50 seconds, the line CD of the patterned feature portion of the substrate is approximately 17.6 nm. At t = 120 seconds, the normalized value of the reflected light intensity is approximately 340. Based on the off-line CD measurement results at 120 seconds, the line CD of the patterned feature portion of the substrate is approximately 17.5 nm. At t = 200 seconds, the normalized value of the reflected light intensity is approximately 275. Based on the off-line CD measurement results at 200 seconds, the line CD of the patterned feature portion of the substrate is approximately 17.6 nm. At t = 400 seconds, the normalized value of the reflected light intensity is approximately 225. Based on the off-line CD measurement at 400 seconds, the line CD of the patterned feature on the substrate is approximately 16 nm. This indicates that over-etching of the patterned feature has occurred after approximately 400 seconds of dry development. In fact, over-etching of the patterned feature may occur between approximately 200 and approximately 400 seconds, while the main etching of the patterned feature may occur before approximately 200 seconds. At t = 800 seconds, the normalized value of the reflected light intensity is approximately 215. Based on the off-line CD measurement at 800 seconds, the line CD of the patterned feature on the substrate is approximately 14 nm. This shows that the photoresist material was completely or substantially removed after approximately 800 seconds. The change in reflected light intensity after approximately 800 seconds became negligible, indicating that the change in photoresist material thickness was negligible. At t = 1600 seconds, the normalized value of the reflected light intensity was approximately 200. Based on the off-site line CD measurement results at 1600 seconds, the line CD of the patterned feature portion of the substrate was approximately 13 nm.

Of course, broadband in-situ reflectometry is not limited to photoresist development processes. It can be applied to other photoresist processes, such as photoresist deposition, photoresist baking, photoresist beveling, and backside cleaning. Figures 7A-7C show the changes in thickness or material properties as a function of time for photoresist deposition, photoresist development, and photoresist baking operations. These changes in thickness or material properties can be correlated with changes in reflected light intensity in the broadband in-situ reflectometry measurement results.

Figure 7A shows a graph illustrating the change in thickness or material properties as a function of time during photoresist deposition under process conditions A and B. The thickness increases as more photoresist material is deposited over time. The difference between process conditions A and B reflects different deposition rates.

Figure 7B shows a graph illustrating the change in thickness or material properties as a function of time during photoresist development under process conditions A and B. The thickness of the photoresist material decreases over time as it is developed (e.g., dry development). The difference between process conditions A and B reflects different etching rates. The inflection point corresponds to the point in time when dry development transitions from the main etching stage to the over-etching stage. In Figure 7B, the inflection point under process condition A may be later than that under process condition B.

Figure 7C shows a graph illustrating the change in thickness or material properties as a function of time during photoresist baking under process conditions A and B. As the photoresist material is baked over time, its thickness decreases or other material properties change. The difference between process conditions A and B reflects different baking parameters (e.g., temperature). The inflection point corresponds to the point in time when the baking process achieves its desired change in the photoresist material. In Figure 7C, the inflection point occurs earlier under process condition A than under process condition B.

According to some embodiments, Figure 8 presents a flowchart of an exemplary method for monitoring a photoresist fabrication process. The operation of process 800 may be carried out in different sequences and/or using different, fewer, or additional operations. One or more operations of process 800 may be carried out using the apparatus described in any of Figures 4 and 9-12. In some embodiments, the operation of process 800 may be carried out, at least in part, based on software stored in one or more non-transient computer-readable media.

At block 802 of process 800, a photoresist process is performed in a process chamber, involving a semiconductor substrate having a metal-containing EUV photoresist material. The photoresist process may relate to EUV photolithography. EUV photolithography may include: deposition of EUV photoresist material on the semiconductor substrate; bevel and/or backside cleaning of the EUV photoresist material; pretreatment of the EUV photoresist material (e.g., post-exposure baking); reprocessing of the EUV photoresist material; chamber cleaning of the EUV photoresist material; EUV exposure for photopatterning of the EUV photoresist material; post-processing of the EUV photoresist material (e.g., post-exposure baking); dry development of the EUV photoresist material; post-dry development baking of the EUV photoresist material; pattern transfer; and other EUV photoresist processes. The metal-containing EUV photoresist material may be an organometallic material, such as organotin oxide. The elements in metal-containing EUV photoresist materials may be selected from the group consisting of: tin, iron, tellurium, bismuth, indium, antimony, iodine, germanium, and combinations thereof.

In some embodiments, the photoresist fabrication process involves the deposition of a metal-containing EUV photoresist material on a semiconductor substrate. The metal-containing EUV photoresist material can be dry-deposited or wet-deposited. In some examples, the metal-containing EUV photoresist material can be deposited using a suitable vapor deposition technique, wherein the process chamber can be configured for CVD or ALD. In some embodiments, a lower layer can be deposited on the semiconductor substrate prior to the deposition of the metal-containing EUV photoresist material. The lower layer can increase the radiation absorption rate and/or patterning performance of the photoresist material.

In some embodiments, the photoresist process involves baking a semiconductor substrate on which a metal-containing EUV photoresist material is formed. Photolithography processes typically involve a baking step to facilitate the chemical reactions required to create a chemical contrast between exposed and unexposed areas of the photoresist material. Baking the semiconductor substrate involves careful control of the baking environment, the introduction of potentially reactive gases, and the careful control of the baking temperature. Without being limited by any theory, baking can be performed to facilitate the removal of volatile species and/or accelerate cross-linking within the photoresist material. In some examples, the metal-containing EUV photoresist material is baked in a process chamber configured as a baking chamber. The baking chamber may include, for example, a heating plate or baking plate thermally coupled to the semiconductor substrate. The baking chamber may also include, for example, one or more gas inlets for providing a desired treatment atmosphere. In some implementations, baking of metal-containing EUV photoresist can be performed after photoresist deposition in post-baking, after photoresist exposure to EUV for photopatterning in post-exposure baking, or after dry development in post-dry development baking.

In some embodiments, the photoresist process involves developing metal-containing EUV photoresist materials. Metal-containing EUV photoresist materials can be dry-developed or wet-developed. In some examples, dry developing chemicals are used to dry-develop the metal-containing EUV photoresist materials. Dry developing chemicals may include halogen-containing chemicals. In one example, dry developing chemicals may include hydrogen and halides, such as _H₂ and _Cl₂ , or _H₂ and _Br₂ . In another example, dry developing chemicals may include hydrogen halides, such as HF, HBr, HCl, HI, or combinations thereof. The dry developing process may be thermal dry developing, plasma dry developing, or a combination of thermal and plasma dry developing. The development of the metal-containing EUV photoresist materials occurs after exposure. The developing process can be either negative-tone dry developing or positive-tone dry developing. Negative-tone dry developing selectively removes unexposed areas of the photoresist material, while positive-tone dry developing selectively removes EUV-exposed areas of the photoresist material. The process chamber can be configured for developing metal-containing EUV photoresist materials. For example, the process chamber may include one or more gas inlets for the delivery of dry developing chemicals.

In some implementations, the photoresist process involves cleaning the beveled and/or back sides of the metal-containing EUV photoresist material. Unintended deposition of photoresist material may accumulate on the beveled and/or back sides of the substrate. Beveled and/or back side cleaning can be performed using wet or dry cleaning techniques. In dry cleaning techniques, dry developing chemicals, such as hydrogen halides, can be used. During beveled and/or back side cleaning, the dry developing chemicals can flow to the beveled and/or back sides of the semiconductor substrate to selectively remove unwanted metal-containing EUV photoresist material from the beveled and/or back sides.

At block 804 of process 800, an optical sensor is used to expose the semiconductor substrate to incident radiation. This exposure to incident radiation occurs simultaneously with or concurrently with the photoresist process being performed on the semiconductor substrate. This allows the photoresist process to be monitored in situ by the optical sensor. The optical sensor may include a light source. The incident radiation is provided by the light source. In some embodiments, the optical sensor may be integrated with a spray nozzle or other hardware components located above the semiconductor substrate within the process chamber.

The light source can radiate radiation into the process chamber. In some embodiments, the window can be located between the semiconductor substrate and the light source. For example, the window can be located directly above the semiconductor substrate, where the incident radiation is provided perpendicular to the surface of the semiconductor substrate. The radiation emitted by the light source can penetrate or at least partially penetrate the window.

The light source can emit radiation over a broad band, either discontinuous or continuous wavelength. In some embodiments, the light source may include lamps, such as arc discharge lamps. Other suitable lamps may include, but are not limited to, mercury vapor lamps, doped mercury vapor lamps, electrode lamps, excimer lamps, pulsed xenon lamps, xenon flash lamps, and doped xenon lamps. In some embodiments, the light source may include LEDs or LED arrays. The light source can produce broad-spectrum radiation, from UV to infrared, but may also emit a narrower spectrum. In some embodiments, the light source is used to radiate radiation in a wide bandgap range, between approximately 200 nm and approximately 900 nm, between approximately 200 nm and approximately 800 nm, between approximately 300 nm and approximately 800 nm, or between approximately 400 nm and approximately 800 nm. However, it should be understood that in some embodiments, the light source can be used to radiate radiation in a wide bandgap range with wavelengths greater than approximately 900 nm. In some embodiments, the light source is used to radiate radiation at discontinuous wavelengths between approximately 200 nm and approximately 900 nm.

Photoresist materials (e.g., metal-containing EUV photoresist materials) can be easily damaged by ions generated by the plasma and UV radiation. Optical sensors are used for in-situ monitoring of the photoresist fabrication process to avoid exposure to ions and free radicals generated by the plasma that could damage the photoresist material. UV radiation can be filtered by a window and/or a cutoff filter placed between the light source and the semiconductor substrate. Accordingly, the window can be used to block wavelengths equal to or less than about 400 nm. Alternatively or additionally, a cutoff filter placed between the light source and the semiconductor substrate can be used to block wavelengths equal to or less than about 400 nm.

Undesirable material accumulation from the photoresist process can easily occur at the window. When the photoresist process involves the deposition of photoresist material, undesirable photoresist film deposition can easily occur at the window. Undesirable metal-containing EUV photoresist material may grow on the inner surface of the process chamber (including on any window within the process chamber) while the substrate is being processed in the process chamber. When the photoresist process involves baking or dry developing of the photoresist material, byproduct accumulation can easily occur at the window. Reactive gases used in baking or dry developing processes may form byproducts, which may condense on the inner surface of the process chamber, including on any window within the process chamber. Undesirable material or byproducts on the window can adversely affect the optical properties of incident radiation on the semiconductor substrate and reflected radiation reflected from the semiconductor substrate. This will affect the accuracy of the spectral data received by the optical sensor. Techniques are needed to remove unwanted deposits on the window or to prevent unwanted materials from accumulating on the window.

In some embodiments, process 800 further includes a heated window to limit the deposition or condensation of byproducts or other materials on the window. The window may be thermally coupled to one or more heating elements. The one or more heating elements can heat the window to an elevated temperature. In some embodiments, the elevated temperature is between about 40°C and about 400°C, between about 80°C and about 350°C, between about 100°C and about 300°C, or between about 100°C and about 200°C. Above certain temperatures, the deposition or condensation of gaseous byproducts, precursors, and reactant gases in the process chamber into unwanted materials on the window can be prevented. Below certain temperatures, the decomposition of organic compounds and potential obstruction of hardware components are avoided. The heated window can be performed simultaneously with the photoresist process.

In some embodiments, process 800 further includes flowing one or more non-reactive gases in an area near the window to restrict the deposition or condensation of byproducts or other materials on the window. The one or more non-reactive gases may include He, Ne, Ar, Kr, Xe, _N₂ , or mixtures thereof. The one or more non-reactive gases may flow toward the window as an air curtain. One or more gas distributors may deliver the one or more non-reactive gases to the area near the window. The air curtain may be distributed across the entire exposed surface of the window, preventing gaseous byproducts, precursors, and reactant gases from reaching the exposed surface of the window. The flow of one or more non-reactive gases may occur simultaneously with the photoresist process.

In some embodiments, process 800 further includes exposing the window to a plasma in the process chamber to perform in-situ cleaning of the material formed on the window. Plasma activators comprising ions and/or free radicals can react with the material formed on the window to form volatile products. Plasma can be formed by plasma ignition of one or more process gases, wherein the one or more process gases may include halogenated chemicals. In one example, the one or more process gases include HBr, HCl, _Cl₂ , _BCl₃ , or mixtures thereof. In another example, the one or more process gases may include _Cl₂ , _H₂ , _CH₄ , a mixture of _CH₄ and _H₂ , or a mixture of _CH₄ and _Cl₂ . Any of the above chemicals can be used to remove any tin species. In some embodiments, the plasma may include oxygen-based chemicals (e.g., _O₂ ) to remove any residual carbon. In some embodiments, the plasma may include fluorine-based chemicals to remove any silicon species. During plasma exposure at the clean window, the process chamber may be free of semiconductor substrates or any other substrates. Plasma exposure at the clean window may be performed before or after the photoresist process.

At block 806 of process 800, an optical sensor is used to monitor the changes in the metal-containing EUV photoresist material on the semiconductor substrate over time to determine the progress of the photoresist fabrication process. In addition to a light source, the optical sensor may include a spectroreflectometer. Changes in the metal-containing EUV photoresist material may involve changes in its thickness over time. The spectroreflectometer can track changes in the intensity of reflected radiation over time to achieve in-situ monitoring of the photoresist fabrication process.

After incident radiation is applied to the surface of a semiconductor substrate, at least some of the radiation is reflected from the surface of the semiconductor substrate as reflected radiation. An optical sensor acts as a detector of the reflected radiation. A spectroreflectometer within the optical sensor may include a photosensitive detector capable of measuring the interference pattern of the reflected radiation. Therefore, the spectroreflectometer can measure the intensity of the reflected radiation. Variations in the intensity of the reflected radiation may be related to variations in the thickness of the metal-containing EUV photoresist material. Changes in thickness can determine the progress of the photoresist process within the process chamber. This provides direct and real-time measurement of photoresist deposition, development, baking, beveling and/or back-side cleaning, and other photolithography operations where thickness varies over time.

It should be understood that changes in other material properties of metal-containing EUV photoresists during the photoresist fabrication process can be monitored using optical sensors. In some embodiments, the optical sensor can measure changes in the composition or functional groups of the photoresist material. Tracking such changes in chemical composition can help to understand and monitor the photoresist fabrication process in greater detail. In some embodiments, tracking changes in composition or functional groups can help monitor crosslinking in the photoresist material during baking. In some embodiments, the optical sensor may include a Fourier transform infrared (FTIR) spectrometer or an ultraviolet (UV) spectrometer. This enables monitoring in the UV range using a UV spectrometer, in the IR range using an FTIR spectrometer, in the visible light range using the spectroreflectometer disclosed herein, or in a combination of spectral ranges. FTIR or UV spectrometers can be used to detect changes in functional groups on a semiconductor substrate during photoresist fabrication. In some examples, the FTIR or UV spectrometer can be part of an optical sensor with a spectroreflectometer. In other examples, the FTIR or UV spectrometer can be part of a different sensor unit used for in-situ process monitoring of the photoresist fabrication process. In some implementations using an FTIR spectrometer, different light sources, such as lasers, can be used.

The thickness of the photoresist material may not be uniform across the entire surface of the semiconductor substrate. Therefore, the thickness variation at one location on the semiconductor substrate may differ from the thickness variation at another location. Multiple photosensors, instead of a single photosensor, can be used to monitor the progress of photoresist processing within the process chamber. Multiple photosensors can monitor multiple points on the substrate to check the uniformity of the photoresist material during deposition, baking, developing, beveling and/or back-side cleaning, and other photolithography operations. This enables broadband in-situ monitoring of different areas of the semiconductor substrate during the photoresist fabrication process. In some embodiments, a first optical sensor can monitor the progress of the photoresist process at the center of the semiconductor substrate, and a second optical sensor can monitor the progress of the photoresist process at the edge of the semiconductor substrate. In some examples, multiple optical sensors may be located at different positions within the spray nozzles of the process chamber. In other examples, multiple optical sensors may be located at different positions on the top plate of the process chamber. In some still examples, multiple optical sensors may be located at different positions outside the process chamber. The optical sensors may be optically coupled to the process chamber through one or more holes, openings, or windows.

At block 808 of process 800, the endpoint of the photoresist process is determined by detecting when the intensity of reflected radiation reaches a threshold. As the optical sensor tracks the intensity of reflected radiation in relation to the thickness of the photoresist material, the threshold indicates when the target thickness of the photoresist material is reached. The endpoint can be confirmed or calibrated using off-site measurements. Off-site measurements may include off-site thickness measurements of the photoresist material performed using elliptical polarization, or off-site line (CD) measurements of the photoresist material. These off-site measurements can provide calibration for a target (e.g., the target line CD). The target from the off-site measurements can then be calibrated for the target intensity of reflected radiation, which indicates the endpoint of the photoresist process. In other words, off-site measurements can be used to calibrate a predetermined threshold for the intensity of reflected radiation based on the experimental site.

In-situ process monitoring using optical sensors enables rapid learning cycles within the deposition, development, and baking chambers of photoresist technology. Instead of testing numerous wafer samples, in-situ process monitoring provides direct and real-time measurements to determine the end point of the photoresist process. Therefore, the photoresist process is completed without overrunning. This improves semiconductor substrate manufacturing productivity. For example, by avoiding overrunning the photoresist process, blow-off time can be reduced, thereby increasing productivity. Furthermore, by avoiding overrunning the photoresist process, the fabless automatic cleaning (WAC) cycle can be optimized, thereby increasing productivity. In-situ process monitoring using optical sensors can also improve mass production because it allows monitoring of different chambers/workstations at different locations, eliminating the need for separate off-site measurements for each chamber/workstation. Equipment

The apparatus disclosed herein is configured for in-situ process monitoring of photoresist fabrication using optical sensors. The apparatus is configured for photolithography operations such as photoresist deposition, beveling and/or backside cleaning, baking, developing, and other operations. In some embodiments, the apparatus is configured to perform fully dry operations. In some embodiments, the apparatus is configured to perform a combination of wet and dry operations. The apparatus may include a single wafer chamber or multiple workstations within the same process chamber.

The apparatus for in-situ process monitoring of photoresist fabrication includes a process chamber with a substrate support. The substrate support can be used to support a semiconductor substrate on which a metal-containing photoresist material is formed. The apparatus may include gas lines coupled to the process chamber to deliver gases. These gases may include reactant gases, process gases, precursors, inert gases, etching gases, etc. The apparatus may include vacuum lines coupled to the process chamber. The vacuum lines can be used to evacuate/purge gases from the process chamber. In some embodiments, the apparatus may include one or more heaters for temperature control. Such heaters may be located in the process chamber and/or in the substrate support. As described herein, the device may include an optical sensor for in-situ process monitoring of photoresist processes performed in a process chamber.

According to some embodiments, Figure 9 depicts a schematic diagram of an exemplary apparatus 900, which includes a process chamber 902, one or more optical sensors 920 optically coupled to the process chamber 902, a gas delivery system 916 coupled to the process chamber 902, and a vacuum line 926 coupled to the process chamber 902. The process chamber 902 may be a single processing chamber for maintaining a low-pressure environment. The process chamber 902 may be in fluid communication with the gas delivery system 916 for delivering one or more gases to a gas distributor 906. In some examples, the gas distributor 906 is a spray head. The gas delivery system 916 may optionally include a mixing container 940 for mixing and/or regulating process gases for delivery to the gas distributor 906. Inlet valve 934 controls the introduction of process gas into mixing vessel 940, and inlet valve 936 controls the introduction of carrier gas into mixing vessel 940. In some examples, vaporized liquid reactants may be provided at vaporization point 942, wherein inlet valve 936 controls the introduction of vaporized liquid reactants into mixing vessel 940.

A gas distributor 906 distributes process gases into a process chamber 902 and toward a substrate 904, the flow of which is controlled by one or more valves (e.g., valves 932, 934, 936) upstream of the gas distributor 906. The substrate 904 is located below the gas distributor 906 and is shown resting on a substrate support 908. The gas distributor 906 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 904. The process gases delivered to the process chamber 902 via the gas distributor 906 may include process gases used for performing photoresist deposition, beveling and/or back-side cleaning, baking, or developing on the substrate 904.

The substrate support 908 can be raised or lowered to expose the substrate 904 to the chamber space between the substrate 904 and the gas distributor 906. In some embodiments, the base height can be programmably adjusted by a suitable computer controller (e.g., controller 950). In some embodiments, the gas distributor 906 may have multiple chamber volumes controlled by multiple temperatures.

In some embodiments, the substrate support 908 may have its temperature controlled by one or more heaters 910. In some embodiments, the substrate support 908 may be heated to temperatures greater than -40°C and up to 400°C, for example, -20°C to 300°C, or for example, about 40°C to 160°C. In some embodiments, one or more heaters 910 of the substrate support 908 may include a plurality of independently controllable temperature control zones.

Furthermore, in some embodiments, pressure control of the process chamber 902 can be provided via a vacuum line 926. The vacuum line 926 includes a throttle valve 928. In some examples, the throttle valve 928 is a butterfly valve. As shown in Figure 9, the throttle valve 928 throttles the vacuum provided by a downstream vacuum pump (not shown). The throttle valve 928 can be used to regulate the pressure in the process chamber 902. However, in some embodiments, pressure control of the process chamber 902 can also be adjusted by changing the flow rate of one or more gases introduced into the process chamber 902.

In some embodiments, the position of the gas distributor 906 can be adjusted relative to the substrate support 908 to change the volume between the substrate 904 and the gas distributor 906.

When plasma is used, such as in dry development operations, the gas distributor 906 and/or substrate support 908 can be electrically connected to an RF power supply and matching network to provide power to the plasma 907. Therefore, one or both of the gas distributor 906 and substrate support 908 can be powered for plasma generation. In some embodiments, plasma energy can be controlled by controlling one or more of the following: processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply and matching network can be operated via controller 950 to form a plasma with the desired free radical and ionic composition.

The apparatus 900 may further include a window 930 disposed between one or more optical sensors 920 and the substrate 904. The window 930 allows light from one or more optical sensors 920 to pass through and allows reflected light to be received by one or more optical sensors 920. In some embodiments, one or more optical sensors 920 are optically coupled to the process chamber 902 through the window 930.

Window 930 may be configured to block light of certain wavelengths from one or more optical sensors 920. For example, window 930 may be configured to block wavelengths in the UV range (i.e., 100-400 nm). Alternatively, a cutoff filter may be used to block wavelengths in the UV range.

Window 930 may include one or more heating elements (not shown) thermally coupled to window 930. One or more heating elements may heat window 930 to an elevated temperature to prevent or otherwise reduce the accumulation of unwanted material on window 930. Additionally or alternatively, an air curtain may be provided to window 930 to prevent or otherwise reduce the accumulation of unwanted material on window 930. A flow of one or more non-reactive gases may be provided toward window 930, which inhibits the flow of reactive gases to window 930. Additionally or alternatively, periodic cleaning of window 930 may be performed to prevent or otherwise reduce the accumulation of unwanted material on window 930. For example, in-situ plasma cleaning may remove unwanted material from window 930.

The apparatus 900 further includes one or more optical sensors 920 configured to provide broadband in-situ monitoring of the photoresist process implemented by the apparatus 900. In some embodiments, the one or more optical sensors 920 include a single light source and a single spectroreflectometer for in-situ monitoring of the photoresist process. In some embodiments, the one or more optical sensors 920 include a plurality of optical sensors for in-situ monitoring of the photoresist process at different regions of the substrate 904. Each of the one or more optical sensors 920 includes a broadband light source 912/922 and a spectroreflectometer 914/924.

A first light source 912 can provide incident radiation onto the surface of substrate 904 at a first location on substrate 904. The incident radiation can be provided perpendicular to the surface of substrate 904. At least some of the incident radiation is reflected as reflected radiation. A first spectroreflectometer 914 can receive the reflected radiation and determine the interference pattern at the first location on substrate 904. The first spectroreflectometer 914 can measure the intensity of the reflected radiation at the first location on substrate 904. Such a measurement can be used to determine the thickness variation of the photoresist material on substrate 904. In some embodiments, the first location on substrate 904 corresponds to the center of substrate 904.

The second light source 922 can provide incident radiation onto the surface of the substrate 904 at a second location on the substrate 904. The incident radiation can be provided perpendicular to the surface of the substrate 904. At least some of the incident radiation is reflected as reflected radiation. The second spectroreflectometer 924 can receive the reflected radiation and determine the interference pattern at the second location on the substrate 904. The second spectroreflectometer 924 can measure the intensity of the reflected radiation at the second location on the substrate 904. Such a measurement can be used to determine the change in the thickness of the photoresist material on the substrate 904. In some embodiments, the second location on the substrate 904 corresponds to the edge of the substrate 904.

In some embodiments, the apparatus 900 may further include other sensors (not shown) for monitoring changes occurring on the substrate 904. These other sensors may include, for example, FTIR or UV spectrometers for monitoring changes in functional groups on the substrate 904. The FTIR or UV spectrometer may be used in conjunction with one or more optical sensors 920 to provide direct and real-time measurements of thickness and material property changes occurring on the substrate 904 during the photoresist fabrication process.

In some embodiments, controller 950 controls all activities of device 900. Controller 950 may include one or more memory devices, one or more mass storage devices, and one or more processors. The processor may include a CPU or computer, analog and/or digital input/output connections, a stepper motor controller board, etc. Controller 950 may execute system control software, which is stored in the mass storage device, loaded into the memory device, and executed on the processor. Alternatively, control logic may be hard-coded in controller 950. In some embodiments, the system control software may include input/output sequence instructions for controlling the various parameters mentioned above. In some implementations, other computer software and/or programs stored on a mass storage device and/or memory device associated with the controller 950 may be used. Examples of programs or program fragments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, plasma control programs, and process monitoring programs.

In some embodiments, the controller 950 may be configured with instructions to perform a photoresist process in a process chamber 902, wherein the photoresist process may include depositing a metal-containing EUV photoresist material on a substrate 904, baking the substrate 904 on which the metal-containing EUV photoresist material is formed, or developing the metal-containing EUV photoresist material formed on the substrate 904. The controller 950 may further be configured with instructions to perform the following operations: exposing the substrate 904 to incident radiation using one or more optical sensors 920, and using one or more optical sensors 920 to monitor the change of the metal-containing EUV photoresist material on the substrate 904 over time to determine the progress of the photoresist process. Such operations allow for in-situ monitoring of the photoresist process while it is being performed. One or more optical sensors 920, each of which may include a broadband light source 912/922 and a spectroreflectometer 914/924. The light source 912/922 provides incident radiation onto the surface of the substrate 904, and the spectroreflectometer 914/924 obtains a measurement of the intensity of the reflected radiation from the substrate 904. In some embodiments, the controller 950 may be further configured with instructions for performing the following operation: determining the end point of the photoresist process by determining that the intensity of the reflected radiation has reached a threshold.

In some embodiments, the controller 950 may be configured with instructions to perform the following operations: heating the window 930 to limit the deposition or condensation of byproducts or other materials on the window 930. In some embodiments, the controller 950 may be configured with instructions to perform the following operations: flowing one or more non-reactive gases to an area near the window 930 to limit the deposition or condensation of byproducts or other materials on the window 930. In some embodiments, the controller 950 may be configured with instructions to perform the following operations: exposing the window 930 to the plasma in the process chamber 902 to perform in-situ cleaning of the material formed on the window 930.

Multiple processing stations for performing one or more photoresist processes may be included in a multi-station processing tool. Figure 10 illustrates, according to some of the disclosed embodiments, an exemplary multi-station processing tool suitable for performing various operations. The multi-station processing tool 1000 includes an inbound loading chamber 1002 and an outbound loading chamber 1004, either or both of which may include a remote plasma source. A robot 1006 operating under atmospheric pressure is used to move wafers from a wafer carrier (loaded via a cassette 1008) through an atmospheric port 1010 into the inbound loading chamber 1002. Robot 1006 places the wafer on pedestal 1012 in inbound loading chamber 1002, closes the gas port 1010, and evacuates inbound loading chamber 1002. In the case where inbound loading chamber 1002 includes a remote plasma source, the wafer can be exposed to remote plasma processing in loading chamber 1002 before being introduced into processing chamber 1014 to process the substrate surface. Furthermore, the wafer can also be heated in inbound loading chamber 1002, for example, to remove moisture and adsorbed gases. Next, chamber transfer port 1016 leading to processing chamber 1014 is opened, and another robot (not shown) places the wafer in the reactor, on pedestal at the first station shown in the reactor, for processing. Although the embodiment shown in Figure 10 includes a loading chamber, it should be understood that in some embodiments, the wafer can go directly into the processing station.

In the embodiment shown in Figure 10, the depicted processing chamber 1014 includes four processing stations, numbered 1 to 4. Each processing station has a heated base (shown as 1018 in processing station 1) and a gas line inlet. It should be understood that in some embodiments, the processing stations may have different or multiple purposes. For example, in some embodiments, the processing stations may be switchable between dry developing and deposition process modes, or the processing stations may be switchable between dry developing and etching process modes. Additionally or alternatively, in some embodiments, processing chamber 1014 may include one or more matched pairs of dry developing and etching processing stations. Although the depicted processing chamber 1014 includes four processing stations, it should be understood that a processing chamber according to this disclosure may have any suitable number of processing stations. For example, in some embodiments, the processing chamber may have five or more processing stations, while in other embodiments, the processing chamber may have three or fewer processing stations.

Figure 10 illustrates an embodiment of a wafer transport system 1090 for transporting wafers within a processing chamber 1014. In some embodiments, the wafer transport system 1090 can transport wafers between various processing stations and/or between processing stations and loading bays. It should be understood that any suitable wafer transport system can be employed. Non-limiting examples include wafer caddies and wafer transport robots. Figure 10 also illustrates an embodiment of a system controller 1050 for controlling the processing conditions and hardware status of the processing tool 1000. The system controller 1050 may include one or more memory devices 1056, one or more mass storage devices 1054, and one or more processors 1052. The processor 1052 may include a CPU or computer, analog and/or digital input/output connections, a stepper motor controller board, etc.

In some implementations, system controller 1050 controls all activities of processing tool 1000. System controller 1050 executes system control software 1058, which is stored in mass storage device 1054, loaded into memory device 1056, and executed on processor 1052. Alternatively, control logic can be hard-coded into system controller 1050. For these purposes, application-specific integrated circuits, programmable logic devices (e.g., field-programmable gate arrays, or FPGAs) and similar devices can be used. In the following discussion, in any use of "software" or "coding," functionally similar hard-coded logic may be appropriately used. The system control software 1058 may include instructions for controlling the following: timing, gas mixing, gas flow rate, chamber and/or processing station pressure, chamber and/or processing station temperature, wafer temperature, target power level, RF power level, substrate base, clamp and/or support position, in-situ process monitoring, and other parameters for specific processes performed by the processing tool 1000. The system control software 1058 can be configured in any suitable manner. For example, various processing tool component subroutines or control objects can be written to control the operation of the processing tool components used to perform various processing tool processes. The system control software 1058 can be coded in any suitable computer-readable programming language.

In some embodiments, the system control software 1058 may include input/output control (IOC) sequence instructions for controlling the various parameters described above. In some embodiments, other computer software and/or programs may be used, stored on a mass storage device 1054 and/or memory device 1056 associated with the system controller 1050. Examples of programs or program fragments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

The substrate positioning program may include code for the processing tool components to load the substrate onto the base 1018 and to control the distance between the substrate and other components of the processing tool 1000.

The process gas control program may include codes for controlling the composition and flow rate of process gases (e.g., etching gases), and optionally for stabilizing the pressure at one or more processing stations prior to deposition. The pressure control program may include codes for controlling the pressure within the processing station by adjusting, for example, throttle valves in the processing station's exhaust system, the flow of gas entering the processing station, etc.

The heater control program may include coding to control the current to the heating unit, which is used to heat the substrate or window. Alternatively, the heater control program may control the delivery of a heat transfer gas (e.g., helium) to the substrate or window.

According to the embodiments described herein, the plasma control program may include encoding for setting the RF power level applied to the processing electrodes in one or more processing stations.

In some implementations, a user interface associated with the system controller 1050 may be provided. The user interface may include a display screen, a graphical software display of the device and/or processing conditions, and user input devices such as pointers, a keyboard, a touch screen, a microphone, etc.

In some implementations, the parameters adjusted by the system controller 1050 may be related to the processing conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF bias power level), etc. These parameters may be provided to the user in the form of a recipe, which can be input using a user interface.

Through the analog and/or digital input connections of the system controller 1050, signals for monitoring the processing can be provided from various processing tool sensors. Processing tool sensors may include optical sensors as described above, as well as any FTIR or UV spectrometer. Signals for controlling the processing can be output through the analog and digital output connections of the processing tool 1000. Other examples of monitorable processing tool sensors include mass flow controllers, pressure sensors (e.g., pressure gauges), thermocouples, etc. Appropriately programmed feedback and control algorithms, along with data from these sensors, can be used to maintain processing conditions.

The system controller 1050 provides program instructions for implementing the above-described deposition process. These instructions can control various processing parameters, such as DC power level, RF bias power level, pressure, temperature, etc. According to the various embodiments described herein, the instructions can control parameters to operate deposition, development, cleaning, baking, and/or etching processes.

Typically, the system controller 1050 will include one or more memory devices and one or more processors for executing instructions, such that the device will perform the methods according to the disclosed embodiments. A machine-readable medium may be coupled to the system controller 1050, the machine-readable medium including instructions for controlling processing operations according to the disclosed embodiments.

In a broad sense, the system controller 1050 can be defined as an electronic component comprising various integrated circuits, logic, memory, and/or software for receiving instructions, issuing instructions, controlling operations, enabling cleaning operations, enabling endpoint measurements, and achieving similar functions. Integrated circuits may include chips in firmware form that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the system controller 1050 in the form of various individual settings (or program files), defining operating parameters for performing specific processing on, on, or on the semiconductor wafer or on the system.

In some implementations, the system controller 1050 may be part of or coupled to a computer that is integrated with, coupled to, or otherwise networked to the system, or a combination thereof. For example, the system controller 1050 may be in the cloud or in part of a foundry mainframe computer system, allowing remote control of wafer processing. The computer enables remote control of the system to monitor the current processing of manufacturing operations, examine historical records of past manufacturing operations, examine trends or performance evaluations of multiple manufacturing operations, change parameters of the current processing, set processing steps after the current processing, or start a new processing. In some examples, a remote computer (e.g., a server) may provide the processing recipe to the system via a network, which may include a local area network or the Internet. The remote computer may include a user interface that allows for the input or programming of parameters and/or settings, which are then transmitted from the remote computer to the system. In some examples, the system controller 1050 receives instructions in the form of data, specifying a plurality of parameters for each of the processing steps to be performed during one or more operations. It should be understood that these parameters may be specific to the type of processing to be performed and the type of tool with which the system controller 1050 engages or controls it. Therefore, as described above, the system controller 1050 can be distributed, for example, by comprising one or more independent controllers that are networked together and operate toward a common goal (such as the processing and control described herein). An example of a distributed controller for such a goal is one or more integrated circuits that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) to control processing within the chamber.

In a non-limiting sense, exemplary systems may include plasma etching chambers or modules, deposition chambers or modules, rotary cleaning chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, orbital chambers or modules, EUV lithography chambers (scanners) or modules, dry imaging chambers or modules, and any other semiconductor processing systems relating to or used for the processing and/or manufacturing of semiconductor wafers.

As described above, depending on one or more processing steps to be performed by the tool, the system controller 1050 may communicate with one or more of the following: other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located in various parts of the factory, a main computer, another controller, or material transport tools used to move wafer containers into and out of tool locations and/or loading ports in a semiconductor manufacturing plant.

The ICP reactor is now described, which in some implementations is suitable for performing certain dry development or etching operations. Although this document describes an ICP reactor, it should be understood that in some implementations, a capacitively coupled plasma reactor may also be used.

Figure 11 schematically shows a cross-sectional view of an inductively coupled plasma apparatus 1100 suitable for performing certain embodiments or embodiments (e.g., dry development, cleaning, and/or etching), an example of which is the Kiyo® reactor manufactured by Lam Research Corp., Fremont, CA. In other embodiments, other tools or tool types with the capability to perform the dry development, cleaning, and/or etching processes described herein may be used.

The inductively coupled plasma apparatus 1100 includes an overall process chamber 1124, structurally defined by chamber walls 1101 and windows 1111. The chamber walls 1101 may be made of stainless steel, aluminum, or plastic. The windows 1111 may be made of quartz or other dielectric materials. An optional internal plasma grille 1150 divides the overall process chamber into an upper sub-chamber 1102 and a lower sub-chamber 1103. In most embodiments, the plasma grille 1150 can be removed, thereby utilizing the chamber space formed by sub-chambers 1102 and 1103. A clamp 1117 is located within the lower sub-chamber 1103 near its bottom inner surface. Clamp 1117 is used to receive and hold wafer 1119 for etching and deposition processes. Clamp 1117 may be an electrostatic clamp for supporting wafer 1119 (when it is present). In some embodiments, an edge ring (not shown) surrounds clamp 1117, and the upper surface of the edge ring is approximately planar with the top surface of wafer 1119 (when it is present on clamp 1117). Clamp 1117 also includes electrostatic electrodes for clamping and declamping wafer 1119. For this purpose, filters and DC clamping power supplies (not shown) may be provided. Other control systems may also be provided to lift the wafer 1119 away from the clamp 1117. The clamp 1117 can be energized using an RF power supply 1123. The RF power supply 1123 is connected to a matching circuit 1121 via a connector 1127. The matching circuit 1121 is connected to the clamp 1117 via a connector 1125. In this manner, the RF power supply 1123 is connected to the clamp 1117. In various embodiments, the bias power supply of the electrostatic clamp can be set to approximately 50 V, or to a different bias power supply depending on the processing performed according to the disclosed embodiments. For example, the bias power supply can be between about 20 Vb and about 100 V, or between about 30 V and about 150 V.

The components used for plasma generation include a coil 1133 located above the window 1111. In some embodiments, the coil is not used in the disclosed embodiment. The coil 1133 is made of conductive material and includes at least one full turn. An example of the coil 1133 shown in FIG11 includes three turns. The cross-section of the coil 1133 is shown with symbols, where the coil with an "X" extends into the page, and the coil with a "●" extends out of the page. The components used for plasma generation also include an RF power supply 1141 for supplying RF power to the coil 1133. Generally, the RF power supply 1141 is connected to a matching circuit 1139 via a connector 1145. The matching circuit 1139 is connected to the coil 1133 via a connector 1143. In this manner, the RF power supply 1141 is connected to the coil 1133. An optional Faraday shield 1149 is located between the coil 1133 and the window 1111. The Faraday shield 1149 may be spaced apart from the coil 1133. In some embodiments, the Faraday shield 1149 is located immediately above the window 1111. In some embodiments, the Faraday shield 1149 is located between the window 1111 and the clamp 1117. In some embodiments, the Faraday shield 1149 is not spaced apart from the coil 1133. For example, the Faraday shield 1149 may be directly below the window 1111 without gaps. The coil 1133, the Faraday shield 1149, and the window 1111 are each configured to be substantially parallel to each other. Faraday shield 1149 prevents metal or other substances from depositing on the window 1111 of the process chamber 1124.

Process gases may flow into the process chamber via one or more main gas inlets 1160 located in the upper sub-chamber 1102, and/or via one or more side gas inlets 1170. Similarly, although not explicitly shown, similar gas inlets may be used to supply process gases to the capacitively coupled plasma processing chamber. A vacuum pump (e.g., a single- or two-stage mechanical dry pump and/or a turbomolecular pump) 1140 may be used to extract process gases from the process chamber 1124 and maintain pressure within the process chamber 1124. For example, during a purging operation, the vacuum pump may be used to evacuate the lower sub-chamber 1103. Valve-controlled conduits may be used to connect the vacuum pump fluid to the process chamber 1124 for selective control of the vacuum environment provided by the vacuum pump. During plasma processing, this can be achieved by using a closed-loop controlled current limiting device (e.g., a throttle valve (not shown) or a pendulum valve (not shown)). Similarly, a vacuum pump and valve-controlled fluid connection to the capacitively coupled plasma processing chamber can also be used.

During operation of the apparatus 1100, one or more process gases may be supplied via air inlets 1160 and/or 1170. In some embodiments, process gases may be supplied only via the main air inlet 1160 or only via the side air inlet 1170. In some examples, the air inlets shown in the figure may be replaced by, for example, more complex air inlets, one or more gas distributors. The Faraday shield 1149 and/or optional grille 1150 may include internal channels and openings allowing process gases to be delivered to the process chamber 1124. Either or both of the Faraday shield 1149 and optional grille 1150 may function as gas distributors to deliver process gases. In some embodiments, the liquid vaporization and conveying system may be located upstream of the process chamber 1124, such that once the liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the process chamber 1124 through the gas inlet 1160 and/or 1170.

RF power is supplied from RF power supply 1141 to coil 1133, causing RF current to flow through coil 1133. The RF current flowing through coil 1133 generates an electromagnetic field around coil 1133. The electromagnetic field induces a current in the upper sub-chamber 1102. The various ions and free radicals generated interact physically and chemically with wafer 1119, etching feature areas of wafer 1119 and selectively depositing thin films on wafer 1119.

If a plasma gate 1150 is used, thus having both an upper sub-chamber 1102 and a lower sub-chamber 1103, an induced current acts on the gas present in the upper sub-chamber 1102 to generate an electron-ion plasma in the upper sub-chamber 1102. An optional internal plasma gate 1150 limits the number of thermionic electrons in the lower sub-chamber 1103. In some embodiments, the device 1100 is designed and operated such that the plasma in the lower sub-chamber 1103 is an ion-ion plasma.

Both the upper electron-ion plasma and the lower ion-ion plasma can contain both positive and negative ions; however, the ion-ion plasma will have a larger negative ion to positive ion ratio. Volatile etching and/or deposition byproducts can be removed from the lower sub-chamber 1103 via opening 1122. The clamp 1117 disclosed herein is operable at temperatures ranging from approximately 10°C to approximately 250°C. The temperature will depend on the processing operation and the specific formulation.

When installed in a cleanroom or manufacturing facility, device 1100 can be coupled to a plant facility (not shown). The plant facility includes piping for process gases, vacuum, temperature control, and environmental particulate control. This plant facility is coupled to device 1100 when installed in the target manufacturing facility. Additionally, device 1100 can be coupled to a transfer chamber, allowing robots to use typical automation to transfer semiconductor wafers in and out of device 1100.

In some embodiments, system controller 1130 (which may include one or more physical or logical controllers) controls some or all of the operations of process chamber 1124. System controller 1130 may include one or more memory devices and one or more processors. In some embodiments, apparatus 1100 includes a switching system for controlling flow rate and duration when performing the disclosed embodiments. In some embodiments, the switching time of apparatus 1100 may be up to about 500 ms or up to about 750 ms. Switching time may depend on fluid chemicals, the selected formulation, reactor architecture, and other factors.

In some embodiments, system controller 1130 is part of a system, which may be part of one of the above-described examples. Such systems may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more platforms for performing processing, and/or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic components for controlling the operation of these systems before, during, and after the processing of semiconductor wafers or substrates. Electronic components may be integrated into system controller 1130, which may control various components or sub-parts of one or more systems. Depending on the processing parameters and/or system type, the system controller 1130 can be programmed to control any of the processing disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positioning and operation settings, wafer transfer into and out of tools connected to or coupled to a particular system, and other transfer tools and/or loading chambers.

EUVL patterning can be performed using any suitable tool, commonly referred to as a scanner, such as the TWINSCAN NXE: 3300B® platform from ASML, Veldhoven, NL. The EUVL patterning tool can be a standalone device into which or from which the substrate is moved for the deposition and etching described herein. Alternatively, as described below, the EUVL patterning tool can be a module on a larger, multi-component tool. Figure 12 illustrates a semiconductor process cluster tool architecture with a vacuum-integrated deposition, EUV patterning, and dry development/etching module coupled with a vacuum transfer module, suitable for performing the processes described herein. While these processes can be performed in the absence of such a vacuum-integrated device, such devices may be advantageous in certain implementations.

Figure 12 illustrates a semiconductor process cluster tooling architecture with vacuum-integrated deposition and patterning modules coupled to a vacuum transfer module, suitable for performing the processes described herein. The configuration of transfer modules used to "transfer" wafers between multiple storage devices and processing modules can be referred to as a "cluster tooling architecture" system. Depending on the specific processing requirements, the deposition and patterning modules are vacuum-integrated. Other modules (e.g., for etching) may also be included on this cluster.

The vacuum transfer module (VTM) 1238 engages with four processing modules 1220a-1220d, each optimized for various manufacturing processes. As an example, processing modules 1220a-1220d can be used to perform deposition, evaporation, ELD, dry development, cleaning, etching, stripping, and/or other semiconductor processes. For instance, module 1220a can be an ALD reactor operable to perform vapor deposition processes as described herein, such as a Vector tool available from Lam Research Corporation, Fremont, CA. Module 1220b can be a PECVD tool, such as Lam Vector®. It should be understood that the diagrams are not necessarily to scale.

Gas chambers 1242 and 1246 (also referred to as loading chambers or transport modules) are coupled to VTM 1238 and patterning module 1240. For example, as described above, a suitable patterning module could be the TWINSCAN NXE: 3300B® platform (supplied by ASML of Veldhoven, NL). This tooling architecture allows workpieces (e.g., semiconductor substrates or wafers) to be transported under vacuum so that they do not react before exposure. The integration of the deposition module with the lithography tooling is facilitated by the fact that EUVL requires significantly reduced pressure due to the strong optical absorption of incident photons by ambient gases (e.g., _H₂O , _O₂ , etc.).

As described above, this integrated architecture is only one possible implementation of the tools used to perform the aforementioned processing. The implementation of these processes can also be performed using more conventional standalone EUVL scanners and deposition reactors as modules, such as the Lam Vector tool, which is either standalone or integrated into a cluster architecture with other tools such as etching, stripping, etc. (e.g., the Lam Kiyo or Gamma tools), as shown in Figure 12 (but without an integrated patterned module).

Gas chamber 1242 can be an "output" load chamber, representing the transfer of substrate from VTM 1238 used by deposition module 1220a to patterning module 1240, while gas chamber 1246 can be an "input" load chamber, representing the transfer of substrate from patterning module 1240 back to VTM 1238. Input load chamber 1246 can also serve as a connection to the outside of the tool for substrate loading and unloading. Each processing module has a facet that connects the module to VTM 1238. For example, deposition processing module 1220a has facet 1236. Within each facet, sensors (e.g., sensors 1-18 shown in the figure) are used to detect the passage of wafer 1226 as it moves between individual stations. The patterned module 1240 and air chambers 1242 and 1246 may be similarly equipped with additional dimensions and sensors (not shown).

The main VTM robot 1222 transports wafers 1226 between modules (including gas chambers 1242 and 1246). In one embodiment, robot 1222 has one arm, while in another embodiment, robot 1222 has two arms, each arm having an end effector 1224 to pick up wafers (e.g., wafer 1226) for transport. A front-end robot 1244 is used to transport wafers 1226 from output gas chamber 1242 to patterning module 1240 and from patterning module 1240 to input gas chamber 1246. Front-end robot 1244 can also transport wafers 1226 between the input load chamber and the outside of the tool for substrate loading and unloading. Because the input chamber module 1246 can be matched to environments between atmosphere and vacuum, the wafer 1226 can move between these two pressure environments without damage.

It should be noted that EUVL tools typically operate under higher vacuum compared to deposition tools. If this is the case, it is desirable to increase the vacuum environment of the substrate during transport from deposition to the EUVL tool to allow the substrate to be degassed before entering the patterning tool. The output gas chamber 1242 provides this function by maintaining the transported wafer at a lower pressure (not higher than the pressure in the patterning module 1240) for a period of time and evacuating any leaving gas, thus preventing contamination of the optical components of the patterning module 1240 by leaving gas from the substrate. A suitable pressure for the output leaving gas chamber is no more than 1E-8 Torr.

In some embodiments, system controller 1250 (which may include one or more physical or logic controllers) controls some or all of the operations of the cluster tools and/or individual modules thereof. It should be noted that the controller may be local to the cluster architecture, or located outside the cluster architecture on a manufacturing floor, or located remotely and connected to the cluster architecture via a network. System controller 1250 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and/or digital input/output connections, stepper motor control boards, and other similar components. Multiple instructions are executed on the processor to perform appropriate control operations. These instructions may be stored on memory devices connected to the controller or may be provided via a network. In some implementations, the system controller executes system control software. The controller described above with respect to any of Figures 9, 10, and 11 can be implemented in conjunction with the tool shown in Figure 12. Conclusion

It should be understood that the examples and practices described herein are for illustrative purposes only, and various modifications or variations are suggested to those skilled in the art. Although various details have been omitted for clarity, various alternative designs are possible. Therefore, these examples should be considered illustrative rather than limiting, and the content of this disclosure is not limited to the details presented herein, but can be modified within the scope of this disclosure.

1-18: Sensor 100: Process 102-116: Block 200: Wafer 202: Substrate 204: Substrate Layer 206: Patterned Metal-containing EUV Photoresist Film 206a: Unexposed EUV Area 206b: EUV Exposed Area 208: Photoresist Mask 300: Wafer 302: Substrate 304: Substrate Layer 306: Photoresist Film 306a: Unexposed Area 306b: Exposed Area 308: Photoresist Mask 410: Optical Sensor 412: Light Source 414: Spectroradiometer 41 6: Optical cable 420: Window 430: Substrate 440: Substrate support 450: Process chamber 460: Controller 800: Process 802-808: Block 900: Equipment 902: Process chamber 904: Substrate 906: Gas distributor 908: Substrate support 910: Heater 912: Light source 914: Spectroreflectometer 916: Gas delivery system 920: Optical sensor 922: Light source 924: Spectroreflectometer 926: Vacuum line 928: Throttling valve 930: Window 932, 934, 936: Valve; 940: Mixing container; 942: Vaporization point; 950: Computer controller; 1000: Multi-station processing tool; 1002: Inbound loading chamber; 1004: Outbound loading chamber; 1006: Robot; 1008: Box; 1010: Atmospheric port; 1012: Base; 1014: Processing chamber; 1016: Chamber transfer port; 1018: Base; 1050: System controller 1052: Processor 1054: Mass storage device 1056: Memory device 1058: System control software 1090: Wafer transport system 1100: Inductively coupled plasma equipment 1101: Chamber wall 1102: Upper sub-chamber 1103: Lower sub-chamber 1111: Window 1117: Clamp 1119: Wafer 11 21: Matching Circuit 1122: Opening 1123: RF Power Supply 1125: Connector 1127: Connector 1130: System Controller 1133: Coil 1139: Matching Circuit 1140: Vacuum Pump 1141: RF Power Supply 1143: Connector 1145: Connector 1149: Faraday Shield 1150: Plasma Grille 1160: Main Air Inlet 1170: Side Air Inlet 1220a-1220d: Processing Module 1222: Robot 1224: End Effector 1226: Wafer 1236: Surface Mount 1238: Vacuum Transfer Module (VTM) 1240: Pattern Module 1242: Gas Chamber 1244: Front-End Robot 1246: Gas Chamber 1250: System Controller

Figure 1 presents a flowchart of an exemplary method for depositing and developing photoresist, based on some implementation examples.

Based on some implementation examples, Figures 2A-2C show cross-sectional schematic diagrams of different processing stages, including photoresist development and pattern transfer.

Based on some implementation examples, Figures 3A-3D present cross-sectional schematic diagrams of the progress of photoresist development.

According to some implementation examples, Figure 4 depicts a process chamber for processing photoresist and an optical sensor optically coupled to the process chamber for in-situ process monitoring of photoresist.

Figure 5 shows a schematic diagram of a substrate having multiple interfaces for spectral reflection of normal incidence.

According to some implementation examples, Figure 6 shows a curve plotting the change of reflected radiation intensity over time during photoresist development, where a cross-sectional schematic shows the development progress of the photoresist at different times.

Figure 7A shows a curve plotting the change of thickness or material properties as a function of time during photoresist deposition under process conditions A and B.

Figure 7B shows a curve plotting the change of thickness or material properties as a function of time during photoresist development under process conditions A and B.

Figure 7C shows a curve plotting the change of thickness or material properties as a function of time during photoresist baking under process conditions A and B.

Figure 8 presents a flowchart of an exemplary method for monitoring a photoresist fabrication process, based on some implementation examples.

According to some embodiments, Figure 9 depicts a schematic diagram of an exemplary device, which includes a process chamber, an optical sensor optically coupled to the process chamber, a gas line coupled to the process chamber, and a vacuum line coupled to the process chamber.

Based on some of the disclosed embodiments, Figure 10 depicts a schematic diagram of an exemplary multi-station processing tool suitable for performing various operations.

Figure 11 shows a schematic cross-sectional view of an exemplary inductively coupled plasma apparatus for carrying out some of the embodiments and operations described herein.

Figure 12 illustrates a semiconductor process cluster tooling architecture with a vacuum-integrated deposition and patterning module that integrates with a vacuum transfer module, suitable for performing the processes described herein.

410: Optical Sensor

412: Light Source

414: Optical Reflectometer

416: Optical Cable

420: Window area

430:Substrate

440: Substrate support component

450: Process Chamber

460: Controller

Claims (30)

A method for monitoring a photoresist process on a semiconductor substrate includes: performing a photoresist process in a process chamber, involving the semiconductor substrate having a metal-containing EUV photoresist material; using an optical sensor to expose the semiconductor substrate to incident radiation; and using the optical sensor to monitor the change of the metal-containing EUV photoresist material on the semiconductor substrate in the process chamber over time. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate includes performing the photoresist process by depositing the metal-containing EUV photoresist material on the semiconductor substrate. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate includes performing the photoresist process by baking the semiconductor substrate on which the metal-containing EUV photoresist material is formed. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate includes performing the photoresist process by developing the metal-containing EUV photoresist material formed on the semiconductor substrate. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate, wherein monitoring the change of the metal-containing EUV photoresist material over time includes: receiving reflected radiation in the process chamber at the optical sensor; and measuring the intensity of the reflected radiation, wherein the change of the intensity of the reflected radiation over time is used to determine the progress of the photoresist process. As in claim 5, the method for monitoring a photoresist process on a semiconductor substrate, wherein the change in the intensity of the reflected radiation is related to the change in the thickness of the metal-containing EUV photoresist material. The method for monitoring a photoresist process on a semiconductor substrate, as described in claim 5, further includes determining the end point of the photoresist process by determining that the intensity of the reflected radiation reaches a threshold. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate, wherein the optical sensor includes a spectroreflectometer. The monitoring method for photoresist fabrication on a semiconductor substrate, as described in claim 1, wherein the optical sensor includes a broadband light source. As in claim 9, the method for monitoring a photoresist process on a semiconductor substrate, wherein the broadband light source is configured to emit radiation in a broadband range of wavelengths between approximately 200 nm and approximately 900 nm. The method for monitoring a photoresist process on a semiconductor substrate, as described in claim 1, wherein the incident radiation is provided perpendicular to the surface of the semiconductor substrate. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate, wherein the metal-containing EUV photoresist material includes organotin oxide. The method for monitoring a photoresist process on a semiconductor substrate, as described in claim 1, further includes: using a Fourier transform infrared (FTIR) spectrometer or an ultraviolet (UV) spectrometer to detect changes in a functional group on the semiconductor substrate during the photoresist process. As in claim 1, the method for monitoring a photoresist process on a semiconductor substrate, wherein the incident radiation is provided by optical coupling to a window of the process chamber. The method for monitoring a photoresist process on a semiconductor substrate, as described in claim 14, further includes: heating the window to limit the deposition or condensation of byproducts or other materials on the window. As in claim 14, the method for monitoring a photoresist process on a semiconductor substrate, wherein the window is configured to block the transmission of UV radiation into the process chamber. The method for monitoring a photoresist process on a semiconductor substrate, as described in claim 14, further includes: flowing one or more non-reactive gases in a region near the window to limit the deposition or condensation of byproducts or other materials on the window. The monitoring method for photoresist processing on a semiconductor substrate, as described in claim 14, further includes: exposing the window to plasma in the process chamber to perform in-situ cleaning of the material formed on the window. As in claim 1, the method for monitoring a photoresist fabrication process on a semiconductor substrate, wherein using the optical sensor to monitor the change of the metal-containing EUV photoresist material includes: using a first optical sensor to monitor the change of the metal-containing EUV photoresist material at a first location on the semiconductor substrate over time; and using a second optical sensor to monitor the change of the metal-containing EUV photoresist material at a second location on the semiconductor substrate over time. As in claim 19, the method for monitoring a photoresist process on a semiconductor substrate, wherein the first position corresponds to the center of the semiconductor substrate, and the second position corresponds to the edge of the semiconductor substrate. As in claim 1, a method for monitoring a photoresist process on a semiconductor substrate, wherein the optical sensor is integrated with a spray head in the process chamber. An apparatus for performing a photoresist fabrication process includes: a process chamber having a substrate support configured to support a semiconductor substrate; a vacuum line coupled to the process chamber; a gas line coupled to the process chamber; one or more photosensors optically coupled to the process chamber; and a controller configured with a plurality of instructions for performing the following operation: performing a photoresist fabrication process in the process chamber, wherein the photoresist fabrication process includes depositing a metal-containing EUV... The photoresist material is placed on the semiconductor substrate, and the semiconductor substrate on which the metal-containing EUV photoresist material is formed is baked or the metal-containing EUV photoresist material formed on the semiconductor substrate is developed; the semiconductor substrate is exposed to incident radiation using one or more optical sensors; and the metal-containing EUV photoresist material on the semiconductor substrate is monitored over time using one or more optical sensors to determine the progress of the photoresist process. The apparatus for implementing the photoresist process as described in claim 22, wherein each of the one or more optical sensors includes a spectroreflectometer and a broadband light source. As in claim 22, the apparatus for implementing a photoresist process, wherein the controller configured with a plurality of instructions for determining the progress of the photoresist process is configured with a plurality of instructions to perform the following operations: receiving reflected radiation in the process chamber at one or more optical sensors; and measuring the intensity of the reflected radiation, wherein the change in the intensity of the reflected radiation over time is used to determine the progress of the photoresist process. The apparatus for performing a photoresist process, as described in claim 24, wherein the controller is further configured with a plurality of instructions to perform the following operation: determining the end of the photoresist process by determining that the intensity of the reflected radiation has reached a threshold. As in claim 24, the equipment for implementing the photoresist process, wherein the metal-containing EUV photoresist material includes organotin oxide. The apparatus for performing the photoresist process as described in claim 24 further includes: a window optically coupled to the process chamber, wherein the incident radiation is emitted into the process chamber through the window. The apparatus for implementing the photoresist process as described in claim 27, wherein the controller is further configured with a plurality of instructions to perform the following operations: heating the window to limit the deposition or condensation of byproducts or other materials on the window. The apparatus for implementing the photoresist process as described in claim 27, wherein the controller is further configured with a plurality of instructions to perform the following operations: flowing one or more non-reactive gases in a region near the window to limit the deposition or condensation of byproducts or other materials on the window. As in claim 27, the apparatus for implementing a photoresist process, wherein the one or more optical sensors include: a first optical sensor configured to monitor changes in the metal-containing EUV photoresist material at a first location on one of the semiconductor substrates; and a second optical sensor configured to monitor changes in the metal-containing EUV photoresist material at a second location on one of the semiconductor substrates.