TW202406261A - Semiconductor protector - Google Patents
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- TW202406261A TW202406261A TW111128264A TW111128264A TW202406261A TW 202406261 A TW202406261 A TW 202406261A TW 111128264 A TW111128264 A TW 111128264A TW 111128264 A TW111128264 A TW 111128264A TW 202406261 A TW202406261 A TW 202406261A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 220
- 230000001012 protector Effects 0.000 title claims abstract description 27
- 230000005669 field effect Effects 0.000 claims description 19
- 229910044991 metal oxide Inorganic materials 0.000 claims description 19
- 150000004706 metal oxides Chemical class 0.000 claims description 19
- 238000005516 engineering process Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
Description
本發明半導體保護器,具有在直流電路應用過程中負載兩端發生過載或短路時保護直流電源之功能之電子技術領域。 The semiconductor protector of the present invention is in the field of electronic technology and has the function of protecting the DC power supply when overload or short circuit occurs at both ends of the load during the application of the DC circuit.
本發明半導體保護器經過發明人搜尋相關半導體保護裝置與相關之電子保護器發明文件之結果,並沒有發現與本發明半導體保護器相同或相似技術,尤其是本發明之第一半導體與第二半導體具有串聯連接,自己保護與自鎖之功能之技術手段而能達到直流電路應用過程中,當負載兩端發生過載或短路時具有保護直流電源之功能,是為世界首創之發明;本發明應用四腳封裝如TO-247-4LD為例之絕緣閘極雙極電晶體做為第四半導體,其第四半導體之開爾文射極(Kelin Emitter)與功率射極(Power Emittter)兩端之電壓降具有提供第四半導體集極電流之過載或短路數據之功能,是為世界首創之發明;其他電路特徵皆在本發明說明書中有詳細之說明。 The inventor of the semiconductor protector of the present invention searched for relevant semiconductor protection devices and related electronic protector invention documents, and found no identical or similar technologies to the semiconductor protector of the present invention, especially the first semiconductor and the second semiconductor of the present invention. It has the technical means of series connection, self-protection and self-locking functions to achieve the function of protecting the DC power supply when an overload or short circuit occurs at both ends of the load during the application of the DC circuit. It is the first invention in the world; the invention has four applications An insulated gate bipolar transistor in a foot package such as TO-247-4LD is used as the fourth semiconductor. The voltage drop across the Kelvin Emitter and Power Emitter of the fourth semiconductor has The function of providing overload or short-circuit data of the fourth semiconductor collector current is a world-first invention; other circuit features are described in detail in the specification of the invention.
本發明之目的: Purpose of the present invention:
1.本發明應用第一半導體、第二半導體、第三半導體、第四半導體、第一電阻器、第二電阻器、第三電阻器、第一二極體及電壓比較器,達到能在直流電路供電中發生負載過載或短路時直流電源得到保護。 1. The present invention uses the first semiconductor, the second semiconductor, the third semiconductor, the fourth semiconductor, the first resistor, the second resistor, the third resistor, the first diode and the voltage comparator to achieve the ability to operate in DC The DC power supply is protected when overload or short circuit occurs in the circuit power supply.
2.當負載發生短路時,本發明應用第一半導體或第四半導體能在極短之時間內執行開路動作,達到保護直流電源電路之功能及避免因負載短路而引起的各種災害。 2. When the load is short-circuited, the present invention uses the first semiconductor or the fourth semiconductor to perform an open-circuit action in a very short time, achieving the function of protecting the DC power circuit and avoiding various disasters caused by the load short-circuit.
3.本發明之第一半導體或第四半導體為執行本發明在開機時,使負載得到直流電源之供電,在執行本發明在關機時,使負載得不到直流電源之供電。 3. The first semiconductor or the fourth semiconductor of the present invention enables the load to receive power from the DC power supply when the invention is turned on, and prevents the load from receiving power from the DC power supply when the invention is turned off.
4.本發明在開機時,第一半導體或第四半導體之導通(On)為由第一電源供應電壓。 4. When the present invention is turned on, the first semiconductor or the fourth semiconductor is turned on to supply voltage from the first power supply.
5.本發明不論在開機或關機時,其第二半導體一直保持導通狀態,此時本發明之開機或關機動作由第一半導體或第四半導體執行。 5. The second semiconductor of the present invention remains in a conductive state no matter when it is turned on or off. At this time, the turning on or off action of the present invention is performed by the first semiconductor or the fourth semiconductor.
本發明有下列之特徵: The present invention has the following characteristics:
1.本發明之第一半導體與第二半導體具有串聯連接之特徵,其第一半導體負責直流電源之開路(Off)與導通供電於負載。 1. The first semiconductor and the second semiconductor of the present invention have the characteristics of being connected in series, and the first semiconductor is responsible for the open circuit (Off) and conduction of the DC power supply to supply power to the load.
2.本發明之第二半導體提供汲源極導通狀態電阻(Drain-source on-state resistance),做為第一半導體之汲極電流在過載或短路時,經過第二半導體所產生之第二半導體汲源極電壓(Drain-source voltage)之數據之功能。 2. The second semiconductor of the present invention provides drain-source on-state resistance, which is generated by the drain current of the first semiconductor passing through the second semiconductor during overload or short circuit. The function of data of drain-source voltage.
3.本發明之第三半導體,其負責控制第一半導體或第四半導體之開路與導通動作,以達到負載兩端發 生短路時保護直流電源電路之目的。 3. The third semiconductor of the present invention is responsible for controlling the opening and conduction actions of the first semiconductor or the fourth semiconductor to achieve the output voltage at both ends of the load. The purpose is to protect the DC power circuit when a short circuit occurs.
4.本發明設有第一電阻器具有限制電流之功能,以防止第一半導體因為閘極過大電流而損壞第一半導體。 4. The present invention provides a first resistor with a current limiting function to prevent the first semiconductor from being damaged due to excessive gate current.
5.本發明設有第二電阻器具有限制電流之功能,以防止第二半導體因為閘極過大電流而損壞第二半導體。 5. The present invention provides a second resistor with the function of limiting current to prevent the second semiconductor from being damaged due to excessive gate current.
6.本發明設有第三電阻器具有限制電流之功能,以防止電壓比較器之正輸入端過大電流而損壞電壓比較器。 6. The present invention provides a third resistor with the function of limiting current to prevent excessive current at the positive input end of the voltage comparator from damaging the voltage comparator.
7.本發明設有第一二極體具有單方向傳導電流功能,使電壓比較器之輸出端輸出之電壓單方向供電於電壓比較器之正輸入端。 7. The present invention is provided with a first diode with the function of conducting current in one direction, so that the voltage output by the output terminal of the voltage comparator can be supplied to the positive input terminal of the voltage comparator in one direction.
8.本發明設有第一半導體、第三半導體與電壓比較器所構成的電路,使第一半導體具有自己保護(Self Protection)之功能。 8. The present invention is provided with a circuit composed of a first semiconductor, a third semiconductor and a voltage comparator, so that the first semiconductor has the function of self protection.
9.本發明設有第四半導體、第三半導體與電壓比較器所構成的電路,使第四半導體具有自己保護之功能。 9. The present invention is provided with a circuit composed of a fourth semiconductor, a third semiconductor and a voltage comparator, so that the fourth semiconductor has its own protection function.
10.本發明設有電壓比較器與第一二極體,以達到使電壓比較器具有自鎖(Inter Lock)之功能。 10. The present invention is provided with a voltage comparator and a first diode to achieve the self-locking (Inter Lock) function of the voltage comparator.
11.本發明之第一半導體包括N通道金屬氧化半導體場效電晶體(N Channel Metal Oxide Semiconductor Field Effect Transistor,N Channel MOSFET)與絕緣閘極雙極電晶體(Insulated Gate Bipolar Transistor,IGBT),二者可以根據需求自行選用。 11. The first semiconductor of the present invention includes an N Channel Metal Oxide Semiconductor Field Effect Transistor (N Channel MOSFET) and an Insulated Gate Bipolar Transistor (IGBT). The second semiconductor is an N Channel MOSFET. Users can choose according to their needs.
12.本發明之第二半導體包括N通道金屬氧化半導體場效電晶體與絕緣閘極雙極電晶體,二者可以根據需求自行選用。 12. The second semiconductor of the present invention includes an N-channel metal oxide semiconductor field effect transistor and an insulated gate bipolar transistor, both of which can be selected according to needs.
13.本發明之第三半導體包括N通道金屬氧化半導體場效電晶體與絕緣閘極雙極電晶體二者可以根據需求自行選用。 13. The third semiconductor of the present invention includes N-channel metal oxide semiconductor field effect transistor and insulated gate bipolar transistor, which can be selected according to needs.
14.本發明之第四半導體是為四脚封裝之半導體,包括四脚封裝之N通道金屬氧化半導體場效電晶體與四脚封裝之絕緣閘極雙極電晶體二者可以根據需求自行選用。 14. The fourth semiconductor of the present invention is a four-pin packaged semiconductor, including a four-pin packaged N-channel metal oxide semiconductor field effect transistor and a four-pin packaged insulated gate bipolar transistor, which can be selected according to needs.
15.本發明之第四半導體是為模組(Module)封裝之半導體,包括模組封裝之N通道金屬氧化半導體場效電晶體與模組封裝之絕緣閘極雙極電晶體二者可以根據需求自行選用。 15. The fourth semiconductor of the present invention is a semiconductor packaged in a module, including an N-channel metal oxide semiconductor field effect transistor packaged in the module and an insulated gate bipolar transistor packaged in the module. Both can be configured according to needs. Choose by yourself.
16.本發明之第二半導體為了應用之需求,可以用電阻感測器(Resistor Sensor)替代。 16. The second semiconductor of the present invention can be replaced by a resistor sensor according to application requirements.
10:負載 10:Load
11:第一電源 11:First power supply
12:第二電源 12:Second power supply
13:第三電源 13:Third power supply
14:直流電源 14: DC power supply
15:電壓比較器之正輸入端 15: Positive input terminal of voltage comparator
16:電壓比較器之負輸入端 16: Negative input terminal of voltage comparator
17:電壓比較器之輸出端 17: Output terminal of voltage comparator
18:第一電阻器 18: First resistor
19:第二電阻器 19: Second resistor
20:電壓比較器 20: Voltage comparator
21:第一半導體 21:First Semiconductor
22:第二半導體 22:Second Semiconductor
23:第三半導體 23:Third Semiconductor
24:第三電阻器 24:Third resistor
25:第一二極體 25:First diode
26:電阻感測器 26: Resistance sensor
27:第四半導體 27:Fourth Semiconductor
圖1本發明半導體保護器第一實施例。 Figure 1 is a first embodiment of a semiconductor protector of the present invention.
圖2本發明半導體保護器第二實施例。 Figure 2 is a second embodiment of a semiconductor protector of the present invention.
圖3本發明半導體保護器第三實施例。 Figure 3 is the third embodiment of the semiconductor protector of the present invention.
如圖1所示,為本發明半導體保護器第一實施例,自圖中可知,本發明半導體保護器包括有第一半導體21、第二半導體22、第三半導體23、第一電阻器18、第二電阻器19、第三電阻器24、第一二極體25及電壓比較器20,以上第一半導體21、第二半導體22與第三半導體23皆為三脚封裝之電晶體。
As shown in Figure 1, it is a first embodiment of a semiconductor protector of the present invention. As can be seen from the figure, the semiconductor protector of the present invention includes a
第一半導體21之汲極D(Drain,D)為提供外接之負載10之第一端連接之用,第一電阻器18之第一端為提供外接之第一電源11連接之用,第二半導體
22之源極S(Source,S)為提供直流電源14之負電端連接之用,直流電源14之正電端連接負載10之第二端,其中第一半導體21與第二半導體22形成串聯連接。
The drain D (Drain, D) of the
第一半導體21之閘極G(Gate,G)連接第一電阻器18之第二端與第三半導體23之汲極D,第三半導體23之源極S與第一半導體21之源極S連接,第三半導體23之閘極G連接電壓比較器20之輪出端(Output)17,第一電阻器18之第一端與電壓比較器20之正電源端連接第一電源11之正電端或第二電源12之正電端或另設電源隨其需求而定,而不予自限。
The gate G (Gate, G) of the
電壓比較器20之正輸入端(Non-inverting Input)15連接第三電阻器24之第一端與第一二極體25之陰極端(Cathode),第一二極體25之陽極端(Anode)連接電壓比較器20之輪出端,第三電阻器24之第二端連接第一半導體21之源極S,電壓比較器20之負輸入端(Inverting Input)16連接第三電源13,第三電源13為電壓比較器20負輸入端16之參考電壓(Reference Voltage),電壓比較器20之負電源端連接第二半導體22之源極S與直流電源14之負電端,電壓比較器20之正電源端連接第一電源11之正電端或第二電源12之正電端。
The positive input terminal (Non-inverting Input) 15 of the
第二半導體22之閘極G連接第二電阻器19之第二端,第二電阻器19之第一端連接第二電源12之正電端。
The gate G of the
如圖1所示,當負載10兩端短路時,根據第二半導體22之汲源極導通狀態電阻可知,當第一半導體21之汲極電流(Drain Current)上升到第二半導
體22之其相對應之汲源極電壓,經由第三電阻器24到達電壓比較器20之正輸入端15,若其汲源極電壓高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第一二極體25之陽極端與第三半導體23之閘極G,此時第一二極體25之陰極端供電於電壓比較器20之正輸入端15使電壓比較器20之輸出端17保持輸出正電壓,而達成電壓比較器20具有自鎖之功能,同時第三半導體23之汲極D與源極S導通,第一半導體21之汲極D與源極S開路,而達成第一半導體21具有自己保護之功能,此時直流電源14不供電於短路負載10,而使直流電源14受到保護;同理,適當的選擇第二半導體22之汲極D與源極S之間之汲源極導通狀態電阻,配合電壓比較器20之負輸入端16之參考電壓亦可達到過載保護之功能。
As shown in Figure 1, when both ends of the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之閘極G,此時第三半導體23之汲極D與源極S導通,第一半導體21之汲極D與源極S開路,此即達成第一半導體21具有自己保護之功能。
When the
如圖2所示,為本發明半導體保護器第二實施例,自圖中可知,其係將圖1中之第一半導體21與第三半導體23由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體,再將第二半導體22電路改為電阻感測器26替代,其電阻感測器26之第一端連接第一半導體21之射極E,電阻感測器26之第二端連接電壓比較器20之負電源端,其他電路結構皆與圖1相同而不贅述。
As shown in Figure 2, it is the second embodiment of the semiconductor protector of the present invention. As can be seen from the figure, the
如圖2所示,第一半導體21之集極C(Collector,C)為提供外接之負載10第一端連接之用,第一電阻器18之第一端為提供外接之第一電源11連接之用,電阻感測器26之第二端為提供直流電源14之負電端連接之用,直流電源14之正電端連接負載10之第二端。
As shown in Figure 2, the collector C (Collector, C) of the
如圖2所示,當負載10兩端短路時,根據電阻感測器26兩端之電壓經由第三電阻器24到達電壓比較器20之正輸入端15,若其電壓高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第一二極體25之陽極端與第三半導體23之閘極G,此時第一二極體25之陰極端供電於電壓比較器20之正輸入端15使電壓比較器20之輸出端17保持輸出正電壓,此即為使電壓比較器20具有自鎖之功能,同時第三半導體23之集極C與射極E導通,第一半導體21之集極C與射極E開路,而達成第一半導體21具有自己保護之功能,此時直流電源14不供電於短路負載10,而使直流電源14受到保護;同理,適當的選擇電阻感測器26之電阻值,配合電壓比較器20之負輸入端16之參考電壓值亦可達到過載保護之功能。
As shown in FIG. 2 , when both ends of the
由上述可知,其電阻感測器26之功能為將第一半導體21之集極電流轉換為電壓,以做為負載10過載或短路電流之參考數據,電阻感測器26亦可以用等效電阻特性之分流器(Shunt)或具有等效電阻特性之電路,例如一個或多個電阻器串聯之電路、多個電阻器並聯之電路或多個電阻器串並聯之電路皆屬於具有等效電阻特性之電路,因其動作原理
相同,而不自限。
From the above, it can be seen that the function of the
由上述可知,分流器具有兩端特徵,任何一端皆可做為電阻感測器26之第一端或第二端。
From the above, it can be seen that the shunt has the characteristics of two ends, and either end can be used as the first end or the second end of the
由上述可知,具有等效電阻特性之電路具有兩端特徵,任何一端皆可做為電阻感測器26之第一端或第二端。
From the above, it can be seen that a circuit with equivalent resistance characteristics has the characteristics of two ends, and either end can be used as the first end or the second end of the
如圖3所示,為本發明半導體保護器第三實施例,自圖中可知,其係將圖2中之電阻感測器26改為四脚封裝之第四半導體27之開爾文射極E2與功率射極E1兩端,其第四半導體27之開爾文射極E2在四脚封裝內連接第四半導體27之射極E,開爾文射極E2連接第三半導體23之射極E與第三電阻器24之第二端,第四半導體27之功率射極E1連接電壓比較器20之負電源端,本發明之第四半導體27除了四脚封裝之外,也有用模組封裝,隨其需求而選擇其中之一,其他電路結構皆與圖2相同而不贅述。
As shown in Figure 3, it is the third embodiment of the semiconductor protector of the present invention. As can be seen from the figure, the
如圖3所示,第四半導體27之集極C為提供外接之負載10第一端連接之用,第一電阻器18之第一端為提供外接之第一電源11連接之用,第四半導體27之功率射極E1為提供直流電源14之負電端連接之用,直流電源14之正電端連接負載10之第二端。
As shown in Figure 3, the collector C of the
如圖3所示,當負載10兩端短路時,根據第四半導體27之開爾文射極E2與功率射極E1兩端之電壓經由第三電阻器24到達電壓比較器20之正輸入端15,若其電壓高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第一二極體25之陽極端與第三半導
體23之閘極G,此時第一二極體25之陰極端供電於電壓比較器20之正輸入端15使電壓比較器20之輸出端17保持輸出正電壓,此即為使電壓比較器20具有自鎖之功能,同時第三半導體23之集極C與射極E導通,第四半導體27之集極C與射極E開路,而達成第四半導體27具有自己保護之功能,此時直流電源14不供電於短路負載10,而使直流電源14受到保護;同理,適當的選擇第四半導體27之開爾文射極E2與功率射極E1兩端之電阻值,配合電壓比較器20之負輸入端16之參考電壓值亦可達到過載保護之功能。
As shown in Figure 3, when both ends of the
由上述可知,圖1、圖2與圖3中之第一二極體25具有單方向傳導電流之功能,若其電壓比較器20之輸出端17具有單方向傳導電流之功能,則第一二極體25可以省略不接,直接連接電壓比較器20之正輸入端15即可。
It can be seen from the above that the
由上述可知,其圖1之第二半導體22為N通道金屬氧化半導體場效電晶體可以改為絕緣閘極雙極電晶體替代,其動作原理為絕緣閘極雙極電晶體之集射極電壓替代N通道金屬氧化半導體場效電晶體之汲源極導通狀態電阻,其功能相同,可以達到使直流電源14受到保護之目的。
It can be seen from the above that the
由上述可知,其圖1之第一半導體21、第二半導體22與第三半導體23,隨其需求可以部份或全部由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體替代,因其動作原理相同,而不自限。
As can be seen from the above, the
由上述可知,其圖2之第一半導體21,隨其需求可以由絕緣閘極雙極電晶體改為N通道金屬氧化半導體場效電晶體替代。
From the above, it can be seen that the
由上述可知,其圖3之第四半導體27,隨其需求可以由四腳封裝之絕緣閘極雙極電晶體改為四腳封裝之N通道金屬氧化半導體場效電晶體替代。
From the above, it can be seen that the
由上述可知,其圖3之第四半導體27為四腳封裝之絕緣閘極雙極電晶體改為四腳封裝之N通道金屬氧化半導體場效電晶體時,以公知之N通道金屬氧化半導體場效電晶體NTH4L080N120SC1為例,以汲極D替代集極C,以閘極G替代閘極G,以開爾文源極S2替代開爾文射極E2,以功率源極S1替代功率射極E1,因其四腳封裝之絕緣閘極雙極電晶體與四腳封裝之N通道金屬氧化半導體場效電晶體保護直流電源14之動作原理相同,所以二者可以替代。
It can be seen from the above that when the
由上述可知,關於圖3中之市售四腳封裝之第四半導體27不論其應用絕緣閘極雙極電晶體或N通道金屬氧化半導體場效電晶體,其具有開爾文功能之電極之標式不同,例如用S2、K或KS等代表開爾文功能之電極,在此特別聲明的是本發明的開爾文射極用E2表示,功率射極用E1表示,兹例舉市售四腳封裝之第四半導體27如STGW75H65DFB2-4,SCT3040KR,IKY40N120CS6,C3M0120100K,NTH4L080N120SC1及IKZ50N65EH5等型號以供參考。
It can be seen from the above that regarding the
由上述可知,圖2與圖3中之有接第一電源11與第三電源13不接第二電源12,為了圖式標示簡潔起見皆用點標示,而圖1則接有第一電源11、第二電源12與第三電源13,凡本行業通識之士皆知電源皆有正電端與負電端,在圖中並沒有標出,在此特別聲明。
It can be seen from the above that in Figures 2 and 3, the
由上述動作原理與功能動作之說明可知本發明可據於實施。 From the description of the above operating principles and functional actions, it can be seen that the present invention can be implemented accordingly.
10:負載 10:Load
11:第一電源 11:First power supply
12:第二電源 12:Second power supply
13:第三電源 13:Third power supply
14:直流電源 14: DC power supply
15:電壓比較器之正輸入端 15: Positive input terminal of voltage comparator
16:電壓比較器之負輸入端 16: Negative input terminal of voltage comparator
17:電壓比較器之輸出端 17: Output terminal of voltage comparator
18:第一電阻器 18: First resistor
19:第二電阻器 19: Second resistor
20:電壓比較器 20: Voltage comparator
21:第一半導體 21:First Semiconductor
22:第二半導體 22:Second Semiconductor
23:第三半導體 23:Third Semiconductor
24:第三電阻器 24:Third resistor
25:第一二極體 25:First diode
Claims (14)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW111128264A TW202406261A (en) | 2022-07-28 | 2022-07-28 | Semiconductor protector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW111128264A TW202406261A (en) | 2022-07-28 | 2022-07-28 | Semiconductor protector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW202406261A true TW202406261A (en) | 2024-02-01 |
Family
ID=90822997
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW111128264A TW202406261A (en) | 2022-07-28 | 2022-07-28 | Semiconductor protector |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW202406261A (en) |
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2022
- 2022-07-28 TW TW111128264A patent/TW202406261A/en unknown
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