TW202211502A - Method for polarizing piezoelectric film - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 230000010287 polarization Effects 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000011282 treatment Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 112
- 239000000463 material Substances 0.000 description 11
- 239000002184 metal Substances 0.000 description 7
- 239000010409 thin film Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- 229920003023 plastic Polymers 0.000 description 4
- 239000002033 PVDF binder Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 3
- 239000004810 polytetrafluoroethylene Substances 0.000 description 3
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 238000010891 electric arc Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229920001519 homopolymer Polymers 0.000 description 2
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 2
- 239000010445 mica Substances 0.000 description 2
- 229910052618 mica group Inorganic materials 0.000 description 2
- 239000011858 nanopowder Substances 0.000 description 2
- 239000002985 plastic film Substances 0.000 description 2
- 229920006255 plastic film Polymers 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- -1 polytetrafluoroethylene Polymers 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
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Abstract
Description
本揭露是有關於一種壓電薄膜之製作技術,且特別是有關於一種壓電薄膜之極化方法。The present disclosure relates to a fabrication technology of a piezoelectric thin film, and in particular, to a polarization method of the piezoelectric thin film.
壓電材料中之電域的極性方向常常沒有規則性而互相抵消,易造成整個壓電材料沒有極性,而無法呈現材料本身的壓電特性。因此,通常需對壓電材料進行極化製程,方能使壓電材料的電域方向一致而呈現壓電特性。The polar directions of the electrical domains in piezoelectric materials often cancel each other out without regularity, which is easy to cause the entire piezoelectric material to have no polarity and cannot exhibit the piezoelectric properties of the material itself. Therefore, it is usually necessary to perform a polarization process on the piezoelectric material, so that the direction of the electric domain of the piezoelectric material can be consistent and the piezoelectric properties can be exhibited.
非接觸式極化技術係以高電場進行極化,將壓電薄膜裡的分子沿著電場分布整齊地排列,達到使壓電薄膜呈現壓電特性的效果。目前,壓電薄膜的極化處理大都使用電暈放電(corona discharge)技術來提供電子來源。在一些採電暈放電技術之極化設備中,電子會先經過具有負性高電壓網(grid)才到待極化之表面。The non-contact polarization technology uses a high electric field for polarization, and arranges the molecules in the piezoelectric film neatly along the electric field distribution to achieve the effect of making the piezoelectric film exhibit piezoelectric properties. At present, most of the polarization treatments of piezoelectric films use corona discharge technology to provide electron sources. In some polarization equipment using corona discharge technology, electrons will first pass through a negative high-voltage grid (grid) before reaching the surface to be polarized.
然而,壓電薄膜之表面上的電子與下方之接地基板之間具有電位差,因而產生電弧。如此一來,不僅造成壓電薄膜的極化不均勻,電弧更會在壓電薄膜上形成電弧痕跡,嚴重影響壓電薄膜的極化品質與外觀。However, there is a potential difference between the electrons on the surface of the piezoelectric film and the grounded substrate below, thereby generating an arc. As a result, not only will the polarization of the piezoelectric film be uneven, but the arc will also form arc traces on the piezoelectric film, which will seriously affect the polarization quality and appearance of the piezoelectric film.
因此,本揭露之一目的就是在提供一種壓電薄膜之極化方法,其利用絕緣擋板遮蔽壓電薄膜之邊緣區,以避免電子積聚在壓電薄膜之邊緣區而產生電弧。藉此,可避免壓電薄膜上產生電弧痕跡,而可提升壓電薄膜之極化品質與良率。Therefore, an object of the present disclosure is to provide a polarization method for a piezoelectric film, which uses an insulating baffle to shield the edge region of the piezoelectric film to prevent electrons from accumulating in the edge region of the piezoelectric film to generate arcs. Thereby, arc traces on the piezoelectric film can be avoided, and the polarization quality and yield of the piezoelectric film can be improved.
本揭露之另一目的就是在提供一種壓電薄膜之極化方法,其可在極化過程中防止電弧放電,因此可兼顧壓電薄膜的極化品質與外觀。Another object of the present disclosure is to provide a polarization method of a piezoelectric film, which can prevent arc discharge during the polarization process, so that the polarization quality and appearance of the piezoelectric film can be considered.
根據本揭露之上述目的,提出一種壓電薄膜之極化方法。在此方法中,將壓電薄膜平貼在導電基材之表面。設置絕緣擋板於壓電薄膜之數個邊緣區之至少二者上。對壓電薄膜進行極化製程。According to the above objective of the present disclosure, a polarization method of a piezoelectric thin film is provided. In this method, the piezoelectric film is flatly attached to the surface of the conductive substrate. An insulating baffle is arranged on at least two of the plurality of edge regions of the piezoelectric film. A polarization process is performed on the piezoelectric film.
依據本揭露之一實施例,上述之絕緣擋板包含框狀結構蓋設在壓電薄膜之所有邊緣區上。According to an embodiment of the present disclosure, the above-mentioned insulating baffle includes a frame-like structure covering all edge regions of the piezoelectric film.
依據本揭露之一實施例,上述之絕緣擋板包含二條狀結構分別蓋設在壓電薄膜之邊緣區的相對二者上。According to an embodiment of the present disclosure, the above-mentioned insulating baffle includes two strip-like structures respectively covering two opposite sides of the edge region of the piezoelectric film.
依據本揭露之一實施例,上述之極化製程為捲對捲極化製程。According to an embodiment of the present disclosure, the above-mentioned polarization process is a roll-to-roll polarization process.
依據本揭露之一實施例,上述之每個邊緣區之寬度為3mm至50mm。According to an embodiment of the present disclosure, the width of each of the aforementioned edge regions is 3 mm to 50 mm.
依據本揭露之一實施例,上述之絕緣擋板之一厚度為20μm至10mm。According to an embodiment of the present disclosure, a thickness of the above-mentioned insulating baffle is 20 μm to 10 mm.
依據本揭露之一實施例,上述之絕緣擋板凸伸於壓電薄膜之外邊緣外。According to an embodiment of the present disclosure, the above-mentioned insulating baffle protrudes beyond the outer edge of the piezoelectric film.
依據本揭露之一實施例,於進行極化製程前,上述之方法更包含對壓電薄膜進行除泡處理,以去除壓電薄膜與導電基材之表面之間的氣泡。According to an embodiment of the present disclosure, before performing the polarization process, the above-mentioned method further includes performing a defoaming treatment on the piezoelectric film to remove air bubbles between the piezoelectric film and the surface of the conductive substrate.
依據本揭露之一實施例,上述進行除泡處理包含設置輔助電極於壓電薄膜上。According to an embodiment of the present disclosure, the above-mentioned performing the defoaming process includes disposing an auxiliary electrode on the piezoelectric film.
依據本揭露之一實施例,上述之輔助電極為導電板或半導體板。According to an embodiment of the present disclosure, the above-mentioned auxiliary electrode is a conductive plate or a semiconductor plate.
請參照圖1A與圖1B,其中圖1A係繪示依照本揭露之一實施方式的一種壓電薄膜設於導電基材上之上視示意圖,圖1B係繪示沿著圖1A之A-A剖面線所獲得之剖面示意圖。在本實施方式中,進行壓電薄膜100之極化時,可先將壓電薄膜100平貼在導電基材110之表面112上。壓電薄膜100可為有機壓電薄膜或無機壓電薄膜。有機之壓電薄膜100可為高分子壓電材料,例如但不限於聚偏二氟乙烯(PVDF)的均聚物。無機之壓電薄膜可為壓電陶瓷材料,例如但不限於鋯鈦酸鉛(PZT)。Please refer to FIGS. 1A and 1B , wherein FIG. 1A is a schematic top view illustrating a piezoelectric film disposed on a conductive substrate according to an embodiment of the present disclosure, and FIG. 1B is a section line along A-A of FIG. 1A Schematic diagram of the cross section obtained. In this embodiment, when the
在一些例子中,可先利用射出成膜方式製作出有機的壓電薄膜100,再將壓電薄膜100貼設在導電基材110之表面112上。將有機的壓電薄膜100貼在導電基材110前,可先對壓電薄膜100進行拉伸處理。在另一些例子中,可利用例如塗布方式,直接將壓電薄膜100形成在導電基材110之表面112上。In some examples, the organic
導電基材110之表面112較佳為平坦表面,因此壓電薄膜100可以平順地貼設在導電基材110之表面112上。此外,為改善壓電薄膜100在極化過程可能產生的變形,導電基材110較佳係具有可支撐壓電薄膜100的結構強度。在一些例子中,導電基材110可為金屬板、金屬膜、碳板、或者金屬捲材。金屬捲材可應用於壓電薄膜100之捲對捲(RTR)極化製程。在極化製程中,導電基材110承載著待極化的壓電薄膜100。舉例而言,對捲對捲或連續式(In-line)極化製程而言,導電基材110隨著壓電薄膜100一起移動。圖1A的壓電薄膜100非連續捲材,可適用於批次式極化製程。The
在一些例子中,導電基材亦可包含不導電或導電基底、以及覆蓋在此基底上的導電層。壓電薄膜100平貼在導電層之表面上。不導電之基底可例如為塑膠膜、透明玻璃、或塑膠板。導電層可例如包含金屬層、導電氧化層、或碳奈米粉漿層。In some examples, the conductive substrate may also include a non-conductive or conductive substrate, and a conductive layer overlying the substrate. The
壓電薄膜100貼合在導電基材110之表面112時,壓電薄膜100之貼合表面102與導電基材110之表面112之間可能會有氣泡產生。因此,可根據貼合狀況選擇性地進行除泡處理,以去除壓電薄膜100之貼合表面102與導電基材110之表面112之間的氣泡。可利用例如刮除方式、真空方式、擠壓方式、及/或靜電吸附方式進行除泡處理。When the
壓電薄膜100具有多個邊緣區。舉例而言,如圖1A所示,壓電薄膜100為四邊形薄膜,而具有四個邊緣區104a~104d。請參照圖2A與圖2B,其中圖2A係繪示依照本揭露之一實施方式的一種絕緣擋板設於壓電薄膜上之上視示意圖,圖2B係繪示沿著圖2A之A-A剖面線所獲得之剖面示意圖。接著,將絕緣擋板120於設置在壓電薄膜100的這些邊緣區104a~104d上,以蓋住壓電薄膜100的所有邊緣區104a~104d。絕緣擋板120之材料可為具有高絕緣係數之材料,例如陶瓷類、聚四氟乙烯(PTFE)與聚醯亞胺(PI)等塑膠類、雲母、與玻璃。The
絕緣擋板120之形狀與架構取決於壓電薄膜100之形狀。在圖2A與圖2B的例子中,壓電薄膜100為四邊形,且具有四個邊緣區104a~104d,因此絕緣擋板120包含由四個邊框122a~122d所構成的框狀結構。壓電薄膜為圓形、橢圓形、或多邊形時,絕緣擋板120可對應為圓框、橢圓形框、或多邊形框。The shape and structure of the
這些邊框122a~122d分別對應遮擋住壓電薄膜100的整個邊緣區104a~104d。邊框122a~122d需分別遮蓋住邊緣區104a~104d的最外緣。在一些例子中,邊框122a~122d之外邊緣可分別與邊緣區104a~104d的外邊緣對齊,如圖2B所示。邊框122a~122d亦可分別凸伸於壓電薄膜100之邊緣區104a~104d的外邊緣外,如圖4所示。因此,請同時參照圖1A與圖2A,每個邊框122a~122d之寬度124可等於或大於對應之邊緣區104a~104d之寬度106。適合的邊緣區104a~104d之寬度106取決於極化製程的電壓,邊框122a~122d之厚度126則取決於絕緣擋板120之材料種類與極化製程的電壓。在一些示範例子中,每個邊緣區104a~104d之寬度106可為約3mm至約50mm。此外,每個邊框122a~122d之厚度126可例如為約20μm 至約10mm。The
請參照圖3,其係繪示依照本揭露之一實施方式的一種壓電薄膜之極化製程的裝置示意圖。將絕緣擋板120蓋設在壓電薄膜100之邊緣區104a~104d後,即可對壓電薄膜100進行極化製程,而使壓電薄膜100呈現壓電特性。在一些例子中,可利用電漿來極化壓電薄膜100。進行極化製程時,可將極化電極130設於壓電薄膜100之上方,並將電源供應器140之第一極142與極化電極130電性連接,且將電源供應器140之第二極144與導電基材110接地。電源供應器140之第一極142與第二極144具有不同電位。Please refer to FIG. 3 , which is a schematic diagram of a device for a polarization process of a piezoelectric film according to an embodiment of the present disclosure. After the insulating
電源供應器140供電給極化電極130後,極化電極130可產生電漿朝壓電薄膜100噴射,以利用電漿中之電子來極化壓電薄膜100。在一些示範例子中,更可將一電網(未繪示)設於極化電極130與壓電薄膜100之間。電網之電壓可與極化電極130之電壓相同或相近,或者小於極化電極130之電壓。After the
在極化製程中,由於絕緣擋板120蓋設在壓電薄膜100的所有邊緣區104a~104d上,因此可避免電漿中之電子積聚在邊緣區104a~104d上。藉此,可防止電弧在壓電薄膜100之邊緣區104a~104d與接地之導電基材110之間產生,而可防止壓電薄膜100上產生電弧痕跡。藉此,不僅可獲得外觀良好的壓電薄膜,更可提升壓電薄膜100的極化品質與良率。此外,絕緣擋板120對壓電薄膜100之邊緣區104a~104d的壓制力可在極化製程維持壓電薄膜100的平整度,有利於極化後之壓電薄膜100的應用。During the polarization process, since the insulating
請參照圖5A與圖5B,其係分別繪示依照本揭露之一實施方式的一種絕緣擋板設於壓電薄膜上之上視示意、以及沿著圖5A之A-A剖面線所獲得之剖面示意圖。此實施方式之壓電薄膜200為連續捲材,可適用於捲對捲極化製程。壓電薄膜200可為有機壓電薄膜或無機壓電薄膜。壓電薄膜200可例如但不限於聚偏二氟乙烯的均聚物與鋯鈦酸鉛。Please refer to FIG. 5A and FIG. 5B , which are a schematic top view of an insulating baffle provided on a piezoelectric film according to an embodiment of the present disclosure, and a schematic cross-sectional view taken along the section line A-A in FIG. 5A , respectively. . The
壓電薄膜200平貼於導電基材210之表面212上。導電基材210之表面212較佳為平坦表面,以利維持壓電薄膜200的平整。導電基材210具有足夠的結構強度,以在極化製程中有效承托壓電薄膜200。導電基材210可為碳捲材或金屬捲材。在一些例子中,導電基材亦可包含不導電或導電基底、以及覆蓋在此基底上的導電層,其中壓電薄膜200平貼在導電層之表面上。基底可例如為塑膠膜、透明玻璃、或塑膠板。導電層可例如包含金屬層、導電氧化層、或碳奈米粉漿層。The
由於壓電薄膜200為連續捲材,因此在極化過程中,絕緣擋板220只需蓋設在壓電薄膜200之二邊緣區202a與202b。此二邊緣區202a與202b分別位於壓電薄膜200的相對二邊,且沿著壓電薄膜200的長度方向延伸。絕緣擋板220可包含二條狀結構222a與222b分別對應遮擋住壓電薄膜200的整個邊緣區202a與202b。絕緣擋板220之材料可為具有高絕緣係數之材料,例如陶瓷類、聚四氟乙烯與聚醯亞胺等塑膠類、雲母、與玻璃。Since the
條狀結構222a與222b需分別遮蓋住邊緣區202a與202b的最外緣。類似地,條狀結構222a與222b之外邊緣可分別與邊緣區202a與202b的外邊緣對齊,如圖5B所示;或者,條狀結構222a與222b可分別凸伸於壓電薄膜200之邊緣區202a與202b的外邊緣外。每個條狀結構222a之寬度224可等於或大於對應之邊緣區202a與202b之寬度204。在一些示範例子中,每個邊緣區202a與202b之寬度204可為約3mm至約50mm。此外,每個條狀結構222a與222b之厚度226可例如為約20μm至約10mm。The
請參照圖6A與圖6B,其係分別繪示依照本揭露之一實施方式的一種絕緣擋板與輔助電極設於壓電薄膜上之上視示意圖、以及沿著圖6A之A-A剖面線所獲得之剖面示意圖。在極化前、極化期間、與極化後,壓電薄膜100之貼合表面102與導電基材110之表面112之間可能有氣泡存在。因此,在一些例子中,可額外設置輔助電極150,並使此輔助電極150緊壓在壓電薄膜100上。在一些示範例子中,絕緣擋板120設於輔助電極150之外側,即絕緣擋板120之邊框122a~122d圍繞在輔助電極150之外側。然,輔助電極150的尺寸不局限於框架狀之絕緣擋板120之中空尺寸,即輔助電極150的尺寸可大於絕緣擋板120之中空尺寸。Please refer to FIG. 6A and FIG. 6B , which are schematic top views of an insulating baffle and an auxiliary electrode disposed on a piezoelectric film according to an embodiment of the present disclosure, and obtained along the section line A-A in FIG. 6A , respectively. cross-sectional schematic diagram. Before polarization, during polarization, and after polarization, air bubbles may exist between the
輔助電極150可在壓電薄膜100極化前、極化期間、與極化後,以擠壓方式去除壓電薄膜100之貼合表面102與導電基材110之表面112之間的氣泡,並維持壓電薄膜100的平整度。輔助電極150可例如為導電板或半導體板。The
由上述之實施方式可知,本揭露之一優點就是因為本揭露之壓電薄膜之極化方法利用絕緣擋板遮蔽壓電薄膜之邊緣區,以避免電子積聚在壓電薄膜之邊緣區而產生電弧。藉此,可避免壓電薄膜上產生電弧痕跡,而可提升壓電薄膜之極化品質與良率。As can be seen from the above-mentioned embodiments, one of the advantages of the present disclosure is that the polarization method of the piezoelectric film of the present disclosure uses an insulating baffle to shield the edge region of the piezoelectric film to prevent electrons from accumulating in the edge region of the piezoelectric film and causing arcing . Thereby, arc traces on the piezoelectric film can be avoided, and the polarization quality and yield of the piezoelectric film can be improved.
由上述之實施方式可知,本揭露之另一優點就是因為本揭露之壓電薄膜之極化方法可在極化過程中防止電弧放電,因此可兼顧壓電薄膜的極化品質與外觀。As can be seen from the above-mentioned embodiments, another advantage of the present disclosure is that the polarization method of the piezoelectric film of the present disclosure can prevent arc discharge during the polarization process, so that both the polarization quality and the appearance of the piezoelectric film can be considered.
雖然本揭露已以實施例揭露如上,然其並非用以限定本揭露,任何在此技術領域中具有通常知識者,在不脫離本揭露之精神和範圍內,當可作各種之更動與潤飾,因此本揭露之保護範圍當視後附之申請專利範圍所界定者為準。Although the present disclosure has been disclosed above with examples, it is not intended to limit the present disclosure. Anyone with ordinary knowledge in this technical field can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the appended patent application.
100:壓電薄膜
102:貼合表面
104a:邊緣區
104b:邊緣區
104c:邊緣區
104d:邊緣區
106:寬度
110:導電基材
112:表面
120:絕緣擋板
122a:邊框
122b:邊框
122c:邊框
122d:邊框
124:寬度
126:厚度
130:極化電極
140:電源供應器
142:第一極
144:第二極
150:輔助電極
200:壓電薄膜
202a:邊緣區
202b:邊緣區
204:寬度
210:導電基材
212:表面
220:絕緣擋板
222a:條狀結構
222b:條狀結構
224:寬度
226:厚度100: Piezo Film
102: Fitting the
為讓本揭露之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下: [圖1A]係繪示依照本揭露之一實施方式的一種壓電薄膜設於導電基材上之上視示意圖; [圖1B]係繪示沿著圖1A之A-A剖面線所獲得之剖面示意圖; [圖2A]係繪示依照本揭露之一實施方式的一種絕緣擋板設於壓電薄膜上之上視示意圖; [圖2B]係繪示沿著圖2A之A-A剖面線所獲得之剖面示意圖; [圖3]係繪示依照本揭露之一實施方式的一種壓電薄膜之極化製程的裝置示意圖; [圖4]係繪示依照本揭露之一實施方式的一種絕緣擋板設於壓電薄膜上之剖面示意圖; [圖5A]係繪示依照本揭露之一實施方式的一種絕緣擋板設於壓電薄膜上之上視示意圖; [圖5B]係繪示沿著圖5A之A-A剖面線所獲得之剖面示意圖; [圖6A]係繪示依照本揭露之一實施方式的一種絕緣擋板與輔助電極設於壓電薄膜上之上視示意圖;以及 [圖6B]係繪示沿著圖6A之A-A剖面線所獲得之剖面示意圖。In order to make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the accompanying drawings are described as follows: 1A is a schematic top view illustrating a piezoelectric film disposed on a conductive substrate according to an embodiment of the present disclosure; [FIG. 1B] is a schematic cross-sectional view taken along the section line A-A of FIG. 1A; [ FIG. 2A ] is a schematic top view illustrating an insulating baffle provided on a piezoelectric film according to an embodiment of the present disclosure; [FIG. 2B] is a schematic cross-sectional view obtained along the A-A section line of FIG. 2A; [ FIG. 3 ] is a schematic diagram of a device for a polarization process of a piezoelectric thin film according to an embodiment of the present disclosure; [ FIG. 4 ] is a schematic cross-sectional view illustrating an insulating baffle provided on a piezoelectric film according to an embodiment of the present disclosure; [ FIG. 5A ] is a schematic top view illustrating an insulating baffle provided on a piezoelectric film according to an embodiment of the present disclosure; [FIG. 5B] is a schematic cross-sectional view obtained along the A-A section line of FIG. 5A; [ FIG. 6A ] is a schematic top view illustrating an insulating baffle and an auxiliary electrode disposed on a piezoelectric film according to an embodiment of the present disclosure; and [ FIG. 6B ] is a schematic cross-sectional view taken along the section line A-A of FIG. 6A .
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無Domestic storage information (please note in the order of storage institution, date and number) without Foreign deposit information (please note in the order of deposit country, institution, date and number) without
100:壓電薄膜100: Piezo Film
102:貼合表面102: Fitting the surface
104b:邊緣區104b: Marginal Zone
104d:邊緣區104d: Edge Zone
110:導電基材110: Conductive substrate
112:表面112: Surface
120:絕緣擋板120: Insulation baffle
122a:邊框122a: Border
122b:邊框122b: Border
122d:邊框122d: border
124:寬度124:width
126:厚度126: Thickness
Claims (10)
Priority Applications (1)
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| TW109131581A TWI742850B (en) | 2020-09-14 | 2020-09-14 | Method for polarizing piezoelectric film |
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| JP3419356B2 (en) * | 1999-08-13 | 2003-06-23 | 株式会社村田製作所 | Polarization treatment method for piezoelectric body |
| JP5764780B2 (en) * | 2011-06-07 | 2015-08-19 | 株式会社ユーテック | Polling processing method and piezoelectric body manufacturing method |
| CN104370556B (en) * | 2014-12-04 | 2016-11-23 | 湖南嘉业达电子有限公司 | Piezoelectric ceramics polarization method in sulfur hexafluoride gas and polarization device thereof |
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