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TW202032811A - Deep ultraviolet LED device and manufacturing method thereof - Google Patents

Deep ultraviolet LED device and manufacturing method thereof Download PDF

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TW202032811A
TW202032811A TW108148103A TW108148103A TW202032811A TW 202032811 A TW202032811 A TW 202032811A TW 108148103 A TW108148103 A TW 108148103A TW 108148103 A TW108148103 A TW 108148103A TW 202032811 A TW202032811 A TW 202032811A
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insulating film
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TW108148103A
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鹿嶋行雄
松浦恵里子
小久保光典
田代貴晴
平山秀樹
前田哲利
定昌史
上村隆一郎
長田大和
古田寬治
岩井武
青山洋平
祝迫恭
大神裕之
長野丞益
高木秀樹
倉島優一
松前貴司
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日商丸文股份有限公司
日商東芝機械股份有限公司
國立研究開發法人理化學研究所
日商愛發科股份有限公司
日商東京應化工業股份有限公司
日商日本鎢合金股份有限公司
日商大日本印刷股份有限公司
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Publication of TW202032811A publication Critical patent/TW202032811A/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/814Bodies having reflecting means, e.g. semiconductor Bragg reflectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/852Encapsulations
    • H10H20/853Encapsulations characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/855Optical field-shaping means, e.g. lenses
    • H10H20/856Reflecting means

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Abstract

In order to realize a deep ultraviolet LED device having a high WPE and a high output, enhancement of LEE and improvement of efficiency droop caused by heat of the deep ultraviolet LED device are necessary. This deep ultraviolet LED device has a design wavelength [lambda] (200-355 nm) and is characterized by having: a deep ultraviolet LED element that has, in the following order, a rear surface adhesive layer (Au-Au or Au-AuSn), a support substrate (CuMo or CuW), a joining layer (Au-Au or Au-AuSn), an n-type wiring electrode (Ti/Al/Ti/Au), an insulation film (SiO2), a p-type wiring electrode (Ti/Au/Ni), a p-type reflection electrode (Ni/Au), a p-type GaN contact layer, a p-type AlGaN layer, a multiple quantum barrier layer (MQB), a multiple quantum well layer (MQW), an n-type AlGaN layer, an AlN buffer layer, and a protective film (SiO2), wherein the n-type wiring electrode (Ti/Al/Ti/Au) extends so as to be exposed to an n-type AlGaN layer part through a through hole obtained by being coated and insulated with the insulation film (SiO2) and has a reflection type two-dimensional photonic crystal that has a plurality of holes disposed at positions in a range of the thickness direction of the p-type reflection electrode (Ni/Au) and the p-type GaN contact layer but not beyond the interface between the p-type GaN contact layer and the p-type AlGaN layer, a reflection type two-dimensional photonic crystal cycle structure has a photonic band gap open with respect to a TE polarization component, a cycle a of the reflection type two-dimensional photonic crystal cycle structure satisfies Blagg's condition with respect to light having the design wavelength [lambda], a degree m in Bragg's conditional expression m[lambda]/neff=2a (note that m represents a degree, [lambda] represents the design wavelength, neff represents an effective refractive index of the two-dimensional photonic crystal, and a represents a two-dimensional photonic crystal cycle) satisfies m=3, and a R/a ratio satisfies 0.3 ≤ R/a ≤ 0.4 when R represents the radius of the hole; an aluminum nitride ceramic package that has a surface having the deep ultraviolet LED element mounted thereon, that has an inorganic paint coating film having a reflection rate of 91% or higher, and that has an angle of the inner side wall of the package of 60-75 DEG; and a quartz window that is provided to the outermost surface of the aluminum nitride ceramic package and that seals the deep ultraviolet LED element.

Description

深紫外LED裝置及其製造方法Deep ultraviolet LED device and manufacturing method thereof

本發明係關於一種深紫外LED(Light Emitting Diode,發光二極體)裝置及其製造方法。The invention relates to a deep ultraviolet LED (Light Emitting Diode, light emitting diode) device and a manufacturing method thereof.

發光波長200 nm~355 nm之深紫外LED之用途遍及殺菌用途、醫療・農業用途、樹脂硬化・印刷・塗料之工業用途等多個方面。當前之深紫外LED中,覆晶(Flip Chip)構造成為主流,即,於藍寶石基板上使半導體層結晶生長之後,形成電極並自藍寶石基板側提取深紫外光,電光轉換效率(WPE)低至未達3%,輸出低至未達100 mW,達不到上述用途所需之數百mW之輸出。主要原因在於:由量子井層發出之光被p型GaN接觸層全部吸收而光提取效率(LEE)為5%以下,若將電流注入設為500 mA以上則因熱所致之效率降低現象而輸出不會成比例增加。 先前技術文獻 專利文獻Deep-ultraviolet LEDs with emission wavelengths of 200 nm to 355 nm are used in sterilization applications, medical and agricultural applications, resin hardening, printing, and industrial applications such as coatings. In the current deep ultraviolet LED, the flip chip structure has become the mainstream, that is, after crystal growth of the semiconductor layer on the sapphire substrate, electrodes are formed and deep ultraviolet light is extracted from the sapphire substrate side, and the electro-optical conversion efficiency (WPE) is as low as Less than 3%, the output is as low as less than 100 mW, which cannot reach the output of hundreds of mW required for the above purposes. The main reason is that the light emitted by the quantum well layer is completely absorbed by the p-type GaN contact layer and the light extraction efficiency (LEE) is less than 5%. If the current injection is set to 500 mA or more, the efficiency is reduced due to heat. The output will not increase proportionally. Prior art literature Patent literature

專利文獻1:日本專利第5999800號公報 專利文獻2:日本專利第5983125號公報Patent Document 1: Japanese Patent No. 5999800 Patent Document 2: Japanese Patent No. 5983125

[發明所欲解決之問題][The problem to be solved by the invention]

於專利文獻1中,如專利文獻1之圖17B所示,使用Al支持基板、透明p型AlGaN接觸層、Al反射電極層之構造,如專利文獻1之表9所示般使LEE(light extraction efficiency,光提取效率)達成31%。但是,由於驅動電壓上升3~4 V,因此,WPE(Wall Plug Efficiency,電光轉換效率)幾乎未得到改善。又,由於因熱導致之效率降低,即便使電流注入增加,亦無法使輸出為100 mW以上。In Patent Document 1, as shown in FIG. 17B of Patent Document 1, an Al support substrate, a transparent p-type AlGaN contact layer, and an Al reflective electrode layer are used. As shown in Table 9 of Patent Document 1, LEE (light extraction efficiency, light extraction efficiency) reached 31%. However, since the driving voltage is increased by 3 to 4 V, WPE (Wall Plug Efficiency, electro-optical conversion efficiency) has hardly been improved. In addition, due to the reduction in efficiency due to heat, even if the current injection is increased, the output cannot be increased to 100 mW or more.

於專利文獻2中,藉由對支持基板使用導電性基板,能夠實現自基板側之電力供給,且成為散熱性優異之白色LED元件構造。但是,即便將該構造直接應用於深紫外LED,由量子井層發出之深紫外光中入射至p型GaN接觸層之光亦被全部吸收,故LEE成為5%以下。In Patent Document 2, by using a conductive substrate for the support substrate, power supply from the substrate side can be realized, and a white LED element structure with excellent heat dissipation can be achieved. However, even if this structure is directly applied to a deep-ultraviolet LED, all of the deep-ultraviolet light emitted from the quantum well layer and incident on the p-type GaN contact layer is absorbed, so the LEE becomes less than 5%.

本發明之目的在於藉由改善深紫外LED裝置之熱所致之效率降低並提高LEE,而實現高WPE以及高輸出之深紫外LED裝置。 [解決問題之技術手段]The purpose of the present invention is to realize a high WPE and high output deep ultraviolet LED device by improving the efficiency reduction caused by the heat of the deep ultraviolet LED device and increasing the LEE. [Technical means to solve the problem]

根據本發明之第1態樣,提供一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有:深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、AlN緩衝層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4;氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;及石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。According to the first aspect of the present invention, a deep ultraviolet LED device is provided, which is characterized in that it is a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has: deep ultraviolet LED elements, which are sequentially With backside adhesive layer (Au-Au or Au-AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode (Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, AlN buffer layer, protective film (SiO 2 ), and n-type wiring electrode (Ti/Al/Ti/Au) extends to be insulated by insulating film (SiO 2 ) The through hole is exposed to the n-type AlGaN layer portion, and the deep ultraviolet LED element has the thickness direction range of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the p-type A reflective two-dimensional photonic crystal with a plurality of pores at the interface between the GaN contact layer and the p-type AlGaN layer, and the reflective two-dimensional photonic crystal periodic structure has a photonic band gap opened with respect to the TE polarization component. For light of design wavelength λ, the period a of the periodic structure of the above-mentioned reflective two-dimensional photonic crystal satisfies the conditions of Burrager and exists in the conditional formula mλ/n eff = 2a (where m: order, λ: Design wavelength, n eff : the effective refractive index of the two-dimensional photonic crystal, a: the period of the two-dimensional photonic crystal) m satisfies m=3, when the radius of the above pore is set to R, the R/a ratio satisfies 0.3 ≦R/a≦0.4; Aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, contains an inorganic coating film with a reflectivity of 91% or more, and the inside side wall angle of the package is 60 degrees or more and 75 degrees Within; and a quartz window, which is set on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element.

根據本發明之第2態樣,提供一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有:深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、AlN緩衝層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4,進而,該深紫外LED元件具有接合於上述保護膜(SiO2 )之表面之相對於波長λ為透明之石英半球透鏡,上述半球透鏡之直徑具有上述保護膜(SiO2 )面內之內接圓之直徑以上的值;氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;及石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。According to the second aspect of the present invention, a deep ultraviolet LED device is provided, which is characterized in that it is a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has: deep ultraviolet LED elements, which are sequentially With backside adhesive layer (Au-Au or Au-AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode (Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, AlN buffer layer, protective film (SiO 2 ), and n-type wiring electrode (Ti/Al/Ti/Au) extends to be insulated by insulating film (SiO 2 ) The through hole is exposed to the n-type AlGaN layer portion, and the deep ultraviolet LED element has the thickness direction range of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the p-type A reflective two-dimensional photonic crystal with a plurality of pores at the interface between the GaN contact layer and the p-type AlGaN layer, and the reflective two-dimensional photonic crystal periodic structure has a photonic band gap opened with respect to the TE polarization component. For light of design wavelength λ, the period a of the periodic structure of the above-mentioned reflective two-dimensional photonic crystal satisfies the conditions of Burrager and exists in the conditional formula mλ/n eff = 2a (where m: order, λ: Design wavelength, n eff : the effective refractive index of the two-dimensional photonic crystal, a: the period of the two-dimensional photonic crystal) m satisfies m=3, when the radius of the above pore is set to R, the R/a ratio satisfies 0.3 ≦R/a≦0.4, and further, the deep ultraviolet LED element has a quartz hemispherical lens that is transparent with respect to the wavelength λ bonded to the surface of the protective film (SiO 2 ), and the diameter of the hemispherical lens has the protective film (SiO 2 ) A value above the diameter of the inscribed circle in the plane; aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, contains an inorganic paint coating film with a reflectivity of 91% or more, and the inside side wall angle of the package 60 degrees to 75 degrees; and a quartz window, which is set on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element.

根據本發明之第3態樣,提供一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有:深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4;氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;及石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。According to a third aspect of the present invention, a deep ultraviolet LED device is provided, which is characterized in that it is a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has: deep ultraviolet LED elements, which are sequentially With backside adhesive layer (Au-Au or Au-AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode (Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, protective film (SiO 2 ) components, and n-type wiring electrodes (Ti/Al/Ti/Au) extend to be exposed through through holes insulated by insulating film (SiO 2 ) Up to the n-type AlGaN layer, and the deep ultraviolet LED element has the thickness direction range of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the p-type GaN contact layer and A reflective two-dimensional photonic crystal with a plurality of pores at the interface of the p-type AlGaN layer. The periodic structure of the reflective two-dimensional photonic crystal has a photonic band gap opened relative to the TE polarized light component, which is relative to the design wavelength λ. Light, the period a of the periodic structure of the above-mentioned reflective two-dimensional photonic crystal satisfies Burrege's condition and exists in Bureger's conditional formula mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : the effective refractive index of the two-dimensional photonic crystal, a: the period of the two-dimensional photonic crystal) m satisfies m=3, when the radius of the above-mentioned pore is set to R, the R/a ratio satisfies 0.3≦R/a ≦0.4; aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, contains an inorganic paint coating film with a reflectivity of 91% or more, and the inside side wall angle of the package is 60 degrees or more and within 75 degrees; and quartz The window is arranged on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element.

根據本發明之第4態樣,提供一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有:深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4,進而,該深紫外LED元件具有接合於上述保護膜(SiO2 )之表面之相對於波長λ為透明之石英半球透鏡,上述半球透鏡之直徑具有上述保護膜(SiO2 )面內之內接圓之直徑以上的值;氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;及石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。According to a fourth aspect of the present invention, a deep ultraviolet LED device is provided, which is characterized in that it is a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has: deep ultraviolet LED elements, which are sequentially With backside adhesive layer (Au-Au or Au-AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode (Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, protective film (SiO 2 ) components, and n-type wiring electrodes (Ti/Al/Ti/Au) extend to be exposed through through holes insulated by insulating film (SiO 2 ) Up to the n-type AlGaN layer, and the deep ultraviolet LED element has the thickness direction range of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the p-type GaN contact layer and A reflective two-dimensional photonic crystal with a plurality of pores at the interface of the p-type AlGaN layer. The periodic structure of the reflective two-dimensional photonic crystal has a photonic band gap opened relative to the TE polarized light component, which is relative to the design wavelength λ. Light, the period a of the periodic structure of the above-mentioned reflective two-dimensional photonic crystal satisfies Burrege's condition and exists in Bureger's conditional formula mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : the effective refractive index of the two-dimensional photonic crystal, a: the period of the two-dimensional photonic crystal) m satisfies m=3, when the radius of the above-mentioned pore is set to R, the R/a ratio satisfies 0.3≦R/a ≦0.4, and further, the deep ultraviolet LED element has a quartz hemispherical lens that is transparent with respect to the wavelength λ bonded to the surface of the protective film (SiO 2 ), and the diameter of the hemispherical lens is within the surface of the protective film (SiO 2 ) The value above the diameter of the inscribed circle; aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, contains an inorganic paint coating film with a reflectivity of 91% or more, and the inner side wall angle of the package is 60 degrees or more Within 75 degrees; and a quartz window, which is arranged on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element.

根據本發明之第5態樣,提供一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP(Inductively Coupled Plasma,感應耦合電漿)蝕刻直至不超過p型AlGaN層之界面之位置,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au);且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自AlN緩衝層剝離藍寶石基板(雷射剝離:LLO);對上述AlN緩衝層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;及將被分割之元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。According to the fifth aspect of the present invention, there is provided a method for manufacturing a deep ultraviolet LED device, characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has the following steps: The sapphire substrate is a growth substrate on which an AlN buffer layer, an n-type AlGaN layer, a multiple quantum well layer (MQW), a multiple quantum barrier layer (MQB), a p-type AlGaN layer, and a p-type GaN contact layer are sequentially laminated on it; ready for use To form a reflective two-dimensional photonic crystal mold; spin-coated two resist layers on the p-type GaN contact layer, transfer the structure of the mold by the nanoimprint method; transfer the resist with the above structure The etchant layer is used as a mask. ICP (Inductively Coupled Plasma) is etched from the p-type GaN contact layer until it does not exceed the interface of the p-type AlGaN layer, and then cleaned to form a reflective two-dimensional photon Crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal, p-type reflective electrode (Ni/Au) is sequentially formed by oblique evaporation; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, after step by photolithography to form an insulating film (SiO 2) forming a pattern, forming an insulating film (SiO 2);; p-type reflective electrode (Ni / Au) by high-temperature annealing step the p-type peeling Patterns of insulating film (SiO 2 ) are formed at the same height between the reflective electrode (Ni/Au) patterns; after the p-type wiring electrode (Ti/Au/Ni) pattern is formed by the photolithography step, the film is sequentially formed p-type wiring electrode (Ti/Au/Ni); patterning of p-type wiring electrode (Ti/Au/Ni) by a lift-off step; forming an insulating film (SiO 2 ); forming an n-type electrode by a photolithography step ( Pattern for forming through hole); forming through hole by ICP etching until it exceeds the position of the interface between the multiple quantum well layer (MQW) and the n-type AlGaN layer; forming an insulating film (SiO 2 ); removing the formed film by ICP etching On the insulating film (SiO 2 ) of the bottom surface of the through hole, the n-type AlGaN layer is excavated; on the insulating film (SiO 2 ) formed in the above step and inside the through hole, a film is sequentially formed by vapor deposition. Type wiring electrode (Ti/Al/Ti/Au); and when the depth from the upper portion of the insulating film (SiO 2 ) to the deepest portion of the n-type AlGaN layer excavated in the above step is set to h, the film thickness t The standard is t>2h; after film formation, the n-type wiring electrode (Ti/Al/Ti/Au) is annealed at a high temperature; the n-type wiring electrode (Ti/Al/Ti/Au) is made by polishing or CMP Planarization; vapor-deposit an adhesive layer (Au or AuSn) on the n-type wiring electrode (Ti/Al/Ti/Au); prepare a support substrate (CuMo or AuSn) with a support substrate-side bonding layer (Au or AuSn) vapor deposited CuW); is deposited on the above n The bonding layer (Au or AuSn) on the type wiring electrode (Ti/Al/Ti/Au) is bonded to the supporting substrate side bonding layer (Au or AuSn) of the supporting substrate (CuMo or CuW); the excimer is irradiated from the sapphire substrate side The sapphire substrate is stripped from the AlN buffer layer by laser or femtosecond laser (laser stripping: LLO); for the AlN buffer layer, a pattern for element separation is formed by a photolithography step; after the SiO 2 film is formed, The peeling step forms an SiO 2 pattern mask; excavation is performed by ICP etching until the insulating film (SiO 2 ) surface is exposed; after the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film is formed by BHF ( SiO 2 ) holes; after sequential vapor deposition of p-type pad electrodes (Ti/Au), the resist is removed by a stripping step to form a p-type pad electrode (Ti/Au) pattern; film formation protective film (SiO 2 ); A pattern for exposing the p-type pad electrode (Ti/Au) covered by the protective film (SiO 2 ) is formed by a photolithography step; the protective film (SiO 2 ) is opened by BHF Hole; after the p-type pad electrode (Ti/Au) pattern is formed by the peeling step, the back adhesive layer (Au or AuSn) is vapor-deposited on the back surface of the support substrate (CuMo or CuW); component separation is performed on the support substrate; and Join the backside adhesive layer (Au or AuSn) on the back of the divided element to the n-type electrode of the aluminum nitride ceramic package containing the inorganic paint coating film with a reflectivity of 91% or more, and the p-type electrode and p After wiring of the Ti/Au type pad electrodes, the quartz window is metal-sealed on the upper surface of the aluminum nitride ceramic package.

根據本發明之第6態樣,提供一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置為止,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au),且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自AlN緩衝層剝離藍寶石基板(雷射剝離:LLO);對上述AlN緩衝層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;於被分割之元件之AlN緩衝層上之保護膜(SiO2 )之表面,藉由原子擴散法或表面活化法接合石英半球透鏡,該石英半球透鏡相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明;及將上述元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。According to a sixth aspect of the present invention, there is provided a method for manufacturing a deep ultraviolet LED device, characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has the following steps: The sapphire substrate is a growth substrate on which an AlN buffer layer, an n-type AlGaN layer, a multiple quantum well layer (MQW), a multiple quantum barrier layer (MQB), a p-type AlGaN layer, and a p-type GaN contact layer are sequentially laminated on it; ready for use To form a reflective two-dimensional photonic crystal mold; spin-coated two resist layers on the p-type GaN contact layer, transfer the structure of the mold by the nanoimprint method; transfer the resist with the above structure The etchant layer is used as a mask. ICP etching is carried out from the p-type GaN contact layer until it does not exceed the position of the p-type AlGaN layer interface, and then it is washed to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal The photonic crystals are used to sequentially form p-type reflective electrodes (Ni/Au) by oblique evaporation; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrodes (Ni/Au) ) high-temperature annealing treatment; after forming a pattern, forming an insulating film (SiO 2) by photolithography in the step of forming an insulating film (SiO 2); by peeling step (Ni / Au) patterned on the p-type reflective electrode is between The insulating film (SiO 2 ) pattern is formed at the same height; after the p-type wiring electrode (Ti/Au/Ni) pattern is formed by the photolithography step, the p-type wiring electrode (Ti/Au/ Ni); p-type wiring electrode (Ti/Au/Ni) pattern is formed by a peeling step; insulating film (SiO 2 ) is formed by a photolithography step; n-type electrode (through hole) formation pattern is formed by a photolithography step; by ICP etching forms the through hole until it exceeds the position of the interface between the multiple quantum well layer (MQW) and the n-type AlGaN layer; forms the insulating film (SiO 2 ); removes the insulating film formed on the bottom surface of the through hole by ICP etching ( SiO 2 ), and then excavate the n-type AlGaN layer; on the insulating film (SiO 2 ) formed in the above step and inside the through hole, the n-type wiring electrode (Ti/Al/Ti /Au), and when the depth from the upper part of the insulating film (SiO 2 ) to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; Then, the n-type wiring electrode (Ti/Al/Ti/Au) is subjected to high-temperature annealing treatment; the n-type wiring electrode (Ti/Al/Ti/Au) is planarized by polishing or CMP; the n-type wiring electrode (Ti/Al/Ti/Au) vapor-deposit adhesive layer (Au or AuSn) on top of (Ti/Al/Ti/Au); prepare a support substrate (CuMo or CuW) vapor-deposited with the support substrate-side bonding layer (Au or AuSn); Adhesive layer (Au or AuSn) on top of type wiring electrode (Ti/Al/Ti/Au) Join the support substrate side bonding layer (Au or AuSn) of the above support substrate (CuMo or CuW); irradiate the excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the AlN buffer layer (laser lift-off: LLO) ; For the AlN buffer layer, a photolithography step is used to form a pattern for element separation; after the SiO 2 film is formed, a SiO 2 pattern mask is formed by a lift-off step; excavated by ICP etching until the insulating film (SiO 2 ) Until the surface is exposed; after the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; the p-type pad electrode (Ti/Au) is deposited sequentially After that, the resist is removed by a lift-off step to form a p-type pad electrode (Ti/Au) pattern; a protective film (SiO 2 ) is formed; and a photolithography step is used to form the protective film (SiO 2 ). ) The exposed pattern of the covered p-type pad electrode (Ti/Au); the opening of the protective film (SiO 2 ) using BHF; after the p-type pad electrode (Ti/Au) pattern is formed by the peeling step, The backside adhesive layer (Au or AuSn) is vapor-deposited on the back of the support substrate (CuMo or CuW); the above-mentioned support substrate is divided into components; the surface of the protective film (SiO 2 ) on the AlN buffer layer of the divided component is supported by atoms The diffusion method or the surface activation method is used to join the quartz hemispherical lens which is transparent to the wavelength λ above the diameter of the inscribed circle in the protective film (SiO 2 ) plane; and the back adhesive layer (Au Or AuSn) is bonded to the n-type electrode of the aluminum nitride ceramic package containing an inorganic paint coating film with a reflectivity of 91% or more, and the p-type electrode and the p-type pad electrode (Ti/Au) are similarly wired, A quartz window is metal-sealed on the upper surface of the aluminum nitride ceramic package.

根據本發明之第7態樣,提供一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置為止,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au),且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自n型AlGaN層剝離藍寶石基板(雷射剝離:LLO);對上述n型AlGaN層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;及將被分割之元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。According to a seventh aspect of the present invention, there is provided a method for manufacturing a deep ultraviolet LED device, characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength λ (200 nm ~ 355 nm), and has the following steps: The sapphire substrate is a growth substrate on which an AlN buffer layer, an n-type AlGaN layer, a multiple quantum well layer (MQW), a multiple quantum barrier layer (MQB), a p-type AlGaN layer, and a p-type GaN contact layer are sequentially laminated on it; ready for use To form a reflective two-dimensional photonic crystal mold; spin-coated two resist layers on the p-type GaN contact layer, transfer the structure of the mold by the nanoimprint method; transfer the resist with the above structure The etchant layer is used as a mask. ICP etching is carried out from the p-type GaN contact layer until it does not exceed the position of the p-type AlGaN layer interface, and then it is washed to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal The photonic crystals are used to sequentially form p-type reflective electrodes (Ni/Au) by oblique evaporation; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrodes (Ni/Au) ) high-temperature annealing treatment; after forming a pattern, forming an insulating film (SiO 2) by photolithography in the step of forming an insulating film (SiO 2); by peeling step (Ni / Au) patterned on the p-type reflective electrode is between The insulating film (SiO 2 ) pattern is formed at the same height; after the p-type wiring electrode (Ti/Au/Ni) pattern is formed by the photolithography step, the p-type wiring electrode (Ti/Au/ Ni); p-type wiring electrode (Ti/Au/Ni) pattern is formed by a peeling step; insulating film (SiO 2 ) is formed by a photolithography step; n-type electrode (through hole) formation pattern is formed by a photolithography step; by ICP etching forms the through hole until it exceeds the position of the interface between the multiple quantum well layer (MQW) and the n-type AlGaN layer; forms the insulating film (SiO 2 ); removes the insulating film formed on the bottom surface of the through hole by ICP etching ( SiO 2 ), and then excavate the n-type AlGaN layer; on the insulating film (SiO 2 ) formed in the above step and inside the through hole, the n-type wiring electrode (Ti/Al/Ti /Au), and when the depth from the upper part of the insulating film (SiO 2 ) to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; Then, the n-type wiring electrode (Ti/Al/Ti/Au) is subjected to high-temperature annealing treatment; the n-type wiring electrode (Ti/Al/Ti/Au) is planarized by polishing or CMP; the n-type wiring electrode (Ti/Al/Ti/Au) vapor-deposit adhesive layer (Au or AuSn) on top of (Ti/Al/Ti/Au); prepare a support substrate (CuMo or CuW) vapor-deposited with the support substrate-side bonding layer (Au or AuSn); Adhesive layer (Au or AuSn) on top of type wiring electrode (Ti/Al/Ti/Au) Join the support substrate side bonding layer (Au or AuSn) of the above support substrate (CuMo or CuW); irradiate the excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the n-type AlGaN layer (laser lift-off: LLO ); For the above-mentioned n-type AlGaN layer, a photolithography step is used to form a pattern for element separation; after SiO 2 is formed, a SiO 2 pattern mask is formed by a lift-off step; excavation is carried out by ICP etching until the insulating film (SiO 2 ) Until the surface is exposed; after the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; the p-type pad electrode (Ti/ After Au), the resist is removed by a peeling step to form a p-type pad electrode (Ti/Au) pattern; a protective film (SiO 2 ) is formed; and a photolithography step is used to form the protective film ( SiO 2) p-type pad electrode (Ti / Au) coverage of the exposed pattern; BHF performed using a protective film (SiO 2) of the opening; after release by the step formed on the p-type pad electrode (Ti / Au) pattern , Vapor-deposit the back adhesive layer (Au or AuSn) on the back of the support substrate (CuMo or CuW); divide the above-mentioned supporting substrate; and bond the back adhesive layer (Au or AuSn) on the back of the divided component to the substrate with 91 For the n-type electrode of the aluminum nitride ceramic package with a reflectance of more than% of the inorganic coating film, the p-type electrode and the p-type pad electrode (Ti/Au) are wired in the same way, and then the aluminum nitride ceramic package The upper surface metal seals the quartz window.

根據本發明之第8態樣,提供一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置為止,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au),且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自n型AlGaN層剝離藍寶石基板(雷射剝離:LLO);對上述n型AlGaN層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;於被分割之元件之n型AlGaN層上之保護膜(SiO2 )之表面,藉由原子擴散法或表面活化法接合石英半球透鏡,該石英半球透鏡相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明;及將上述元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。 本說明書包含成為本案之優先權之基礎之日本專利申請號2018-246710號之揭示內容。 [發明之效果]According to an eighth aspect of the present invention, there is provided a method for manufacturing a deep ultraviolet LED device, characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength λ (200 nm to 355 nm), and has the following steps: The sapphire substrate is a growth substrate on which an AlN buffer layer, an n-type AlGaN layer, a multiple quantum well layer (MQW), a multiple quantum barrier layer (MQB), a p-type AlGaN layer, and a p-type GaN contact layer are sequentially laminated on it; ready for use To form a reflective two-dimensional photonic crystal mold; spin-coated two resist layers on the p-type GaN contact layer, transfer the structure of the mold by the nanoimprint method; transfer the resist with the above structure The etchant layer is used as a mask. ICP etching is carried out from the p-type GaN contact layer until it does not exceed the position of the p-type AlGaN layer interface, and then it is washed to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal The photonic crystals are used to sequentially form p-type reflective electrodes (Ni/Au) by oblique evaporation; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrodes (Ni/Au) ) high-temperature annealing treatment; after forming a pattern, forming an insulating film (SiO 2) by photolithography in the step of forming an insulating film (SiO 2); by peeling step (Ni / Au) patterned on the p-type reflective electrode is between The insulating film (SiO 2 ) pattern is formed at the same height; after the p-type wiring electrode (Ti/Au/Ni) pattern is formed by the photolithography step, the p-type wiring electrode (Ti/Au/ Ni); p-type wiring electrode (Ti/Au/Ni) pattern is formed by a peeling step; insulating film (SiO 2 ) is formed by a photolithography step; n-type electrode (through hole) formation pattern is formed by a photolithography step; by ICP etching forms the through hole until it exceeds the position of the interface between the multiple quantum well layer (MQW) and the n-type AlGaN layer; forms the insulating film (SiO 2 ); removes the insulating film formed on the bottom surface of the through hole by ICP etching ( SiO 2 ), and then excavate the n-type AlGaN layer; on the insulating film (SiO 2 ) formed in the above step and inside the through hole, the n-type wiring electrode (Ti/Al/Ti /Au), and when the depth from the upper part of the insulating film (SiO 2 ) to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; Then, the n-type wiring electrode (Ti/Al/Ti/Au) is subjected to high-temperature annealing treatment; the n-type wiring electrode (Ti/Al/Ti/Au) is planarized by polishing or CMP; the n-type wiring electrode (Ti/Al/Ti/Au) vapor-deposit adhesive layer (Au or AuSn) on top of (Ti/Al/Ti/Au); prepare a support substrate (CuMo or CuW) vapor-deposited with the support substrate-side bonding layer (Au or AuSn); Adhesive layer (Au or AuSn) on top of type wiring electrode (Ti/Al/Ti/Au) Join the support substrate side bonding layer (Au or AuSn) of the above support substrate (CuMo or CuW); irradiate the excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the n-type AlGaN layer (laser lift-off: LLO ); For the above-mentioned n-type AlGaN layer, a photolithography step is used to form a pattern for element separation; after SiO 2 is formed, a SiO 2 pattern mask is formed by a lift-off step; excavation is carried out by ICP etching until the insulating film (SiO 2 ) Until the surface is exposed; after the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; the p-type pad electrode (Ti/ After Au), the resist is removed by a peeling step to form a p-type pad electrode (Ti/Au) pattern; a protective film (SiO 2 ) is formed; and a photolithography step is used to form the protective film ( SiO 2) p-type pad electrode (Ti / Au) coverage of the exposed pattern; BHF performed using a protective film (SiO 2) of the opening; after release by the step formed on the p-type pad electrode (Ti / Au) pattern , Evaporate the backside adhesive layer (Au or AuSn) on the back of the support substrate (CuMo or CuW); divide the above-mentioned support substrate; on the surface of the protective film (SiO 2 ) on the n-type AlGaN layer of the divided element, The quartz hemispherical lens is bonded by the atomic diffusion method or the surface activation method, and the quartz hemispherical lens is transparent with respect to the wavelength λ above the diameter of the inscribed circle in the plane of the protective film (SiO 2 ); The layer (Au or AuSn) is joined to the n-type electrode of the aluminum nitride ceramic package containing an inorganic paint coating film with a reflectivity of 91% or more, and the p-type electrode and the p-type pad electrode (Ti/Au) After wiring, the quartz window is metal-sealed on the upper surface of the aluminum nitride ceramic package. This specification contains the disclosure of Japanese Patent Application No. 2018-246710, which forms the basis of the priority of this case. [Effects of Invention]

根據本發明,可提高深紫外LED裝置之WPE及輸出。According to the present invention, the WPE and output of deep ultraviolet LED devices can be improved.

以下,一面參照圖式,一面對本發明之實施形態之深紫外LED裝置及其製造方法詳細地進行說明。Hereinafter, with reference to the drawings, the deep ultraviolet LED device and the manufacturing method thereof according to the embodiment of the present invention will be described in detail.

(第1實施形態) 圖1A、圖1B、圖1C係作為本發明之第1實施形態之深紫外LED裝置而示出將波長280 nm作為設計波長λ之一例之AlGaN系深紫外LED裝置之構造的圖。(First Embodiment) 1A, 1B, and 1C are diagrams showing the structure of an AlGaN-based deep ultraviolet LED device with a wavelength of 280 nm as an example of the design wavelength λ as a deep ultraviolet LED device of the first embodiment of the present invention.

具體而言,如圖1B之縱型LED(AlN緩衝層)剖視圖所示般,具有石英窗1、其內側側壁角度(θ)為2a之附無機塗料塗覆膜17之氮化鋁陶瓷封裝2、保護膜(SiO2 )3、AlN緩衝層4、n型AlGaN層5、多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8、p型配線電極(Ti/Au/Ni)9a、p型焊墊電極9b、絕緣膜(SiO2 )10、n型配線電極(Ti/Al/Ti/Au)11a、接合層(Au-Au或Au-AuSn)12、支持基板(CuMo或CuW)13、背面接著層(Au-Au或Au-AuSn)14、反射型二維光子晶體週期構造100、孔隙101(h)。上述反射型二維光子晶體週期構造100形成於p型反射電極(Ni/Au)8與p型AlGaN層/p型GaN接觸層7之厚度方向之範圍內且不超過p型AlGaN層與p型GaN接觸層之界面之位置。Specifically, as shown in the cross-sectional view of the vertical LED (AlN buffer layer) in FIG. 1B, an aluminum nitride ceramic package 2 with an inorganic paint coating film 17 with a quartz window 1 and an inner side wall angle (θ) of 2a , Protective film (SiO 2 ) 3, AlN buffer layer 4, n-type AlGaN layer 5, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p-type AlGaN layer/p-type GaN contact layer 7, p Type reflective electrode (Ni/Au) 8, p-type wiring electrode (Ti/Au/Ni) 9a, p-type pad electrode 9b, insulating film (SiO 2 ) 10, n-type wiring electrode (Ti/Al/Ti/Au) ) 11a, bonding layer (Au-Au or Au-AuSn) 12, supporting substrate (CuMo or CuW) 13, backside adhesive layer (Au-Au or Au-AuSn) 14, reflective two-dimensional photonic crystal periodic structure 100, void 101(h). The above-mentioned reflective two-dimensional photonic crystal periodic structure 100 is formed in the thickness direction of the p-type reflective electrode (Ni/Au) 8 and the p-type AlGaN layer/p-type GaN contact layer 7 and does not exceed the p-type AlGaN layer and the p-type The position of the interface of the GaN contact layer.

圖1A係自石英窗(未圖示)之方向觀察深紫外LED裝置之俯視圖。符號9b係形成於p型配線電極(Ti/Au/Ni)9a上之p型焊墊電極。又,沿著圖1A之虛線示出剖面之圖為圖1B之剖視圖。FIG. 1A is a top view of the deep ultraviolet LED device viewed from the direction of a quartz window (not shown). Symbol 9b is a p-type pad electrode formed on the p-type wiring electrode (Ti/Au/Ni) 9a. In addition, the cross-sectional view taken along the broken line in FIG. 1A is the cross-sectional view of FIG. 1B.

圖1B中,LED元件係於支持基板(CuMo或CuW)13上依序積層有接合層(Au-Au或Au-AuSn)12、n型電極11、絕緣膜(SiO2 )10、p型電極9、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7、多重量子井層(MQW)/多重量子障壁層(MQB)6、n型AlGaN層5、AlN緩衝層4。 n型電極11係由n型配線電極(Ti/Al/Ti/Au)11a、凸形狀之n型電極(上升部)11b及與n型AlGaN層5接觸之n型電極(突出部)11c構成。n型電極(上升部)11b形成於貫通p型配線電極(Ti/Au/Ni)9a、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7及多重量子井層(MQW)/多重量子障壁層(MQB)6而形成之貫通孔10b內,且經由n型電極(突出部)11c與n型AlGaN層5電性接觸。In Figure 1B, the LED element is laminated on a supporting substrate (CuMo or CuW) 13 with a bonding layer (Au-Au or Au-AuSn) 12, n-type electrode 11, insulating film (SiO 2 ) 10, and p-type electrode sequentially laminated 9, p-type reflective electrode (Ni/Au) 8, p-type AlGaN layer/p-type GaN contact layer 7, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, n-type AlGaN layer 5, AlN buffer Layer 4. The n-type electrode 11 is composed of an n-type wiring electrode (Ti/Al/Ti/Au) 11a, a convex n-type electrode (rising portion) 11b, and an n-type electrode (protruding portion) 11c in contact with the n-type AlGaN layer 5 . The n-type electrode (rising portion) 11b is formed on the penetrating p-type wiring electrode (Ti/Au/Ni) 9a, the p-type reflective electrode (Ni/Au) 8, the p-type AlGaN layer/p-type GaN contact layer 7 and the multiple quantum well In the through hole 10b formed by the layer (MQW)/multiple quantum barrier layer (MQB) 6, the n-type AlGaN layer 5 is in electrical contact with the n-type electrode (protrusion) 11c.

絕緣膜(SiO2 )10將n型配線電極(Ti/Al/Ti/Au)11a及n型電極(上升部)11b與其他層絕緣。具體而言,n型配線電極11a藉由介存於與p型配線電極(Ti/Au/Ni)9a之間之絕緣膜(SiO2 )10而與p型電極9絕緣。又,n型電極(上升部)11b之周圍藉由絕緣膜(SiO2 )10被覆,n型電極(上升部)11b與多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7及p型反射電極(Ni/Au)8絕緣。The insulating film (SiO 2 ) 10 insulates the n-type wiring electrode (Ti/Al/Ti/Au) 11a and the n-type electrode (rising portion) 11b from other layers. Specifically, the n-type wiring electrode 11a is insulated from the p-type electrode 9 by the insulating film (SiO 2 ) 10 interposed between the p-type wiring electrode (Ti/Au/Ni) 9a. In addition, the n-type electrode (rising portion) 11b is covered with an insulating film (SiO 2 ) 10, and the n-type electrode (rising portion) 11b and the multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p The type AlGaN layer/p-type GaN contact layer 7 and the p-type reflective electrode (Ni/Au) 8 are insulated.

n型電極(突出部)11c未介隔絕緣膜(SiO2 )10而與n型AlGaN層5接觸。n型電極(上升部)11b係自貫通孔10b之前端突出(n型電極(突出部)11c),但n型電極(上升部)11b只要自貫通孔10b露出並與n型AlGaN層5電性接觸即可,亦可未必自貫通孔10b突出。 如圖1B所示,與n型AlGaN層5電性接觸之(n型電極(上升部)11b與n型AlGaN層5之電性連接部)於1個深紫外LED元件中例如呈散點狀形成有多個,因此,自p型AlGaN層/p型GaN接觸層7朝向n型AlGaN層5大致均勻之面內電流於縱向上流動。藉由支持基板13使用導電性基板,能夠實現自導電性基板側之電力供給,且成為散熱性優異之構造。The n-type electrode (protruding portion) 11 c is in contact with the n-type AlGaN layer 5 without interposing the insulating film (SiO 2 ) 10. The n-type electrode (rising part) 11b protrudes from the front end of the through hole 10b (n-type electrode (protruding part) 11c), but the n-type electrode (rising part) 11b is only exposed from the through hole 10b and is electrically connected to the n-type AlGaN layer 5. Sexual contact is sufficient, and it may not necessarily protrude from the through hole 10b. As shown in FIG. 1B, the electrical connection between the n-type electrode (rising portion) 11b and the n-type AlGaN layer 5, which is in electrical contact with the n-type AlGaN layer 5, is, for example, scattered in a deep ultraviolet LED element. Since a plurality of them are formed, a substantially uniform in-plane current flows from the p-type AlGaN layer/p-type GaN contact layer 7 toward the n-type AlGaN layer 5 in the longitudinal direction. By using a conductive substrate for the support substrate 13, power supply from the conductive substrate side can be realized, and it has a structure excellent in heat dissipation.

圖1C係反射型二維光子晶體週期構造100之俯視圖。圓柱形狀且以半徑R之圓為剖面之孔隙101(h)具有沿著X-Y方向以週期a形成為三角晶格狀之孔構造。 於上述構造中,由多重量子井層6發出之例如波長280 nm之深紫外光係一面將TE光與TM光於全方向放射而進行橢圓偏光一面於介質中傳輸。而且,設置於多重量子井層6附近之二維光子晶體週期構造100滿足布勒格之條件式(mλ/neff =2a,其中,m:次數、λ:發光波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期),且當相對於TE偏光成分打開光子帶隙(PBG)時,入射至二維光子晶體之深紫外光於二維光子晶體面內形成穩定波並被朝向AlN緩衝層4之方向反射。1C is a top view of a reflective two-dimensional photonic crystal periodic structure 100. The pore 101(h) having a cylindrical shape and having a circle of radius R as a cross section has a pore structure formed in a triangular lattice shape with a period a along the XY direction. In the above structure, the deep ultraviolet light with a wavelength of 280 nm emitted from the multiple quantum well layer 6 transmits TE light and TM light in all directions to perform elliptically polarized light transmission in the medium. Moreover, the two-dimensional photonic crystal periodic structure 100 disposed near the multiple quantum well layer 6 satisfies the conditional expression of Burrge (mλ/n eff = 2a, where m: order, λ: emission wavelength, n eff : two-dimensional photon The effective refractive index of the crystal, a: the period of the two-dimensional photonic crystal), and when the photonic band gap (PBG) is opened relative to the TE polarization component, the deep ultraviolet light incident on the two-dimensional photonic crystal is formed in the plane of the two-dimensional photonic crystal The stable wave is reflected toward the AlN buffer layer 4.

於圖1D之(a)中,針對波長280 nm之深紫外光入射至形成於p型GaN接觸層之二維光子晶體(R/a=0.4)時的TE偏光成分中之光子頻帶結構,於圖1D之(b)中利用平面波展開法求出R/a與PBG值之關係而圖示。 再者,所謂PBG值係表示第1光子頻帶(ω1TE)與第2光子頻帶(ω2TE)之間隙之大小之值,由(第2光子頻帶(ωa/2πc)之最小值-(第1光子頻帶(ωa/2πc)之最大值)算出。由該圖可知,R/a與PBG值存在比例關係。 又,平面波展開法之算出所需之參數係以如下方式算出。二維光子晶體之填充率f係由以下之式(1)算出。 f=2π/30.5 ×(R/a)2 (1) 又,二維光子晶體之有效折射率neff 係由以下之式(2)算出。 neff =((n2 2 +(n1 2 -n2 2 )×f))0.5 (2) 因此,若空氣之折射率n1 =1,p型GaN接觸層之折射率n2 =2.618,則R/a=0.2、0.3及0.4之有效折射率根據上述2式分別成為2.45、2.223及1.859。In Figure 1D (a), for the photonic band structure of the TE polarization component when deep ultraviolet light with a wavelength of 280 nm is incident on the two-dimensional photonic crystal (R/a=0.4) formed on the p-type GaN contact layer, Fig. 1D(b) shows the relationship between R/a and PBG value obtained by the plane wave expansion method. Furthermore, the so-called PBG value refers to the value of the gap between the first photon frequency band (ω1TE) and the second photon frequency band (ω2TE), from the minimum value of (the second photon frequency band (ωa/2πc)-(the first photon frequency band) The maximum value of (ωa/2πc)) is calculated. From the figure, it can be seen that there is a proportional relationship between R/a and the PBG value. In addition, the parameters required for the calculation of the plane wave expansion method are calculated as follows. The filling rate of the two-dimensional photonic crystal f is calculated by the following formula (1): f=2π/3 0.5 ×(R/a) 2 (1) In addition, the effective refractive index n eff of the two-dimensional photonic crystal is calculated by the following formula (2). n eff =((n 2 2 +(n 1 2 -n 2 2 )×f)) 0.5 (2) Therefore, if the refractive index of air is n 1 =1, the refractive index of the p-type GaN contact layer is n 2 =2.618, Then, the effective refractive indexes of R/a=0.2, 0.3, and 0.4 become 2.45, 2.223, and 1.859, respectively, according to the above-mentioned 2 equations.

繼而,藉由利用FDTD法進行之模擬解析而求出基於二維光子晶體之反射效果之LEE。FDTD法係將馬克斯威爾方程式於空間及時間上轉換成差分方程式而直接計算出電磁場強度,因此,適於nm構造之光子晶體等之波動解析,但無法直接計算出LEE。另一方面,光線追蹤法係直接計算無規則地放射數萬條光線並到達至檢測器之光線數,因此,能夠直接求出mm構造中之LEE。但是,無法進行nm構造之波動解析。因此,為求出基於光子晶體之反射效果之LEE,進行了FDTD法與光線追蹤法之交叉模擬。Then, the LEE based on the reflection effect of the two-dimensional photonic crystal was obtained by the simulation analysis performed by the FDTD method. The FDTD method converts the Maxwell equation into a difference equation in space and time to directly calculate the electromagnetic field intensity. Therefore, it is suitable for the wave analysis of nm-structured photonic crystals, but cannot directly calculate the LEE. On the other hand, the ray tracing method directly calculates the number of rays that randomly emit tens of thousands of rays and reach the detector. Therefore, the LEE in the mm structure can be directly calculated. However, the wave analysis of nm structure cannot be performed. Therefore, in order to obtain the LEE based on the reflection effect of the photonic crystal, a cross simulation of the FDTD method and the ray tracing method was carried out.

首先,對自藍寶石基板提取深紫外光之Flip Chip構造之深紫外LED基本模型進行交叉模擬。表1中示出光線追蹤法之計算模型之各參數,表2中示出FDTD法之計算模型之各參數,表3中示出反射型二維光子晶體之計算模型之各參數。First, cross-simulation is carried out on the basic model of deep ultraviolet LED constructed with Flip Chip that extracts deep ultraviolet light from the sapphire substrate. Table 1 shows the parameters of the calculation model of the ray tracing method, Table 2 shows the parameters of the calculation model of the FDTD method, and Table 3 shows the parameters of the calculation model of the reflective two-dimensional photonic crystal.

[表1] 深紫外LED基本模型 元件尺寸:1.2 mm見方 厚度 折射率 透過率 反射率 側壁角度(θ) 石英窗 200 um 1.494 100% - - 藍寶石基板 430 um 1.82 100% - - AlN緩衝層 2 um 2.285 100% - - AlGaN層 2 um 2.579 100% - - p型GaN接觸層 200 nm 2.618 2.3%/200 nm - - p型反射電極(Ni/Au) - - - 30% - 無機塗料塗覆膜 - - - 91% - 氮化鋁陶瓷封裝 - - - - 45度〜90度 [Table 1] Deep UV LED basic model element size: 1.2 mm square thickness Refractive index Transmittance Reflectivity Side wall angle (θ) Quartz window 200 um 1.494 100% - - Sapphire substrate 430 um 1.82 100% - - AlN buffer layer 2 um 2.285 100% - - AlGaN layer 2 um 2.579 100% - - p-type GaN contact layer 200 nm 2.618 2.3%/200 nm - - p-type reflective electrode (Ni/Au) - - - 30% - Inorganic coating film - - - 91% - Aluminum nitride ceramic package - - - - 45 degrees~90 degrees

[表2] 深紫外LED基本模型 元件尺寸:10,010 nm見方 膜厚(nm) Al組成(%) 折射率 消光係數 相對磁導率 瞬間相對介電常數 無機塗料塗覆膜 》200 nm - 1.8 0.06 1.0 3.3 Au反射電極 150 nm - 1.678 1.873 1.0 1.0 Ni層 30 nm - 1.681 2.067 1.0 1.0 p型GaN接觸層 200 nm - 2.618 0.42 1.0 6.7 p型AlGaN層 30 nm 60% 2.622 - - - 多重量子障壁層:2pair Block 10 nm/5 nm 80% 2.444 - - - Valley 5 nm/5 nm 65% 2.579 - - - 多重量子井層:3pair Well 5 nm/5 nm/5 nm 50% 2.779 - - - Barrier 10 nm/10 nm/10 nm 65% 2.579 - - - n型AlGaN層 2,000 nm 65% 2.579 - - - AlN緩衝層 2,000 nm 100% 2.285 - - - 藍寶石基板 6720 nm - 1.82 - - - 石英窗 100 nm - 1.494 - - - [Table 2] Deep UV LED basic model element size: 10,010 nm square Film thickness (nm) Al composition (%) Refractive index Extinction coefficient Relative permeability Instant relative permittivity Inorganic coating film 》200 nm - 1.8 0.06 1.0 3.3 Au reflective electrode 150 nm - 1.678 1.873 1.0 1.0 Ni layer 30 nm - 1.681 2.067 1.0 1.0 p-type GaN contact layer 200 nm - 2.618 0.42 1.0 6.7 p-type AlGaN layer 30 nm 60% 2.622 - - - Multiple quantum barrier layer: 2pair Block 10 nm/5 nm 80% 2.444 - - - Valley 5 nm/5 nm 65% 2.579 - - - Multiple quantum well layer: 3pair Well 5 nm/5 nm/5 nm 50% 2.779 - - - Barrier 10 nm/10 nm/10 nm 65% 2.579 - - - n-type AlGaN layer 2,000 nm 65% 2.579 - - - AlN buffer layer 2,000 nm 100% 2.285 - - - Sapphire substrate 6720 nm - 1.82 - - - Quartz window 100 nm - 1.494 - - -

[表3] R/a m(次數) 直徑(nm) 週期(nm) R/a=0.3 m=3 113 nm 189 nm R/a=0.4 m=3 181 nm 226 nm [table 3] R/a m (frequency) Diameter (nm) Period (nm) R/a=0.3 m=3 113 nm 189 nm R/a=0.4 m=3 181 nm 226 nm

(藉由光線追蹤法計算LEE) 於圖1E之光線追蹤法之計算模型(無二維光子晶體)中,將氮化鋁陶瓷封裝之內側側壁角度θ設為變數使其變化為45度、60度、75度、90度而進行LEE之計算。將其結果示於表4。(Calculate LEE by ray tracing method) In the calculation model of the ray tracing method in Figure 1E (no two-dimensional photonic crystal), the angle θ of the inner side wall of the aluminum nitride ceramic package is set as a variable to change it to 45 degrees, 60 degrees, 75 degrees, and 90 degrees. Calculation of LEE. The results are shown in Table 4.

[表4] 內側側壁角度 45° 60° 75° 90° LEE 4.6% 4.5% 4.3% 3.9% [Table 4] Inside side wall angle 45° 60° 75° 90° LEE 4.6% 4.5% 4.3% 3.9%

(藉由FDTD法計算LEE) 於圖1F之計算模型中,針對無二維光子晶體(2D-PhC)之模型及有二維光子晶體(2D-PhC)之模型進行計算。如表3所示,2D-PhC之計算模型係次數m=3且R/a=0.3、直徑113 nm、週期189 nm及R/a=0.4、直徑181 nm、週期226 nm之2種。又,氮化鋁陶瓷封裝2之內側側壁角度分別設為60度、75度及90度之3種。(Calculate LEE by FDTD method) In the calculation model of Fig. 1F, the calculation is performed for the model without two-dimensional photonic crystal (2D-PhC) and the model with two-dimensional photonic crystal (2D-PhC). As shown in Table 3, the calculation model of 2D-PhC has two types: m=3 and R/a=0.3, diameter 113 nm, period 189 nm and R/a=0.4, diameter 181 nm, period 226 nm. In addition, the inner side wall angles of the aluminum nitride ceramic package 2 are set to three types of 60 degrees, 75 degrees, and 90 degrees, respectively.

LEE之計算方法係首先求出LEE增加因數(有2D-PhC之輸出/無2D-PhC之輸出)。然後,乘以由光線追蹤法求出之無2D-PhC之模型之氮化鋁陶瓷封裝之內側側壁角度60度、75度及90度之LEE值而進行計算。將其結果示於表5。The calculation method of LEE is to first calculate the LEE increase factor (with 2D-PhC output/without 2D-PhC output). Then, multiply the LEE values of 60 degrees, 75 degrees and 90 degrees of the inner side wall angles of the aluminum nitride ceramic package without the 2D-PhC model obtained by the ray tracing method for calculation. The results are shown in Table 5.

[表5] 內側側壁角度 60° 75° 90° 深紫外LED基本模型(無2D-PhC) 4.5% 4.3% 3.9% 深紫外LED基本模型(有2D-PhC、R/a=0.3) 7.4% 7.9% 6.4% 深紫外LED基本模型(有2D-PhC、R/a=0.4) 9.6% 10.4% 8.1% [table 5] Inside side wall angle 60° 75° 90° Deep UV LED basic model (no 2D-PhC) 4.5% 4.3% 3.9% The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.3) 7.4% 7.9% 6.4% The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.4) 9.6% 10.4% 8.1%

其次,針對本實施形態中之縱型LED(AlN緩衝層)計算LEE。圖1G及表6中示出利用FDTD法之計算模型及計算參數。Next, LEE is calculated for the vertical LED (AlN buffer layer) in this embodiment. Figure 1G and Table 6 show the calculation model and calculation parameters using the FDTD method.

[表6] 縱型LED(AlN緩衝層) 元件尺寸:10,010 nm見方 膜厚(nm) Al組成(%) 折射率 消光係數 相對磁導率 瞬間相對介電常數 無機塗料塗覆膜 》200 nm - 1.8 0.06 1.0 3.3 Mo支持基板 6,300 nm - 2.343 3.88 1.0 1.0 Au層(n型配線電極) 150 nm - 1.678 1.873 1,0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Al層(n型配線電極) 100 nm - 0.241 3.357 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 SiO2 (絕緣膜) 100 nm - 1.494 - - - Ni層(p型配線電極) 30 nm - 1.681 2.067 1.0 1.0 Au層(p型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(p型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Au反射電極 150 nm - 1.678 1.873 1.0 1.0 Ni層 30 nm - 1.681 2.067 1.0 1.0 p型GaN接觸層 200 nm - 2.618 0.42 1.0 6.7 p型AlGaN層 30 nm 60% 2.622 - - - 多重量子障壁層:Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - 多重量子井層:Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n型AlGaN層 2,000 nm 65% 2.579 - - - AlN緩衝層 2,000 nm 100% 2.285 - - - SiO2 (保護膜) 100 nm - 1.494 - - - 石英窗(尺寸:17,410 nm) 100 nm - 1.494 - - - [Table 6] Vertical LED (AlN buffer layer) Component size: 10,010 nm square Film thickness (nm) Al composition (%) Refractive index Extinction coefficient Relative permeability Instant relative permittivity Inorganic coating film 》200 nm - 1.8 0.06 1.0 3.3 Mo support substrate 6,300 nm - 2.343 3.88 1.0 1.0 Au layer (n-type wiring electrode) 150 nm - 1.678 1.873 1,0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Al layer (n-type wiring electrode) 100 nm - 0.241 3.357 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 SiO 2 (insulating film) 100 nm - 1.494 - - - Ni layer (p-type wiring electrode) 30 nm - 1.681 2.067 1.0 1.0 Au layer (p-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (p-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Au reflective electrode 150 nm - 1.678 1.873 1.0 1.0 Ni layer 30 nm - 1.681 2.067 1.0 1.0 p-type GaN contact layer 200 nm - 2.618 0.42 1.0 6.7 p-type AlGaN layer 30 nm 60% 2.622 - - - Multiple quantum barrier layer: Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - Multiple quantum well layer: Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n-type AlGaN layer 2,000 nm 65% 2.579 - - - AlN buffer layer 2,000 nm 100% 2.285 - - - SiO 2 (protective film) 100 nm - 1.494 - - - Quartz window (size: 17,410 nm) 100 nm - 1.494 - - -

LEE之計算方法係關於內側側壁角度60度、75度及90度分別求出相對於深紫外LED基本模型(無2D-PhC之輸出)之縱型LED(AlN緩衝層)之無2D-PhC之輸出、縱型LED(AlN緩衝層)之有2D-PhC(表3中記載之R/a=0.3)、以及縱型LED(AlN緩衝層)之有2D-PhC(表3中記載之R/a=0.4)之LEE增加因數。然後,乘以表5中記載之深紫外LED基本模型(無2D-PhC)之內側側壁角度60度、75度及90度時之LEE之值(4.5%、4.3%及3.9%)進行計算。將其計算結果記載於表7。The calculation method of LEE is to obtain the vertical LED (AlN buffer layer) without 2D-PhC relative to the basic model of deep ultraviolet LED (without 2D-PhC output) with respect to the inner side wall angles of 60 degrees, 75 degrees and 90 degrees. Output, vertical LED (AlN buffer layer) has 2D-PhC (R/a = 0.3 in Table 3), and vertical LED (AlN buffer layer) has 2D-PhC (R/ in Table 3) a=0.4) LEE increase factor. Then, multiply the LEE values (4.5%, 4.3%, and 3.9%) when the inner side wall angles of the deep ultraviolet LED basic model (without 2D-PhC) described in Table 5 are 60 degrees, 75 degrees, and 90 degrees. The calculation results are shown in Table 7.

[表7] 內側側壁角度 60° 75° 90° 縱型LED(AlN緩衝層)(無2D-PhC) 4.9% 6.6% 3.6% 縱型LED(AlN緩衝層)(R/a=0.3) 7.5% 10.1% 5.5% 縱型LED(AlN緩衝層)(R/a=0.4) 10.1% 13.9% 7.5% [Table 7] Inside side wall angle 60° 75° 90° Vertical LED (AlN buffer layer) (no 2D-PhC) 4.9% 6.6% 3.6% Vertical LED (AlN buffer layer) (R/a=0.3) 7.5% 10.1% 5.5% Vertical LED (AlN buffer layer) (R/a=0.4) 10.1% 13.9% 7.5%

如表7所示,可知藉由設置2D-PhC,LEE之值提高,LEE依存於內側側壁角度。As shown in Table 7, it can be seen that by setting 2D-PhC, the value of LEE increases, and LEE depends on the angle of the inner side wall.

(第2實施形態) 圖2A係作為本發明之第2實施形態之深紫外LED裝置而示出將波長280 nm作為設計波長λ之一例之AlGaN系深紫外LED裝置之構造之俯視圖。又,圖2B係表示沿著圖2A之虛線之剖面之剖視圖。圖2C係反射型二維光子晶體週期構造100之俯視圖。(Second Embodiment) 2A is a plan view showing the structure of an AlGaN-based deep-ultraviolet LED device having a wavelength of 280 nm as an example of the design wavelength λ as the deep-ultraviolet LED device of the second embodiment of the present invention. In addition, FIG. 2B is a cross-sectional view taken along the broken line of FIG. 2A. 2C is a top view of the reflective two-dimensional photonic crystal periodic structure 100.

具體而言,如圖2B之石英半球透鏡接合縱型LED(AlN緩衝層)剖視圖所示,具有石英窗1、其內側側壁角度(θ)為2a之附無機塗料塗覆膜17之氮化鋁陶瓷封裝2、氮化鋁陶瓷封裝之內側側壁角度(θ)2a、石英半球透鏡31、保護膜(SiO2 )3、AlN緩衝層4、n型AlGaN層5、多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8、p型配線電極(Ti/Au/Ni)9a、絕緣層(SiO2 )10、n型配線電極(Ti/Al/Ti/Au)11a、n型電極(上升部)11b、接合層(Au-Au或Au-AuSn)12、支持基板(CuMo或CuW)13、背面接著層(Au-Au或Au-AuSn)14、反射型二維光子晶體週期構造100、孔隙101(h)。符號9b係形成於p型配線電極(Ti/Au/Ni)9a上之p型焊墊電極。Specifically, as shown in the cross-sectional view of the quartz hemispherical lens bonded vertical LED (AlN buffer layer) in FIG. 2B, the aluminum nitride with the inorganic paint coating film 17 with the quartz window 1, the inner side wall angle (θ) is 2a Ceramic package 2, aluminum nitride ceramic package inner side wall angle (θ) 2a, quartz hemispherical lens 31, protective film (SiO 2 ) 3, AlN buffer layer 4, n-type AlGaN layer 5, multiple quantum well layer (MQW)/ Multiple quantum barrier layer (MQB) 6, p-type AlGaN layer/p-type GaN contact layer 7, p-type reflective electrode (Ni/Au) 8, p-type wiring electrode (Ti/Au/Ni) 9a, insulating layer (SiO 2 10, n-type wiring electrode (Ti/Al/Ti/Au) 11a, n-type electrode (rising part) 11b, bonding layer (Au-Au or Au-AuSn) 12, support substrate (CuMo or CuW) 13, back The subsequent layer (Au-Au or Au-AuSn) 14, the reflective two-dimensional photonic crystal periodic structure 100, and the void 101 (h). Symbol 9b is a p-type pad electrode formed on the p-type wiring electrode (Ti/Au/Ni) 9a.

圖2B中,LED元件係於支持基板(CuMo或CuW)13上依序積層有接合層(Au-Au或Au-AuSn)12、n型電極11、絕緣膜(SiO2 )10、p型電極9、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7、多重量子井層(MQW)/多重量子障壁層(MQB)6、n型AlGaN層5、AlN緩衝層4。In FIG. 2B, the LED element is laminated on a supporting substrate (CuMo or CuW) 13 with a bonding layer (Au-Au or Au-AuSn) 12, an n-type electrode 11, an insulating film (SiO 2 ) 10, and a p-type electrode in order. 9, p-type reflective electrode (Ni/Au) 8, p-type AlGaN layer/p-type GaN contact layer 7, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, n-type AlGaN layer 5, AlN buffer Layer 4.

n型電極11係由n型配線電極(Ti/Al/Ti/Au)11a、凸形狀之n型電極(上升部)11b、及與n型AlGaN層5接觸之n型電極(突出部)11c構成。n型電極(上升部)11b形成於貫通p型配線電極(Ti/Au/Ni)9a、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7及多重量子井層(MQW)/多重量子障壁層(MQB)6而形成之貫通孔10b內,且經由n型電極(突出部)11c與n型AlGaN層5電性接觸。The n-type electrode 11 consists of an n-type wiring electrode (Ti/Al/Ti/Au) 11a, a convex-shaped n-type electrode (rising portion) 11b, and an n-type electrode (protruding portion) 11c in contact with the n-type AlGaN layer 5. constitute. The n-type electrode (rising portion) 11b is formed on the penetrating p-type wiring electrode (Ti/Au/Ni) 9a, the p-type reflective electrode (Ni/Au) 8, the p-type AlGaN layer/p-type GaN contact layer 7 and the multiple quantum well In the through hole 10b formed by the layer (MQW)/multiple quantum barrier layer (MQB) 6, the n-type AlGaN layer 5 is in electrical contact with the n-type electrode (protrusion) 11c.

絕緣膜(SiO2 )10將n型配線電極(Ti/Al/Ti/Au)11a及n型電極(上升部)11b與其他層絕緣。具體而言,n型配線電極11a藉由介存於與p型配線電極(Ti/Au/Ni)9a之間之絕緣膜(SiO2 )10而與p型電極9絕緣。The insulating film (SiO 2 ) 10 insulates the n-type wiring electrode (Ti/Al/Ti/Au) 11a and the n-type electrode (rising portion) 11b from other layers. Specifically, the n-type wiring electrode 11a is insulated from the p-type electrode 9 by the insulating film (SiO 2 ) 10 interposed between the p-type wiring electrode (Ti/Au/Ni) 9a.

又,n型電極(上升部)11b之周圍藉由絕緣膜(SiO2 )10被覆,n型電極(上升部)11b與多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8絕緣。n型電極(突出部)11c不介隔絕緣膜(SiO2 )10而與n型AlGaN層5接觸。n型電極(上升部)11b自貫通孔10b之前端突出(n型電極(突出部)11c),但n型電極(上升部)11b只要自貫通孔10b露出並與n型AlGaN層5電性接觸即可,亦可未必自貫通孔10b突出。In addition, the n-type electrode (rising portion) 11b is covered with an insulating film (SiO 2 ) 10, and the n-type electrode (rising portion) 11b and the multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p The type AlGaN layer/p-type GaN contact layer 7 and the p-type reflective electrode (Ni/Au) 8 are insulated. The n-type electrode (protruding portion) 11 c is in contact with the n-type AlGaN layer 5 without interposing the insulating film (SiO 2 ) 10. The n-type electrode (rising portion) 11b protrudes from the front end of the through hole 10b (n-type electrode (protruding portion) 11c), but the n-type electrode (rising portion) 11b is only exposed from the through hole 10b and is electrically connected to the n-type AlGaN layer 5. The contact may be sufficient, and it may not necessarily protrude from the through hole 10b.

又,沿著圖2A之點線部示出剖視圖之圖成為與圖2B相同之剖視圖。如圖2B所示,與n型AlGaN層5電性接觸之(n型電極(上升部)11b與n型AlGaN層5之電性連接部)於1個深紫外LED元件中例如呈散點狀形成有多個,因此,自p型AlGaN層/p型GaN接觸層7朝向n型AlGaN層5大致均勻之面內電流於縱向上流動。藉由支持基板13使用導電性基板,能夠實現自導電性基板側之電力供給,且成為散熱性優異之構造。 再者,圖2C中示出自石英窗(未圖示)之方向觀察上述深紫外LED裝置之俯視圖以及反射型二維光子晶體週期構造100之俯視圖。In addition, a diagram showing a cross-sectional view along the dotted line in FIG. 2A becomes the same cross-sectional view as FIG. 2B. As shown in FIG. 2B, (the electrical connection portion between the n-type electrode (rising portion) 11b and the n-type AlGaN layer 5) that is in electrical contact with the n-type AlGaN layer 5 is, for example, scattered in a deep ultraviolet LED element. Since a plurality of them are formed, a substantially uniform in-plane current flows from the p-type AlGaN layer/p-type GaN contact layer 7 toward the n-type AlGaN layer 5 in the longitudinal direction. By using a conductive substrate for the support substrate 13, power supply from the conductive substrate side can be realized, and it has a structure excellent in heat dissipation. Furthermore, FIG. 2C shows a top view of the above-mentioned deep ultraviolet LED device and a top view of the reflective two-dimensional photonic crystal periodic structure 100 viewed from the direction of a quartz window (not shown).

本LED構造中之LEE之計算方法與第1實施形態中之縱型LED(AlN緩衝層)同樣地藉由FDTD法而計算。將其計算模型以及計算參數示於圖2D、表8中。The calculation method of the LEE in this LED structure is calculated by the FDTD method in the same way as the vertical LED (AlN buffer layer) in the first embodiment. The calculation model and calculation parameters are shown in Figure 2D and Table 8.

[表8] 石英半球透鏡接合縱型LED(AlN緩衝層) 元件尺寸:10,010 nm見方 膜厚(nm) Al組成(%) 折射率 消光係數 相對磁導率 瞬間相對介電常數 無機塗料塗覆膜 》200 nm - 1.8 0.06 1.0 3.3 Mo支持基板 6,300 nm - 2.343 3.88 1.0 1.0 Au層(n型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Al層(n型配線電極) 100 nm - 0.241 3.357 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 SiO2 (絕緣膜) 100 nm - 1.494 - - - Ni層(p型配線電極) 30 nm - 1.681 2.067 1.0 1.0 Au層(p型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(p型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Au反射電極 150 nm - 1.678 1.873 1.0 1.0 Ni層 30 nm - 1.681 2.067 1.0 1.0 p型GaN接觸層 200 nm - 2.618 0.42 1.0 6.7 p型AlGaN層 30 nm 60% 2.622 - - - 多重量子障壁層:Biock Valley 10mn/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - 多重量子井層:Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n型AlGaN層 2,000 nm 65% 2.579 - - - AlN緩衝層 2,000 nm 100% 2.285 - - - SiO2 (保護膜) 100 nm - 1.494 - - - 石英半球透鏡 5,000 nm - 1.494 - - - 石英窗(尺寸:17,410 nm) 100 nm - 1.494 - - - [Table 8] Quartz hemispherical lens combined with vertical LED (AlN buffer layer) Element size: 10,010 nm square Film thickness (nm) Al composition (%) Refractive index Extinction coefficient Relative permeability Instant relative permittivity Inorganic coating film 》200 nm - 1.8 0.06 1.0 3.3 Mo support substrate 6,300 nm - 2.343 3.88 1.0 1.0 Au layer (n-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Al layer (n-type wiring electrode) 100 nm - 0.241 3.357 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 SiO 2 (insulating film) 100 nm - 1.494 - - - Ni layer (p-type wiring electrode) 30 nm - 1.681 2.067 1.0 1.0 Au layer (p-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (p-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Au reflective electrode 150 nm - 1.678 1.873 1.0 1.0 Ni layer 30 nm - 1.681 2.067 1.0 1.0 p-type GaN contact layer 200 nm - 2.618 0.42 1.0 6.7 p-type AlGaN layer 30 nm 60% 2.622 - - - Multiple quantum barrier layer: Biock Valley 10mn/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - Multiple quantum well layer: Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n-type AlGaN layer 2,000 nm 65% 2.579 - - - AlN buffer layer 2,000 nm 100% 2.285 - - - SiO 2 (protective film) 100 nm - 1.494 - - - Quartz dome lens 5,000 nm - 1.494 - - - Quartz window (size: 17,410 nm) 100 nm - 1.494 - - -

具體之LEE之計算方法係關於內側側壁角度60度、75度及90度分別求出相對於深紫外LED基本模型(無2D-PhC之輸出)之石英半球透鏡接合縱型LED(AlN緩衝層)之無2D-PhC之輸出、石英半球透鏡接合縱型LED(AlN緩衝層)之有2D-PhC(表3中記載之R/a=0.3)、以及石英半球透鏡接合縱型LED(AlN緩衝層)之有2D-PhC(表3中記載之R/a=0.4)之LEE增加因數。然後,乘以表5中記載之深紫外LED基本模型(無2D-PhC)之內側側壁角度60度、75度及90度時之LEE之值(4.5%、4.3%及3.9%)進行計算。將其計算結果示於表9中。The specific calculation method of LEE is to obtain the quartz hemispherical lens bonded vertical LED (AlN buffer layer) relative to the basic model of deep ultraviolet LED (no 2D-PhC output) with respect to the inner side wall angle of 60 degrees, 75 degrees and 90 degrees. There is no 2D-PhC output, the quartz hemispherical lens bonded vertical LED (AlN buffer layer) has 2D-PhC (R/a = 0.3 in Table 3), and the quartz hemispherical lens bonded vertical LED (AlN buffer layer) ) Has a LEE increase factor of 2D-PhC (R/a=0.4 in Table 3). Then, multiply the LEE values (4.5%, 4.3%, and 3.9%) when the inner side wall angles of the deep ultraviolet LED basic model (without 2D-PhC) described in Table 5 are 60 degrees, 75 degrees, and 90 degrees. The calculation results are shown in Table 9.

[表9] 內側側壁角度 60° 75° 90° 石英透鏡接合縱型LED(AlN緩衝層)(無2D-PhC) 7.4% 8.6% 5.9% 石英透鏡接合縱型LED(AlN緩衝層)(R/a=0.3) 12.1% 14.7% 9.6% 石英透鏡接合縱型LED(AlN緩衝層)(R/a=0.4) 17.3% 21.5% 13.6% [Table 9] Inside side wall angle 60° 75° 90° Quartz lens bonded vertical LED (AlN buffer layer) (no 2D-PhC) 7.4% 8.6% 5.9% Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.3) 12.1% 14.7% 9.6% Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.4) 17.3% 21.5% 13.6%

如表9所示,可知藉由設置2D-PhC,LEE之值提高,LEE依存於內側側壁角度。As shown in Table 9, it can be seen that by setting 2D-PhC, the value of LEE increases, and LEE depends on the angle of the inner side wall.

(第3實施形態) 作為本發明之第3實施形態之深紫外LED裝置,於圖3A、圖3B、圖3C中示出將波長280 nm作為設計波長λ之一例之AlGaN系深紫外LED裝置之構造。(Third Embodiment) As a deep ultraviolet LED device of the third embodiment of the present invention, the structure of an AlGaN-based deep ultraviolet LED device having a wavelength of 280 nm as an example of the design wavelength λ is shown in FIGS. 3A, 3B, and 3C.

具體而言,於圖3B之縱型LED(n型AlGaN層)剖視圖中,具有石英窗1、附無機塗料塗覆膜17之氮化鋁陶瓷封裝2、氮化鋁陶瓷封裝之內側側壁角度(θ)2a、保護膜(SiO2 )3、n型AlGaN層5、多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8、p型配線電極(Ti/Au/Ni)9a、p型焊墊電極9b、絕緣膜(SiO2 )10、n型配線電極(Ti/Al/Ti/Au)11a、接合層(Au-Au或Au-AuSn)12、支持基板(CuMo或CuW)13、背面接著層(Au-Au或Au-AuSn)14、反射型二維光子晶體週期構造100、孔隙101(h)。反射型二維光子晶體週期構造100形成於p型反射電極(Ni/Au)7與p型AlGaN層/p型GaN接觸層6之厚度方向之範圍內且不超過p型AlGaN層與p型GaN接觸層之界面之位置。Specifically, in the cross-sectional view of the vertical LED (n-type AlGaN layer) of FIG. 3B, there is a quartz window 1, an aluminum nitride ceramic package with an inorganic coating film 17, 2, and an inner side wall angle of the aluminum nitride ceramic package ( θ) 2a, protective film (SiO 2 ) 3, n-type AlGaN layer 5, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p-type AlGaN layer/p-type GaN contact layer 7, p-type reflection Electrode (Ni/Au) 8, p-type wiring electrode (Ti/Au/Ni) 9a, p-type pad electrode 9b, insulating film (SiO 2 ) 10, n-type wiring electrode (Ti/Al/Ti/Au) 11a , Bonding layer (Au-Au or Au-AuSn) 12, supporting substrate (CuMo or CuW) 13, backside adhesive layer (Au-Au or Au-AuSn) 14, reflective two-dimensional photonic crystal periodic structure 100, pore 101 ( h). The reflective two-dimensional photonic crystal periodic structure 100 is formed in the thickness direction of the p-type reflective electrode (Ni/Au) 7 and the p-type AlGaN layer/p-type GaN contact layer 6 and does not exceed the p-type AlGaN layer and p-type GaN The position of the interface of the contact layer.

圖3B中,LED元件係於支持基板(CuMo或CuW)13上依序積層有接合層(Au-Au或Au-AuSn)12、n型電極11、絕緣膜(SiO2 )10、p型電極9、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7、多重量子井層(MQW)/多重量子障壁層(MQB)6、n型AlGaN層5。n型電極11係由n型配線電極(Ti/Al/Ti/Au)11a、凸形狀之n型電極(上升部)11b、及與n型AlGaN層5接觸之n型電極(突出部)11c構成。In FIG. 3B, the LED element is laminated on a supporting substrate (CuMo or CuW) 13 with a bonding layer (Au-Au or Au-AuSn) 12, an n-type electrode 11, an insulating film (SiO 2 ) 10, and a p-type electrode in order. 9. P-type reflective electrode (Ni/Au) 8, p-type AlGaN layer/p-type GaN contact layer 7, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, n-type AlGaN layer 5. The n-type electrode 11 consists of an n-type wiring electrode (Ti/Al/Ti/Au) 11a, a convex-shaped n-type electrode (rising portion) 11b, and an n-type electrode (protruding portion) 11c in contact with the n-type AlGaN layer 5. constitute.

n型電極(上升部)11b形成於貫通p型配線電極(Ti/Au/Ni)9a、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7及多重量子井層(MQW)/多重量子障壁層(MQB)6而形成之貫通孔10b內,且經由n型電極(突出部)11c與n型AlGaN層5電性接觸。The n-type electrode (rising portion) 11b is formed on the penetrating p-type wiring electrode (Ti/Au/Ni) 9a, the p-type reflective electrode (Ni/Au) 8, the p-type AlGaN layer/p-type GaN contact layer 7 and the multiple quantum well In the through hole 10b formed by the layer (MQW)/multiple quantum barrier layer (MQB) 6, the n-type AlGaN layer 5 is in electrical contact with the n-type electrode (protrusion) 11c.

絕緣膜(SiO2 )10將n型配線電極(Ti/Al/Ti/Au)11a及n型電極(上升部)11b與其他層絕緣。具體而言,n型配線電極11a藉由介存於與p型配線電極(Ti/Au/Ni)9a之間之絕緣膜(SiO2 )10而與p型電極9絕緣。又,n型電極(上升部)11b之周圍藉由絕緣膜(SiO2 )10被覆,n型電極(上升部)11b與多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8絕緣。n型電極(突出部)11c不介隔絕緣膜(SiO2 )10而與n型AlGaN層5接觸。The insulating film (SiO 2 ) 10 insulates the n-type wiring electrode (Ti/Al/Ti/Au) 11a and the n-type electrode (rising portion) 11b from other layers. Specifically, the n-type wiring electrode 11a is insulated from the p-type electrode 9 by the insulating film (SiO 2 ) 10 interposed between the p-type wiring electrode (Ti/Au/Ni) 9a. In addition, the n-type electrode (rising portion) 11b is covered with an insulating film (SiO 2 ) 10, and the n-type electrode (rising portion) 11b and the multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p The type AlGaN layer/p-type GaN contact layer 7 and the p-type reflective electrode (Ni/Au) 8 are insulated. The n-type electrode (protruding portion) 11 c is in contact with the n-type AlGaN layer 5 without interposing the insulating film (SiO 2 ) 10.

n型電極(上升部)11b自貫通孔10b之前端突出(n型電極(突出部)11c),但n型電極(上升部)11b只要自貫通孔10b露出並與n型AlGaN層5電性接觸即可,亦可未必自貫通孔10b突出。The n-type electrode (rising portion) 11b protrudes from the front end of the through hole 10b (n-type electrode (protruding portion) 11c), but the n-type electrode (rising portion) 11b is only exposed from the through hole 10b and is electrically connected to the n-type AlGaN layer 5. The contact may be sufficient, and it may not necessarily protrude from the through hole 10b.

又,沿著圖3A之點線部示出剖視圖之圖為圖3B之剖視圖。 如圖3B所示,與n型AlGaN層5電性接觸之(n型電極(上升部)11b與n型AlGaN層5之電性連接部)於1個深紫外LED元件中例如呈散點狀形成有多個,因此,自p型AlGaN層/p型GaN接觸層7朝向n型AlGaN層5大致均勻之面內電流於縱向上流動。藉由支持基板13使用導電性基板,能夠實現自導電性基板側之電力供給,且成為散熱性優異之構造。In addition, the cross-sectional view shown along the dotted line in FIG. 3A is the cross-sectional view of FIG. 3B. As shown in FIG. 3B, (the electrical connection portion between the n-type electrode (rising portion) 11b and the n-type AlGaN layer 5) that is in electrical contact with the n-type AlGaN layer 5 is, for example, scattered in a deep ultraviolet LED element. Since a plurality of them are formed, a substantially uniform in-plane current flows from the p-type AlGaN layer/p-type GaN contact layer 7 toward the n-type AlGaN layer 5 in the longitudinal direction. By using a conductive substrate for the support substrate 13, power supply from the conductive substrate side can be realized, and it has a structure excellent in heat dissipation.

圖3A係自石英窗(未圖示)之方向觀察深紫外LED裝置之俯視圖。符號9b係形成於p型配線電極(Ti/Au/Ni)9a上之p型焊墊電極。符號11c係n型電極(突出部)。3A is a top view of the deep ultraviolet LED device viewed from the direction of a quartz window (not shown). Symbol 9b is a p-type pad electrode formed on the p-type wiring electrode (Ti/Au/Ni) 9a. The symbol 11c is an n-type electrode (protrusion).

圖3C係反射型二維光子晶體週期構造100之俯視圖。圓柱形狀且以半徑R之圓為剖面之孔隙101(h)具有沿著X-Y方向以週期a形成為三角晶格狀之孔構造。關於光子晶體之反射效果以及原理,與第1實施形態所記載之內容相同。3C is a top view of a reflective two-dimensional photonic crystal periodic structure 100. The pore 101(h) having a cylindrical shape and having a circle of radius R as a cross section has a pore structure formed in a triangular lattice shape with a period a along the X-Y direction. The reflection effect and principle of the photonic crystal are the same as those described in the first embodiment.

本實施形態中之LED構造之LEE之計算方法與第1實施形態中之縱型LED(AlN緩衝層)同樣地藉由FDTD法而計算。將其計算模型以及計算參數示於圖3D、表10中。The calculation method of the LEE of the LED structure in this embodiment is calculated by the FDTD method in the same way as the vertical LED (AlN buffer layer) in the first embodiment. The calculation model and calculation parameters are shown in Figure 3D and Table 10.

[表10] 縱型LED(n型AlGaN層) 元件尺寸:10,010 nm見方 膜厚(nm) Al組成(%) 折射率 消光係數 相對磁導率 瞬間相對介電常數 無機塗料塗覆膜 》200 nm - 1.8 0.06 1.0 3.3 Mo支持基板 6,300 nm - 2.343 3.88 1.0 1.0 Au層(n型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Al層(n型配線電極) 100 nm - 0.241 3.357 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 SiO2 (絕緣膜) 100 nm - 1.494 - - - Ni層(p型配線電極) 30 nm - 1.681 2.067 1.0 1.0 Au層(p型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(p型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Au反射電極 150 nm - 1.678 1.873 1.0 1.0 Ni層 30 nm - 1.681 2.067 1.0 1.0 p型GaN接觸層 200 nm - 2.618 0.42 1.0 6.7 p型AlGaN層 30 nm 60% 2.622 - - - 多重量子障壁層:Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - 多重量子井層:Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n型AIGaN層 2,000 nm 65% 2.579 - - - SiO2 (保護膜) 100 nm - 1.494 - - - 石英窗(尺寸:17,410 nm) 100 nm - 1.494 - - - [Table 10] Vertical LED (n-type AlGaN layer) Element size: 10,010 nm square Film thickness (nm) Al composition (%) Refractive index Extinction coefficient Relative permeability Instant relative permittivity Inorganic coating film 》200 nm - 1.8 0.06 1.0 3.3 Mo support substrate 6,300 nm - 2.343 3.88 1.0 1.0 Au layer (n-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Al layer (n-type wiring electrode) 100 nm - 0.241 3.357 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 SiO 2 (insulating film) 100 nm - 1.494 - - - Ni layer (p-type wiring electrode) 30 nm - 1.681 2.067 1.0 1.0 Au layer (p-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (p-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Au reflective electrode 150 nm - 1.678 1.873 1.0 1.0 Ni layer 30 nm - 1.681 2.067 1.0 1.0 p-type GaN contact layer 200 nm - 2.618 0.42 1.0 6.7 p-type AlGaN layer 30 nm 60% 2.622 - - - Multiple quantum barrier layer: Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - Multiple quantum well layer: Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n-type AIGaN layer 2,000 nm 65% 2.579 - - - SiO 2 (protective film) 100 nm - 1.494 - - - Quartz window (size: 17,410 nm) 100 nm - 1.494 - - -

再者,關於圖3D中之n型配線電極之詳情,因與第1實施形態之圖1G相同,故未特別圖示。 具體之LEE之計算方法係關於內側側壁角度60度、75度及90度分別求出相對於深紫外LED基本模型(無2D-PhC之輸出)之縱型LED(n型AlGaN層)之無2D-PhC之輸出、縱型LED(n型AlGaN層)之有2D-PhC(表3中記載之R/a=0.3)、以及縱型LED(n型AlGaN層)之有2D-PhC(表3中記載之R/a=0.4)之LEE增加因數。然後,乘以表5中記載之深紫外LED基本模型(無2D-PhC)之內側側壁角度60度、75度及90度時之LEE之值(4.5%、4.3%及3.9%)進行計算。將其計算結果示於表11中。In addition, the details of the n-type wiring electrode in FIG. 3D are the same as those in FIG. 1G of the first embodiment, so they are not shown in particular. The specific LEE calculation method is to obtain the vertical LED (n-type AlGaN layer) without 2D relative to the basic model of deep ultraviolet LED (no 2D-PhC output) with respect to the inner side wall angles of 60 degrees, 75 degrees and 90 degrees. -PhC output, vertical LED (n-type AlGaN layer) has 2D-PhC (R/a = 0.3 in Table 3), and vertical LED (n-type AlGaN layer) has 2D-PhC (Table 3 R/a=0.4) LEE increase factor recorded in. Then, multiply the LEE values (4.5%, 4.3%, and 3.9%) when the inner side wall angles of the deep ultraviolet LED basic model (without 2D-PhC) described in Table 5 are 60 degrees, 75 degrees, and 90 degrees. The calculation results are shown in Table 11.

[表11] 內側側壁角度 60° 75° 90° 縱型LED(n型AlGaN層)(無2D-PhC) 4.1% 5.9% 3.1% 縱型LED(n型AlGaN層)(R/a=0.3) 7.0% 10.3% 5.4% 縱型LED(n型AlGaN層)(R/a=0.4) 9.5% 14.0% 7.3% [Table 11] Inside side wall angle 60° 75° 90° Vertical LED (n-type AlGaN layer) (no 2D-PhC) 4.1% 5.9% 3.1% Vertical LED (n-type AlGaN layer) (R/a=0.3) 7.0% 10.3% 5.4% Vertical LED (n-type AlGaN layer) (R/a=0.4) 9.5% 14.0% 7.3%

如表11所示,可知藉由設置2D-PhC,LEE之值提高,LEE依存於內側側壁角度。As shown in Table 11, it can be seen that by setting 2D-PhC, the value of LEE increases, and LEE depends on the angle of the inner side wall.

(第4實施形態) 作為本發明之第4實施形態之深紫外LED裝置,於圖4A至圖4C中示出將波長280 nm作為設計波長λ之一例之AlGaN系深紫外LED裝置之構造。圖4A係俯視圖,圖4B沿著圖4A之虛線成為剖視圖。圖4C係反射型二維光子晶體週期構造100之俯視圖。(Fourth Embodiment) As a deep ultraviolet LED device of the fourth embodiment of the present invention, the structure of an AlGaN-based deep ultraviolet LED device with a wavelength of 280 nm as an example of the design wavelength λ is shown in FIGS. 4A to 4C. Fig. 4A is a top view, and Fig. 4B is a cross-sectional view along the broken line of Fig. 4A. 4C is a top view of the reflective two-dimensional photonic crystal periodic structure 100.

具體而言,如圖4B之石英半球透鏡接合縱型LED(n型AlGaN層)剖視圖所示,具有石英窗1、附無機塗料塗覆膜17之氮化鋁陶瓷封裝2、氮化鋁陶瓷封裝之內側側壁角度(θ)2a、石英半球透鏡31、保護膜(SiO2 )3、n型AlGaN層5、多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7、p型反射電極(Ni/Au)8、p型配線電極(Ti/Au/Ni)9a、p型焊墊電極9b、絕緣膜(SiO2 )10、n型配線電極(Ti/Al/Ti/Au)11a、n型電極(上升部)11b、n型電極(突出部)11c、接合層(Au-Au或Au-AuSn)12、支持基板(CuMo或CuW)13、背面接著層(Au-Au或Au-AuSn)14、反射型二維光子晶體週期構造100、孔隙101(h)。Specifically, as shown in the cross-sectional view of the vertical LED (n-type AlGaN layer) bonded with a quartz hemispherical lens in FIG. 4B, a quartz window 1, an aluminum nitride ceramic package with an inorganic coating film 17 and an aluminum nitride ceramic package The inner side wall angle (θ) 2a, quartz hemispherical lens 31, protective film (SiO 2 ) 3, n-type AlGaN layer 5, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p-type AlGaN layer/ p-type GaN contact layer 7, p-type reflective electrode (Ni/Au) 8, p-type wiring electrode (Ti/Au/Ni) 9a, p-type pad electrode 9b, insulating film (SiO 2 ) 10, n-type wiring electrode (Ti/Al/Ti/Au) 11a, n-type electrode (rising part) 11b, n-type electrode (protruding part) 11c, bonding layer (Au-Au or Au-AuSn) 12, support substrate (CuMo or CuW) 13 , The back side adhesive layer (Au-Au or Au-AuSn) 14, the reflective two-dimensional photonic crystal periodic structure 100, and the void 101 (h).

圖4B中,LED元件係於支持基板(CuMo或CuW)13上依序積層有接合層(Au-Au或Au-AuSn)12、n型電極11、絕緣膜(SiO2 )10、p型電極9、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7、多重量子井層(MQW)/多重量子障壁層(MQB)6、n型AlGaN層5。n型電極11由n型配線電極(Ti/Al/Ti/Au)11a、凸形狀之n型電極(上升部)11b、及與n型AlGaN層5接觸之n型電極(突出部)11c構成。In FIG. 4B, the LED element is laminated on a supporting substrate (CuMo or CuW) 13 with a bonding layer (Au-Au or Au-AuSn) 12, an n-type electrode 11, an insulating film (SiO 2 ) 10, and a p-type electrode in order. 9. P-type reflective electrode (Ni/Au) 8, p-type AlGaN layer/p-type GaN contact layer 7, multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, n-type AlGaN layer 5. The n-type electrode 11 is composed of an n-type wiring electrode (Ti/Al/Ti/Au) 11a, a convex-shaped n-type electrode (rising portion) 11b, and an n-type electrode (protruding portion) 11c in contact with the n-type AlGaN layer 5 .

n型電極(上升部)11b形成於貫通p型配線電極(Ti/Au/Ni)9a、p型反射電極(Ni/Au)8、p型AlGaN層/p型GaN接觸層7及多重量子井層(MQW)/多重量子障壁層(MQB)6而形成之貫通孔10b內,且經由n型電極(突出部)11c與n型AlGaN層5電性接觸。The n-type electrode (rising portion) 11b is formed on the penetrating p-type wiring electrode (Ti/Au/Ni) 9a, the p-type reflective electrode (Ni/Au) 8, the p-type AlGaN layer/p-type GaN contact layer 7 and the multiple quantum well In the through hole 10b formed by the layer (MQW)/multiple quantum barrier layer (MQB) 6, the n-type AlGaN layer 5 is in electrical contact with the n-type electrode (protrusion) 11c.

絕緣膜(SiO2 )10將n型配線電極(Ti/Al/Ti/Au)11a及n型電極(上升部)11b與其他層絕緣。具體而言,n型配線電極11a藉由介存於與p型配線電極(Ti/Au/Ni)9a之間之絕緣膜(SiO2 )10而與p型電極9絕緣。The insulating film (SiO 2 ) 10 insulates the n-type wiring electrode (Ti/Al/Ti/Au) 11a and the n-type electrode (rising portion) 11b from other layers. Specifically, the n-type wiring electrode 11a is insulated from the p-type electrode 9 by the insulating film (SiO 2 ) 10 interposed between the p-type wiring electrode (Ti/Au/Ni) 9a.

又,n型電極(上升部)11b之周圍藉由絕緣膜(SiO2 )10被覆,n型電極(上升部)11b自多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7及p型反射電極(Ni/Au)8絕緣。n型電極(突出部)11c未介隔絕緣膜(SiO2 )10而與n型AlGaN層5接觸。In addition, the n-type electrode (rising part) 11b is covered with an insulating film (SiO 2 ) 10, and the n-type electrode (rising part) 11b is formed from the multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, p The type AlGaN layer/p-type GaN contact layer 7 and the p-type reflective electrode (Ni/Au) 8 are insulated. The n-type electrode (protruding portion) 11 c is in contact with the n-type AlGaN layer 5 without interposing the insulating film (SiO 2 ) 10.

n型電極(上升部)11b自貫通孔10b之前端突出(n型電極(突出部)11c),但n型電極(上升部)11b只要自貫通孔10b露出並與n型AlGaN層5電性接觸即可,亦可未必自貫通孔11b突出。The n-type electrode (rising portion) 11b protrudes from the front end of the through hole 10b (n-type electrode (protruding portion) 11c), but the n-type electrode (rising portion) 11b is only exposed from the through hole 10b and is electrically connected to the n-type AlGaN layer 5. The contact may be sufficient, and it may not necessarily protrude from the through hole 11b.

又,沿著圖4A之點線部示出剖視圖者乃為圖4B之剖視圖。 如圖4B所示,與n型AlGaN層5電性接觸之(n型電極(上升部)11b與n型AlGaN層5之電性連接部)於1個深紫外LED元件中例如呈散點狀形成有多個,因此,自p型AlGaN層/p型GaN接觸層7朝向n型AlGaN層5大致均勻之面內電流於縱向上流動。藉由支持基板13使用導電性基板,能夠實現自導電性基板側之電力供給,且成為散熱性優異之構造。 再者,圖4C中示出自石英窗(未圖示)之方向觀察深紫外LED裝置之俯視圖以及反射型二維光子晶體週期構造100之俯視圖。In addition, the cross-sectional view shown along the dotted line in FIG. 4A is the cross-sectional view of FIG. 4B. As shown in FIG. 4B, (the electrical connection portion between the n-type electrode (rising portion) 11b and the n-type AlGaN layer 5) that is in electrical contact with the n-type AlGaN layer 5 is, for example, scattered in a deep ultraviolet LED element. Since a plurality of them are formed, a substantially uniform in-plane current flows from the p-type AlGaN layer/p-type GaN contact layer 7 toward the n-type AlGaN layer 5 in the longitudinal direction. By using a conductive substrate for the support substrate 13, power supply from the conductive substrate side can be realized, and it has a structure excellent in heat dissipation. Furthermore, FIG. 4C shows a top view of the deep ultraviolet LED device and a top view of the reflective two-dimensional photonic crystal periodic structure 100 viewed from the direction of a quartz window (not shown).

本構造中之LEE之計算方法與第3實施形態中之縱型LED(n型AlGaN層)同樣地藉由FDTD法計算。將其計算模型以及計算參數示於圖4D、表12中。The calculation method of the LEE in this structure is calculated by the FDTD method in the same way as the vertical LED (n-type AlGaN layer) in the third embodiment. The calculation model and calculation parameters are shown in Figure 4D and Table 12.

[表12] 石英半球透鏡接合縱型LED(n型AlGaN層) 元件尺寸:10,010 nm見方 膜厚(nm) Al組成 (%) 折射率 消光係數 相對磁導率 瞬間相對介電常數 無機塗料塗覆膜 》200 nm - 1.8 0.06 1.0 3.3 Mo支持基板 6,300 nm - 2.343 3.88 1.0 1.0 Au層(n型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Al層(n型配線電極) 100 nm - 0.241 3.357 1.0 1.0 Ti層(n型配線電極) 30 nm - 1.136 1.324 1.0 1.0 SiO2 (絕緣膜) 100 nm - 1.494 - - - Ni層(p型配線電極) 30 nm - 1.681 2.067 1.0 1.0 Au層(p型配線電極) 150 nm - 1.678 1.873 1.0 1.0 Ti層(p型配線電極) 30 nm - 1.136 1.324 1.0 1.0 Au反射電極 150 nm - 1.678 1.873 1.0 1.0 Ni層 30 nm - 1.681 2.067 1.0 1.0 p型GaN接觸層 200 nm - 2.618 0.42 1.0 6.7 p型AlGaN層 30 nm 60% 2.622 - - - 多重量子障壁層:Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - 多重量子井層:Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n型AlGaN層 2,000 nm 65% 2.579 - - - SiO2 (保護膜) 100 nm - 1.494 - - - 石英半球透鏡 5,000 nm - 1.494 - - - 石英窗(尺寸:17,410 nm) 100 nm - 1.494 - - - [Table 12] Quartz hemispherical lens combined with vertical LED (n-type AlGaN layer) Element size: 10,010 nm square Film thickness (nm) Al composition (%) Refractive index Extinction coefficient Relative permeability Instant relative permittivity Inorganic coating film 》200 nm - 1.8 0.06 1.0 3.3 Mo support substrate 6,300 nm - 2.343 3.88 1.0 1.0 Au layer (n-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Al layer (n-type wiring electrode) 100 nm - 0.241 3.357 1.0 1.0 Ti layer (n-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 SiO 2 (insulating film) 100 nm - 1.494 - - - Ni layer (p-type wiring electrode) 30 nm - 1.681 2.067 1.0 1.0 Au layer (p-type wiring electrode) 150 nm - 1.678 1.873 1.0 1.0 Ti layer (p-type wiring electrode) 30 nm - 1.136 1.324 1.0 1.0 Au reflective electrode 150 nm - 1.678 1.873 1.0 1.0 Ni layer 30 nm - 1.681 2.067 1.0 1.0 p-type GaN contact layer 200 nm - 2.618 0.42 1.0 6.7 p-type AlGaN layer 30 nm 60% 2.622 - - - Multiple quantum barrier layer: Block Valley 10 nm/5 nm 5 nm/5 nm 80% 65% 2.444 2.579 - - - Multiple quantum well layer: Well Barrier 5 nm/5 nm/5 nm 10 nm/10 nm/10 nm 50% 65% 2.779 2.579 - - - n-type AlGaN layer 2,000 nm 65% 2.579 - - - SiO 2 (protective film) 100 nm - 1.494 - - - Quartz dome lens 5,000 nm - 1.494 - - - Quartz window (size: 17,410 nm) 100 nm - 1.494 - - -

具體之LEE之計算方法係關於內側側壁角度60度、75度及90度分別求出相對於深紫外LED基本模型(無2D-PhC之輸出)之石英半球透鏡接合縱型LED(n型AlGaN層)之無2D-PhC之輸出、石英半球透鏡接合縱型LED(n型AlGaN層)之有2D-PhC(表3中記載之R/a=0.3)、以及石英半球透鏡接合縱型LED(n型AlGaN層)之有2D-PhC(表3中記載之R/a=0.4)之LEE增加因數。然後,乘以表5中記載之深紫外LED基本模型(無2D-PhC)之內側側壁角度60度、75度及90度時之LEE之值(4.5%、4.3%及3.9%)進行計算。將其計算結果示於表13中。The specific LEE calculation method is to obtain the vertical LED (n-type AlGaN layer) with a quartz hemispherical lens bonded to the basic model of deep ultraviolet LED (no 2D-PhC output) with respect to the inner side wall angles of 60 degrees, 75 degrees and 90 degrees. ) Without 2D-PhC output, quartz hemispherical lens bonded vertical LED (n-type AlGaN layer) with 2D-PhC (R/a = 0.3 in Table 3), and quartz hemispherical lens bonded vertical LED (n Type AlGaN layer) has an LEE increase factor of 2D-PhC (R/a=0.4 in Table 3). Then, multiply the LEE values (4.5%, 4.3%, and 3.9%) when the inner side wall angles of the deep ultraviolet LED basic model (without 2D-PhC) described in Table 5 are 60 degrees, 75 degrees, and 90 degrees. The calculation results are shown in Table 13.

[表13] 內側側壁角度 60° 75° 90° 石英透鏡接合縱型LED(n型AlGaN層)(無2D-PhC) 6.4% 7.9% 5.0% 石英透鏡接合縱型LED(n型AlGaN層)(R/a=0.3) 11.8% 15.2% 9.3% 石英透鏡接合縱型LED(n型AlGaN層)(R/a=0.4) 15.2% 19.8% 11.9% [Table 13] Inside side wall angle 60° 75° 90° Quartz lens bonded vertical LED (n-type AlGaN layer) (no 2D-PhC) 6.4% 7.9% 5.0% Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.3) 11.8% 15.2% 9.3% Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.4) 15.2% 19.8% 11.9%

(第1至第4實施形態之彙總) 表14係將第1至第4實施形態中之各構造之LEE彙總。(Summary of the first to fourth embodiments) Table 14 summarizes the LEE of each structure in the first to fourth embodiments.

[表14] 內側側壁角度 60° 75° 90° 深紫外LED基本模型(無2D-PhC) 4.5% 4.3% 3.9% 深紫外LED基本模型(有2D-PhC、R/a=0.3) 7.4% 7.9% 6.4% 深紫外LED基本模型(有2D-PhC、R/a=0.4) 9.6% 10.4% 8.1% 縱型LED(AlN緩衝層)(無2D-PhC) 4.9% 6.6% 3.6% 縱型LED(AlN緩衝層)(R/a=0.3) 7.5% 10.1% 5.5% 縱型LED(AlN緩衝層)(R/a=0.4) 10.1% 13.9% 7.5% 石英透鏡接合縱型LED(AlN緩衝層)(無2D-PhC) 7.4% 8.6% 5.9% 石英透鏡接合縱型LED(AlN緩衝層)(R/a=0.3) 12.1% 14.7% 9.6% 石英透鏡接合縱型LED(AlN緩衝層)(R/a=0.4) 17.3% 21.5% 13.6% 縱型LED(n型AlGaN層)(無2D-PhC) 4.1% 5.9% 3.1% 縱型LED(n型AlGaN層)(R/a=0.3) 7.0% 10.3% 5.4% 縱型LED(n型AlGaN層)(R/a=0.4) 9.5% 14.0% 7.3% 石英透鏡接合縱型LED(n型AlGaN層)(無2D-PhC) 6.4% 7.9% 5.0% 石英透鏡接合縱型LED(n型AlGaN層)(R/a=0.3) 11.8% 15.2% 9.3% 石英透鏡接合縱型LED(n型AlGaN層)(R/a=0.4) 15.2% 19.8% 11.9% [Table 14] Inside side wall angle 60° 75° 90° Deep UV LED basic model (no 2D-PhC) 4.5% 4.3% 3.9% The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.3) 7.4% 7.9% 6.4% The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.4) 9.6% 10.4% 8.1% Vertical LED (AlN buffer layer) (no 2D-PhC) 4.9% 6.6% 3.6% Vertical LED (AlN buffer layer) (R/a=0.3) 7.5% 10.1% 5.5% Vertical LED (AlN buffer layer) (R/a=0.4) 10.1% 13.9% 7.5% Quartz lens bonded vertical LED (AlN buffer layer) (no 2D-PhC) 7.4% 8.6% 5.9% Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.3) 12.1% 14.7% 9.6% Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.4) 17.3% 21.5% 13.6% Vertical LED (n-type AlGaN layer) (no 2D-PhC) 4.1% 5.9% 3.1% Vertical LED (n-type AlGaN layer) (R/a=0.3) 7.0% 10.3% 5.4% Vertical LED (n-type AlGaN layer) (R/a=0.4) 9.5% 14.0% 7.3% Quartz lens bonded vertical LED (n-type AlGaN layer) (no 2D-PhC) 6.4% 7.9% 5.0% Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.3) 11.8% 15.2% 9.3% Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.4) 15.2% 19.8% 11.9%

此外,若驅動電壓(VF )=6.5 V、驅動電流(IF )=350 mA,則深紫外LED基本模型(無2D-PhC)之WPE(%)及輸出(mW)分別為2.2%及50 mW。於驅動電壓(VF )=6.5 V、驅動電流(IF )=350 mA之值為固定之情形時,WPE(%)及輸出(mW)之值與光提取效率之值成比例。因此,若將內側側壁角度60度、75度及90度時之深紫外LED基本模型(無2D-PhC)之WPE(%)及輸出(mW)分別設為2.2%及50 mW,則表14中記載之其他構造之WPE(%)及輸出(mW)之值可藉由比例計算而求出。又,於縱型LED構造之情形時,由於散熱特性優異,故能夠使輸出與IF 成比例地增加。因此,IF =700 mA之輸出值亦可藉由比例計算而求出。將其等之結果示於表15中。In addition, if the driving voltage (V F ) = 6.5 V and the driving current (I F ) = 350 mA, the WPE (%) and output (mW) of the deep ultraviolet LED basic model (without 2D-PhC) are 2.2% and 50 mW. When the driving voltage (V F ) = 6.5 V and the driving current (I F ) = 350 mA are fixed, the values of WPE (%) and output (mW) are proportional to the value of light extraction efficiency. Therefore, if the WPE (%) and output (mW) of the basic deep UV LED model (without 2D-PhC) when the inner side wall angles are 60 degrees, 75 degrees and 90 degrees are set to 2.2% and 50 mW respectively, then Table 14 The WPE (%) and output (mW) values of other structures described in the section can be calculated by ratio calculation. Also, in the case of the vertical LED structure, since the heat dissipation characteristics are excellent, the output can be increased in proportion to the I F. Therefore, the output value of I F =700 mA can also be obtained by proportional calculation. The results are shown in Table 15.

[表15]    側壁角度60° 側壁角度75° 側壁角度90°    LEE (%) WPE (%) 輸出(mW) IF =350 mA 輸出(mW) IF =700 mA LEE (%) WPE (%) 輸出(mW) IF =350 mA 輸出(mW) IF =700 mA LEE (%) WPE (%) 輸出(mW) IF =350 mA 輸出(mW) IF =700 mA 深紫外LED基本模型(無2D-PhC) 4.5% 2.2% 50 mW - 4.3% 2.2% 50 mW - 3.9% 2.2% 50 mW - 深紫外LED基本模型(有2D-PhC、R/a=0.3) 7.4% 3.6% 83 mW - 7.9% 4.0% 91 mW - 6.4% 3.6% 82 mW - 深紫外LED基本模型(有2D-PhC、R/a=0.4) 9.6% 4.7% 106 mW - 10.4% 5.3% 121 mW - 8.1% 4.6% 104 mW - 縱型LED(AlN緩衝層) (無2D-PhC) 4.9% 2.4% 54 mW 109 mW 6.6% 3.4% 77 mW 154 mW 3.6% 2.0% 46 mW 93 mW 縱型LED(AlN緩衝層) (R/a=0.3) 7.5% 3.6% 33 mW 166 mW 10.1% 5.2% 118 mW 236 mW 5.5% 3.1% 71 mW 142 mW 縱型LED(AlN緩衝層) (R/a=0.4) 10.1% 4.9% 112 mW 224 mW 13.9% 7.1% 161 mW 322 mW 7.5% 4.2% 96 mW 192 mW 石英透鏡接合縱型LED(AlN緩衝層) (無2D-PhC) 7.4% 3.6% 82 mW 164 mW 8.6% 4.4% 100 mW 200 mW 5.9% 3.3% 75 mW 150 mW 石英透鏡接合縱型LED(AlN緩衝層) (R/a=0.3) 12.1% 5.9% 134 mW 268 mW 14.7% 7.5% 171 mW 343 mW 9.6% 5.4% 123 mW 246 mW 石英透鏡接合縱型LED(AlN緩衝層) (R/a=0.4) 17.3% 8.5% 192 mW 385 mW 21.5% 11.0% 250 mW 501 mW 13.6% 7.7% 174 mW 348 mW 縱型LED(n型AlGaN層) (無2D-PhC) 4.1% 2.0% 45 mW 90 mW 5.9% 3.0% 69 mW 138 mW 3.1% 1.7% 40 mW 79 mW 縱型LED(n型AlGaN層) (R/a=0.3) 7.0% 3.4% 78 mW 156 mW 10.3% 5.3% 120 mW 239 mW 5.4% 3.0% 69 mW 137 mW 縱型LED(n型AlGaN層) (R/a=0.4) 9.5% 4.6% 106 mW 211 mW 14.0% 7.2% 163 mW 325 mW 7.3% 4.1% 94 mW 188 mW 石英透鏡接合縱型LED(n型AlGaN層) (無2D-PhC) 6.4% 3.1% 71 mW 142 mW 7.9% 4.0% 91 mW 183 mW 5.0% 2.8% 65 mW 129 mW 石英透鏡接合縱型LED(n型AlGaN層) (R/a=0.3) 11.8% 5.7% 131 mW 261 mW 15.2% 7.8% 177 mW 354 mW 9.3% 5.2% 119 mW 237 mW 石英透鏡接合縱型LED(n型AlGaN層) (R/a=0.4) 15.2% 7.4% 169 mW 337 mW 19.8% 10.1% 230 mW 460 mA 11.9% 6.7% 153 mW 306 mW [Table 15] Side wall angle 60° Side wall angle 75° Side wall angle 90° LEE (%) WPE (%) Output (mW) I F =350 mA Output (mW) I F =700 mA LEE (%) WPE (%) Output (mW) I F =350 mA Output (mW) I F =700 mA LEE (%) WPE (%) Output (mW) I F =350 mA Output (mW) I F =700 mA Deep UV LED basic model (no 2D-PhC) 4.5% 2.2% 50 mW - 4.3% 2.2% 50 mW - 3.9% 2.2% 50 mW - The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.3) 7.4% 3.6% 83 mW - 7.9% 4.0% 91 mW - 6.4% 3.6% 82 mW - The basic model of deep ultraviolet LED (with 2D-PhC, R/a=0.4) 9.6% 4.7% 106 mW - 10.4% 5.3% 121 mW - 8.1% 4.6% 104 mW - Vertical LED (AlN buffer layer) (no 2D-PhC) 4.9% 2.4% 54 mW 109 mW 6.6% 3.4% 77 mW 154 mW 3.6% 2.0% 46 mW 93 mW Vertical LED (AlN buffer layer) (R/a=0.3) 7.5% 3.6% 33 mW 166 mW 10.1% 5.2% 118 mW 236 mW 5.5% 3.1% 71 mW 142 mW Vertical LED (AlN buffer layer) (R/a=0.4) 10.1% 4.9% 112 mW 224 mW 13.9% 7.1% 161 mW 322 mW 7.5% 4.2% 96 mW 192 mW Quartz lens bonded vertical LED (AlN buffer layer) (no 2D-PhC) 7.4% 3.6% 82 mW 164 mW 8.6% 4.4% 100 mW 200 mW 5.9% 3.3% 75 mW 150 mW Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.3) 12.1% 5.9% 134 mW 268 mW 14.7% 7.5% 171 mW 343 mW 9.6% 5.4% 123 mW 246 mW Quartz lens bonded vertical LED (AlN buffer layer) (R/a=0.4) 17.3% 8.5% 192 mW 385 mW 21.5% 11.0% 250 mW 501 mW 13.6% 7.7% 174 mW 348 mW Vertical LED (n-type AlGaN layer) (no 2D-PhC) 4.1% 2.0% 45 mW 90 mW 5.9% 3.0% 69 mW 138 mW 3.1% 1.7% 40 mW 79 mW Vertical LED (n-type AlGaN layer) (R/a=0.3) 7.0% 3.4% 78 mW 156 mW 10.3% 5.3% 120 mW 239 mW 5.4% 3.0% 69 mW 137 mW Vertical LED (n-type AlGaN layer) (R/a=0.4) 9.5% 4.6% 106 mW 211 mW 14.0% 7.2% 163 mW 325 mW 7.3% 4.1% 94 mW 188 mW Quartz lens bonded vertical LED (n-type AlGaN layer) (no 2D-PhC) 6.4% 3.1% 71 mW 142 mW 7.9% 4.0% 91 mW 183 mW 5.0% 2.8% 65 mW 129 mW Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.3) 11.8% 5.7% 131 mW 261 mW 15.2% 7.8% 177 mW 354 mW 9.3% 5.2% 119 mW 237 mW Quartz lens bonded vertical LED (n-type AlGaN layer) (R/a=0.4) 15.2% 7.4% 169 mW 337 mW 19.8% 10.1% 230 mW 460 mA 11.9% 6.7% 153 mW 306 mW

結論可知,相對於深紫外LED基本模型(無2D-PhC)之輸出50 mW,縱型LED(AlN緩衝層)之有2D-PhC、石英半球透鏡接合縱型LED(AlN緩衝層)之有2D-PhC、縱型LED(n型AlGaN層)之有2D-PhC、石英半球透鏡接合縱型LED(n型AlGaN層)之有2D-PhC之任一構造中均可獲得150 mW~500 mW之高輸出。The conclusion shows that, compared to the 50 mW output of the deep UV LED basic model (without 2D-PhC), the vertical LED (AlN buffer layer) has 2D-PhC, and the quartz hemispherical lens bonded vertical LED (AlN buffer layer) has 2D. -PhC, vertical LED (n-type AlGaN layer) with 2D-PhC, quartz hemispherical lens bonded vertical LED (n-type AlGaN layer) with 2D-PhC can be obtained in any structure of 150 mW to 500 mW High output.

(第5實施形態) 使用圖式對本發明之第5實施形態之縱型LED(AlN緩衝層)裝置之製造方法進行說明。(Fifth Embodiment) The manufacturing method of the vertical LED (AlN buffer layer) device according to the fifth embodiment of the present invention will be described using drawings.

(圖5A(a)) 首先,使藍寶石基板21成為生長基板,於其上依序積層AlN緩衝層4、n型AlGaN層5、多重量子井層(MQW)/多重量子障壁層(MQB)6、p型AlGaN層/p型GaN接觸層7。然後,在準備了用以形成反射型二維光子晶體之模具之後,於p型AlGaN層/p型GaN接觸層7之上旋轉塗佈兩層抗蝕劑,藉由奈米壓印法轉印模具之構造。(Figure 5A(a)) First, the sapphire substrate 21 is used as a growth substrate, and an AlN buffer layer 4, an n-type AlGaN layer 5, a multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6, a p-type AlGaN layer/p Type GaN contact layer 7. Then, after preparing the mold for forming the reflective two-dimensional photonic crystal, two layers of resist are spin-coated on the p-type AlGaN layer/p-type GaN contact layer 7, and the mold is transferred by the nanoimprint method The structure.

(圖5A(b)) 將轉印有上述構造之抗蝕劑層作為遮罩R1,對p型AlGaN層/p型GaN接觸層7進行ICP蝕刻,之後洗淨,形成反射型二維光子晶體(孔101(h))。 (圖5B(c)) 除了形成反射型二維光子晶體,復又藉由光微影步驟形成p型反射電極(Ni/Au)形成用圖案R2。 (圖5B(d)) 藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au)8。(Figure 5A(b)) Using the resist layer transferred with the above-mentioned structure as a mask R1, the p-type AlGaN layer/p-type GaN contact layer 7 is ICP-etched and then washed to form a reflective two-dimensional photonic crystal (hole 101(h)) . (Figure 5B(c)) In addition to forming a reflective two-dimensional photonic crystal, a p-type reflective electrode (Ni/Au) pattern R2 is formed by a photolithography step. (Figure 5B(d)) P-type reflective electrodes (Ni/Au) 8 are sequentially formed by oblique vapor deposition.

(圖5C(e)) 於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)8進行高溫退火處理。 (圖5C(f)) 藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案R3。 (圖5D(g)) 成膜絕緣膜(SiO2 )10。 (圖5D(h)) 藉由剝離步驟於p型反射電極(Ni/Au)圖案8間以相同之高度形成絕緣膜(SiO2 )圖案10。(FIG. 5C(e)) After the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrode (Ni/Au) 8 is subjected to high temperature annealing treatment. (FIG. 5C(f)) A pattern R3 for forming an insulating film (SiO 2 ) is formed by a photolithography step. (FIG. 5D(g)) An insulating film (SiO 2 ) 10 is formed. (FIG. 5D(h)) The insulating film (SiO 2 ) pattern 10 is formed at the same height between the p-type reflective electrode (Ni/Au) patterns 8 by a peeling step.

(圖5E(i)) 藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案R4。 (圖5E(j)) 依序成膜p型配線電極(Ti/Au/Ni)9a。 (圖5F(k)) 藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案9a。 (圖5F(l)) 成膜絕緣膜(SiO2 )10x。(FIG. 5E(i)) The p-type wiring electrode (Ti/Au/Ni) pattern R4 is formed by a photolithography step. (FIG. 5E(j)) P-type wiring electrodes (Ti/Au/Ni) 9a are sequentially formed. (FIG. 5F(k)) The p-type wiring electrode (Ti/Au/Ni) pattern 9a is formed by a peeling step. (FIG. 5F(l)) An insulating film (SiO 2 ) 10x is formed.

(圖5G(m)) 藉由光微影步驟形成n型電極(貫通孔)形成用圖案R5。 (圖5G(n)) 藉由ICP蝕刻形成到達至超過多重量子井層(MQW)/多重量子障壁層(MQB)6與n型AlGaN層5之界面之位置之貫通孔41。 (圖5H(o)) 成膜絕緣膜(SiO2 )10y。 (圖5H(p)) 藉由ICP蝕刻去除成膜於貫通孔41之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層5(槽41a之形成)。(FIG. 5G(m)) A pattern R5 for forming an n-type electrode (through hole) is formed by a photolithography step. (FIG. 5G(n)) The through hole 41 reaching a position beyond the interface between the multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB) 6 and the n-type AlGaN layer 5 is formed by ICP etching. (FIG. 5H(o)) An insulating film (SiO 2 ) 10y is formed. (FIG. 5H(p)) The insulating film (SiO 2 ) formed on the bottom surface of the through hole 41 is removed by ICP etching, and then the n-type AlGaN layer 5 is excavated (formation of the groove 41a).

(圖5I(q)) 於圖5H(o)之步驟中成膜之絕緣膜(SiO2 )10x之上及圖5H(p)之步驟後之貫通孔41a之內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au)11x。於將自絕緣膜(SiO2 )10之上部至圖5H(p)之步驟中挖掘之n型AlGaN層5之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h。成膜後,對n型配線電極(Ti/Al/Ti/Au)11x進行高溫退火處理。藉此,可製成如下構造:n型電極(上升部)11b延伸至通過形成於絕緣膜(SiO2 )10之貫通孔10b而露出於n型AlGaN層5為止,並與n型AlGaN層4接觸(被絕緣膜(SiO2 )10被覆而得以絕緣),且與n型配線電極(Ti/Al/Ti/Au)11a電性連接。例如,n型電極(上升部)11b例如自貫通孔10b之前端突出,且於該突出部11c與n型AlGaN層5電性接觸。 (圖5I(r)) 藉由拋光(Polish)或CMP(Chemical Mechanical Polishing,化學機械拋光)使n型配線電極(Ti/Al/Ti/Au)11x平坦化。 (圖5J(s)) 於n型配線電極(Ti/Al/Ti/Au)11x之上蒸鍍接著層(Au或AuSn)14。 (圖5J(t)) 準備蒸鍍有支持基板13側接合層(Au或AuSn)12之支持基板(CuMo或CuW)13。(FIG. 5I(q)) On the insulating film (SiO 2 ) 10x formed in the step of FIG. 5H(o) and the inside of the through hole 41a after the step of FIG. 5H(p), according to the vapor deposition method The n-type wiring electrode (Ti/Al/Ti/Au) 11x is deposited sequentially. When the depth from the upper portion of the insulating film (SiO 2 ) 10 to the deepest portion of the n-type AlGaN layer 5 excavated in the step of FIG. 5H(p) is set to h, the standard of the film thickness t is t>2h . After the film formation, the n-type wiring electrode (Ti/Al/Ti/Au) 11x is subjected to a high temperature annealing treatment. Thereby, the structure can be made as follows: the n-type electrode (rising portion) 11b extends to be exposed to the n-type AlGaN layer 5 through the through hole 10b formed in the insulating film (SiO 2 ) 10, and interacts with the n-type AlGaN layer 4 The contact (is covered by the insulating film (SiO 2 ) 10 to be insulated), and is electrically connected to the n-type wiring electrode (Ti/Al/Ti/Au) 11a. For example, the n-type electrode (rising portion) 11b protrudes from the front end of the through hole 10b, and electrically contacts the n-type AlGaN layer 5 at the protruding portion 11c. (FIG. 5I(r)) The n-type wiring electrode (Ti/Al/Ti/Au) 11x is planarized by polishing (Polish) or CMP (Chemical Mechanical Polishing). (FIG. 5J(s)) An adhesive layer (Au or AuSn) 14 is deposited on the n-type wiring electrode (Ti/Al/Ti/Au) 11x. (FIG. 5J(t)) A support substrate (CuMo or CuW) 13 on which a bonding layer (Au or AuSn) 12 on the support substrate 13 side is vapor-deposited is prepared.

(圖5K(u)) 將支持基板(CuMo或CuW)13之支持基板側接合層(Au或AuSn)12接合於圖5J(s)之步驟中之接著層(Au或AuSn)14。 (圖5K(v)) 自藍寶石基板21側照射準分子雷射或飛秒雷射而自AlN緩衝層4剝離藍寶石基板21(雷射剝離:LLO)。 (圖5K(w)) 藉由光微影步驟形成元件分離形成用圖案R6。(Figure 5K(u)) The supporting substrate side bonding layer (Au or AuSn) 12 of the supporting substrate (CuMo or CuW) 13 is bonded to the bonding layer (Au or AuSn) 14 in the step of FIG. 5J(s). (Figure 5K(v)) The excimer laser or femtosecond laser is irradiated from the side of the sapphire substrate 21 to peel the sapphire substrate 21 from the AlN buffer layer 4 (laser peeling: LLO). (Figure 5K(w)) A pattern R6 for element separation formation is formed by a photolithography step.

(圖5L(x)) SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩51。 (圖5L(y)) 藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )10面露出為止。 (圖5M(z1)) 藉由光微影步驟形成p型焊墊電極形成用圖案R7。其後,利用BHF(Buffered Hydrofluoric acid,緩衝氫氟酸)進行絕緣膜(SiO2 )10之開孔(61)。(FIG. 5L(x)) After the SiO 2 film is formed, the SiO 2 pattern mask 51 is formed by a lift-off step. (FIG. 5L(y)) Excavation is performed by ICP etching until the surface of the insulating film (SiO 2 ) 10 is exposed. (FIG. 5M(z1)) The p-type pad electrode formation pattern R7 is formed by a photolithography step. After that, the insulating film (SiO 2 ) 10 is opened (61) by using BHF (Buffered Hydrofluoric acid).

(圖5M(z2)) 於依序蒸鍍p型焊墊電極(Ti/Au)9b之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案9b。 (圖5N(z3)) 成膜保護膜(SiO2 )3。 (圖5N(z4)) 藉由光微影步驟,形成用以使被保護膜(SiO2 )10覆蓋之p型焊墊電極(Ti/Au)9b露出之圖案R8。 (圖5O(z5)) 利用BHF進行保護膜(SiO2 )10之開孔(71)。 (圖5O(z6) 藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案9b之後,於支持基板(CuMo或CuW)13之背面蒸鍍背面接著層(Au或AuSn)14。(FIG. 5M(z2)) After the p-type pad electrode (Ti/Au) 9b is sequentially vapor-deposited, the resist is removed by a lift-off step to form the p-type pad electrode (Ti/Au) pattern 9b. (FIG. 5N(z3)) A protective film (SiO 2 ) 3 is formed. (FIG. 5N(z4)) The photolithography step is used to form a pattern R8 for exposing the p-type pad electrode (Ti/Au) 9b covered by the protective film (SiO 2 ) 10. (Fig. 5O(z5)) The protective film (SiO 2 ) 10 is opened (71) using BHF. (FIG. 5O(z6) After the p-type pad electrode (Ti/Au) pattern 9b is formed by a peeling step, a back adhesive layer (Au or AuSn) 14 is vapor-deposited on the back surface of the support substrate (CuMo or CuW) 13.

藉由切割將支持基板13進行元件分割(未圖示)。 將被分割之元件背面之背面接著層(Au或AuSn)接合於氮化鋁陶瓷封裝2之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)9b配線之後,於氮化鋁陶瓷封裝2之上表面金屬封接石英窗1(參照圖1B等)。The supporting substrate 13 is divided into components by dicing (not shown). Join the backside adhesive layer (Au or AuSn) on the back of the divided device to the n-type electrode of the aluminum nitride ceramic package 2, and similarly wire the p-type electrode and the p-type pad electrode (Ti/Au) 9b. The upper surface of the aluminum nitride ceramic package 2 is metal-sealed with the quartz window 1 (see FIG. 1B, etc.).

(第6實施形態) 使用圖式對本發明之第6實施形態之石英半球透鏡接合縱型LED(AlN緩衝層)裝置之製造方法進行說明。再者,關於圖5A(a)至圖5O(z6)之步驟,因與第5實施形態相同,故不重複記載。 (圖5P(z7)) 於被分割之元件之AlN緩衝層4上之保護膜(SiO2 )3之表面,藉由原子擴散法或表面活化法接合石英半球透鏡31,該石英半球透鏡31相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明。 將元件背面之背面接著層(Au或AuSn)接合於氮化鋁陶瓷封裝2之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)9b配線之後,於氮化鋁陶瓷封裝2之上表面金屬封接石英窗1(未圖示)。(Sixth Embodiment) A method of manufacturing a quartz hemispherical lens bonded vertical LED (AlN buffer layer) device according to the sixth embodiment of the present invention will be described using drawings. In addition, the steps of FIGS. 5A(a) to 50(z6) are the same as those in the fifth embodiment, so the description will not be repeated. (Figure 5P(z7)) The surface of the protective film (SiO 2 ) 3 on the AlN buffer layer 4 of the divided element is bonded to the quartz hemispherical lens 31 by the atomic diffusion method or the surface activation method, and the quartz hemispherical lens 31 is opposite The wavelength λ above the diameter of the inscribed circle in the plane with the protective film (SiO 2 ) is transparent. Join the backside adhesive layer (Au or AuSn) on the back of the device to the n-type electrode of the aluminum nitride ceramic package 2. Similarly, the p-type electrode and the p-type pad electrode (Ti/Au) 9b are wired, and then the aluminum nitride The upper surface of the ceramic package 2 is metal-sealed with a quartz window 1 (not shown).

(第7實施形態) 使用圖式對本發明之第7實施形態之縱型LED(n型AlGaN層)裝置之製造方法進行說明。再者,關於圖5K(v)以外之步驟,因與第5實施形態相同,故未記載。 (圖5K(v)) 亦可自藍寶石基板側照射準分子雷射或飛秒雷射而自n型AlGaN層剝離藍寶石基板(雷射剝離:LLO)。(The seventh embodiment) The manufacturing method of the vertical LED (n-type AlGaN layer) device according to the seventh embodiment of the present invention will be described using drawings. In addition, the steps other than FIG. 5K(v) are the same as in the fifth embodiment, so they are not described. (Figure 5K(v)) It is also possible to irradiate an excimer laser or a femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the n-type AlGaN layer (laser lift-off: LLO).

(第8實施形態) 使用圖式對本發明之第8實施形態之石英半球透鏡接合縱型LED(n型AlGaN層)裝置之製造方法進行說明。再者,關於圖5A(a)至圖5O(z6)之步驟,因與第7實施形態相同,故不重複記載。 (圖5P(z7)) 於被分割之元件之n型AlGaN層上之保護膜(SiO2 )之表面,藉由原子擴散法或表面活化法接合石英半球透鏡31,該石英半球透鏡31相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明。 將元件背面之背面接著層(Au或AuSn)14接合於氮化鋁陶瓷封裝2之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)9b配線之後,於氮化鋁陶瓷封裝2之上表面金屬封接石英窗1(未圖示)。(Eighth Embodiment) The manufacturing method of the quartz hemispherical lens bonded vertical LED (n-type AlGaN layer) device of the eighth embodiment of the present invention will be described using drawings. In addition, since the steps in FIGS. 5A(a) to 50(z6) are the same as in the seventh embodiment, the description will not be repeated. (Figure 5P(z7)) The surface of the protective film (SiO 2 ) on the n-type AlGaN layer of the divided element is bonded to the quartz hemispherical lens 31 by the atomic diffusion method or the surface activation method. The quartz hemispherical lens 31 is opposite to The wavelength λ above the diameter of the inscribed circle in the plane with the protective film (SiO 2 ) is transparent. The backside adhesive layer (Au or AuSn) 14 on the back of the device is bonded to the n-type electrode of the aluminum nitride ceramic package 2, and the p-type electrode and the p-type pad electrode (Ti/Au) 9b are wired in the same way, and then the The upper surface of the aluminum ceramic package 2 is metal-sealed with a quartz window 1 (not shown).

根據本實施形態之深紫外LED,藉由將縱型LED構造與導熱電性良好之支持基板貼合,可使導熱性(散熱性)良好,抑制因熱導致之效率降低而使電流注入增加,從而增大輸出。 此外,藉由於p型AlGaN層形成2D-PhC,相對於無2D-PhC之情形時之輸出,於縱型LED(AlN緩衝層)之有2D-PhC、石英半球透鏡接合縱型LED(AlN緩衝層)之有2D-PhC、縱型LED(n型AlGaN層)之有2D-PhC、具有石英半球透鏡接合之縱型LED(n型AlGaN層)之有2D-PhC之任一構造中,均能夠實現大幅度之高輸出化。即,可使深紫外LED裝置之WPE及輸出提高。According to the deep-ultraviolet LED of this embodiment, by bonding the vertical LED structure to the support substrate with good thermal conductivity, the thermal conductivity (heat dissipation) can be improved, and the decrease in efficiency due to heat and the increase in current injection can be suppressed. Thereby increasing the output. In addition, by forming 2D-PhC due to the p-type AlGaN layer, compared to the output when there is no 2D-PhC, there are 2D-PhC, quartz hemispherical lens bonded vertical LED (AlN buffer layer) in the vertical LED (AlN buffer layer) Layer) has 2D-PhC, vertical LED (n-type AlGaN layer) has 2D-PhC, vertical LED with quartz hemispherical lens bonding (n-type AlGaN layer) has 2D-PhC in any structure, both Able to achieve a large and high output. That is, the WPE and output of the deep ultraviolet LED device can be improved.

於上述實施形態中,關於所圖示之構成等,並不限定於該等,能夠於發揮本發明之效果之範圍內適當變更。此外,只要不脫離本發明之目的之範圍,則能夠適當變更而實施。又,本發明之各構成要素可任意取捨選擇,具備取捨選擇出之構成之發明亦包含於本發明中。 [產業上之可利用性]In the above-mentioned embodiment, the illustrated configuration and the like are not limited to these, and can be appropriately changed within the scope of the effect of the present invention. In addition, as long as it does not deviate from the scope of the object of the present invention, it can be suitably changed and implemented. In addition, the various constituent elements of the present invention can be selected arbitrarily, and inventions having configurations selected by the selection are also included in the present invention. [Industrial availability]

本發明能夠利用於深紫外LED。The invention can be used in deep ultraviolet LEDs.

本說明書中所引用之所有公開案、專利案及專利申請案係以引用的方式全部併入本文中。All publications, patents and patent applications cited in this specification are all incorporated herein by reference.

1:石英窗 2:附無機塗料塗覆膜之氮化鋁陶瓷封裝 2a:內側側壁角度 3:保護膜(SiO2) 4:AlN緩衝層 5:n型AlGaN層 6:多重量子井層(MQW)/多重量子障壁層(MQB) 7:p型AlGaN層/p型GaN接觸層 8:p型反射電極(Ni/Au) 9:p型電極 9a:p型配線電極(Ti/Au/Ni) 9b:p型焊墊電極 10:絕緣膜(SiO2) 10a:絕緣膜(SiO2)之上升部 10b:貫通孔 10x:絕緣膜(SiO2) 10y:絕緣膜(SiO2) 11:n型電極 11a:n型配線電極(Ti/Al/Ti/Au) 11b:n型電極(上升部) 11c:n型電極(突出部) 11x:n型配線電極(Ti/Al/Ti/Au) 12:接合層(Au-Au或Au-AuSn) 13:支持基板(CuMo或CuW) 14:背面接著層(Au-Au或Au-AuSn) 17:無機塗料塗覆膜 21:藍寶石基板 31:石英半球透鏡 41:貫通孔 41a:槽 51:SiO2圖案遮罩 61:開孔 71:開孔 100:反射型二維光子晶體週期構造 101(h):孔隙(柱狀構造體、孔) R1:遮罩 R2:p型反射電極(Ni/Au)形成用圖案 R3:絕緣膜(SiO2)形成用圖案 R4:p型配線電極(Ti/Au/Ni)形成用圖案 R5:n型電極(貫通孔)形成用圖案 R6:元件分離形成用圖案 R7:p型焊墊電極形成用圖案 R8:圖案 θ:側壁角度1: Quartz window 2: Aluminum nitride ceramic package with inorganic coating film 2a: Inside side wall angle 3: Protective film (SiO 2 ) 4: AlN buffer layer 5: n-type AlGaN layer 6: Multiple quantum well layer (MQW )/Multiple Quantum Barrier Layer (MQB) 7: p-type AlGaN layer/p-type GaN contact layer 8: p-type reflective electrode (Ni/Au) 9: p-type electrode 9a: p-type wiring electrode (Ti/Au/Ni) 9b: p-type pad electrode 10: insulating film (SiO 2 ) 10a: rising portion of insulating film (SiO 2 ) 10b: through hole 10x: insulating film (SiO 2 ) 10y: insulating film (SiO 2 ) 11: n-type Electrode 11a: n-type wiring electrode (Ti/Al/Ti/Au) 11b: n-type electrode (rising part) 11c: n-type electrode (protruding part) 11x: n-type wiring electrode (Ti/Al/Ti/Au) 12 : Bonding layer (Au-Au or Au-AuSn) 13: Supporting substrate (CuMo or CuW) 14: Backside adhesive layer (Au-Au or Au-AuSn) 17: Inorganic paint coating film 21: Sapphire substrate 31: Quartz hemisphere Lens 41: Through hole 41a: Slot 51: SiO 2 pattern mask 61: Opening 71: Opening 100: Reflective two-dimensional photonic crystal periodic structure 101 (h): Pore (columnar structure, hole) R1: Mask Cover R2: p-type reflective electrode (Ni/Au) formation pattern R3: insulating film (SiO 2 ) formation pattern R4: p-type wiring electrode (Ti/Au/Ni) formation pattern R5: n-type electrode (through hole ) Pattern for formation R6: Pattern for element separation formation R7: Pattern for p-type pad electrode formation R8: Pattern θ: Sidewall angle

圖1A係本發明之第1實施形態之深紫外LED裝置之俯視圖。 圖1B係本發明之第1實施形態之深紫外LED裝置之剖視圖。 圖1C係表示本發明之第1實施形態之深紫外LED裝置之反射型光子晶體之配置例之俯視圖。 圖1D(a)、(b)係入射至形成於p型GaN接觸層之二維光子晶體之TE偏光成分中之光子頻帶結構及藉由平面波展開法求出R/a與PBG值之關係之圖。 圖1E係表示本發明之第1實施形態之深紫外LED裝置之光線追蹤法中之計算模型的圖。 圖1F係自藍寶石基板提取深紫外光之Flip Chip構造之深紫外LED裝置之FDTD(Finite Difference Time Domain,時域有限差分)法中之計算模型。 圖1G係本發明之第1實施形態之深紫外LED裝置之FDTD法中之計算模型。並且表示將n型配線電極之附近放大表示之圖。 圖2A係本發明之第2實施形態之深紫外LED裝置之俯視圖。 圖2B係本發明之第2實施形態之深紫外LED裝置之剖視圖。 圖2C係表示本發明之第2實施形態之深紫外LED裝置之反射型光子晶體之配置例之俯視圖。 圖2D係本發明之第2實施形態之深紫外LED裝置之FDTD法中之計算模型。 圖3A係本發明之第3實施形態之深紫外LED裝置之俯視圖。 圖3B係本發明之第3實施形態之深紫外LED裝置之剖視圖。 圖3C係本發明之第3實施形態之深紫外LED裝置之反射型光子晶體之俯視圖。 圖3D係本發明之第3實施形態之深紫外LED裝置之FDTD法中之計算模型。 圖4A係本發明之第4實施形態之深紫外LED裝置之俯視圖。 圖4B係本發明之第4實施形態之深紫外LED裝置之剖視圖。 圖4C係表示本發明之第4實施形態之深紫外LED裝置之反射型光子晶體之配置例之俯視圖。 圖4D係本發明之第4實施形態之深紫外LED裝置之FDTD法中之計算模型。 圖5A(a)、(b)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5B(c)、(d)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5C(e)、(f)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5D(g)、(h)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5E(i)、(j)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5F(k)、(l)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5G(m)、(n)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5H(o)、(p)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5I(q)、(r)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5J(s)、(t)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5K(u)、(v)、(w)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5L(x)、(y)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5M(z1)、(z2)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5N(z3)、(z4)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5O(z5)、(z6)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。 圖5P(z7)係表示本發明之第5及第6實施形態之深紫外LED裝置之製造方法相關之步驟的圖。Fig. 1A is a top view of a deep ultraviolet LED device according to the first embodiment of the present invention. 1B is a cross-sectional view of the deep ultraviolet LED device according to the first embodiment of the present invention. Fig. 1C is a plan view showing an arrangement example of the reflective photonic crystal of the deep ultraviolet LED device of the first embodiment of the present invention. Figure 1D(a) and (b) are the photonic frequency band structure of the TE polarization component of the two-dimensional photonic crystal formed on the p-type GaN contact layer and the relationship between R/a and PBG value obtained by the plane wave expansion method Figure. 1E is a diagram showing a calculation model in the ray tracing method of the deep ultraviolet LED device according to the first embodiment of the present invention. Figure 1F is a calculation model in the FDTD (Finite Difference Time Domain) method of a deep ultraviolet LED device constructed with a Flip Chip structure that extracts deep ultraviolet light from a sapphire substrate. Fig. 1G is a calculation model in the FDTD method of the deep ultraviolet LED device of the first embodiment of the present invention. It also shows an enlarged view of the vicinity of the n-type wiring electrode. 2A is a top view of the deep ultraviolet LED device according to the second embodiment of the present invention. 2B is a cross-sectional view of the deep ultraviolet LED device according to the second embodiment of the present invention. 2C is a plan view showing an arrangement example of the reflective photonic crystal of the deep ultraviolet LED device of the second embodiment of the present invention. 2D is a calculation model in the FDTD method of the deep ultraviolet LED device of the second embodiment of the present invention. Fig. 3A is a top view of a deep ultraviolet LED device according to a third embodiment of the present invention. 3B is a cross-sectional view of the deep ultraviolet LED device according to the third embodiment of the present invention. 3C is a top view of the reflective photonic crystal of the deep ultraviolet LED device according to the third embodiment of the present invention. Fig. 3D is a calculation model in the FDTD method of the deep ultraviolet LED device of the third embodiment of the present invention. Fig. 4A is a top view of a deep ultraviolet LED device according to a fourth embodiment of the present invention. 4B is a cross-sectional view of the deep ultraviolet LED device according to the fourth embodiment of the present invention. 4C is a plan view showing a configuration example of the reflective photonic crystal of the deep ultraviolet LED device of the fourth embodiment of the present invention. Fig. 4D is a calculation model in the FDTD method of the deep ultraviolet LED device of the fourth embodiment of the present invention. 5A(a) and (b) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device according to the fifth and sixth embodiments of the present invention. 5B(c) and (d) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5C(e) and (f) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5D(g) and (h) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5E(i) and (j) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5F(k) and (l) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5G(m), (n) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5H(o) and (p) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5I(q), (r) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5J(s), (t) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5K(u), (v), (w) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5L(x), (y) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5M (z1) and (z2) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 5N (z3) and (z4) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. 50 (z5), (z6) are diagrams showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention. Fig. 5P(z7) is a diagram showing steps related to the manufacturing method of the deep ultraviolet LED device of the fifth and sixth embodiments of the present invention.

1:石英窗 1: Quartz window

2:附無機塗料塗覆膜之氮化鋁陶瓷封裝 2: Aluminum nitride ceramic package with inorganic coating film

2a:內側側壁角度 2a: Inside side wall angle

3:保護膜(SiO2) 3: Protective film (SiO 2 )

4:AlN緩衝層 4: AlN buffer layer

5:n型AlGaN層 5: n-type AlGaN layer

6:多重量子井層(MQW)/多重量子障壁層(MQB) 6: Multiple quantum well layer (MQW)/multiple quantum barrier layer (MQB)

7:p型AlGaN層/p型GaN接觸層 7: p-type AlGaN layer/p-type GaN contact layer

8:p型反射電極(Ni/Au) 8: p-type reflective electrode (Ni/Au)

9:p型電極 9: p-type electrode

9a:p型配線電極(Ti/Au/Ni) 9a: p-type wiring electrode (Ti/Au/Ni)

9b:p型焊墊電極 9b: p-type pad electrode

10:絕緣膜(SiO2) 10: Insulating film (SiO 2 )

10a:絕緣膜(SiO2)之上升部 10a: Rising part of insulating film (SiO 2 )

10b:貫通孔 10b: Through hole

11:n型電極 11: n-type electrode

11a:n型配線電極(Ti/Al/Ti/Au) 11a: n-type wiring electrode (Ti/Al/Ti/Au)

11b:n型電極(上升部) 11b: n-type electrode (rising part)

11c:n型電極(突出部) 11c: n-type electrode (protrusion)

12:接合層(Au-Au或Au-AuSn) 12: Bonding layer (Au-Au or Au-AuSn)

13:支持基板(CuMo或CuW) 13: Support substrate (CuMo or CuW)

14:背面接著層(Au-Au或Au-AuSn) 14: Adhesive layer on the back side (Au-Au or Au-AuSn)

17:無機塗料塗覆膜 17: Inorganic coating film

100:反射型二維光子晶體週期構造 100: Periodic structure of reflective two-dimensional photonic crystal

101(h):孔隙(柱狀構造體、孔) 101(h): Porosity (columnar structure, pore)

θ:側壁角度 θ: side wall angle

Claims (8)

一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有: 深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、AlN緩衝層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4; 氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;以及 石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。A deep-ultraviolet LED device, characterized in that it is a deep-ultraviolet LED device with a design wavelength of λ (200 nm ~ 355 nm), and has: deep-ultraviolet LED elements, which are sequentially provided with back adhesive layers (Au-Au or Au -AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode ( Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, AlN Buffer layer, protective film (SiO 2 ) elements, and n-type wiring electrodes (Ti/Al/Ti/Au) extend to be exposed to the n-type AlGaN layer through the insulating through holes covered by the insulating film (SiO 2 ) So far, and the deep ultraviolet LED element has a thickness of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the thickness of the p-type GaN contact layer and the p-type AlGaN layer. A reflective two-dimensional photonic crystal with a plurality of pores at the location of the interface, the above-mentioned reflective two-dimensional photonic crystal periodic structure has a photonic band gap opened relative to the TE polarization component, and relative to the light of the design wavelength λ, the above-mentioned reflective two The period a of the periodic structure of the two-dimensional photonic crystal satisfies the condition of Burrager, and exists in the conditional formula of Burrager mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : two-dimensional photonic crystal The effective refractive index, a: the period of the two-dimensional photonic crystal) in the number m satisfies m=3, when the radius of the above-mentioned pore is set to R, the R/a ratio satisfies 0.3≦R/a≦0.4; aluminum nitride A ceramic package with the above-mentioned deep-ultraviolet LED element mounted on its surface, including an inorganic paint coating film with a reflectivity of 91% or more, and the angle of the inner side wall of the package is 60 degrees or more and within 75 degrees; and a quartz window, which is arranged above The outermost surface of the aluminum nitride ceramic package seals the above-mentioned deep ultraviolet LED element. 一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有: 深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、AlN緩衝層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4,進而,該深紫外LED元件具有接合於上述保護膜(SiO2 )之表面之相對於波長λ為透明之石英半球透鏡,上述半球透鏡之直徑具有上述保護膜(SiO2 )面內之內接圓之直徑以上的值; 氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;以及 石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。A deep-ultraviolet LED device, characterized in that it is a deep-ultraviolet LED device with a design wavelength of λ (200 nm ~ 355 nm), and has: deep-ultraviolet LED elements, which are sequentially provided with back adhesive layers (Au-Au or Au -AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode ( Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, AlN Buffer layer, protective film (SiO 2 ) elements, and n-type wiring electrodes (Ti/Al/Ti/Au) extend to be exposed to the n-type AlGaN layer through the insulating through holes covered by the insulating film (SiO 2 ) So far, and the deep ultraviolet LED element has a thickness of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the thickness of the p-type GaN contact layer and the p-type AlGaN layer. A reflective two-dimensional photonic crystal with a plurality of pores at the location of the interface, the above-mentioned reflective two-dimensional photonic crystal periodic structure has a photonic band gap opened relative to the TE polarization component, and relative to the light of the design wavelength λ, the above-mentioned reflective two The period a of the periodic structure of the two-dimensional photonic crystal satisfies the condition of Burrager, and exists in the conditional formula of Burrager mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : two-dimensional photonic crystal The effective refractive index, a: the period of the two-dimensional photonic crystal) in the order m satisfies m=3, when the radius of the above-mentioned pore is set to R, the R/a ratio satisfies 0.3≦R/a≦0.4, and further, the The deep ultraviolet LED element has a quartz hemispherical lens that is transparent to the wavelength λ bonded to the surface of the protective film (SiO 2 ), and the diameter of the hemispherical lens is greater than the diameter of the inscribed circle in the surface of the protective film (SiO 2 ) The value of aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, contains an inorganic paint coating film with a reflectivity of 91% or more, and the angle of the inner side wall of the package is 60 degrees or more and within 75 degrees; and quartz The window is arranged on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element. 一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有: 深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a具有布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4; 氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;以及 石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。A deep-ultraviolet LED device, characterized in that it is a deep-ultraviolet LED device with a design wavelength of λ (200 nm ~ 355 nm), and has: deep-ultraviolet LED elements, which are sequentially provided with back adhesive layers (Au-Au or Au -AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode ( Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, protection Film (SiO 2 ), and the n-type wiring electrode (Ti/Al/Ti/Au) extends to the n-type AlGaN layer through the insulating through-hole covered by the insulating film (SiO 2 ), and the The deep-ultraviolet LED element is provided within the thickness direction of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the position of the interface between the p-type GaN contact layer and the p-type AlGaN layer A reflective two-dimensional photonic crystal with a plurality of pores, the periodic structure of the reflective two-dimensional photonic crystal has a photonic band gap opened relative to the TE polarization component, and the light of the design wavelength λ is The period a of the periodic structure has the condition of Burrager, and exists in the conditional formula of Burrager mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : effective refractive index of two-dimensional photonic crystal , A: The number of times m in the period of the two-dimensional photonic crystal satisfies m=3. When the radius of the above-mentioned pore is set to R, the R/a ratio satisfies 0.3≦R/a≦0.4; aluminum nitride ceramic package, which The above-mentioned deep ultraviolet LED element is mounted on the surface, including an inorganic paint coating film with a reflectivity of 91% or more, and the angle of the inner side wall of the package is 60 degrees or more and within 75 degrees; and a quartz window is set on the aluminum nitride ceramic The outermost surface of the package is sealed and the above-mentioned deep ultraviolet LED element is sealed. 一種深紫外LED裝置,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置,且具有: 深紫外LED元件,其係依序具有背面接著層(Au-Au或Au-AuSn)、支持基板(CuMo或CuW)、接合層(Au-Au或Au-AuSn)、n型配線電極(Ti/Al/Ti/Au)、絕緣膜(SiO2 )、p型配線電極(Ti/Au/Ni)、p型反射電極(Ni/Au)、p型GaN接觸層、p型AlGaN層、多重量子障壁層(MQB)、多重量子井層(MQW)、n型AlGaN層、保護膜(SiO2 )之元件,且n型配線電極(Ti/Al/Ti/Au)延伸至通過藉由絕緣膜(SiO2 )被覆絕緣之貫通孔而露出於n型AlGaN層部為止,且該深紫外LED元件具有設置於上述p型反射電極(Ni/Au)與上述p型GaN接觸層之厚度方向之範圍內且不超過上述p型GaN接觸層與上述p型AlGaN層之界面之位置的具有複數個孔隙之反射型二維光子晶體,上述反射型二維光子晶體週期構造具有相對於TE偏光成分打開之光子帶隙,相對於上述設計波長λ之光,上述反射型二維光子晶體之週期構造之週期a滿足布勒格之條件,且存在於布勒格之條件式mλ/neff =2a(其中,m:次數、λ:設計波長、neff :二維光子晶體之有效折射率、a:二維光子晶體之週期)中之次數m滿足m=3,當將上述孔隙之半徑設為R時,R/a比滿足0.3≦R/a≦0.4,進而,該深紫外LED元件具有接合於上述保護膜(SiO2 )之表面之相對於波長λ為透明之石英半球透鏡,上述石英半球透鏡之直徑具有上述保護膜(SiO2 )面內之內接圓之直徑以上的值; 氮化鋁陶瓷封裝,其表面安裝有上述深紫外LED元件,包含具有91%以上之反射率之無機塗料塗覆膜,且封裝之內側側壁角度為60度以上75度以內;以及 石英窗,其設置於上述氮化鋁陶瓷封裝之最表面且將上述深紫外LED元件密閉。A deep-ultraviolet LED device, characterized in that it is a deep-ultraviolet LED device with a design wavelength of λ (200 nm ~ 355 nm), and has: deep-ultraviolet LED elements, which are sequentially provided with back adhesive layers (Au-Au or Au -AuSn), support substrate (CuMo or CuW), bonding layer (Au-Au or Au-AuSn), n-type wiring electrode (Ti/Al/Ti/Au), insulating film (SiO 2 ), p-type wiring electrode ( Ti/Au/Ni), p-type reflective electrode (Ni/Au), p-type GaN contact layer, p-type AlGaN layer, multiple quantum barrier layer (MQB), multiple quantum well layer (MQW), n-type AlGaN layer, protection Film (SiO 2 ), and the n-type wiring electrode (Ti/Al/Ti/Au) extends to the n-type AlGaN layer through the insulating through-hole covered by the insulating film (SiO 2 ), and the The deep-ultraviolet LED element is provided within the thickness direction of the p-type reflective electrode (Ni/Au) and the p-type GaN contact layer and does not exceed the position of the interface between the p-type GaN contact layer and the p-type AlGaN layer A reflective two-dimensional photonic crystal with a plurality of pores, the periodic structure of the reflective two-dimensional photonic crystal has a photonic band gap opened relative to the TE polarization component, and the light of the design wavelength λ is The period a of the periodic structure satisfies the condition of Burrager and exists in the conditional formula of Burrager mλ/n eff = 2a (where m: order, λ: design wavelength, n eff : effective refractive index of two-dimensional photonic crystal , A: the period of the two-dimensional photonic crystal) m satisfies m=3, when the radius of the above-mentioned aperture is set to R, the R/a ratio satisfies 0.3≦R/a≦0.4, and further, the deep ultraviolet LED element Having a quartz hemispherical lens that is transparent with respect to the wavelength λ bonded to the surface of the protective film (SiO 2 ), and the diameter of the quartz hemispherical lens has a value greater than the diameter of the inscribed circle in the protective film (SiO 2 ) plane; Aluminum nitride ceramic package, the surface of which is mounted with the above-mentioned deep ultraviolet LED element, includes an inorganic paint coating film with a reflectivity of 91% or more, and the angle of the inner side wall of the package is 60 degrees or more and within 75 degrees; and a quartz window, which It is arranged on the outermost surface of the aluminum nitride ceramic package and seals the deep ultraviolet LED element. 一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au),且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自AlN緩衝層剝離藍寶石基板(雷射剝離:LLO)步驟;對上述AlN緩衝層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;及將被分割之元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。A method for manufacturing a deep ultraviolet LED device is characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength of λ (200 nm to 355 nm), and has the following steps: making a sapphire substrate a growth substrate, and Sequentially stacked AlN buffer layer, n-type AlGaN layer, multiple quantum well layer (MQW), multiple quantum barrier layer (MQB), p-type AlGaN layer, p-type GaN contact layer; prepare a mold for forming reflective two-dimensional photonic crystals ; Two resist layers were spin-coated on the p-type GaN contact layer, and the structure of the above mold was transferred by nanoimprinting; the resist layer with the above structure was transferred as a mask, from the p-type The GaN contact layer is etched by ICP until it does not exceed the position of the p-type AlGaN layer interface, and then cleaned to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal, it is also subjected to oblique evaporation. The p-type reflective electrode (Ni/Au) is formed sequentially; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrode (Ni/Au) is subjected to high-temperature annealing treatment; the step of forming the insulating film after the film (SiO 2) forming a pattern, forming an insulating film (SiO 2); stripping step by the p-type reflective electrode (Ni / Au) is formed between the patterned insulating film (SiO 2) at the same height Pattern; After forming the p-type wiring electrode (Ti/Au/Ni) pattern by the photolithography step, the p-type wiring electrode (Ti/Au/Ni) is sequentially formed; the p-type wiring is formed by the peeling step Electrode (Ti/Au/Ni) pattern; film formation of insulating film (SiO 2 ); pattern formation for n-type electrode (through hole) formation by photolithography step; formation of through hole by ICP etching until it exceeds the multiple quantum well layer (MQW) and the n-type AlGaN layer interface; forming an insulating film (SiO 2 ); removing the insulating film (SiO 2 ) formed on the bottom surface of the through hole by ICP etching, and then tapping the n-type AlGaN layer; On the insulating film (SiO 2 ) formed in the above steps and inside the through hole, n-type wiring electrodes (Ti/Al/Ti/Au) are sequentially deposited by vapor deposition, and the insulating film (SiO 2 ) 2 ) When the depth from the upper part to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; after film formation, the n-type wiring electrode (Ti/Al /Ti/Au) high-temperature annealing treatment; planarize the n-type wiring electrode (Ti/Al/Ti/Au) by polishing or CMP; on the n-type wiring electrode (Ti/Al/Ti/Au) Vapor-deposited bonding layer (Au or AuSn); prepare a support substrate (CuMo or CuW) vapor-deposited with a support substrate-side bonding layer (Au or AuSn); vapor-deposit on the n-type wiring electrode (Ti/Al/Ti/Au) ) The adhesive layer (Au or AuSn) above the support substrate (CuMo or C uW) supporting substrate-side bonding layer (Au or AuSn); irradiating an excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the AlN buffer layer (laser lift-off: LLO) step; for the above AlN buffer layer , Forming a pattern for element separation formation by a photolithography step; after forming a SiO 2 film, forming a SiO 2 pattern mask by a lift-off step; excavating by ICP etching until the insulating film (SiO 2 ) surface is exposed; After the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; after the p-type pad electrode (Ti/Au) is deposited sequentially, it is removed by the peeling step The pattern of p-type pad electrode (Ti/Au) is formed by resist; a protective film (SiO 2 ) is formed; the p-type pad is covered by the protective film (SiO 2 ) by a photolithography step The exposed pattern of the electrode (Ti/Au); the opening of the protective film (SiO 2 ) by BHF; after the p-type pad electrode (Ti/Au) pattern is formed by the lift-off step, on the support substrate (CuMo or CuW) The back side adhesive layer (Au or AuSn) is vapor-deposited on the back side; the above-mentioned support substrate is divided; and the back side adhesive layer (Au or AuSn) on the back side of the divided component is bonded to an inorganic coating containing a reflectance of 91% or more. The n-type electrode of the coated aluminum nitride ceramic package is similarly wired with the p-type electrode and the p-type pad electrode (Ti/Au), and then the quartz window is metal-sealed on the upper surface of the aluminum nitride ceramic package. 一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au),且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn) 接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自AlN緩衝層剝離藍寶石基板(雷射剝離:LLO)步驟;對上述AlN緩衝層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;於被分割之元件之AlN緩衝層上之保護膜(SiO2 )之表面,藉由原子擴散法或表面活化法接合石英半球透鏡,該石英半球透鏡相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明;及將上述元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。A method for manufacturing a deep ultraviolet LED device is characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength of λ (200 nm to 355 nm), and has the following steps: making a sapphire substrate a growth substrate, and Sequentially stacked AlN buffer layer, n-type AlGaN layer, multiple quantum well layer (MQW), multiple quantum barrier layer (MQB), p-type AlGaN layer, p-type GaN contact layer; prepare a mold for forming reflective two-dimensional photonic crystals ; Two resist layers were spin-coated on the p-type GaN contact layer, and the structure of the above mold was transferred by nanoimprinting; the resist layer with the above structure was transferred as a mask, from the p-type The GaN contact layer is etched by ICP until it does not exceed the position of the p-type AlGaN layer interface, and then cleaned to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal, it is also subjected to oblique evaporation. The p-type reflective electrode (Ni/Au) is formed sequentially; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrode (Ni/Au) is subjected to high-temperature annealing treatment; the step of forming the insulating film after the film (SiO 2) forming a pattern, forming an insulating film (SiO 2); stripping step by the p-type reflective electrode (Ni / Au) is formed between the patterned insulating film (SiO 2) at the same height Pattern; After forming the p-type wiring electrode (Ti/Au/Ni) pattern by the photolithography step, the p-type wiring electrode (Ti/Au/Ni) is sequentially formed; the p-type wiring is formed by the peeling step Electrode (Ti/Au/Ni) pattern; film formation of insulating film (SiO 2 ); pattern formation for n-type electrode (through hole) formation by photolithography step; formation of through hole by ICP etching until it exceeds the multiple quantum well layer (MQW) and the n-type AlGaN layer interface; forming an insulating film (SiO 2 ); removing the insulating film (SiO 2 ) formed on the bottom surface of the through hole by ICP etching, and then tapping the n-type AlGaN layer; On the insulating film (SiO 2 ) formed in the above steps and inside the through hole, n-type wiring electrodes (Ti/Al/Ti/Au) are sequentially deposited by vapor deposition, and the insulating film (SiO 2 ) 2 ) When the depth from the upper part to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; after film formation, the n-type wiring electrode (Ti/Al /Ti/Au) high-temperature annealing treatment; planarize the n-type wiring electrode (Ti/Al/Ti/Au) by polishing or CMP; on the n-type wiring electrode (Ti/Al/Ti/Au) Vapor-deposited bonding layer (Au or AuSn); prepare a support substrate (CuMo or CuW) vapor-deposited with a support substrate-side bonding layer (Au or AuSn); vapor-deposit on the n-type wiring electrode (Ti/Al/Ti/Au) ) The adhesive layer (Au or AuSn) above the support substrate (CuMo or CuW) supporting substrate-side bonding layer (Au or AuSn); irradiating an excimer laser or femtosecond laser from the sapphire substrate side and peeling the sapphire substrate from the AlN buffer layer (laser lift-off: LLO) step; for the AlN buffer layer , Forming a pattern for element separation formation by a photolithography step; after forming a SiO 2 film, forming a SiO 2 pattern mask by a lift-off step; excavating by ICP etching until the insulating film (SiO 2 ) surface is exposed; After the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; after the p-type pad electrode (Ti/Au) is sequentially vapor-deposited, the p-type pad electrode (Ti/Au) is deposited by the peeling step The resist is removed to form a p-type pad electrode (Ti/Au) pattern; a protective film (SiO 2 ) is formed; a p-type solder covered by the protective film (SiO 2 ) is formed by a photolithography step The exposed pattern of the pad electrode (Ti/Au); the opening of the protective film (SiO 2 ) using BHF; after the p-type pad electrode (Ti/Au) pattern is formed by the lift-off step, it is placed on the support substrate (CuMo or CuW) ) Evaporation of the back side adhesive layer (Au or AuSn) on the back side; device segmentation of the above-mentioned support substrate; on the surface of the protective film (SiO 2 ) on the AlN buffer layer of the segmented device, by atomic diffusion method or surface activation method Bonded quartz hemispherical lens, the quartz hemispherical lens is transparent with respect to the wavelength λ above the diameter of the inscribed circle in the plane of the protective film (SiO 2 ); and the back adhesive layer (Au or AuSn) on the back of the element is bonded to The n-type electrode of the aluminum nitride ceramic package with an inorganic paint coating film with a reflectivity of 91% or more, and the p-type electrode and the p-type pad electrode (Ti/Au) are wired in the same way, and then the aluminum nitride ceramic The upper surface of the package is metal-sealed with the quartz window. 一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au);且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自n型AlGaN層剝離藍寶石基板(雷射剝離:LLO);對上述n型AlGaN層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;及將被分割之元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。A method for manufacturing a deep ultraviolet LED device is characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength of λ (200 nm to 355 nm), and has the following steps: making a sapphire substrate a growth substrate, and Sequentially stacked AlN buffer layer, n-type AlGaN layer, multiple quantum well layer (MQW), multiple quantum barrier layer (MQB), p-type AlGaN layer, p-type GaN contact layer; prepare a mold for forming reflective two-dimensional photonic crystals ; Two resist layers were spin-coated on the p-type GaN contact layer, and the structure of the above mold was transferred by nanoimprinting; the resist layer with the above structure was transferred as a mask, from the p-type The GaN contact layer is etched by ICP until it does not exceed the position of the p-type AlGaN layer interface, and then cleaned to form a reflective two-dimensional photonic crystal; in addition to forming the above-mentioned reflective two-dimensional photonic crystal, it is also subjected to oblique evaporation. The p-type reflective electrode (Ni/Au) is formed sequentially; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrode (Ni/Au) is subjected to high-temperature annealing treatment; the step of forming the insulating film after the film (SiO 2) forming a pattern, forming an insulating film (SiO 2); stripping step by the p-type reflective electrode (Ni / Au) is formed between the patterned insulating film (SiO 2) at the same height Pattern; After forming the p-type wiring electrode (Ti/Au/Ni) pattern by the photolithography step, the p-type wiring electrode (Ti/Au/Ni) is sequentially formed; the p-type wiring is formed by the peeling step Electrode (Ti/Au/Ni) pattern; film formation of insulating film (SiO 2 ); pattern formation for n-type electrode (through hole) formation by photolithography step; formation of through hole by ICP etching until it exceeds the multiple quantum well layer (MQW) and the n-type AlGaN layer interface; forming an insulating film (SiO 2 ); removing the insulating film (SiO 2 ) formed on the bottom surface of the through hole by ICP etching, and then tapping the n-type AlGaN layer; On the insulating film (SiO 2 ) formed in the above steps and inside the through holes, n-type wiring electrodes (Ti/Al/Ti/Au) are sequentially formed by vapor deposition; and the insulating film (SiO 2) 2 ) When the depth from the upper part to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; after film formation, the n-type wiring electrode (Ti/Al /Ti/Au) high-temperature annealing treatment; planarize the n-type wiring electrode (Ti/Al/Ti/Au) by polishing or CMP; on the n-type wiring electrode (Ti/Al/Ti/Au) Vapor-deposited bonding layer (Au or AuSn); prepare a support substrate (CuMo or CuW) vapor-deposited with a support substrate-side bonding layer (Au or AuSn); vapor-deposit on the n-type wiring electrode (Ti/Al/Ti/Au) ) The adhesive layer (Au or AuSn) above the support substrate (CuMo or C uW) supporting substrate side bonding layer (Au or AuSn); irradiating an excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the n-type AlGaN layer (laser lift-off: LLO); for the above n-type AlGaN The layer is formed by a photolithography step to form a pattern for element separation; after the SiO 2 film is formed, a SiO 2 pattern mask is formed by a lift-off step; excavated by ICP etching until the insulating film (SiO 2 ) surface is exposed; After the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; after the p-type pad electrode (Ti/Au) is sequentially vapor-deposited, it is peeled off The resist is removed to form a p-type pad electrode (Ti/Au) pattern; a protective film (SiO 2 ) is formed; a p-type covered by the protective film (SiO 2 ) is formed by a photolithography step The exposed pattern of the pad electrode (Ti/Au); the opening of the protective film (SiO 2 ) using BHF; after the p-type pad electrode (Ti/Au) pattern is formed by the lift-off step, it is placed on the support substrate (CuMo or CuW) Evaporation of the backside adhesive layer (Au or AuSn) on the back; dividing the above-mentioned support substrate; and bonding the backside adhesive layer (Au or AuSn) on the backside of the divided device to an inorganic compound with a reflectance of 91% or more For the n-type electrode of the aluminum nitride ceramic package coated with paint, the p-type electrode and the p-type pad electrode (Ti/Au) are also wired, and the quartz window is metal-sealed on the upper surface of the aluminum nitride ceramic package. . 一種深紫外LED裝置之製造方法,其特徵在於:其係設計波長λ(200 nm~355 nm)之深紫外LED裝置之製造方法,且具有如下步驟:使藍寶石基板為生長基板,於其上依序積層AlN緩衝層、n型AlGaN層、多重量子井層(MQW)、多重量子障壁層(MQB)、p型AlGaN層、p型GaN接觸層;準備用以形成反射型二維光子晶體之模具;於p型GaN接觸層之上旋轉塗佈兩層抗蝕劑層,藉由奈米壓印法轉印上述模具之構造;將轉印有上述構造之抗蝕劑層作為遮罩,自p型GaN接觸層起進行ICP蝕刻直至不超過p型AlGaN層之界面之位置為止,之後進行洗淨,形成反射型二維光子晶體;除了形成上述反射型二維光子晶體,復又藉由傾斜蒸鍍依序形成p型反射電極(Ni/Au);於藉由剝離步驟形成p型反射電極(Ni/Au)圖案之後,對p型反射電極(Ni/Au)進行高溫退火處理;於藉由光微影步驟形成絕緣膜(SiO2 )形成用圖案之後,成膜絕緣膜(SiO2 );藉由剝離步驟於p型反射電極(Ni/Au)圖案間以相同之高度形成絕緣膜(SiO2 )圖案;於藉由光微影步驟形成p型配線電極(Ti/Au/Ni)形成用圖案之後,依序成膜p型配線電極(Ti/Au/Ni);藉由剝離步驟形成p型配線電極(Ti/Au/Ni)圖案;成膜絕緣膜(SiO2 );藉由光微影步驟形成n型電極(貫通孔)形成用圖案;藉由ICP蝕刻形成貫通孔直至超過多重量子井層(MQW)與n型AlGaN層之界面之位置為止;成膜絕緣膜(SiO2 );藉由ICP蝕刻去除成膜於貫通孔之底面之絕緣膜(SiO2 ),進而挖掘n型AlGaN層;於上述步驟中成膜之絕緣膜(SiO2 )之上及貫通孔內部,藉由蒸鍍法依序成膜n型配線電極(Ti/Al/Ti/Au);且於將絕緣膜(SiO2 )之上部至上述步驟中挖掘之n型AlGaN層之最深部為止之深度設為h之情形時,膜厚t之標準為t>2h;成膜後,對n型配線電極(Ti/Al/Ti/Au)進行高溫退火處理;藉由拋光或CMP使上述n型配線電極(Ti/Al/Ti/Au)平坦化;於上述n型配線電極(Ti/Al/Ti/Au)之上蒸鍍接著層(Au或AuSn);準備蒸鍍有支持基板側接合層(Au或AuSn)之支持基板(CuMo或CuW);於蒸鍍於上述n型配線電極(Ti/Al/Ti/Au)之上之接著層(Au或AuSn)接合上述支持基板(CuMo或CuW)之支持基板側接合層(Au或AuSn);自藍寶石基板側照射準分子雷射或飛秒雷射而自n型AlGaN層剝離藍寶石基板(雷射剝離:LLO);對上述n型AlGaN層,藉由光微影步驟形成元件分離形成用圖案;SiO2 成膜後,藉由剝離步驟形成SiO2 圖案遮罩;藉由ICP蝕刻進行挖掘直至絕緣膜(SiO2 )面露出為止;於藉由光微影步驟形成p型焊墊電極形成用圖案之後,利用BHF進行絕緣膜(SiO2 )之開孔;於依序蒸鍍p型焊墊電極(Ti/Au)之後,藉由剝離步驟去除抗蝕劑而形成p型焊墊電極(Ti/Au)圖案;成膜保護膜(SiO2 );藉由光微影步驟形成用以使被上述保護膜(SiO2 )覆蓋之p型焊墊電極(Ti/Au)露出之圖案;利用BHF進行保護膜(SiO2 )之開孔;於藉由剝離步驟形成p型焊墊電極(Ti/Au)圖案之後,於支持基板(CuMo或CuW)背面蒸鍍背面接著層(Au或AuSn);對上述支持基板進行元件分割;於被分割之元件之n型AlGaN層上之保護膜(SiO2 )之表面,藉由原子擴散法或表面活化法接合石英半球透鏡,該石英半球透鏡相對於具有保護膜(SiO2 )面內之內接圓之直徑以上之波長λ為透明;及將上述元件背面之背面接著層(Au或AuSn)接合於包含具有91%以上之反射率之無機塗料塗覆膜之氮化鋁陶瓷封裝之n型電極,同樣地將p型電極與p型焊墊電極(Ti/Au)配線之後,於上述氮化鋁陶瓷封裝之上表面金屬封接石英窗。A method for manufacturing a deep ultraviolet LED device is characterized in that it is a method for manufacturing a deep ultraviolet LED device with a design wavelength of λ (200 nm to 355 nm), and has the following steps: making a sapphire substrate a growth substrate, and Sequentially stacked AlN buffer layer, n-type AlGaN layer, multiple quantum well layer (MQW), multiple quantum barrier layer (MQB), p-type AlGaN layer, p-type GaN contact layer; prepare a mold for forming reflective two-dimensional photonic crystals ; Two resist layers were spin-coated on the p-type GaN contact layer, and the structure of the above mold was transferred by nanoimprinting; the resist layer with the above structure was transferred as a mask, from the p-type The GaN contact layer is etched by ICP until it does not exceed the position of the interface of the p-type AlGaN layer, and then washed to form a reflective two-dimensional photonic crystal; in addition to the formation of the above-mentioned reflective two-dimensional photonic crystal, it is also by oblique evaporation The p-type reflective electrode (Ni/Au) is sequentially formed; after the p-type reflective electrode (Ni/Au) pattern is formed by the lift-off step, the p-type reflective electrode (Ni/Au) is subjected to high temperature annealing treatment; after the lithography step of forming an insulating film (SiO 2) forming a pattern, forming an insulating film (SiO 2); stripping step by the p-type reflective electrode (Ni / Au) is formed between the patterned insulating film (SiO 2 at the same height ) Pattern; After forming the p-type wiring electrode (Ti/Au/Ni) pattern by the photolithography step, the p-type wiring electrode (Ti/Au/Ni) is sequentially deposited; the p-type wiring electrode (Ti/Au/Ni) is formed by the peeling step Wiring electrode (Ti/Au/Ni) pattern; film formation of insulating film (SiO 2 ); patterning of n-type electrode (through hole) formation by photolithography step; formation of through hole by ICP etching until it exceeds multiple quantum wells Layer (MQW) and the interface of the n-type AlGaN layer; forming an insulating film (SiO 2 ); removing the insulating film (SiO 2 ) formed on the bottom surface of the through hole by ICP etching, and then tapping the n-type AlGaN layer ; On the insulating film (SiO 2 ) formed in the above steps and inside the through holes, n-type wiring electrodes (Ti/Al/Ti/Au) are sequentially formed by vapor deposition; and the insulating film ( When the depth from the upper part of SiO 2 ) to the deepest part of the n-type AlGaN layer excavated in the above step is set to h, the standard of the film thickness t is t>2h; after film formation, the n-type wiring electrode (Ti/ Al/Ti/Au) is subjected to high temperature annealing treatment; the n-type wiring electrode (Ti/Al/Ti/Au) is planarized by polishing or CMP; in the n-type wiring electrode (Ti/Al/Ti/Au) The upper vapor deposition adhesive layer (Au or AuSn); prepare the support substrate (CuMo or CuW) with the support substrate side bonding layer (Au or AuSn) vapor deposited; in the vapor deposition on the n-type wiring electrode (Ti/Al/Ti/ The adhesive layer (Au or AuSn) on top of Au) is bonded to the support substrate (CuMo Or CuW) supporting substrate side bonding layer (Au or AuSn); irradiating an excimer laser or femtosecond laser from the sapphire substrate side to peel the sapphire substrate from the n-type AlGaN layer (laser lift-off: LLO); for the above n-type The AlGaN layer is formed by a photolithography step to form a pattern for element separation; after the SiO 2 film is formed, a SiO 2 pattern mask is formed by a lift-off step; excavated by ICP etching until the insulating film (SiO 2 ) surface is exposed; After the p-type pad electrode formation pattern is formed by the photolithography step, the insulating film (SiO 2 ) is opened by BHF; after the p-type pad electrode (Ti/Au) is sequentially vapor-deposited, by The stripping step removes the resist to form a p-type pad electrode (Ti/Au) pattern; forms a protective film (SiO 2 ); and forms p to be covered by the protective film (SiO 2 ) by a photolithography step The exposed pattern of the type pad electrode (Ti/Au); the opening of the protective film (SiO 2 ) using BHF; after the p-type pad electrode (Ti/Au) pattern is formed by the lift-off step, it is placed on the support substrate (CuMo Or CuW) vapor deposition on the back side of the backside adhesive layer (Au or AuSn); the above-mentioned support substrate is divided into components; the surface of the protective film (SiO 2 ) on the n-type AlGaN layer of the divided components, by the atomic diffusion method or The surface activation method joins the quartz hemispherical lens, which is transparent to the wavelength λ above the diameter of the inscribed circle in the plane of the protective film (SiO 2 ); and the adhesive layer (Au or AuSn) on the back of the above-mentioned element Join the n-type electrode of an aluminum nitride ceramic package containing an inorganic paint coating film with a reflectivity of 91% or more. Similarly, after wiring the p-type electrode and the p-type pad electrode (Ti/Au), apply the nitrogen The upper surface of the aluminum ceramic package is metal-sealed with a quartz window.
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