TW202002048A - Cutting method for preventing crack extension ensuring that cracks generated by cutting the wafer may not exceed the first metamorphic region by utilizing the first metamorphic region and avoiding grain defects - Google Patents

Abstract

This invention relates to a cutting method for preventing crack extension, which is a leading wafer cutting process. The cutting method includes the following steps: firstly, determining a cutting line required for cutting a wafer; then, defining a first isolation region within a first isolation line on one side of the cutting line; and continuously penetrating the wafer by a laser from one end of the isolation line to the other end thereof to generate a plurality of first isolation holes. A first metamorphic region is disposed around the first isolation holes. By using the first metamorphic region, it can ensure that cracks generated by cutting the wafer may not exceed the first metamorphic region and avoid grain defects.

Description

Cutting method to prevent crack extension

The invention relates to a pre-processing method for wafer cutting, in particular to splitting a wafer and causing a crack at the splitting portion. The integrated circuit is damaged due to the cutting crack, and a qualitative change region is generated through processing to limit the cutting crack range.

In the semiconductor device manufacturing process, a grid-like planned dividing line is formed on the surface of a semiconductor wafer to divide a plurality of regions, and then each region is divided along a predetermined line, thereby manufacturing individual semiconductor devices.

Generally, the old process uses a cutting blade with a thickness of about 20 μm to cut the semiconductor wafer along the predetermined line. In the current process, laser processing is used to divide each surface area along the predetermined line in response to the shrinking of products. , Separate the individual semiconductor elements from the wafer.

The following literatures on wafer dicing include multiple patents as follows: JP2013-164095 discloses a method of wafer division. The main purpose is to suppress the growth of cracks and remove the modified regions and fragments remaining on the side of the wafer. The solution is a method of dividing the wafer, which includes a step of irradiating laser light along the scribe line to form a modified region inside the wafer, and a step of dividing the wafer into individual wafers using the modified region as a starting point. The step of turning the processing chamber into which the wafer is put into a vacuum state and filling the processing chamber with an inert gas, and the step of introducing etching gas into the processing chamber filled with an inert gas to etch the sides of the wafer.

JP2013-193200 discloses a wafer processing method that can perform internal processing even when an insulating reinforcing sheet is attached to the back of the wafer. The solution is to divide the wafers with devices on the surface by forming a plurality of predetermined dividing lines into a grid while forming the devices in the plurality of regions divided by the predetermined dividing lines. A round processing method, which includes a protective member attaching step of attaching a protective member on the surface of the wafer, a back grinding step of grinding the back surface of the wafer to form a predetermined thickness, and a pair of wafers from the back side of the wafer The laser beam of penetrating wavelength locates the condensing point inside to irradiate along the planned dividing line, and then forms the modified layer inside the wafer along the planned dividing line. The step of installing a reinforcing sheet with a reinforcing sheet with an insulating function, the step of heating the reinforcing sheet to heat the reinforcing sheet, and attaching the dicing tape to the cured reinforcing sheet installed on the back of the wafer, and A wafer supporting step in which the outer peripheral portion of the dicing tape is mounted on a ring frame, and a dividing step in which the wafer is divided into individual devices by applying an external force to the wafer, and at the same time, the reinforcing sheet is broken along the individual devices.

JP2013-010453 discloses a wafer processing method, which is to divide a wafer formed with elements by a functional layer deposited on the surface of a substrate along a plurality of scribe lines dividing the element, including: functional interruption In the opening step, the laser light is irradiated along the two sides of the cutting path to form two laser processing grooves that reach the substrate to break the functional layer; the dividing groove forming step is to form two laser processing grooves formed along the cutting path In the central part, a dividing groove is formed in the functional layer and the substrate; the laser light irradiated in the step of disconnecting the functional layer is set at a wavelength of 300 nm or less that has absorption to the passivation film.

However, as known to those skilled in the art, in the manufacturing process of semiconductor devices, a functional layer of an insulating film and a functional film is deposited on the surface of a substrate such as silicon, and a plurality of IC, LSI and other devices constitute a matrix semiconductor Wafers; however, semiconductor wafers are divided into the above-mentioned components by a predetermined dividing line called a scribe lane, and individual semiconductor elements are manufactured by dividing along the scribe lane. When laser processing is used to divide components, cracks on the wafer's scribe lines must be generated on both sides of the scribe lines, and the multi-layer structure of the semiconductor is easy to make the density of each layer different, which in turn causes the thermal stress generated by the laser processing. The cracks are more severe.

Please refer to Figure 1a, a wafer (10) has a first integrated circuit structure (14) and a second integrated circuit structure (15) and other integrated circuit products on the surface of the wafer (10) Define a cutting line (11); after processing the cutting line (11) by laser, as shown in Figure 1b (this figure is the buildup processed on the substrate), irregular cracks are generated on both sides of the cutting line (11), The irregular cracks are adjacent to the integrated circuit products such as the first integrated circuit structure (14) and the second integrated circuit structure (15); when the first integrated circuit structure (14) and the second integrated circuit structure are used (15) When it is a product element, an unstable electrical connection is likely to occur, and irregular cracks as shown in FIG. 1c appear on the surface of the wafer (10).

Therefore, in order to solve the above problems, the main object of the present invention is to provide a cutting method for preventing crack extension to improve the above problems.

In view of the above problems, the present invention provides a cutting method to prevent crack extension. The isolation hole is used to generate a qualitatively altered area, so that cracks generated by laser processing are limited to the isolated area.

Therefore, the main object of the present invention is to provide a cutting method for preventing crack extension, and achieve the purpose of improving the wafer processing yield rate by a plurality of isolation holes.

Still another object of the present invention is to provide a cutting method for preventing crack extension. By providing reinforced isolation holes, the cracks generated by laser processing are further restricted to the inner side of the isolation region.

Another object of the present invention is to provide a cutting method for preventing crack extension, which uses multiple laser processes to generate isolation holes or reinforce isolation holes, which can avoid thermal stress residues in the multilayer structure.

Another object of the present invention is to provide a cutting method for preventing crack extension, which is selectively used in areas with high integrated circuit density, which can improve the yield and reduce the cost.

In order to achieve the above objective, the main technical means used by the present invention are implemented by the following technical solutions. The present invention is a cutting method for preventing crack extension, which is a pre-positioning process for wafer cutting, including: Step 1: Determine a cutting line required for cutting a wafer; Step 2: On one side of the cutting line A first isolation area is defined in a first isolation line; Step 3: The laser starts along one end of the first isolation line and ends at the other end, and continuously penetrates the wafer to generate a plurality of first isolation holes, the first The isolation hole has a first qualitative change area around it.

The purpose of the present invention and the solution of its technical problems can be further achieved by the following technical measures.

The aforementioned method, wherein after step 1, a first reinforced isolation line is defined in the first isolation area on one side of the cutting line.

In the foregoing method, a laser is continuously punched through the wafer at one end of the first reinforced isolation line to generate a plurality of first reinforced isolation holes, and the first reinforced isolation hole has a first reinforced qualitative change area around the periphery.

In the aforementioned method, after step 1, a second isolation region is defined in a second isolation line on the other side of the cutting line.

In the foregoing method, the laser starts along one end of the second isolation line and ends at the other end, and continuously punctures the wafer to generate a plurality of second isolation holes, and a second qualitative region is formed on the periphery of the second isolation hole.

The foregoing method, wherein after step 1, a second reinforced isolation line is defined in the second isolation region on one side of the cutting line.

In the foregoing method, a laser is continuously pierced through the wafer at one end of the second reinforced isolation line to generate a plurality of second reinforced isolation holes, and a second reinforced qualitative change region is formed around the second reinforced isolation hole.

In the foregoing method, after step 3, the laser starts along one end of the dicing line and ends at the other end, and then dicing the wafer.

In the aforementioned method, the laser penetration of the wafer can be divided into multiple laser shots.

Compared with the conventional technology, the present invention has the following effects: (1) the isolation holes are used to generate the qualitatively altered area, so that the cracks generated by the laser processing are limited to the isolation areas; (2) the reinforced isolation holes are provided to further limit the laser processing The crack is in the inner side of the isolation area; (3) Selectively used in areas with high density of integrated circuits, which can improve the yield and reduce the cost.

10‧‧‧ Wafer

11‧‧‧Cutting line

12‧‧‧Isolated area

121‧‧‧ First isolation line

1211‧‧‧First isolation hole

1212‧‧‧ First qualitative change area

122‧‧‧The first reinforced isolation line

1221‧‧‧First reinforced isolation hole

1222‧‧‧The first enhanced qualitative change area

13‧‧‧Second Quarantine

131‧‧‧Second isolation line

1311‧‧‧Second isolation hole

1312‧‧‧Second qualitative change area

132‧‧‧Second reinforced isolation line

1321‧‧‧Second reinforced isolation hole

1322‧‧‧ Second enhanced qualitative change area

14‧‧‧The first integrated circuit structure

15‧‧‧Second integrated circuit structure

21‧‧‧Step 1

22‧‧‧Step 2

22A‧‧‧Step 2A

221‧‧‧Step 2-1

221A‧‧‧Step 2-1A

222‧‧‧Step 2-2

222A‧‧‧Step 2-2A

23‧‧‧Step 3

23A‧‧‧Step 3A

24‧‧‧Step 4

Figure 1a: a top view of the wafer in the prior art.

Figure 1b: A cross-sectional view of the prior art wafer after dicing.

Figure 1c: a top view of the prior art wafer after dicing.

Figure 2a is a first top view of a wafer of the preferred embodiment of the present invention.

Figure 2b is a schematic diagram of the first isolation line and the first isolation region according to the best embodiment of the present invention.

FIG. 2c is a schematic diagram of the first isolation line and the first isolation hole according to the best embodiment of the present invention.

FIG. 2d is a schematic diagram of the first isolation hole and the first qualitative change region according to the best embodiment of the present invention.

Figure 3a is a first cross-sectional view of a laser-processed first isolation hole of the preferred embodiment of the present invention.

Fig. 3b is a second cross-sectional view of the laser-processed first isolation hole of the preferred embodiment of the present invention.

Figure 3c is a third cross-sectional view of the laser-processed first isolation hole of the best embodiment of the present invention.

Figure 3d is a first cross-sectional view of the first qualitative change region and the cutting line after laser processing in the best embodiment of the present invention.

Figure 3e is a second cross-sectional view of the first qualitative change region and the cutting line after laser processing in the best embodiment of the present invention.

Figure 4a: A second top view of the wafer of the preferred embodiment of the present invention.

FIG. 4b is a schematic diagram of the first reinforced isolation line and the first isolation region according to the best embodiment of the present invention.

Fig. 4c is a schematic diagram of the first reinforced isolation line and the first reinforced isolation hole according to the best embodiment of the present invention.

FIG. 4d is a first schematic diagram of the first reinforced isolation hole and the first reinforced qualitative change region according to the best embodiment of the present invention.

FIG. 4e is a second schematic diagram of the first reinforced isolation hole and the first reinforced qualitative change region according to the best embodiment of the present invention.

FIG. 4f is a schematic diagram of the first reinforced isolation hole and the first reinforced qualitative change region according to the best embodiment of the present invention.

FIG. 5a is a schematic diagram of the first isolation area and the second isolation area according to the preferred embodiment of the present invention.

Fig. 5b is a schematic diagram of the second isolation hole and the second reinforced isolation hole according to the best embodiment of the present invention.

Fig. 5c: A first schematic diagram of each qualitative change region of the best embodiment of the present invention.

Fig. 5d: a second schematic diagram of each qualitative change region of the best embodiment of the present invention.

Figure 6: The first flow chart of the best embodiment of the present invention.

Figure 7: This is the second flowchart of the best embodiment of the present invention.

Figure 8: This is the third flowchart of the best embodiment of the present invention.

In order to make the purpose, features and functions of the present invention more obvious and understandable, the following first specifically enumerates the first embodiment of the present invention: First, refer to the flowchart shown in FIG. 6, which consists of step 1(21) and step 2( 22). Step 3 (23).

Among them, as shown in Figures 2a and 6, step 1 (21) is to determine a cutting line (11) required to cut a wafer (10).

Specifically, the wafer (10) refers to a silicon chip used in the fabrication of a silicon semiconductor integrated circuit. In this case, the wafer (10) is represented as a build-up layer on a silicon chip. In practice, it may also include a silicon chip part; In addition, the dicing line (11) refers to dividing the planning line processed on the wafer (10) by generating scribe lines along the processing dicing line (11) to manufacture individual semiconductor devices.

As shown in Figures 2b and 6, step 2 (22) defines a first isolation area (12) in a first isolation line (121) on one side of the cutting line (11).

Actually, the first isolation line (121) is a marginal line that expects the cutting line (11) to crack after laser processing, so it needs to be defined between the semiconductor device and the cutting line (11) according to practical conditions to avoid The semiconductor element is affected; in addition, the first isolation region (12) refers to a region that can be expected to contain cracks after the cutting line (11) undergoes laser processing.

Among them, as shown in Figures 2c, 2d, and 6, step 3 (23) starts from the laser along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) A plurality of first isolation holes (1211) are generated, and a periphery of the first isolation holes (1211) has a first qualitatively variable region (1212).

In general, you must first explain "laser processing". Laser processing uses the characteristics of high intensity and high parallelism of laser light to focus it into light with a power density of 103 to 109 watts/cm2 using an optical device such as a focusing lens. After the point, local heating and melting, gasification and other thermal effects are generated on the surface of the workpiece to achieve the purpose of processing. Because the time from light energy to heat energy conversion is very short, and the power density is quite high, it provides extremely high light energy per unit time and unit area, so that the surface of the material can obtain a large amount of heat energy in an instant. This kind of heating rate of the material surface is generally up to thousands of degrees per second, and the mixing mode of "liquid/gas" or "solid/gas" easily occurs in the process of laser processing; however, according to the plan, laser processing is required The first isolation line (121) continuously penetrates the wafer (10) to generate a plurality of first isolation holes (1211), wherein the first isolation hole (1211) is the laser light of the wafer (10) It is produced by ablation at the moment of irradiation. The outer diameter of the first isolation hole (1211) is about 0.1 to 10 microns (μm, Micrometer); in addition, the first qualitative change region (1212) refers to the first isolation hole (1211) The laser processing process is generated in the area around the first isolation hole (1211), because the wafer (10) is exposed to laser light as explained in "Laser Processing" above, resulting in materials around the first isolation hole (1211) After being modified, the material density of the first qualitative change region (1212) changes. The outer diameter of the first qualitative change region (1212) is about 1-20 microns (μm, Micrometer).

Taking the first embodiment of the cutting method for preventing crack extension of the present invention as an example, a detailed description of the implementation process of the present invention is as follows.

Referring first to Figure 2a, first determine the location of one of the cutting lines (11) required to cut a wafer (10); then, referring to Figures 2a and 2b, the first integrated circuit structure (14) and A first isolation line (121) is defined between the cutting lines (11), and the cutting line (11) and the first isolation line (121) are first isolation regions (12).

Next, since the wafer (10) is composed of a multi-layer structure, after the scanning and positioning of the first isolation hole (1211) is completed, the laser can penetrate the wafer (10) and the laser can be continuously sent to produce the first isolation Hole (1211), and the laser processing is currently recommended to be picosecond laser, using a laser pulse width of less than 15 picoseconds (ps, picosecond), the less the light energy will spread to the surroundings, reducing interference outside the processing area , And the time difference between successive multiple lasers is between tens of picoseconds (ps, picosecond) to tens of nanoseconds (ns, nanoseconds); first refer to Figure 3a, which is processed by laser on the wafer (10) On the first isolation line (121), a first isolation hole (1211) and a surrounding first enhanced qualitative transformation region (1222) are started, and at this time, the laser processing is performed at a height above the first integrated circuit structure (14) ; Followed, referring to Figure 3b shows that the first isolation hole (1211) processed by the laser on the wafer (10) continues the laser processing, so that the first isolation hole (1211) and the surrounding first enhanced qualitative change region (1222 ) Continue to extend downward; and, referring to FIG. 3c, it is shown that the first isolation hole (1211) processed by laser on the wafer (10) continues to be laser processed to make the first isolation hole (1211) and the surrounding first The quality change region (1212) extends to the other surface of the wafer; practically speaking, after the scanning and positioning of the first isolation hole (1211) is completed, the wafer (10) is driven by the platform (XY TABLE) during laser processing, However, the speed driven by the platform (1m/s) has no influence on the laser processing speed (ns level).

As shown in Figure 2c, the laser starts along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of first isolation holes (1211), and a plurality of first isolation holes (1211) The best spacing is about 1~30 microns (μm, Micrometer): the first isolation holes (1211) are shown in FIG. 2d, and the first isolation holes (1211) and the surrounding first qualitative change The section (1212) cross section is shown in Figure 3c.

From the above, the first embodiment of the cutting method for preventing crack extension of the present invention has been completed. Finally, refer to FIG. 3d. The laser starts along one end of the cutting line (11) and ends at the other end, cutting the wafer ( 10), it can be seen that the laser processing of the cutting line (11) is cracked and the first integrated circuit structure (14) is separated by the first isolation hole (1211) and the surrounding first mass change region (1212), at this time The yield rate of the first integrated circuit structure (14) is bound to increase; as shown in FIG. 3e, another cutting line (11) is located on the other side of the second integrated circuit structure (15), and the second integrated circuit There is no other semiconductor device on the other side of the structure (15), it can be seen that the laser cutting of the other cutting line (11) produces a crack and the second integrated circuit structure (15) is formed by the first isolation hole (1211) and the surrounding first The qualitative change area (1212) is isolated.

As shown in Figs. 4a, 4b, 4c, 4d, 4e, 4f and 7, it is a second embodiment of a cutting method for preventing crack extension of the present invention; in the first embodiment and the 2a, 2b, 2c, The features described in Figures 2d, 3a, 3b, 3c, 3d, 3e, and 6 are the same as those in Figures 4a, 4b, 4c, 4d, 4e, 4f, and 7, in Figures 4a, 4b, 4c, 4d, 4e, The symbols marked or omitted in Figures 4f and 7 are not repeated here. The main difference between the second embodiment and the first embodiment is the comparison of Figure 7 of the second embodiment and Figure 6 of the first embodiment. Step 2-1 (221) and step 2-2 are added. (222) and step 4(24).

First, refer to the flowchart shown in Figure 7, which consists of step 1 (21), step 2 (22), step 2-1 (221), step 3 (23), step 2-2 (222) and step 4 (24) Composition.

Among them, as shown in Figures 4a and 7, step 1 (21) is to determine a cutting line (11) required to cut a crystal circle (10).

As shown in Figures 4b and 7, step 2 (22) defines a first isolation area (12) in a first isolation line (121) on one side of the cutting line (11).

As shown in Figures 4b and 7, step 2-1 (221) defines a first reinforced isolation line (122) in the first isolation area (12) on one side of the cutting line (11) .

In fact, the first reinforced isolation line (122) is to reinforce the marginal line that cracks the cutting line (11) after laser processing, so it needs to be defined between the semiconductor device and the cutting line (11) according to practical conditions To avoid the semiconductor element being affected.

Among them, as shown in Figures 4c, 4f and 7, step 3 (23) starts from the laser along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) A plurality of first isolation holes (1211) are generated, and a periphery of the first isolation holes (1211) has a first qualitatively variable region (1212).

Among them, as shown in Figs. 4c, 4f and 7, the step 2-2 (222) is to continuously penetrate the wafer (10) with a laser at one end of the first reinforced isolation line (122) to generate a plurality The first reinforced isolation hole (1221) has a first reinforced qualitative change region (1222) on the periphery of the first reinforced isolation hole (1221).

In general, according to the plan, the first reinforced isolation line (122) requiring laser processing is continuously punched through the wafer (10) to generate a plurality of first reinforced isolation holes (1221), wherein the first reinforced isolation hole (1221) ) Is that the wafer (10) is produced by ablation processing at the moment of laser light irradiation, and the outer diameter of the first reinforced isolation hole (1221) is about 0.1 to 10 microns (μm, Micrometer); in addition, the first The enhanced qualitative change region (1222) refers to the area around the first enhanced isolation hole (1221) generated during the laser processing of the first enhanced isolation hole (1221) because the wafer (10) is exposed to laser light as described above "Laser processing" explained that the material around the first reinforced isolation hole (1221) was modified, resulting in a change in the material density of the first reinforced variable region (1222). The outer diameter of the first modified region (1212) is about 1~20 microns (μm, Micrometer).

Finally, as shown in Figs. 4d, 4e, 4f and 7, the step 4 (24) is that the laser starts along one end of the cutting line (11) and ends at the other end, cutting the wafer (10).

Taking the second embodiment of the cutting method for preventing crack extension of the present invention as an example, a detailed description of the implementation process of the present invention is as follows.

Referring first to Figure 4a, first determine the location of one of the dicing lines (11) required to cut a wafer (10); then, referring to Figures 4a and 4b, the first integrated circuit structure (14) and A first isolation line (121) and a first reinforced isolation line (122) are defined between the cutting lines (11). The cutting line (11) and the first isolation line (121) are the first isolation regions (12).

Next, since the wafer (10) is composed of a multi-layer structure, after the scanning and positioning of the first isolation hole (1211) is completed, the laser can penetrate the wafer (10) and the laser can be continuously sent to produce the first isolation Hole (1211), and the laser processing is currently recommended to be picosecond laser, using a laser pulse width of less than 15 picoseconds (ps, picosecond), the less the light energy will spread to the surroundings, reducing interference outside the processing area , And the time difference between successive multiple lasers is between tens of picoseconds (ps, picosecond) to tens of nanoseconds (ns, nanoseconds); first refer to Figure 3a, which is processed by laser on the wafer (10) On the first isolation line (121), a first isolation hole (1211) and a surrounding first enhanced qualitative transformation region (1222) are started, and at this time, the laser processing is performed at a height above the first integrated circuit structure (14) ; Followed, referring to Figure 3b shows that the first isolation hole (1211) processed by the laser on the wafer (10) continues the laser processing, so that the first isolation hole (1211) and the surrounding first enhanced qualitative change region (1222 ) Continue to extend downward; and, referring to FIG. 3c, it is shown that the first isolation hole (1211) processed by laser on the wafer (10) continues to be laser processed to make the first isolation hole (1211) and the surrounding first The enhanced qualitative change region (1222) extends to the other surface of the wafer; however, laser processing generates first enhanced isolation holes (1221) and first enhancements on the first enhanced isolation line (122) of the wafer (10) The qualitative change area (1222) is the same as the laser processing of the first isolation line (121).

As shown in FIG. 4c, the laser starts along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of first isolation holes (1211), a plurality of first isolation holes (1211) The best spacing is about 1~30 microns (μm, Micrometer); the first isolation holes (1211) are shown in Figure 4c, and the first isolation holes (1211) and the surrounding first qualitative change The section (1212) section state is shown in Figure 4d or 4e.

As shown in Figure 4c, the laser starts along one end of the first reinforced isolation line (122) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of first reinforced isolation holes (1221), the first The best spacing between the reinforced isolation holes (1221) is about 1-30 microns (μm, Micrometer); the first reinforced isolation holes (1221) are shown in FIG. 4c, and the first reinforced isolation holes (1221) and The cross-sectional state of the surrounding first enhanced qualitative transformation region (1222) is shown in FIG. 4d or 4e.

Finally, looking at Figure 4f first, there are still unmodified areas between the first qualitatively altered regions (1212) and the first enhanced qualitatively altered regions (1222). The laser processing of the cutting line (11) may cause cracks. Will break through the first isolation area (12); refer to Figure 4d, the laser starts along one end of the cutting line (11) and ends at the other end, cutting the wafer (10), the cutting line of the laser processing can be seen (11) The crack and the first integrated circuit structure (14) are first separated by the first reinforced isolation hole (1221) and the surrounding first reinforced qualitative change region (1222), and then separated by the first isolated hole (1211) and The surrounding first qualitative change region (1212) is isolated, and at this time the yield rate of the first integrated circuit structure (14) must be improved.

As shown in Figures 5a, 5b, 5c, 5d and 8, it is the third embodiment of the cutting method for preventing crack extension of the present invention; in the second embodiment, the fourth embodiment is the same as 4a, 4b, 4c, 4d, 4e, The features described in Figs. 4f and 7 are the same as those in Figs. 5a, 5b, 5c, 5d, and 8, and the symbols in Figs. 5a, 5b, 5c, 5d, and 8 are omitted or omitted. The main difference between the third embodiment and the second embodiment lies in the comparison of Figure 8 of the third embodiment with Figure 7 of the first embodiment. Step 2A (22A) and step 2-1A (221A) are added. ), Step 2-2A (222A) and Step 3A (23A).

First, refer to the flowchart shown in Figure 8, which consists of step 1 (21), step 2 (22), step 2A (22A), step 2-1 (221), step 2-1A (221A), step 3 (23), Step 3A (23A), Step 2-2 (222), Step 2-2A (222A) and Step 4 (24).

Among them, as shown in Figs. 5a and 8, step 1 (21) is to determine a cutting line (11) required for cutting a wafer (10).

As shown in FIGS. 5a and 8, step 2 (22) defines a first isolation area (12) in a first isolation line (121) on one side of the cutting line (11).

At the same time in step 2 (22), as shown in Figures 5a and 8, step 2-1 (221) defines a first in the first isolation area (12) on one side of the cutting line (11) Reinforce the isolation line (122).

At the same time as step 2 (22), as shown in Figures 5a and 8, step 2A (22A) defines a second isolation area in a second isolation line (131) on one side of the cutting line (11) (13).

At the same time in step 2 (22), as shown in Figures 5a and 8, step 2-1A (221A) defines a second in the second isolation area (13) on one side of the cutting line (11) Reinforce the isolation line (132).

Actually, the second isolation line (131) and the second reinforced isolation line (132) are to reinforce the marginal line that cracks the cutting line (11) after laser processing, so it needs to be defined according to the practical situation. Between the semiconductor element and the dicing line (11) to avoid the semiconductor element being affected; in addition, the second isolation region (13) refers to a crack area that may be expected to generate a crack after the dicing line (11) is processed by laser.

Among them, as shown in Figures 5b and 8, step 3 (23) starts from the laser along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of A first isolation hole (1211), the periphery of the first isolation hole (1211) has a first qualitative change region (1212).

At the same time as this step 3 (23), as shown in Figures 5b and 8, this step 2-2 (222) is followed by continuous laser penetration of the wafer at one end of the first reinforced isolation line (122) ( 10) A plurality of first reinforced isolation holes (1221) are generated, and a periphery of the first reinforced isolation holes (1221) has a first enhanced qualitative change region (1222).

At the same time as this step 3 (23), as shown in Figures 5b and 8, this step 3A (23A) starts from the laser along one end of the second isolation line (131) and ends at the other end, continuously piercing the crystal The circle (10) generates a plurality of second isolation holes (1311), and a periphery of the second isolation holes (1311) has a second qualitative change region (1312).

At the same time of this step 3 (23), as shown in Figures 5b and 8, this step 2-2A (222A) is followed by continuous laser penetration of the wafer at one end of the second reinforced isolation line (132) ( 10) A plurality of second reinforced isolation holes (1321) are generated, and a second reinforced qualitative change region (1322) is provided on the periphery of the second reinforced isolation holes (1321).

In general, according to the plan, the second isolation line (131) requiring laser processing is continuously punched through the wafer (10) to generate a plurality of second isolation holes (1311), wherein the second isolation hole (1311) is The wafer (10) is produced by ablation at the moment of laser beam irradiation, and the outer diameter of the second isolation hole (1311) is about 0.1 to 10 microns (μm, Micrometer); in addition, the second qualitative change region (1312) ) Means that the second isolation hole (1311) is generated in the area around the second isolation hole (1311) during the laser processing, because the wafer (10) is exposed to laser light as explained in "Laser Processing" above, As a result, the material around the second isolation hole (1311) is modified, resulting in a change in the material density of the second qualitative change region (1312). The outer diameter of the second qualitative change region (1312) is about 1-20 microns (μm, Micrometer) .

Furthermore, according to the plan, the second reinforced isolation line (132) requiring laser processing is continuously punched through the wafer (10) to generate a plurality of second reinforced isolation holes (1321), wherein the second reinforced isolation hole (1321) This is because the wafer (10) is produced by ablation processing at the moment of laser light irradiation; in addition, the second enhanced qualitative change region (1322) refers to the second enhanced isolation hole (1321) generated during the laser processing process The area around the second reinforced isolation hole (1321), because the wafer (10) is exposed to laser light as explained in "Laser Processing" above, the material around the second reinforced isolation hole (1321) is modified, resulting in the The material density of the second enhanced qualitative change region (1322) changes.

Finally, as shown in Figures 5c, 5d, and 8, step 4 (24) is the laser cutting along the cutting line (11) from one end to the other end, cutting the wafer (10).

Taking the third embodiment of the cutting method for preventing crack extension of the present invention as an example, a detailed description of the implementation process of the present invention is as follows.

Referring first to Figure 5a, first determine the location of one of the cutting lines (11) required to cut a wafer (10); then, referring to Figure 5a, the first integrated circuit structure (14) and the cutting line (11) define the first isolation line (121), the first reinforced isolation line (122), the second isolation line (131) and the second reinforced isolation line (132), the cutting line (11) and the first isolation line ( 121) is the first isolation area (12), and the cutting line (11) and the second isolation line (131) are the second isolation area (13).

As shown in Figure 5b, the laser starts along one end of the first isolation line (121) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of first isolation holes (1211), and a plurality of first isolation holes (1211) The best spacing is about 1~30 microns (μm, Micrometer); the first isolation holes (1211) are shown in Figure 4c, and the first isolation holes (1211) and the surrounding first qualitative change The cross-sectional state of the region (1212) is as shown in FIG. 5c or 5d; however, the laser processing generates a second isolation hole (1311) and a second qualitatively altered region (1312) on the second isolation line (131) of the wafer (10) ), which is the same as the laser processing of the first isolation line (121). .

As shown in Figure 5b, the laser starts along one end of the first reinforced isolation line (122) and ends at the other end, and continuously penetrates the wafer (10) to generate a plurality of first reinforced isolation holes (1221), the first The best spacing between the reinforced isolation holes (1221) is about 1-30 microns (μm, Micrometer); the first reinforced isolation holes (1221) are shown in FIG. 4c, and the first reinforced isolation holes (1221) and The cross-sectional state of the surrounding first enhanced qualitatively variable region (1222) is as shown in FIG. 5c or 5d; however, laser processing produces second enhanced isolation holes (1321) on the second enhanced isolation line (132) of the wafer (10) ) And the second enhanced qualitative change region (1322) are the same as the laser processing of the first enhanced isolation line (122).

Finally, referring to Figure 5c or 5d, the laser starts along one end of the cutting line (11) and ends at the other end, cutting the wafer (10), it can be seen that the laser processing of the cutting line (11) produces cracks and The first integrated circuit structure (14) is first separated by the first reinforced isolation hole (1221) and the surrounding first enhanced qualitative transformation region (1222), and then separated by the first isolation hole (1211) and the surrounding first qualitative transformation region (1212) isolation, the yield of the first integrated circuit structure (14) must be improved at this time; in addition, it can be seen that the laser processing of the cutting line (11) produces a crack and the second integrated circuit structure (15) first The second reinforced isolation hole (1321) and the surrounding second qualitative change region (1322) are isolated, and then separated by the second isolation hole (1311) and the surrounding second qualitative change region (1312), at this time the second integrated body The yield rate of the circuit structure (14) is bound to increase.

Therefore, the effect of the present invention is different from the general cutting method, which is really the first in the semiconductor industry, and meets the requirements of the invention patent.

However, it needs to be reiterated that the above are only the preferred embodiments of the present invention. Any equivalent changes in the description, patent application or drawings of the present invention are still within the technical scope of the present invention, so The scope of protection of the present invention shall be subject to the scope defined in the attached patent application.

10‧‧‧ Wafer

11‧‧‧Cutting line

1211‧‧‧First isolation hole

1212‧‧‧ First qualitative change area

14‧‧‧The first integrated circuit structure

15‧‧‧Second integrated circuit structure

Claims (9)

A cutting method for preventing crack extension, which is a wafer pre-positioning process, including: Step 1: Determine a cutting line required for cutting a wafer; Step 2: First on one side of the cutting line A first isolation area is defined in the isolation line; Step 3: The laser starts along one end of the first isolation line and ends at the other end, continuously piercing the wafer to generate a plurality of first isolation holes, and the periphery of the first isolation hole It has a first qualitatively variable region. The method according to claim 1, wherein after step 1, a first reinforced isolation line is defined in the first isolation area on one side of the cutting line. According to the method shown in claim 2, a laser is continuously punched through the wafer at one end of the first reinforced isolation line to generate a plurality of first reinforced isolation holes, and a first reinforced qualitative change is formed around the first reinforced isolation hole Area. According to the method of claim 1, wherein after step 1, a second isolation area is defined in a second isolation line on the other side of the cutting line. According to the method shown in claim 4, a laser starts along one end of the second isolation line and ends at the other end, and continuously penetrates the wafer to generate a plurality of second isolation holes, and a second Qualitative change zone. The method according to claim 1, wherein after step 1, a second reinforced isolation line is defined in the second isolation area on one side of the cutting line. According to the method shown in claim 5, a laser is continuously punched through the wafer at one end of the second reinforced isolation line to generate a plurality of second reinforced isolation holes, and a second reinforced qualitative change is formed on the periphery of the second reinforced isolation hole Area. According to the method of claim 1, wherein after step 3, the laser starts along one end of the dicing line and ends at the other end, and the wafer is cut. According to the method shown in claim 1, the laser penetrating the wafer can be divided into multiple lasers.

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