TW202007243A - Printed circuit board and method for manufacturing the same - Google Patents
Printed circuit board and method for manufacturing the same Download PDFInfo
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- TW202007243A TW202007243A TW107124864A TW107124864A TW202007243A TW 202007243 A TW202007243 A TW 202007243A TW 107124864 A TW107124864 A TW 107124864A TW 107124864 A TW107124864 A TW 107124864A TW 202007243 A TW202007243 A TW 202007243A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims abstract description 18
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- 239000010410 layer Substances 0.000 claims description 145
- 239000000463 material Substances 0.000 claims description 51
- 239000012790 adhesive layer Substances 0.000 claims description 25
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- AOBIOSPNXBMOAT-UHFFFAOYSA-N 2-[2-(oxiran-2-ylmethoxy)ethoxymethyl]oxirane Chemical compound C1OC1COCCOCC1CO1 AOBIOSPNXBMOAT-UHFFFAOYSA-N 0.000 claims description 6
- 239000000084 colloidal system Substances 0.000 claims description 6
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- 239000000853 adhesive Substances 0.000 claims description 2
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 25
- 239000011889 copper foil Substances 0.000 description 18
- -1 polyethylene terephthalate Polymers 0.000 description 12
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- 229920000106 Liquid crystal polymer Polymers 0.000 description 4
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 4
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- 239000004642 Polyimide Substances 0.000 description 4
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Abstract
Description
本發明涉及電路板製作領域,尤其涉及一種含有電阻元件的電路板及電路板的製作方法。The invention relates to the field of circuit board manufacturing, in particular to a circuit board containing a resistance element and a method of manufacturing the circuit board.
隨著電阻元件向微型化發展,內埋技術應運而生。其具有如下優勢:封裝面積消減與低耗電化、提升信號品質及降低電磁干擾雜訊與高頻電源安定化。With the development of resistive elements to miniaturization, embedded technology came into being. It has the following advantages: reduction of packaging area and low power consumption, improvement of signal quality, reduction of electromagnetic interference noise and stabilization of high-frequency power supply.
內埋技術中常用的內埋被動組件主要有:電感元件、電容元件及電阻元件。The embedded passive components commonly used in the embedded technology mainly include: inductive components, capacitive components and resistive components.
例如,內埋電阻元件的通常做法是:先將電阻元件內埋在同一導電線路層內,再增層,制程複雜;且電阻元件的材料多使用NiCr,NiP等合金層,但是這些材料通常被材料商控制,導致內埋有電阻元件的電路板的製作成本較高。For example, the common practice of buried resistance elements is: first bury the resistance element in the same conductive circuit layer, and then add layers, the process is complicated; and the resistance element material mostly uses alloy layers such as NiCr and NiP, but these materials are usually Material vendors control, resulting in higher manufacturing costs of circuit boards with embedded resistance elements.
有鑑於此,本發明提供一種成本低的電路板及電路板的製作方法。In view of this, the present invention provides a low-cost circuit board and a method for manufacturing the circuit board.
一種電路板,該電路板包括一第一電路基板、一第二電路基板及至少一電阻元件;該第一電路基板包括至少一第一導電線路層,該第一導電線路層包括至少一第一導電線路,該第二電路基板包括至少一第二導電線路層,該第二導電線路層包括至少一第二導電線路,該電阻元件形成在該第一導電線路層及該第二導電線路層之間,該電阻元件的一端與該第一導電線路相貼合且電性連接,另一端與該第二導電線路相貼合且電性連接。A circuit board includes a first circuit substrate, a second circuit substrate, and at least one resistive element; the first circuit substrate includes at least a first conductive circuit layer, and the first conductive circuit layer includes at least a first Conductive circuit, the second circuit substrate includes at least one second conductive circuit layer, the second conductive circuit layer includes at least one second conductive circuit, the resistance element is formed between the first conductive circuit layer and the second conductive circuit layer At one time, one end of the resistive element is attached and electrically connected to the first conductive circuit, and the other end is attached and electrically connected to the second conductive circuit.
進一步地,該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接。Further, the first conductive circuit includes a first side perpendicular to the extending direction of the first circuit substrate, the second conductive circuit includes a second side perpendicular to the extending direction of the second circuit substrate, and the resistance elements are respectively The first side and the second side are attached and electrically connected.
進一步地,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。Further, the first conductive circuit further includes a first surface vertically connected to the first side surface, the second conductive circuit further includes a second surface vertically connected to the second side surface, the resistance element and the first surface At least one of the surface and the second surface is attached and electrically connected.
進一步地,該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該第一電路基板及該第二電路基板通過一膠層粘合在一起,該膠層迭設在該第一導電線路層和第二導電線路層之間且填充於該第一間隙及該第二間隙內。Further, a first gap is formed between at least one surface of the resistance element opposite to the first side and the first conductive circuit of the first conductive circuit layer, and at least one of the resistance element is opposite to the second side A second gap is formed between the surface of the back and the second conductive circuit of the second conductive circuit layer; the first circuit substrate and the second circuit substrate are bonded together by an adhesive layer, and the adhesive layer is stacked on the The first conductive circuit layer and the second conductive circuit layer are filled between the first gap and the second gap.
進一步地,該電阻元件由一種電阻材料製成,該電阻材料為一種熱固化膠體,該電阻材料主要由樹脂、硬化劑、觸媒及導電填料組成,在該電阻材料中,該樹脂所占的重量百分比為19.5~35%,該硬化劑所占的重量百分比為10~17%,該觸媒所占的重量百分比為0~1%,該導電填料所占的重量百分比為46~69%,該樹脂由環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚中的一種或多種組成。Further, the resistance element is made of a resistance material, the resistance material is a thermosetting colloid, the resistance material is mainly composed of resin, hardener, catalyst and conductive filler, in the resistance material, the resin accounts for The weight percentage is 19.5~35%, the weight percentage of the hardener is 10-17%, the weight percentage of the catalyst is 0~1%, the weight percentage of the conductive filler is 46~69%, The resin is composed of one or more of epoxy resin, dimer acid modified polyester and polypropylene glycol diglycidyl ether.
進一步地,該膠體中還含有添加劑,該添加劑所占的重量百分比為0.2~2%。Further, the colloid also contains an additive, and the weight percentage of the additive is 0.2-2%.
一種電路板的製作方法,其包括如下步驟:提供一第一電路基板中間體及一第二電路基板中間體;該第一電路基板中間體包括一第一導電線路層,該第一導電線路層包括至少一第一導電線路;該第二電路基板中間體包括一第二導電線路層,該第二導電線路層包括至少一第二導電線路;提供一膠層,並將該膠層壓合在該第二導電線路層上,該膠層包括一第一通槽;提供一電阻材料並將該電阻材料印刷在該第一通槽內,使得該電阻材料與該第二導電線路相貼合且電性連接;及 將該第一電路基板中間體壓合在該第二電路基板中間體上,並使得該電阻材料與該第一導電線路相貼合且電性連接。A method for manufacturing a circuit board includes the following steps: providing a first circuit substrate intermediate and a second circuit substrate intermediate; the first circuit substrate intermediate includes a first conductive circuit layer, the first conductive circuit layer At least one first conductive circuit is included; the second circuit substrate intermediate includes a second conductive circuit layer, the second conductive circuit layer includes at least one second conductive circuit; an adhesive layer is provided, and the adhesive is laminated on On the second conductive circuit layer, the adhesive layer includes a first through-groove; providing a resistive material and printing the resistive material in the first through-groove, so that the resistive material is in contact with the second conductive circuit and Electrical connection; and pressing the first circuit board intermediate body on the second circuit board intermediate body, and making the resistive material and the first conductive circuit fit and electrically connected.
進一步地,該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接。Further, the first conductive circuit includes a first side perpendicular to the extending direction of the first circuit substrate, the second conductive circuit includes a second side perpendicular to the extending direction of the second circuit substrate, and the resistance elements are respectively The first side and the second side are attached and electrically connected.
進一步地,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。Further, the first conductive circuit further includes a first surface vertically connected to the first side surface, the second conductive circuit further includes a second surface vertically connected to the second side surface, the resistance element and the first surface At least one of the surface and the second surface is attached and electrically connected.
進一步地,該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該膠層填充於該第一間隙及該第二間隙內。Further, a first gap is formed between at least one surface of the resistance element opposite to the first side and the first conductive circuit of the first conductive circuit layer, and at least one of the resistance element is opposite to the second side A second gap is formed between the surface of the back and the second conductive circuit of the second conductive circuit layer; the adhesive layer is filled in the first gap and the second gap.
與現有技術相比,本發明提供的製作電阻元件的電阻材料的製作成本低。另外,本發明提供的電路板及製作方法,採用上述電阻材料作為該電阻元件的製作材料,可以通過印刷的方式將電阻元件形成兩個電路基板中間體中間,並在增層的過程中固化成型,可以簡化制程。Compared with the prior art, the manufacturing cost of the resistance material provided by the present invention is low. In addition, the circuit board and the manufacturing method provided by the present invention adopt the above-mentioned resistive material as the manufacturing material of the resistive element, and the resistive element can be formed in the middle of two circuit substrate intermediates by printing, and cured and formed during the build-up process , Can simplify the process.
為能進一步闡述本發明達成預定發明目的所採取的技術手段及功效,以下結合附圖1-13及較佳實施方式,對本發明提供的電路板及其製作方法的具體實施方式、結構、特徵及其功效,作出如下詳細說明。In order to further illustrate the technical means and effects of the present invention to achieve the intended purpose of the invention, the specific implementation, structure, features and the circuit board and manufacturing method provided by the present invention are described below in conjunction with the accompanying drawings 1-13 and preferred embodiments. The function is explained in detail as follows.
請參閱圖1,本發明第一實施例提供一種含有電阻元件31的電路板100。該電路板100包括一第一電路基板70、一第二電路基板80、一電阻元件31及一膠層41。該第一電路基板70及該第二電路基板80通過該膠層41粘結在一起,該電阻元件31位於該第一電路基板70及該第二電路基板80之間。Please refer to FIG. 1, a first embodiment of the present invention provides a
該第一電路基板70包括一絕緣的第一基材層11、形成在該第一基材層11的相背兩表面上的第一導電線路層14和第三導電線路層16及形成在該第三導電線路層16的遠離該第一基材層11的表面上的第一防焊層17。The
該第一基材層11的材質通常可選用聚醯亞胺(polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)或聚萘二甲酸乙二醇酯(Polyethylene Naphthalate,PEN)、聚乙烯(polyethylene,PE)、特氟龍(Teflon)、液晶高分子聚合物(liquid crystal polymer,LCP)、聚氯乙烯(polyvinyl chloride polymer,PVC)等等可撓性材料中的一種。也可以為樹脂板、陶瓷板等硬性支撐材料中的一種。The material of the
該第一導電線路層14包括至少一條第一導電線路141。每條該第一導電線路141包括一與該第一電路基板70延伸方向平行的第一表面1411及與該第一表面1411垂直相連的第一側面1412。該第一表面1411遠離該第一基材層11。The first
該第二電路基板80包括一絕緣的第二基材層21、形成在該第二基材層21的相背兩表面上的第二導電線路層24和第四導電線路層26及形成在該第四導電線路層26的遠離該第二基材層21的表面上的第二防焊層27。該第二導電線路層24與該第一導電線路層14相對。The
該第二基材層21的材質通常可選用聚醯亞胺(polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)或聚萘二甲酸乙二醇酯(Polyethylene Naphthalate,PEN)、聚乙烯(polyethylene,PE)、特氟龍(Teflon)、液晶高分子聚合物(liquid crystal polymer,LCP)、聚氯乙烯(polyvinyl chloride polymer,PVC)等等可撓性材料中的一種。也可以為樹脂板、陶瓷板等硬性支撐材料中的一種。The material of the
該第二導電線路層24包括至少一條第二導電線路241。每條該第二導電線路241包括一與該第二電路基板80延伸方向平行的第二表面2411及一與該第二表面2411垂直相連的第二側面2412。該第二表面2411遠離該第二基材層21。The second
該電阻元件31由電阻材料30經加熱加壓固化成型而得。The
該電阻材料30為一種熱固化膠體,該電阻材料30主要由樹脂、硬化劑、觸媒、導電填料及添加劑攪拌混合而成。The
在該電阻材料30中,該樹脂所占的重量百分比為19.5~35%,該硬化劑所占的重量百分比為10~17%,該觸媒所占的重量百分比為0~1%,該導電填料所占的重量百分比為46~69%,該添加劑所占的重量百分比為0.2~2%。In the
該樹脂可以為單一樹脂,也可以為多種樹脂的混合物。 在本實施例中,該樹脂包括環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚。其中,該環氧樹脂的結構式為:;該聚丙二醇二縮水甘油基醚的結構式為:。The resin may be a single resin or a mixture of multiple resins. In this embodiment, the resin includes epoxy resin, dimer acid modified polyester, and polypropylene glycol diglycidyl ether. Among them, the structural formula of the epoxy resin is: ; The structural formula of the polypropylene glycol diglycidyl ether is: .
該硬化劑可以為脂肪胺固化劑、聚醯胺固化劑、脂環胺固化劑等常規硬化劑。在本實施例中,該硬化劑為聚醯胺固化劑。The hardener may be a conventional hardener such as a fatty amine curing agent, a polyamide curing agent, an alicyclic amine curing agent. In this embodiment, the hardener is a polyamide curing agent.
該觸媒可以為咪唑類物質。在本實施例中,該觸媒優選為2-十一烷基咪唑,該2-十一烷基咪唑的化學式為。The catalyst may be imidazole. In this embodiment, the catalyst is preferably 2-undecylimidazole, and the chemical formula of the 2-undecylimidazole is .
該導電填料可以為表面包覆銀粉、金粉、鎳粉等的銅粒子中的一種或幾種。The conductive filler may be one or more of copper particles coated with silver powder, gold powder, nickel powder and the like.
在本實施例中,該導電填料優選為表面包覆銀粉的銅粒子,即為銀包銅粉。In this embodiment, the conductive filler is preferably copper particles coated with silver powder on the surface, that is, silver-coated copper powder.
該添加劑可以為矽烷增粘劑、有機高分子型的防沉劑等。The additive may be a silane tackifier, an organic polymer type anti-settling agent, etc.
在本實施例中,該添加劑為矽烷增粘劑,其化學式為:。In this embodiment, the additive is a silane tackifier, and its chemical formula is: .
該電阻元件31位於該第一導電線路層14及該第二導電線路層24之間。The
在本實施例中,該電阻元件31分別與一條該第一導電線路141的該第一表面1411、第一側面1412及該第二導電線路層24的一條第二導電線路241的第二表面2411、第二側面2412相貼合且電連接。該電阻元件31的至少一與該第一側面1412相背的表面與該第一導電線路層14的第一導電線路141之間形成有第一間隙148,該電阻元件31的至少一與該第二側面2412相背的表面與該第二導電線路層24的第二導電線路241之間形成有第二間隙248。In this embodiment, the
由於該電阻元件31與該第一表面1411及該第二表面2411相貼合且電連接,使得該電阻元件31部分覆蓋該第一導電線路141及該第二導電線路241,可以增加該電阻元件31與該第一電路基板70及該第二電路基板80之間的接觸面積,進而增強該電阻元件31與該第一導電線路層14及該第二導電線路層24之間的結合力,防止該電阻元件31從該第一導電線路層14及該第二導電線路層24之間剝離。Since the
該膠層41迭設在該第一導電線路層14和第二導電線路層24之間且填充於該第一間隙148及該第二間隙248內。The
該電路板100還包括至少一貫穿該電路板100的導電通孔60,該導電通孔60電連接該第三導電線路層16、該第一導電線路層14、該第二導電線路層24及該第四導電線路層26。其中,該第一防焊層17及該第二防焊層27還填充於該導電通孔60內。The
請參閱圖1-12,本發明提供一種含有電阻元件31的電路板100的製作方法,其步驟如下:1-12, the present invention provides a method for manufacturing a
第一步,請參閱圖2~8,提供一第一電路基板中間體71、一膠層41及一第二電路基板中間體81。The first step, please refer to FIGS. 2-8, provides a first
具體地,請參閱圖3~4,該第一電路基板中間體71的製作方法包括如下步驟:Specifically, please refer to FIGS. 3 to 4, the manufacturing method of the first circuit board
首先,請參閱圖3,提供一第一覆銅基板10,該第一覆銅基板10包括一絕緣的第一基材層11、形成在該第一基材層11的相背兩表面上的第一銅箔層12和第二銅箔層13。First, referring to FIG. 3, a first copper-
其次,請參閱圖4,將該第一銅箔層12製作形成第一導電線路層14,進而形成該第一電路基板中間體71。Next, referring to FIG. 4, the first
具體地,該第一導電線路層14是經由影像轉移制程製作而成。Specifically, the first
其中,該第一導電線路層14包括至少一條第一導電線路141。每條該第一導電線路141包括一與該第一電路基板中間體71延伸方向平行的第一表面1411及與該第一表面1411垂直相連的第一側面1412。該第一表面1411遠離該第一基材層11。The first
請參閱圖5~6,該第二電路基板中間體81的製作方法包括如下步驟:Please refer to FIGS. 5-6. The manufacturing method of the second circuit substrate intermediate 81 includes the following steps:
首先,請參考圖5,提供一第二覆銅基板20,該第二覆銅基板20包括一絕緣的第二基材層21、形成在該第二基材層21的相背兩表面上的第三銅箔層22和第四銅箔層23。First, please refer to FIG. 5, a second copper-clad
其次,請參閱圖6,將該第三銅箔層22製作形成一第二導電線路層24,進而形成該第二電路基板中間體81。Next, referring to FIG. 6, the third
具體地,該第二導電線路層24是經由影像轉移制程製作而成。Specifically, the second
其中,該第二導電線路層24包括至少一條第二導電線路241。每條該第二導電線路241包括一與該第二電路基板80延伸方向平行的第二表面2411及一與該第二表面2411垂直相連的第二側面2412。該第二表面2411遠離該第二基材層21。The second
請參閱圖7~8,該膠層41的製作方法包括如下步驟:Please refer to FIGS. 7-8. The manufacturing method of the
首先,請參閱圖7,提供一膠片40。First, referring to FIG. 7, a
其次,請參閱圖8,在該膠片40上形成貫穿該膠片40的第一通槽414,進而形成該膠層41。Next, referring to FIG. 8, a first through-
具體地,可以通過沖型的方式形成該第一通槽414。Specifically, the first through
第二步,請參閱圖9,先將該膠層41壓合在該第二導電線路層24上,並提供一電阻材料30,將該電阻材料30印刷在該第二導電線路層24的導電線路間隙內,並使得該電阻材料30貫穿該第一通槽414。In the second step, please refer to FIG. 9, the
在本實施例中,該電阻材料30凸出於該膠層41。在其他實施例中,該電阻材料30還可以與該膠層41平齊。In this embodiment, the
具體地,該電阻材料30為一熱固化膠體,該電阻材料30與該第二導電線路層24的第二導電線路241的第二表面2411、第二側面2412相貼合且電連接。該電阻材料30的至少一與該第二側面2412相背的表面與該第二導電線路層24的第二導電線路241之間形成有第二間隙248,在壓合該膠層41的過程中,該膠層41填充於該第二間隙248內。Specifically, the
該電阻材料30用於製作電阻元件31。The
該電阻材料30為一種熱固化膠體,該電阻材料30主要由樹脂、硬化劑、觸媒、導電填料及添加劑攪拌混合而成。The
在該電阻材料30中,該樹脂所占的重量百分比為19.5~35%,該硬化劑所占的重量百分比為10~17%,該觸媒所占的重量百分比為0~1%,該導電填料所占的重量百分比為46~69%,該添加劑所占的重量百分比為0.2~2%。In the
該樹脂可以為單一樹脂,也可以為多種樹脂的混合物。The resin may be a single resin or a mixture of multiple resins.
在本實施例中,該樹脂包括環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚。其中,該環氧樹脂的結構式為:;該聚丙二醇二縮水甘油基醚的結構式為:。In this embodiment, the resin includes epoxy resin, dimer acid modified polyester, and polypropylene glycol diglycidyl ether. Among them, the structural formula of the epoxy resin is: ; The structural formula of the polypropylene glycol diglycidyl ether is: .
該硬化劑可以為脂肪胺固化劑、聚醯胺固化劑、脂環胺固化劑等常規硬化劑。The hardener may be a conventional hardener such as a fatty amine curing agent, a polyamide curing agent, an alicyclic amine curing agent.
該觸媒可以為咪唑類物質。The catalyst may be imidazole.
在本實施例中,該觸媒優選為2-十一烷基咪唑,該2-十一烷基咪唑的化學式為。In this embodiment, the catalyst is preferably 2-undecylimidazole, and the chemical formula of the 2-undecylimidazole is .
該導電填料可以為表面包覆銀粉、金粉、鎳粉等的銅粒子中的一種或幾種。The conductive filler may be one or more of copper particles coated with silver powder, gold powder, nickel powder and the like.
在本實施例中,該導電填料優選為表面包覆銀粉的銅粒子,即為銀包銅粉。In this embodiment, the conductive filler is preferably copper particles coated with silver powder on the surface, that is, silver-coated copper powder.
該添加劑可以為矽烷增粘劑、有機高分子型的防沉劑等。The additive may be a silane tackifier, an organic polymer type anti-settling agent, etc.
在本實施例中,該添加劑為矽烷增粘劑,其化學式為:。In this embodiment, the additive is a silane tackifier, and its chemical formula is: .
第三步,請參閱圖10,將該第一電路基板中間體71迭設在該第二電路基板中間體81上,並加熱加壓,使該第二電路基板中間體81與該第一電路基板中間體71粘合在一起。In the third step, please refer to FIG. 10, the first circuit board
其中,該電阻材料30與該第一導電線路141的該第一表面1411、第一側面1412相貼合且電連接,該電阻材料30的至少一與該第一側面1412相背的表面與該第一導電線路層14的第一導電線路141之間形成有第一間隙148,該膠層41在加熱加壓的過程中,填充入該第一間隙148內。Wherein, the
另外,在加熱加壓過程中,該電阻材料30會固化成型,固化成型後的該電阻材料30為電阻元件31。In addition, during the heating and pressurizing process, the
由於該電阻元件31位於該第一電路基板中間體71與該第二電路基板中間體81之間,可以通過調整該膠層41的厚度,控制該電阻元件31的厚度,進而控制該電阻元件31的厚度方向的截面的截面積的大小,以在電阻率及電阻長度不變的情況下,改變該電阻元件31的電阻值的大小。Since the
第四步,請參閱圖11,在壓合後的該第一電路基板中間體71及該第二電路基板中間體81上形成至少一導電通孔60。In the fourth step, please refer to FIG. 11, at least one conductive via 60 is formed on the first circuit substrate
其中,該導電通孔60電連接該第一導電線路層14、該第二導電線路層24、該第二銅箔層13及該第四銅箔層23。The conductive via 60 is electrically connected to the first
具體地,可以先通過鐳射蝕孔或機械鑽孔形成至少一通孔,再通過電鍍的方法在該通孔的壁上形成一電鍍層,進而形成該導電通孔60。Specifically, at least one through hole may be formed by laser etching or mechanical drilling, and then a plating layer is formed on the wall of the through hole by electroplating, and then the conductive through
第五步,請參閱圖12,將該第二銅箔層13及該第四銅箔層23分別製作形成第三導電線路層16及第四導電線路層26。In the fifth step, referring to FIG. 12, the second
其中,該導電通孔60電連接該第一導電線路層14、該第二導電線路層24、該第三導電線路層16及該第四導電線路層26。The conductive via 60 is electrically connected to the first
第六步,請參閱圖1,在該第三導電線路層16的遠離該第一基材層11的表面上形成一第一防焊層17,在該第四導電線路層26的遠離該第二基材層21的表面上形成一第二防焊層27,並使得該第一防焊層17及該第二防焊層27填充於該導電通孔60內,進而形成該電路板100。Sixth step, please refer to FIG. 1, a first solder resist
請參閱圖13,本發明第二實施例提供一種電路板200,該電路板200與該電路板100的結構基本相同,其區別點在於,該電阻元件31並未覆蓋該第一導電線路141及該第二導電線路241。也即,該電阻元件31僅與該第一側面1412及該第二側面2412相貼合且電連接,不與該第一表面1411及該第二表面2411相貼合且電連接。Referring to FIG. 13, a second embodiment of the present invention provides a circuit board 200. The structure of the circuit board 200 and the
當然,該電阻元件31也可以只覆蓋該第一導電線路141及該第二導電線路241中的其中一個。Of course, the
與現有技術相比,本發明提供的製作電阻元件的電阻材料的製作成本低。Compared with the prior art, the manufacturing cost of the resistance material provided by the present invention is low.
另外,本發明提供的電路板及製作方法,採用上述電阻材料作為該電阻元件的製作材料,可以通過印刷的方式將電阻元件形成兩個電路基板中間體中間,並在增層的過程中固化成型,可以簡化制程。In addition, the circuit board and the manufacturing method provided by the present invention adopt the above-mentioned resistive material as the manufacturing material of the resistive element, and the resistive element can be formed in the middle of two circuit substrate intermediates by printing, and cured and formed during the build-up process , Can simplify the process.
以上所述,僅是本發明的較佳實施方式而已,並非對本發明任何形式上的限制,雖然本發明已是較佳實施方式揭露如上,並非用以限定本發明,任何熟悉本專業的技術人員,在不脫離本發明技術方案範圍內,當可利用上述揭示的技術內容做出些許更動或修飾為等同變化的等效實施方式,但凡是未脫離本發明技術方案內容,依據本發明的技術實質對以上實施方式所做的任何簡單修改、等同變化與修飾,均仍屬於本發明技術方案的範圍內。The above is only the preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as the preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art , Without departing from the scope of the technical solutions of the present invention, when the technical contents disclosed above can be used to make some changes or modifications to equivalent equivalent implementations, but without departing from the technical solutions of the present invention, the technical essence of the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present invention.
100,200‧‧‧電路板
10‧‧‧第一覆銅基板
11‧‧‧第一基材層
12‧‧‧第一銅箔層
13‧‧‧第二銅箔層
14‧‧‧第一導電線路層
141‧‧‧第一導電線路
1411‧‧‧第一表面
1412‧‧‧第一側面
148‧‧‧第一間隙
20‧‧‧第二覆銅基板
21‧‧‧第二基材層
22‧‧‧第三銅箔層
23‧‧‧第四銅箔層
24‧‧‧第二導電線路層
241‧‧‧第二導電線路
2411‧‧‧第二表面
2412‧‧‧第二側面
248‧‧‧第二間隙
30‧‧‧電阻材料
31‧‧‧電阻元件
40‧‧‧膠片
41‧‧‧膠層
414‧‧‧第一通槽
60‧‧‧導電通孔
16‧‧‧第三導電線路層
17‧‧‧第一防焊層
26‧‧‧第四導電線路層
27‧‧‧第二防焊層
70‧‧‧第一電路基板
71‧‧‧第一電路基板中間體
80‧‧‧第二電路基板
81‧‧‧第二電路基板中間體
100, 200‧‧‧
圖1是本發明第一實施例提供的電路板的剖視圖。FIG. 1 is a cross-sectional view of a circuit board provided by a first embodiment of the present invention.
圖2是本發明第一實施例提供的第一電路基板中間體、一膠層及一第二電路基板中間體的剖視圖。2 is a cross-sectional view of a first circuit substrate intermediate body, an adhesive layer, and a second circuit substrate intermediate body provided by the first embodiment of the present invention.
圖3是本發明提供的一第一覆銅基板的剖視圖。3 is a cross-sectional view of a first copper-clad substrate provided by the present invention.
圖4是將圖3所示的第一覆銅基板的一個銅箔層製作形成第一導電線路層,形成圖2所示的第一電路基板中間體的剖視圖。4 is a cross-sectional view of forming a first conductive circuit layer by forming one copper foil layer of the first copper-clad substrate shown in FIG. 3 to form an intermediate body of the first circuit substrate shown in FIG. 2.
圖5是本發明第一實施例提供的第二覆銅基板的剖視圖。5 is a cross-sectional view of a second copper-clad substrate provided by the first embodiment of the present invention.
圖6是將圖5所示的第二覆銅基板的一個銅箔層製作形成第二導電線路層,進而得到圖2所示的第二電路基板中間體的剖視圖。6 is a cross-sectional view of forming a second conductive circuit layer by forming one copper foil layer of the second copper-clad substrate shown in FIG. 5 and further obtaining the intermediate body of the second circuit substrate shown in FIG. 2.
圖7是本發明第一實施例提供的膠片的剖視圖。7 is a cross-sectional view of a film provided by the first embodiment of the present invention.
圖8是將圖7所示的膠片製作形成圖2所示的膠層的剖視圖。8 is a cross-sectional view of forming the film shown in FIG. 7 to form the adhesive layer shown in FIG. 2.
圖9是將圖2所示的膠層壓合在圖6所示的第二導電線路層上,並提供一製作電阻的膠體,將膠體形成在該第一電路基板中間體和該第二電路基板中間體之間的剖視圖。FIG. 9 is to laminate the glue shown in FIG. 2 on the second conductive circuit layer shown in FIG. 6 and provide a glue for making a resistor, and the glue is formed on the intermediate of the first circuit substrate and the second circuit Cross-sectional view between substrate intermediates.
圖10是將圖2中的該第一電路基板中間體形成在該第二電路基板中間體上並加熱加壓後的剖視圖。10 is a cross-sectional view of the first circuit board intermediate body of FIG. 2 formed on the second circuit board intermediate body and heated and pressurized.
圖11是在圖10所示的該第一電路基板中間體及該第二電路基板中間體上形成導電通孔後的剖視圖。FIG. 11 is a cross-sectional view after forming conductive vias in the first circuit board intermediate body and the second circuit board intermediate body shown in FIG. 10.
圖12是將圖3所示的第二銅箔層及圖5所示的第四銅箔層分別製作形成第三導電線路層及第四導電線路層後的剖視圖。12 is a cross-sectional view of the second copper foil layer shown in FIG. 3 and the fourth copper foil layer shown in FIG. 5 after forming a third conductive circuit layer and a fourth conductive circuit layer, respectively.
圖13是本發明第二實施例提供的一種電路板的剖視圖。13 is a cross-sectional view of a circuit board provided by a second embodiment of the present invention.
100‧‧‧電路板 100‧‧‧ circuit board
11‧‧‧第一基材層 11‧‧‧First substrate layer
14‧‧‧第一導電線路層 14‧‧‧ First conductive circuit layer
141‧‧‧第一導電線路 141‧‧‧The first conductive circuit
1411‧‧‧第一表面 1411‧‧‧First surface
1412‧‧‧第一側面 1412‧‧‧First side
148‧‧‧第一間隙 148‧‧‧ First gap
24‧‧‧第二導電線路層 24‧‧‧Second conductive circuit layer
241‧‧‧第二導電線路 241‧‧‧Second Conducting Circuit
2411‧‧‧第二表面 2411‧‧‧Second surface
2412‧‧‧第二側面 2412‧‧‧Second side
248‧‧‧第二間隙 248‧‧‧Second gap
31‧‧‧電阻元件 31‧‧‧Resistance element
41‧‧‧膠層 41‧‧‧adhesive layer
414‧‧‧第一通槽 414‧‧‧The first slot
60‧‧‧導電通孔 60‧‧‧conductive through hole
16‧‧‧第三導電線路層 16‧‧‧The third conductive circuit layer
17‧‧‧第一防焊層 17‧‧‧First solder mask
26‧‧‧第四導電線路層 26‧‧‧The fourth conductive circuit layer
27‧‧‧第二防焊層 27‧‧‧Second solder mask
70‧‧‧第一電路基板 70‧‧‧ First circuit board
80‧‧‧第二電路基板 80‧‧‧ Second circuit board
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107124864A TWI669035B (en) | 2018-07-18 | 2018-07-18 | Printed circuit board and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107124864A TWI669035B (en) | 2018-07-18 | 2018-07-18 | Printed circuit board and method for manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI669035B TWI669035B (en) | 2019-08-11 |
| TW202007243A true TW202007243A (en) | 2020-02-01 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107124864A TWI669035B (en) | 2018-07-18 | 2018-07-18 | Printed circuit board and method for manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI669035B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113133202B (en) * | 2020-01-15 | 2022-05-27 | 碁鼎科技秦皇岛有限公司 | Embedded capacitor circuit board and manufacturing method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW457652B (en) * | 2000-10-03 | 2001-10-01 | Advanced Semiconductor Eng | Substrate structure and manufacture thereof having build-in passive elements |
| JP2008210986A (en) * | 2007-02-26 | 2008-09-11 | Mitsubishi Electric Corp | Ceramic multilayer board and manufacturing method thereof |
| JPWO2013118455A1 (en) * | 2012-02-08 | 2015-05-11 | パナソニックIpマネジメント株式会社 | Resistance forming substrate and manufacturing method thereof |
| CN103881300B (en) * | 2012-12-22 | 2016-08-24 | 富葵精密组件(深圳)有限公司 | Epoxy resin composite material and circuit board and preparation method thereof |
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2018
- 2018-07-18 TW TW107124864A patent/TWI669035B/en active
Also Published As
| Publication number | Publication date |
|---|---|
| TWI669035B (en) | 2019-08-11 |
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