[go: up one dir, main page]

TW201947399A - USB port test system and method for dynamically testing USB port - Google Patents

USB port test system and method for dynamically testing USB port Download PDF

Info

Publication number
TW201947399A
TW201947399A TW107116258A TW107116258A TW201947399A TW 201947399 A TW201947399 A TW 201947399A TW 107116258 A TW107116258 A TW 107116258A TW 107116258 A TW107116258 A TW 107116258A TW 201947399 A TW201947399 A TW 201947399A
Authority
TW
Taiwan
Prior art keywords
signal
usb
test
type
port
Prior art date
Application number
TW107116258A
Other languages
Chinese (zh)
Other versions
TWI709851B (en
Inventor
范綱倫
孟憲明
孫武雄
廖祝湘
張基霖
廖偉然
張士杰
Original Assignee
技嘉科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 技嘉科技股份有限公司 filed Critical 技嘉科技股份有限公司
Priority to TW107116258A priority Critical patent/TWI709851B/en
Publication of TW201947399A publication Critical patent/TW201947399A/en
Application granted granted Critical
Publication of TWI709851B publication Critical patent/TWI709851B/en

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)

Abstract

The invention provides an USB port test system connecting and testing an USB port, including: a trigger signal source sending a first signal and a second signal; a logic circuit sending a trigger signal of a specific USB type according to the combination of the logic levels of the first signal and the second signal; and a control module receiving the trigger signal and sending a test signal of an USB type represented by the trigger signal to the USB port.

Description

USB連接埠測試系統及動態測試USB連接埠之方 法    USB port test system and method for dynamically testing USB port   

本發明係有關於一種USB連接埠測試系統及動態測試USB連接埠之方法,且特別有關於能夠有效率地測試大量的USB連接埠之USB連接埠測試系統及動態測試USB連接埠之方法。 The invention relates to a USB port test system and a method for dynamically testing USB ports, and particularly to a USB port test system and a method for dynamically testing USB ports that can efficiently test a large number of USB ports.

主機板產品的測試中包括測試USB(通用序列匯流排,Universal Serial Bus)連接埠的規格及速率是否合乎標準。由於主機板的USB連接埠可以多達20至30個,如果同時間對所有的USB連接埠插入治具進行測試,因為系統辨識USB的數量限制最大值為21個埠位,當超過此數量限制時,系統就會出現無法辨識USB連接埠的問題。 Testing of motherboard products includes testing whether the specifications and speed of the USB (Universal Serial Bus) ports are up to standard. Since the motherboard's USB ports can be as many as 20 to 30, if all USB ports are tested at the same time, the maximum number of USB ports recognized by the system is 21 ports. When this number is exceeded , The system will fail to recognize the USB port.

為了解決上述數量限制的問題,習知技術會透過分開插拔或是將USB連接埠分為不同的作業系統(例如DOS與Windows)來做測試。然而,前者的作法需要對USB連接埠循序插拔測試,測試效率極差,後者的作法則是需要因應作業系統的不同而增加USB測試治具的數量。再者,USB連接埠包括3.1、3.0、2.0等型態,要如何有效率地測試USB連接埠的各個 型態是否合乎規格,也是一個需要改善的問題。 In order to solve the problem of the above-mentioned quantity limitation, the conventional technology will test by separately plugging or unplugging or dividing the USB port into different operating systems (such as DOS and Windows). However, the former method requires sequential plug-in testing of the USB port, and the test efficiency is extremely poor. The latter method requires the increase of the number of USB test fixtures according to the different operating systems. In addition, USB ports include 3.1, 3.0, 2.0 and other types. How to efficiently test whether each type of USB port meets specifications is also a problem that needs to be improved.

有鑑於上述的問題點,本發明的目的是提出一種USB連接埠測試系統及動態測試USB連接埠之方法,能夠動態地對於大量的USB連接埠進行型態的切換測試,藉此能夠減省測試治具的數量並且提高測試效率。 In view of the above problems, an object of the present invention is to provide a USB port test system and a method for dynamically testing USB ports, which can dynamically perform type switching tests on a large number of USB ports, thereby reducing testing. The number of fixtures and improve test efficiency.

為了解決上述問題,本發明提出了一種USB連接埠測試系統,連接並測試一USB連接埠,包括:一觸發信號源,送出一第一信號及一第二信號;一邏輯電路,根據該第一信號及該第二信號的邏輯位準的組合,送出對應特定的USB型態的一觸發信號;以及一控制模組,接收該觸發信號,送出該觸發信號所表示的USB型態之測試信號至該USB連接埠。 In order to solve the above problems, the present invention provides a USB port test system for connecting and testing a USB port, which includes: a trigger signal source, sending a first signal and a second signal; a logic circuit according to the first The combination of the logic level of the signal and the second signal sends a trigger signal corresponding to the specific USB type; and a control module receives the trigger signal and sends a test signal of the USB type indicated by the trigger signal to The USB port.

在上述USB連接埠測試系統中,該USB連接埠測試系統具有複數個該控制模組,用以對複數個USB連接埠測試,各個該控制模組收到該觸發信號後,會依序送出該測試信號。 In the above USB port test system, the USB port test system has a plurality of the control modules for testing the plurality of USB ports. After each of the control modules receives the trigger signal, it will send the Test signal.

在上述USB連接埠測試系統中,該控制模組包括:一輸出埠位,連接至該USB連接埠;一控制晶片,根據該觸發信號,送出該測試信號;以及一開關電路,根據該觸發信號,選擇該測試信號要輸出至該輸出埠位的路徑。 In the above USB port test system, the control module includes: an output port connected to the USB port; a control chip that sends the test signal according to the trigger signal; and a switch circuit according to the trigger signal , Select the path to which the test signal is to be output.

在上述USB連接埠測試系統中,該控制模組更包括:一擴充連接埠,允許一外部USB裝置的連接。該觸發信號源更送出一第三信號及一第四信號,該邏輯電路根據該第三信號及該第四信號的邏輯位準的組合,送出對應特定的USB型態的一選擇信號。該開關電路根據該選擇信號,選擇將該外部 USB裝置連接至該輸出埠位。 In the above USB port test system, the control module further includes: an expansion port that allows an external USB device to be connected. The trigger signal source further sends a third signal and a fourth signal, and the logic circuit sends a selection signal corresponding to a specific USB type according to a combination of the logic levels of the third signal and the fourth signal. The switch circuit selects to connect the external USB device to the output port according to the selection signal.

在上述USB連接埠測試系統中,該第一信號及該第二信號皆為低位準時,該控制模組送出對應一第一USB型態的該測試信號,該第一信號為高位準且該第二信號為低位準時,該控制模組送出對應一第二USB型態的該測試信號。 In the above USB port test system, when the first signal and the second signal are both at a low level, the control module sends the test signal corresponding to a first USB type, the first signal is at a high level and the first signal When the two signals are at a low level, the control module sends the test signal corresponding to a second USB type.

在上述USB連接埠測試系統中,該第一USB型態是USB 3.1型態,該第二USB型態是USB 2.0型態。又或者,該第一USB型態是USB 3.0型態,該第二USB型態是USB 2.0型態。 In the above USB port test system, the first USB type is a USB 3.1 type, and the second USB type is a USB 2.0 type. Alternatively, the first USB type is a USB 3.0 type, and the second USB type is a USB 2.0 type.

根據本發明另一個觀點,本發明也提供一種動態測試USB連接埠之方法,應用於包括包括一觸發信號源、一邏輯電路、以及複數的控制模組的一USB連接埠測試系統。該動態測試USB連接埠之方法包括:將該USB連接埠測試系統連接至作為測試對象之至少一USB連接埠;利用該信號源送出低位準的一第一信號以及一第二信號;利用該邏輯電路接收該第一信號及該第二信號,並送出對應一第一USB型態的一觸發信號;利用該複數的控制模組接收該觸發信號,並依序送出該第一USB型態的一測試信號至各個該USB連接埠;以及檢查該各個USB連接埠在該第一USB型態下是否符合標準。 According to another aspect of the present invention, the present invention also provides a method for dynamically testing a USB port, which is applied to a USB port test system including a trigger signal source, a logic circuit, and a plurality of control modules. The method for dynamically testing a USB port includes: connecting the USB port test system to at least one USB port as a test object; using the signal source to send a low-level first signal and a second signal; and using the logic The circuit receives the first signal and the second signal, and sends a trigger signal corresponding to a first USB type; using the plurality of control modules to receive the trigger signal, and sequentially sends a first USB type Test signals to each of the USB ports; and check whether each of the USB ports meets the standard under the first USB type.

上述動態測試USB連接埠之方法,更包括:利用該信號源送出高位準的一第一信號以及低位準的一第二信號;利用該邏輯電路接收該第一信號及該第二信號,並送出對應一第二USB型態的一觸發信號;利用該複數的控制模組接收該觸發信號,並依序送出該第二USB型態的該測試信號至各個該USB連接埠;以及檢查該各個USB連接埠在該第二USB型態下是否 符合標準。 The method for dynamically testing a USB port further includes: using the signal source to send a high-level first signal and a low-level second signal; using the logic circuit to receive the first signal and the second signal, and sending A trigger signal corresponding to a second USB type; using the plurality of control modules to receive the trigger signal and sequentially sending the test signal of the second USB type to each of the USB ports; and checking each USB Whether the port complies with the standard in the second USB type.

在上述動態測試USB連接埠之方法中,該第一USB型態的測試信號用以測試USB連接埠是否合乎USB 3.1及USB 3.0型態的規格及速率,該第二USB型態的測試信號用以測試USB連接埠是否合乎USB 2.0型態的規格及速率。 In the above method for dynamically testing a USB port, the test signal of the first USB type is used to test whether the USB port meets the specifications and rates of the USB 3.1 and USB 3.0 types, and the test signal of the second USB type is used To test whether the USB port meets the USB 2.0 type specifications and speed.

根據上述的USB連接埠測試系統及動態測試USB連接埠之方法,能夠藉由動態地對於大量的USB連接埠進行型態的切換測試,來減省測試治具的數量並且提高測試效率。 According to the above-mentioned USB port test system and method for dynamically testing USB ports, it is possible to reduce the number of test fixtures and improve test efficiency by dynamically performing type switching tests on a large number of USB ports.

10‧‧‧觸發信號源 10‧‧‧Trigger signal source

20‧‧‧測試治具 20‧‧‧test fixture

21‧‧‧接線座 21‧‧‧Terminal Block

22‧‧‧邏輯電路 22‧‧‧Logic Circuit

23、23a、23b、23c、23d‧‧‧控制模組 23, 23a, 23b, 23c, 23d‧‧‧ Control Module

231、231a、231b、231c、231d‧‧‧輸出埠位 231, 231a, 231b, 231c, 231d‧‧‧‧ output port

232、232a、232b、232c、232d‧‧‧控制晶片 232, 232a, 232b, 232c, 232d‧‧‧control chip

233、233a、233b、233c、233d‧‧‧開關電路 233, 233a, 233b, 233c, 233d‧‧‧ Switch circuit

234、234a、234b、234c、234d‧‧‧擴充連接埠 234, 234a, 234b, 234c, 234d‧‧‧Expansion ports

DUT‧‧‧主機板 DUT‧‧‧Motherboard

usb、usb1、usb2、usb3、usb4‧‧‧USB連接埠 usb, usb1, usb2, usb3, usb4‧‧‧USB ports

第1圖係本發明之USB連接埠測試系統及USB連接埠之概要示意圖。 FIG. 1 is a schematic diagram of a USB port test system and a USB port according to the present invention.

第2圖係本發明之USB連接埠測試系統對USB連接埠進行測試時之概要示意圖。 FIG. 2 is a schematic diagram of the USB port test system of the present invention when testing a USB port.

第3圖係本發明之USB觸發信號送出的信號的時序圖。 FIG. 3 is a timing diagram of signals sent by the USB trigger signal of the present invention.

第4圖係本發明之USB觸發信號送出的信號的另一時序圖。 FIG. 4 is another timing diagram of signals sent by the USB trigger signal of the present invention.

第5圖係本發明之USB連接埠測試系統在使用外部USB裝置連接之擴充功能時之概要示意圖。 FIG. 5 is a schematic diagram of the USB port test system of the present invention when an external USB device is connected to an extended function.

以下之說明提供了許多不同的實施例、或是例子,用來實施本揭露之不同特徵。以下特定例子所描述的元件和排列方式,僅用來精簡地表達本揭露,其僅作為例子,而並非用以限制本揭露。 The following description provides many different embodiments, or examples, for implementing different features of the present disclosure. The components and arrangements described in the following specific examples are only used to express the disclosure concisely. They are only examples, and are not intended to limit the disclosure.

此外,本說明書於不同的例子中沿用了相同的元 件標號及/或文字。前述之沿用僅為了簡化以及明確,並不表示於不同的實施例以及設定之間必定有關聯。 In addition, this specification uses the same component numbers and / or text in different examples. The foregoing use is merely for simplification and clarity, and does not mean that there must be a correlation between different embodiments and settings.

圖式中之形狀、尺寸、以及厚度可能為了清楚說明之目的而未依照比例繪製或是被簡化,僅提供說明之用。 The shapes, sizes, and thicknesses in the drawings may not be drawn to scale or simplified for clarity, and are provided for illustration purposes only.

參照第1圖來說明本發明之USB連接埠測試系統。第1圖係本發明之USB連接埠測試系統及USB連接埠之概要示意圖。在第1圖中,做為測試對象的主機板DUT具有複數個USB連接埠usb1、usb2、usb3、usb4(總稱以元件符號usb表示)。需注意的是,圖式中的連接埠數目係為了簡化而僅以4個為例,本發明可應用於具有多達30個連接埠的主機板上。做為本發明的USB連接埠測試系統包括觸發信號源10以及測試治具20兩個部分。觸發信號源10是用來供給信號給測試治具20,使測試冶具20開始進行測試動作。測試冶具20包括接線座21、邏輯電路22、複數的控制模組23a、23b、23c、23d(總稱以元件符號23表示)。控制模組23的數目會大於等於主機板DUT的USB連接埠usb的數目,在測試時各個控制模組23a、23b、23c、23d會分別與USB連接埠usb1、usb2、usb3、usb4連接並各自送出測試信號。需注意的是,圖式中的控制模組的數目係為了簡化而僅以4個為例,實際上一個測試治具20不以4個控制模組23為限,另外,本發明也可以藉由串並聯複數的測試治具20來增加控制模組23的總數,使所有的USB連接埠usb可在同一次測試動作當中被測試。 The USB port test system of the present invention will be described with reference to FIG. 1. FIG. 1 is a schematic diagram of a USB port test system and a USB port according to the present invention. In the first figure, the motherboard DUT as a test object has a plurality of USB ports usb1, usb2, usb3, and usb4 (collectively referred to as a component symbol usb). It should be noted that the number of the ports in the figure is only 4 for the sake of simplicity. The present invention can be applied to a motherboard with up to 30 ports. The USB port test system according to the present invention includes a trigger signal source 10 and a test fixture 20. The trigger signal source 10 is used to supply a signal to the test fixture 20 so that the test fixture 20 starts a test operation. The test tool 20 includes a terminal block 21, a logic circuit 22, and a plurality of control modules 23a, 23b, 23c, and 23d (collectively referred to as a component symbol 23). The number of control modules 23 will be greater than or equal to the number of USB ports usb on the motherboard DUT. During the test, each control module 23a, 23b, 23c, 23d will be connected to USB ports usb1, usb2, usb3, usb4 and each Send a test signal. It should be noted that the number of control modules in the diagram is only four for the sake of simplicity. In fact, one test fixture 20 is not limited to four control modules 23. In addition, the present invention can also borrow The total number of control modules 23 is increased by a plurality of test fixtures 20 connected in series and parallel, so that all USB ports usb can be tested in the same test operation.

接線座21上有複數個電性接點,分別接收來自觸發信號源10的複數個信號,並輸出至邏輯電路22。邏輯電路22 根據接收到來自接線座21的信號邏輯位準的組合而送出對應不同USB型態的測試之觸發信號至各個控制模組23a、23b、23c、23d。複數的控制模組23a、23b、23c、23d根據來自邏輯電路22的觸發信號而依序地對各個USB連接埠usb1、usb2、usb3、usb4送出測試信號。主機板DUT側可根據各個USB連接埠usb1、usb2、usb3、usb4接收到測試信號的狀況,來判斷各個USB連接埠usb1、usb2、usb3、usb4的規格或速率是否合乎標準。 The connection base 21 has a plurality of electrical contacts, and receives a plurality of signals from the trigger signal source 10 respectively, and outputs the signals to the logic circuit 22. The logic circuit 22 sends trigger signals corresponding to tests of different USB types to the control modules 23a, 23b, 23c, and 23d according to the combination of the logic levels of the signals received from the terminal block 21. The plurality of control modules 23a, 23b, 23c, and 23d sequentially send test signals to each of the USB ports usb1, usb2, usb3, and usb4 according to a trigger signal from the logic circuit 22. The DUT side of the motherboard can determine whether the specifications or speeds of the USB ports usb1, usb2, usb3, and usb4 are in compliance with the standards according to the status of each USB port usb1, usb2, usb3, usb4 receiving test signals.

接著,進一步說明本發明的USB連接埠測試系統的細部結構及該系統的動態測試USB連接埠之方法。第2圖係本發明之USB連接埠測試系統對USB連接埠進行測試時之概要示意圖。如第2圖所示,每一個控制模組23,包括:輸出埠位231、控制晶片232、開關電路233、擴充連接埠234。要進行USB連接埠usb測試時,測試治具20的各個輸出埠位231a、231b、231c、231d分別透過USB纜線連接到USB連接埠usb1、usb2、usb3、usb4,然後由觸發信號源10送出信號來開始進行測試。 Next, the detailed structure of the USB port test system of the present invention and the method for dynamically testing the USB port of the system will be further explained. FIG. 2 is a schematic diagram of the USB port test system of the present invention when testing a USB port. As shown in FIG. 2, each control module 23 includes: an output port 231, a control chip 232, a switch circuit 233, and an expansion port 234. To perform a USB test on the USB port, each output port 231a, 231b, 231c, and 231d of the test fixture 20 is connected to the USB ports usb1, usb2, usb3, and usb4 through the USB cable, and then sent by the trigger signal source 10. Signal to start testing.

在本發明的一個實施型態中,觸發信號源10至少會送出兩個脈波信號,藉由這兩個信號的高低位準的組合,來決定要測試USB連接埠usb的型態。現今,USB裝置已經有多個修訂版本,目前主流為2.0、3.0、3.1三種型態,由於2.0型態與3.0/3.1型態使用不同的傳輸腳位,因此,在測試上必須分開進行。而3.0及3.1型態都使用相同的傳輸腳位,因此只要根據測試時的傳輸速度就能判斷是否符合3.0型態或3.1型態的規格。在本發明中,觸發信號源10送出第一信號31OE及第二信號 20OE。當第二信號20OE位於高位準時,無論第一信號31OE的位準高低,表示測試關閉。當第一信號31OE及第二信號20OE都位於低位準時,表示要進行USB3.0/3.1型態的規格測試。當第一信號31OE位於高位準,但第二信號20OE都位於低位準時,表示要進行USB2.0型態的規格測試。 In one embodiment of the present invention, the trigger signal source 10 sends at least two pulse wave signals. The combination of the high and low levels of these two signals determines the type of the USB port to be tested. Currently, there are multiple revisions of USB devices. Currently, there are three types of 2.0, 3.0, and 3.1. Because the 2.0 and 3.0 / 3.1 types use different transmission pins, they must be tested separately. The 3.0 and 3.1 types both use the same transmission pin, so you can determine whether it meets the specifications of the 3.0 type or 3.1 type according to the transmission speed during the test. In the present invention, the trigger signal source 10 sends a first signal 31OE and a second signal 20OE. When the second signal 20OE is at a high level, regardless of the level of the first signal 31OE, the test is closed. When the first signal 31OE and the second signal 20OE are both at a low level, it indicates that the USB3.0 / 3.1 type specification test is to be performed. When the first signal 31OE is at a high level, but the second signal 20OE is at a low level, it indicates that the USB2.0 type specification test is to be performed.

根據上述的第一信號31OE及第二信號20OE的高低位準組合,在一個實施例中,本發明的觸發信號源10在進行測試時會送出如第3圖所示的信號波形圖。如第3圖所示,一開始觸發信號源10送出的第一信號31OE及第二信號20OE都位於高位準,此時為測試關閉期間。接著,由於實際上第一信號31OE及第二信號20OE位準改變時裝置反應速度不一致,所以實務上先將第一信號31OE降到低位準,此時仍然處於關閉期間。第一信號31OE降到低位準後經過極短的延遲時間後,第二信號20OE也從高位準下降到低位準,進入測時期間,開始進行USB3.0/3.1型態的測試。USB3.0/3.1型態測試完成後將第二信號20OE維持在低位準並將第一信號31OE上升到高位準,緊接著進行USB2.0型態的測試。USB2.0型態測試完成後,將第二信號20OE上升到高位準,結束對USB連接埠的測試。 According to the combination of the high and low levels of the first signal 31OE and the second signal 20OE described above, in one embodiment, the trigger signal source 10 of the present invention sends a signal waveform diagram as shown in FIG. 3 during a test. As shown in FIG. 3, the first signal 31OE and the second signal 20OE sent from the trigger signal source 10 at the beginning are both at a high level, and this is the test shutdown period. Next, since the response speed of the device is inconsistent when the levels of the first signal 31OE and the second signal 20OE are actually changed, in practice, the first signal 31OE is first lowered to a low level, and at this time, it is still in the shutdown period. After a short delay time after the first signal 31OE drops to the low level, the second signal 20OE also drops from the high level to the low level, and enters the time period to start the USB3.0 / 3.1 type test. After the USB3.0 / 3.1 type test is completed, the second signal 20OE is maintained at a low level and the first signal 31OE is raised to a high level, followed by a USB2.0 type test. After the USB2.0 type test is completed, the second signal 20OE is raised to a high level, and the test of the USB port is ended.

在本發明的另一個實施例中、,觸發信號源10在進行測試時可送出如第4圖所示的信號波形圖。如第4圖所示,一開始觸發信號源10送出的第一信號31OE及第二信號20OE都位於高位準,此時為測試關閉期間。接著,先將第一信號31OE降到低位準,經過極短的延遲時間後再第二信號20OE從高位準下降到低位準,進入測時期間。此時進行的是USB3.0/3.1型態 的測試。USB3.0/3.1型態測試完成後將第一信號31OE及第二信號20OE都上升到高位準,關閉測試。然後再降低第二信號20OE至低位準,進行USB2.0型態的測試。USB2.0型態測試完成後,將第二信號20OE上升到高位準,結束對USB連接埠的測試。在第4圖的信號送出時序中,由於USB3.0/3.1型態的測試期間與USB2.0型態的測試期間隔開,可以確保USB2.0型態的測試不會受到前一測試的影響。 In another embodiment of the present invention, the trigger signal source 10 may send a signal waveform diagram as shown in FIG. 4 during a test. As shown in FIG. 4, the first signal 31OE and the second signal 20OE sent from the trigger signal source 10 at the beginning are both at a high level, and this is the test shutdown period. Then, the first signal 31OE is first lowered to a low level, and after a short delay time, the second signal 20OE is lowered from a high level to a low level, and enters a time measurement period. The USB3.0 / 3.1 type test is performed at this time. After the USB3.0 / 3.1 type test is completed, both the first signal 31OE and the second signal 20OE are raised to a high level, and the test is closed. Then lower the second signal 20OE to a low level, and perform a USB2.0 type test. After the USB2.0 type test is completed, the second signal 20OE is raised to a high level, and the test of the USB port is ended. In the signal sending sequence of Figure 4, because the USB3.0 / 3.1 type test period is separated from the USB2.0 type test period, it can ensure that the USB2.0 type test will not be affected by the previous test. .

回到第2圖,開始進行USB連接埠usb測試時,觸發信號源10送出第一信號31OE及第二信號20OE至測試治具20的接線座21,再傳遞給邏輯電路22。邏輯電路22根據第一信號31OE及第二信號20OE的高低位準關係,送出USB3.1/3.0型態的觸發信號(當一信號31OE及第二信號20OE都是低位準)或者是USB2.0型態的觸發信號(當一信號31OE為高位準且第二信號20OE為低位準)至控制模組23a中的開關電路233a。開關電路233a根據觸發信號來選擇要輸出測試信號的路徑(USB3.1/3.0型態的觸發信號時選擇USB3.1/3.0的信號腳位,USB2.0型態的觸發信號時選擇USB2.0的信號腳位),並且將該觸發信號傳給控制晶片232a以及下一個控制模組23b中的開關電路233b。控制晶片232a根據觸發信號的類型選擇將USB3.1/3.0型態或2.0型態的測試信號通過開關電路233a所選擇的路徑送出到輸出埠位231a。輸出埠位231a將測試信號送出到USB連接埠usb1來進行測試。另外,下一個控制模組23b收到來自開關電路233a的觸發信號後,會進行與控制模組23a相同的動作,而送出對USB連接埠usb2測試的測試信號。依此類推,各個控制模組 23a、23b、23c、23d會依序(有時間差)地送出測試信號對USB連接埠usb1、usb2、usb3、usb4進行測試。 Returning to FIG. 2, when the USB test of the USB port is started, the trigger signal source 10 sends the first signal 31OE and the second signal 20OE to the terminal block 21 of the test fixture 20, and then transmits it to the logic circuit 22. The logic circuit 22 sends a USB3.1 / 3.0 type trigger signal (when a signal 31OE and a second signal 20OE are both low level) or USB2.0 according to the high-low level relationship of the first signal 31OE and the second signal 20OE. The trigger signal of the type (when a signal 31OE is at a high level and a second signal 20OE is at a low level) goes to the switch circuit 233a in the control module 23a. The switch circuit 233a selects the path to output the test signal according to the trigger signal (for the USB3.1 / 3.0 type trigger signal, select the USB3.1 / 3.0 signal pin, and for the USB2.0 type trigger signal, select USB2.0 Signal pin), and the trigger signal is transmitted to the control chip 232a and the switch circuit 233b in the next control module 23b. The control chip 232a sends the test signal of USB3.1 / 3.0 type or 2.0 type to the output port 231a through the path selected by the switch circuit 233a according to the type of the trigger signal. The output port 231a sends a test signal to the USB port usb1 for testing. In addition, after receiving the trigger signal from the switch circuit 233a, the next control module 23b will perform the same operation as the control module 23a and send out a test signal for testing the USB port usb2. By analogy, each control module 23a, 23b, 23c, 23d will send test signals in sequence (with time difference) to test the USB ports usb1, usb2, usb3, usb4.

主機板DUT的作業系統在執行USB連接埠的測試程式時,可根據USB連接埠usb1、usb2、usb3、usb4的接收測試信號的狀況來判斷各個USB連接埠usb1、usb2、usb3、usb4的型態,以及是否符合該型態的速率規格。 When the operating system of the motherboard DUT runs the test program of the USB port, the type of each of the USB ports usb1, usb2, usb3, and usb4 can be determined according to the status of the USB port usb1, usb2, usb3, and usb4 receiving the test signal. , And whether it meets the rate specifications for that type.

根據本發明的USB連接埠測試系統及動態測試USB連接埠之方法,藉由切換觸發信號源送出信號的位準組合,可以動態地切換USB不同型態(USB2.0/3.0/3.1)之間的測試。並且在信號送出後,測試治具的各個控制模組會有時間差地依序送出測試信號至要測試的USB連接埠,使主機板的作業系統有足夠的緩衝時間來進行USB連接埠的辨識,避免各個USB連接埠同時接收到信號而發生無法辨識的問題。根據本發明的USB連接埠測試系統及動態測試USB連接埠之方法,可以對大量(20~30個埠位)的USB連接埠進行測試,減省測試治具的數量並且提高測試效率。 According to the USB port test system and the method for dynamically testing a USB port of the present invention, by switching the level combination of signals sent by a trigger signal source, it is possible to dynamically switch between different USB types (USB2.0 / 3.0 / 3.1) Test. And after the signal is sent, each control module of the test fixture will sequentially send the test signal to the USB port to be tested in order to allow the operating system of the motherboard to have sufficient buffer time to identify the USB port. Avoid unrecognizable problems when all USB ports receive signals at the same time. According to the USB port test system and the method for dynamically testing a USB port according to the present invention, a large number of USB ports (20 to 30 ports) can be tested, reducing the number of test fixtures and improving test efficiency.

在本發明另一個實施例當中,本發明的USB連接埠測試系統可以提供外部USB裝置與主機板的連接埠連接的功能。第5圖係本發明之USB連接埠測試系統在使用外部USB裝置連接之擴充功能時之概要示意圖。如第5圖所示,測試治具20與主機板DUT的各個USB連接埠維持連接的狀態下,如果要臨時使用外部的USB裝置30與某個USB連接埠(第5圖以USB連接埠usb3為例),可以直接插入測試冶具20中對應該USB連接埠的一個擴充連接埠(第5圖中對應USB連接埠usb3的是擴充連接埠 234c)來與主機板的USB連接埠進行連接。而不需要卸除測試治具20與主機板DUT之間的連線,使不同的作業之間操作程序更簡化。 In another embodiment of the present invention, the USB port test system of the present invention can provide a function of connecting an external USB device to a port of a motherboard. FIG. 5 is a schematic diagram of the USB port test system of the present invention when an external USB device is connected to an extended function. As shown in Figure 5, the test fixture 20 is maintained in a connected state with each USB port of the motherboard DUT. If you want to temporarily use an external USB device 30 and a USB port (Figure 5 uses USB port usb3) For example, you can directly insert an expansion port corresponding to the USB port in the test tool 20 (the corresponding USB port usb3 in Figure 5 is the expansion port 234c) to connect with the USB port of the motherboard. There is no need to remove the connection between the test fixture 20 and the main board DUT, which simplifies the operation procedure between different operations.

在第5圖中,當使用外部USB裝置30與測試治具20的擴充連接埠234c連接時,為了存取外部USB裝置30,本發明的USB連接埠測試系統會進行下動作。觸發信號源10另外送出第三信號31SE及第四信號20SE。此時第一信號31OE及第二信號20OE可以維持在例如高位準,亦即測試關閉的狀態。同樣地,根據第三信號31SE及第四信號20SE的高低位準的組合,可以決定與外部USB裝置30連接所要使用的USB型態(2.0、3.0或3.1)。第三信號31SE及第四信號20SE送出到至測試治具20的接線座21,再傳遞給邏輯電路22。邏輯電路22根據第三信號31SE及第四信號20SE的高低位準關係,送出USB3.1/3.0型態的選擇信號或者是USB2.0型態的選擇信號至控制模組23a中的開關電路233a。開關電路233a根據選擇信號選擇對應的路徑將擴充連接埠234a連接至輸出埠位231a,並且將該選擇信號傳給控制晶片232a以及下一個控制模組23b中的開關電路233b。藉此,USB連接埠usb1可以藉由擴充連接埠234a來存取外部USB裝置。然而第5圖中擴充連接埠234a並無插入外部USB裝置,因此USB連接埠usb1會處於未使用的狀態。另外,下一個控制模組23b收到來自開關電路233a的選擇信號後,會進行與控制模組23a相同的動作,根據選擇信號選擇對應的路徑將擴充連接埠234b連接至輸出埠位231b。依此類推,各個擴充連接埠234與對應的USB埠位usb形成可資料存取的狀態。在第5圖中,外部USB 裝置30插入擴充連接埠234c,因此,主機板DUT的USB埠位usb3可透過測試治具20來存取外部USB裝置30。 In FIG. 5, when the external USB device 30 is connected to the expansion port 234 c of the test fixture 20, in order to access the external USB device 30, the USB port test system of the present invention performs the following operations. The trigger signal source 10 also sends a third signal 31SE and a fourth signal 20SE. At this time, the first signal 31OE and the second signal 20OE can be maintained at, for example, a high level, that is, a state in which the test is turned off. Similarly, according to the combination of the high and low levels of the third signal 31SE and the fourth signal 20SE, a USB type (2.0, 3.0, or 3.1) to be used for connection with the external USB device 30 can be determined. The third signal 31SE and the fourth signal 20SE are sent to the terminal block 21 to the test fixture 20 and then passed to the logic circuit 22. The logic circuit 22 sends a selection signal of the USB3.1 / 3.0 type or a selection signal of the USB2.0 type to the switch circuit 233a in the control module 23a according to the level relationship between the third signal 31SE and the fourth signal 20SE. . The switch circuit 233a selects a corresponding path according to the selection signal, connects the expansion port 234a to the output port 231a, and transmits the selection signal to the control chip 232a and the switch circuit 233b in the next control module 23b. Thereby, the USB port usb1 can access the external USB device through the expansion port 234a. However, the expansion port 234a in Figure 5 is not plugged into an external USB device, so the USB port usb1 will be in an unused state. In addition, after receiving the selection signal from the switch circuit 233a, the next control module 23b will perform the same operation as the control module 23a, and select the corresponding path according to the selection signal to connect the expansion port 234b to the output port 231b. By analogy, each expansion port 234 and the corresponding USB port usb form a data-accessible state. In FIG. 5, the external USB device 30 is inserted into the expansion port 234 c. Therefore, the USB port usb3 of the motherboard DUT can access the external USB device 30 through the test fixture 20.

根據上述的實施例,可以增加USB連接埠測試系統的擴充性,能夠隨時將測試作業切換成一般使用USB裝置的作業,並且簡化作業之間切換的複雜度。 According to the above embodiment, the expandability of the USB port test system can be increased, the test operation can be switched to the operation using a USB device at any time, and the complexity of switching between operations can be simplified.

上述已揭露之特徵能以任何適當方式與一或多個已揭露之實施例相互組合、修飾、置換或轉用,並不限定於特定之實施例。例如,上述第一至第四信號的高低位準的組合分別對應的各個USB型態的觸發信號或選擇信號僅為例示,本發明也可以任意調整高低位準的組合各自代表的USB型態的觸發信號或選擇信號。 The above-mentioned disclosed features can be combined, modified, replaced or transferred with one or more of the disclosed embodiments in any suitable manner, and are not limited to the specific embodiments. For example, the trigger signals or selection signals of the respective USB types corresponding to the combination of the high and low levels of the first to fourth signals are only examples, and the present invention can also arbitrarily adjust the USB types represented by the combinations of the high and low levels. Trigger or selection signal.

本揭露雖以各種實施例揭露如上,然而其僅為範例參考而非用以限定本揭露的範圍,任何熟習此項技藝者,在不脫離本揭露之精神和範圍內,當可做些許的更動與潤飾。因此上述實施例並非用以限定本揭露之範圍,本揭露之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present disclosure is disclosed in various embodiments as above, it is only an example reference and is not intended to limit the scope of this disclosure. Any person skilled in this art can make some changes without departing from the spirit and scope of this disclosure. With retouch. Therefore, the above embodiments are not intended to limit the scope of this disclosure, and the scope of protection of this disclosure shall be determined by the scope of the attached patent application.

Claims (10)

一種USB連接埠測試系統,連接並測試一USB連接埠,包括:一觸發信號源,送出一第一信號及一第二信號;一邏輯電路,根據該第一信號及該第二信號的邏輯位準的組合,送出對應特定的USB型態的一觸發信號;以及一控制模組,接收該觸發信號,送出該觸發信號所表示的USB型態之測試信號至該USB連接埠。     A USB port test system for connecting and testing a USB port includes: a trigger signal source that sends a first signal and a second signal; a logic circuit according to the first signal and the logic bit of the second signal A combination of the standard and a trigger signal corresponding to a specific USB type; and a control module that receives the trigger signal and sends a test signal of the USB type indicated by the trigger signal to the USB port.     如申請專利範圍第1項所述之USB連接埠測試系統,其中該USB連接埠測試系統具有複數個該控制模組,用以對複數個USB連接埠測試,各個該控制模組收到該觸發信號後,會依序送出該測試信號。     According to the USB port test system described in the first patent application scope, wherein the USB port test system has a plurality of the control modules for testing a plurality of USB ports, and each of the control modules receives the trigger After the signal, the test signal will be sent out in sequence.     如申請專利範圍第1或2項所述之USB連接埠測試系統,其中該控制模組包括:一輸出埠位,連接至該USB連接埠;一控制晶片,根據該觸發信號,送出該測試信號;以及一開關電路,根據該觸發信號,選擇該測試信號要輸出至該輸出埠位的路徑。     The USB port test system according to item 1 or 2 of the scope of patent application, wherein the control module includes: an output port connected to the USB port; a control chip that sends the test signal according to the trigger signal And a switch circuit, according to the trigger signal, selecting a path to which the test signal is output to the output port.     如申請專利範圍第3項所述之USB連接埠測試系統,其中該控制模組更包括:一擴充連接埠,允許一外部USB裝置的連接, 其中該觸發信號源更送出一第三信號及一第四信號,該邏輯電路根據該第三信號及該第四信號的邏輯位準的組合,送出對應特定的USB型態的一選擇信號,該開關電路根據該選擇信號,選擇將該外部USB裝置連接至該輸出埠位。     According to the USB port test system described in the third item of the patent application scope, the control module further includes: an expansion port to allow an external USB device to be connected, and the trigger signal source further sends a third signal and a A fourth signal, the logic circuit sends a selection signal corresponding to a specific USB type according to the combination of the third signal and the logic level of the fourth signal, and the switch circuit selects the external USB device according to the selection signal Connect to this output port.     如申請專利範圍第1項所述之USB連接埠測試系統,其中該第一信號及該第二信號皆為低位準時,該控制模組送出對應一第一USB型態的該測試信號,該第一信號為高位準且該第二信號為低位準時,該控制模組送出對應一第二USB型態的該測試信號。     According to the USB port test system described in item 1 of the scope of patent application, wherein when the first signal and the second signal are both low level, the control module sends the test signal corresponding to a first USB type, and the first When a signal is at a high level and the second signal is at a low level, the control module sends the test signal corresponding to a second USB type.     如申請專利範圍第5項所述之USB連接埠測試系統,其中該第一USB型態是USB 3.1型態,該第二USB型態是USB 2.0型態。     The USB port test system according to item 5 of the scope of the patent application, wherein the first USB type is a USB 3.1 type and the second USB type is a USB 2.0 type.     如申請專利範圍第5項所述之USB連接埠測試系統,其中該第一USB型態是USB 3.0型態,該第二USB型態是USB 2.0型態。     The USB port test system according to item 5 of the scope of the patent application, wherein the first USB type is a USB 3.0 type and the second USB type is a USB 2.0 type.     一種動態測試USB連接埠之方法,應用於包括包括一觸發信號源、一邏輯電路、以及複數的控制模組的一USB連接埠測試系統,該動態測試USB連接埠之方法包括:將該USB連接埠測試系統連接至作為測試對象之至少一USB連接埠;利用該信號源送出低位準的一第一信號以及一第二信號; 利用該邏輯電路接收該第一信號及該第二信號,並送出對應一第一USB型態的一觸發信號;利用該複數的控制模組接收該觸發信號,並依序送出該第一USB型態的一測試信號至各個該USB連接埠;以及檢查該各個USB連接埠在該第一USB型態下是否符合標準。     A method for dynamically testing a USB port is applied to a USB port test system including a trigger signal source, a logic circuit, and a plurality of control modules. The method for dynamically testing a USB port includes: connecting the USB The port test system is connected to at least one USB port as a test object; using the signal source to send a first signal and a second signal at a low level; using the logic circuit to receive the first signal and the second signal and sending A trigger signal corresponding to a first USB type; using the plurality of control modules to receive the trigger signal, and sequentially sending a test signal of the first USB type to each of the USB ports; and checking each USB Whether the port meets the standard in the first USB type.     如申請專利範圍第8項所述之動態測試USB連接埠之方法,更包括:利用該信號源送出高位準的一第一信號以及低位準的一第二信號;利用該邏輯電路接收該第一信號及該第二信號,並送出對應一第二USB型態的一觸發信號;利用該複數的控制模組接收該觸發信號,並依序送出該第二USB型態的該測試信號至各個該USB連接埠;以及檢查該各個USB連接埠在該第二USB型態下是否符合標準。     The method for dynamically testing a USB port according to item 8 of the scope of patent application, further comprising: using the signal source to send a first signal of a high level and a second signal of a low level; using the logic circuit to receive the first signal Signal and the second signal, and send a trigger signal corresponding to a second USB type; use the plurality of control modules to receive the trigger signal, and sequentially send the test signal of the second USB type to each of the A USB port; and checking whether each USB port complies with the standard in the second USB type.     如申請專利範圍第9項所述之動態測試USB連接埠之方法,其中該第一USB型態的測試信號用以測試USB連接埠是否合乎USB 3.1及USB 3.0型態的規格及速率,該第二USB型態的測試信號用以測試USB連接埠是否合乎USB 2.0型態的規格及速率。     The method for dynamically testing a USB port as described in item 9 of the scope of the patent application, wherein the first USB type test signal is used to test whether the USB port conforms to the specifications and speed of the USB 3.1 and USB 3.0 types. The test signal of the USB type is used to test whether the USB port conforms to the specifications and speed of the USB 2.0 type.    
TW107116258A 2018-05-14 2018-05-14 Usb port test system and method for dynamically testing usb port TWI709851B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW107116258A TWI709851B (en) 2018-05-14 2018-05-14 Usb port test system and method for dynamically testing usb port

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW107116258A TWI709851B (en) 2018-05-14 2018-05-14 Usb port test system and method for dynamically testing usb port

Publications (2)

Publication Number Publication Date
TW201947399A true TW201947399A (en) 2019-12-16
TWI709851B TWI709851B (en) 2020-11-11

Family

ID=69582772

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107116258A TWI709851B (en) 2018-05-14 2018-05-14 Usb port test system and method for dynamically testing usb port

Country Status (1)

Country Link
TW (1) TWI709851B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115391252A (en) * 2021-12-08 2022-11-25 威锋电子股份有限公司 USB integrated circuit, test platform and operation method of USB integrated circuit
TWI839804B (en) * 2021-12-08 2024-04-21 威鋒電子股份有限公司 Usb integrated circuit, testing platform and operating method for usb integrated circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100377102C (en) * 2004-02-21 2008-03-26 鸿富锦精密工业(深圳)有限公司 Motherboard function test board
TWI296753B (en) * 2004-10-26 2008-05-11 Via Tech Inc Usb control circuit for saving power and the method thereof
CN206523872U (en) * 2017-02-15 2017-09-26 深圳怡化电脑股份有限公司 A kind of USB device test system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115391252A (en) * 2021-12-08 2022-11-25 威锋电子股份有限公司 USB integrated circuit, test platform and operation method of USB integrated circuit
US11914491B2 (en) 2021-12-08 2024-02-27 Via Labs, Inc. USB integrated circuit, testing platform and operating method for USB integrated circuit
TWI839804B (en) * 2021-12-08 2024-04-21 威鋒電子股份有限公司 Usb integrated circuit, testing platform and operating method for usb integrated circuit

Also Published As

Publication number Publication date
TWI709851B (en) 2020-11-11

Similar Documents

Publication Publication Date Title
CN108475227B (en) Test functional assembly and data debugging method
WO2021189322A1 (en) Chip testing apparatus and chip testing method
EP2449391B1 (en) Programmable protocol generator
CN104965168B (en) A kind of FPGA for integrated circuit testing configures system and method
CN205982507U (en) Testing device of USB3.0 equipment
CN108897647B (en) Test system, test method and device
US10184976B2 (en) Testing circuit board with self-detection function and self-detection method thereof
CN107783871B (en) USB signal consistency code type switcher and testing system
US10402288B2 (en) USB-testing method and testing fixture board for USB device
CN101566962A (en) Test board and method for the consistency of peripheral component interconnect express expansion system
CN108919006A (en) Interface Expanding mould group, aging testing system, ageing testing method and storage medium
WO2013095418A1 (en) Core-driven translation and loopback test
CN115904849A (en) PCIE link signal test method, system, computer equipment and medium
TWI709851B (en) Usb port test system and method for dynamically testing usb port
TWI502596B (en) Memory testing method, memory testing apparatus, and adapter thereof
CN105510762A (en) Intelligent test circuit and test method for USB TYPE-C wire
CN211062033U (en) Test adapter and test equipment
CN204789920U (en) A FPGA disposes system for integrated circuit test
CN104216809B (en) Signal-testing apparatus
TWI710911B (en) Electronic system, host device and control method
CN216901630U (en) Interface conversion circuit and chip burning device
CN111104279B (en) SAS connector conduction detection system and method thereof
CN112486756B (en) Method for debugging chip by using extended I2C protocol, storage medium and electronic equipment
CN102486939B (en) Method and apparatus for testing joint test action group (JTAG) of memories
CN113949654A (en) Test fixture for M.2 interface and use method thereof