TW201945739A - Redistribution system with uniform characteristic multi-layered homogeneous structure and method of manufacture thereof - Google Patents

Abstract

A redistribution system includes: a substrate; a plurality of redistribution layers on the substrate, including conductive traces and a plurality of polymer layers surrounding the conductive traces, wherein: one of each of these polymer layers The thickness of the polymer layer is less than the thickness of one of the conductive traces; and the polymer layers are free of interstitial substances.

Description

   Redistribution system with multi-layer homogeneous structure with uniform characteristics and manufacturing method thereof   

The specific embodiments of the present invention generally relate to a redistribution system, and more particularly, to a redistribution system having a multi-layered homogeneous structure.

Modern consumer and industrial electronics, mobile phones, mobile devices and computing systems are providing more and more features to support modern life. Research and development in the prior art can take countless different directions.

As users become more capable as computing devices evolve, new and old paradigms begin to take advantage of this new device space. There are many technical solutions that can take advantage of this new device functionality and device miniaturization. However, wafer reliability testing via new devices has become a concern for manufacturers.

Therefore, there is still a need in the art for a redistribution system for testing wafers via a device. Given the increasing pressure of commercial competition and the growing consumer expectations and opportunities for meaningful product differentiation in the market, it is increasingly important to find answers to these questions. In addition, the need to reduce costs, improve efficiency and performance, and meet competitive pressures adds even greater urgency to the critical necessity of finding answers to these questions.

It has been a long time to find solutions to these problems, but previous developments have not taught or proposed any solutions, so those skilled in the art have long been confused by the solutions to these problems.

A specific embodiment of the present invention provides a redistribution system, including: a substrate; a plurality of redistribution layers on the substrate, including conductive traces and a plurality of polymer layers surrounding the conductive traces, wherein A thickness of a polymer layer of the polymer layers is less than a trace thickness of the conductive traces; and the polymer layers are free of interstitial substances.

A specific embodiment of the present invention provides a method for manufacturing a redistribution system, including: providing a substrate; forming a plurality of redistribution layers on the substrate, including: forming a conductive trace including a trace thickness; and forming a gap-free substance A plurality of polymer layers are wrapped around the conductive traces, wherein the polymer layer thickness of each of the polymer layers is less than the trace thickness of the conductive traces.

In addition to or instead of the steps or elements mentioned above, some specific embodiments of the present invention have other steps or elements. To those skilled in the art, these steps or elements will become apparent from reading the following embodiments while referring to the attached drawings.

100‧‧‧ Redistribution System

102‧‧‧ mechanical reinforcement

104‧‧‧printed circuit board

106‧‧‧ Redistribution Platform

108‧‧‧ Probe Card

110‧‧‧Semiconductor wafer

112‧‧‧Semiconductor die

114‧‧‧ Probe head

120‧‧‧ Wafer Test System

210‧‧‧ Trace

212‧‧‧Homogeneous dielectric structure

214‧‧‧foot

314‧‧‧trace plane part

316‧‧‧ Trace line

320‧‧‧ redistribution layer

322‧‧‧contact pad

324‧‧‧thickness of redistribution layer

330‧‧‧ substrate

332‧‧‧through substrate through hole; through hole

340‧‧‧ the first side of the substrate

342‧‧‧Second side of substrate

550‧‧‧ substrate thickness

660‧‧‧ conductive trace

662‧‧‧thickness of plane part

664‧‧‧thickness

770‧‧‧ polymer layer

772‧‧‧ polymer layer thickness

1012‧‧‧ Grain

1016‧‧‧ Die attach adhesive

1020‧‧‧Electrical Interconnection

1022‧‧‧Semiconductor Cover

1024

1100‧‧‧Method

1102-1108‧‧‧block

The first figure is a schematic side view of a redistribution system in a specific embodiment of the present invention.

The second figure is a top view of the redistribution platform of the first figure of the redistribution system.

The third figure is a cross-sectional view of the redistribution platform of the second figure along line 2--2 of the second figure.

The fourth figure is a top view of the substrate.

The fifth figure is a sectional view of the substrate of the fourth figure along line 4--4 of the fourth figure.

The sixth diagram is a substrate of the fourth diagram on which conductive traces are formed.

The seventh diagram is the structure of the sixth diagram when the polymer layer is formed.

The eighth figure is the structure of the seventh figure when one of the redistribution layers of the fourth figure is formed.

The ninth figure is the structure of the eighth figure when the redistribution platform is formed.

The tenth diagram is a schematic side view of the redistribution system of the second diagram in another specific embodiment.

The eleventh figure is a flowchart of a method of manufacturing a redistribution system in a specific embodiment of the present invention.

The following specific embodiments are described in detail, which is enough for those skilled in the art to make and use the present invention. It should be understood that other specific embodiments will be apparent based on the disclosure of the present invention, and that system, program or mechanical changes may be made without departing from the scope of the specific embodiments of the present invention.

In the following description, numerous specific details are given to provide a thorough understanding of the present invention. It will be apparent, however, that the invention may be practiced without these specific details. In order to avoid obscuring the specific embodiments of the present invention, some conventional circuits, system configurations, and program steps have not been disclosed in detail.

The drawings showing the specific embodiments of the system are schematic drawings and are not drawn to scale. In particular, some dimensions are shown enlarged for clarity in the drawings. Likewise, although the views in the drawings generally show the same orientation for ease of description, this depiction in the drawings is arbitrary in most cases. In general, the invention can be operated in any orientation.

The terms first, second, third, etc. are designated and used for convenience and clarity, and are not meant to limit a particular order. The steps or procedures described may be performed in any order to implement the claimed subject matter.

Referring now to the first figure, there is shown a schematic side view of a redistribution system 100 in a specific embodiment of the invention. The redistribution system 100 is a system for providing interconnections between different devices. For example, the redistribution system 100 may be a group 0 in a wafer test system 120 or a substrate in an integrated circuit packaging system. As an example, the wafer test system 120 may include a mechanical reinforcement member 102, a printed circuit board 104, a redistribution platform 106, and a probe card 108. The mechanical strengthening member 102, the printed circuit board 104, the redistribution platform 106, and the probe card 108 are components of a system for testing the semiconductor wafer 110. The semiconductor wafer 110 may be a processed silicon wafer having electronic components (not shown) such as a circuit fabricated thereon, an integrated circuit, logic, integrated logic, or a combination thereof.

The probe card 108 is an interface for contacting a test position on the semiconductor wafer 110, the semiconductor die 112, or a combination thereof. The probe card 108 may include a probe head 114 for contacting test points or wafer connection pads (not shown) on the components formed on the surface of the semiconductor wafer 110, the die, or a combination thereof.

The redistribution platform 106 is a structure for providing interconnections between two devices. For example, the redistribution platform 106 may be a space transformer, a packaging substrate for integrated circuit packaging, a redistribution structure for multi-die packaging, or a combination thereof. For illustrative purposes, the redistribution platform 106 is shown as a component that can provide electrical connectivity between the probe card 108 and the printed circuit board 104 of the wafer test system 120. The redistribution platform 106 may provide electrical and functional connectivity between the semiconductor wafer 110, the semiconductor die 112, or a combination thereof for system testing such as wafer testing, die testing, packaging testing, or inter-package testing.

Referring now to the second figure, a top view of the redistribution platform 106 of the first figure of the redistribution system 100 is shown. The redistribution platform 106 may include traces 210 and a homogeneous dielectric structure 212.

The routing traces 210 extend through one or more conductive structures of the redistribution platform 106. These one or more routing traces 210 may be all connected together to form a large routing trace 210, partially connected together to form separate but connected routing traces 210, or may be isolated from each other to form a Any other routing traces 210 are separate individual and isolated routing traces 210.

The redistribution platform 106 of the first figure may also provide a transition area between the printed circuit board 104 of the first figure and the probe card 108 of the first figure. For example, the traces 210 may be a multilayer structure for providing electrical connections. As a specific example, the traces 210 can provide the wider geometries and connection points on the printed circuit board 104 of the first figure to the smaller geometries and connection points of the probe cards 108. Electrical connection. The transition area may include electrical connections of different geometries, different densities, different connection points, connection sizes, number of traces 210, signal settings, ground settings, power settings, or a combination thereof.

The traces 210 may include a conductive material. For example, the traces 210 may include a metal, such as elemental copper, silver, or gold, or a metal alloy, such as a copper alloy, a silver alloy, or a gold alloy.

These routing traces 210 may be used to transmit electrical signals throughout the redistribution platform 106. For example, in a specific embodiment, the traces 210 may facilitate the transmission of electrical signals from the printed circuit board 104 to the probe card 108. The traces 210 may also provide shielding of electrical signals by surrounding other traces 210 for signal transmission, and provide ground for the traces 210. For example, the traces 210 may achieve a pitch 214 on the redistribution platform 106 in a scale range of less than or equal to 20 microns. As a result, the electrical signals transmitted via the one or more wiring traces 210 may cause electromagnetic interference with each other. Pitch 214 refers to the shortest measurement between the center distances between features of the redistribution platform 106 (such as the traces 210).

In a specific embodiment, one or more routing traces 210 may be used to provide ground and serve as ground traces, so that these signals along other routing traces 210 that transmit signals may be shielded from interference electromagnetic interference Signals in order to provide improved signal quality throughout the redistribution platform 106.

The homogeneous dielectric structure 212 is a non-conductive material, such as a dielectric material that surrounds the traces 210. The homogeneous dielectric structure 212 may be an electrically insulating material that provides insulation between each such trace trace 210. For example, the homogeneous dielectric structure 212 may be a structure formed of a polymer material. The homogeneous dielectric structure 212 may be transparent or translucent, so as to achieve the optical visibility of the traces 210 through the homogeneous dielectric structure 212. Transparent or translucent refers to allowing light in the visible wavelength spectrum to pass. As an example, the object can be seen at least partially visually through the translucent material. As another example, an object may be clearly seen through a transparent material. Details of the redistribution platform 106 will be discussed below.

Referring now to the third figure, a cross-sectional view of the redistribution platform 106 of the second figure is shown along line 2--2 of the second figure. The cross-sectional view depicts a redistribution platform 106 including a redistribution layer 320 on a substrate 330.

The homogeneous dielectric structure 212 may be formed from a plurality of these redistribution layers 320 as shown by the dotted lines. The redistribution layers 320 are individual layers of non-conductive materials that have been chemically bonded to each other. Each of these redistribution layers 320 may include one of the traces 210 embedded therein.

The homogeneous dielectric structure 212 is a uniform structure formed of a single material. For example, the homogeneous dielectric structure 212 may be a homogeneous polymer structure that does not contain any interstitial material (such as fiber reinforcement). Based on these properties of the dielectric material used to form the homogeneous dielectric structure 212, the lack of interstitial or embedded substances enables the homogeneous dielectric structure 212 to be translucent or transparent. Since the homogeneous dielectric structure 212 is formed of a single material, the homogeneous dielectric structure 212 may have a uniform structure and thermal properties, such as a uniform thermal expansion coefficient.

As an example, the redistribution layers 320 may be formed to have a redistribution layer thickness 324. The redistribution layer thickness 324 may be in a range of 10 μm to 60 μm or more. More specifically, the redistribution layer thickness 324 may be in a range of 10 to 30 microns. Each of these redistribution layers 320 may have the same or similar value of the redistribution layer thickness 324 or a different value of the redistribution layer thickness 324. The redistribution layer thickness 324 of the redistribution layers 320 may be measured in a direction perpendicular to the first side 340 or the second side 342 of the substrate.

The substrate 330 may be a rigid foundation or a base layer for the redistribution system 100. More specifically, the substrate 330 may provide structural support and rigidity for the homogeneous dielectric structure 212 and the traces 210. The substrate 330 may be formed of an electrically insulating material, such as a ceramic-based or polymer composite-based material. The substrate 330 may include a substrate first side 340 and a substrate second side 342. The substrate first side 340 and the substrate second side 342 may be the opposite surfaces of the substrate 330 facing away from each other.

The substrate 330 may include a through-substrate via 332. The through-substrate vias 332 extend from one surface of the substrate 330 to the opposite surface of the substrate. As an example, the through-substrate vias 332 may be formed of a conductive material containing a metal, such as elemental copper, silver, or gold, or a metal alloy, such as a copper alloy, a silver alloy, or a gold alloy.

The traces 210 may extend from the substrate 330 through the homogeneous dielectric structure 212. The portions of the traces 210 may be connected to a component such as a contact pad 322 at a surface of the homogeneous dielectric structure 212 facing away from the substrate 330. This component can provide electrical connections between the traces 210 and other devices including the test device such as the probe card 108 of the first figure. The routing traces 210 may be electrically connected to the through-substrate vias 332 on the first side of the substrate 330.

Part of the routing traces 210 in a particular instance of the redistribution layer 320 is one of the routing traces 210. Each layer of the traces 210 may include a trace plane portion 214, a trace interconnect portion 216, or a combination thereof. The trace plane portion 214 is a portion where the traces 210 can provide a trace or a redistribution along a two-dimensional plane parallel to the first side 340 or the second side 342 of the substrate.

The trace interconnecting portion 342 is a portion of the routing trace 210 that can extend from the trace plane portion 316 in a direction perpendicular to the first side 340 or the second side 342 of the substrate. As an example, interconnects 316 of the traces may provide connections to the other layers of the traces 210.

The base plate 330 may provide additional rigid support for the redistribution platform 106. More specifically, for example, the substrate 330 may provide structural support and rigidity for the homogeneous dielectric structure 212 and the traces 210. For electrical connection to other devices, such as the printed circuit board 104 of the first figure, the through substrate through holes 332 at the second side 342 of the substrate may be processed.

For illustrative purposes, the redistribution platform 106 is shown as such redistribution layers 320 are formed only on the first side 340 of the substrate, however, it should be understood that the redistribution platform 106 may be configured differently. For example, the redistribution platform 106 may include the redistribution layers 320 formed on the first side 340 and the second side 342 of the substrate.

As yet another example, the substrate 330 may be a previously formed homogeneous dielectric structure 212. In this example, the substrate 330 may be removed, so that only the homogeneous dielectric structure 212 and the traces 210 and the structures formed with the traces 210 remain, while another homogeneous dielectric structure 212 is formed. Instance. The multiple instances of the homogeneous dielectric structure 212 may be the same or different.

Referring now to the fourth figure, a top view of the substrate 330 is shown. The top view depicts a flat or planar surface of the substrate 330, such as the first side 340 or the second side 342 of the substrate of the third figure. This flat or planar surface of the substrate 330 can be used to attach, connect, mount (or a combination of) different components or materials. For example, the substrate 330 may include pre-formed components as needed (such as metal bonds or the contact pads 322 exposed at the flat or planar surface of the substrate 330) to facilitate electrical connections, such as the one in the second figure Wait for the wiring trace 210 to be connected. For illustrative purposes, the contact pads 322 are shown as having a round or circular shape, but it should be understood that the contact pads 322 may have different shapes. For example, the contact pads 322 may have a rectangular or oval shape.

The substrate 330 may be provided as a prefabricated structure for forming the redistribution platform 106. The substrate 330 may be formed of a variety of different materials. For example, the substrate 330 may be formed of a ceramic-based material, such as a high temperature co-fired ceramic (HTCC) or a low temperature co-fired ceramic (LTCC). As another example, the substrate 330 may be formed of a polymer composite material, such as a fiber-reinforced polymer. As a specific example, the polymer-based composite material may include a glass fiber-reinforced epoxy laminated material, such as a Flame Retardant-4 (FR-4) grade printed circuit board. As yet another example, the substrate 330 may be another example or design similar to the redistribution platform 106.

For illustrative purposes, this top view depicts the substrate 330 having a circular or circular shape, however it should be understood that the substrate 330 may have different shapes. For example, the substrate 330 may have an oval shape or a polygonal shape, such as a square, a rectangle, or other polygonal shapes.

Referring now to the fifth figure, a cross-sectional view of the substrate 330 of the fourth figure along line 4--4 of the fourth figure is shown. The cross-sectional view depicts a portion of the substrate 330 having the through substrate through holes 332.

The substrate 330 may include a substrate first side 340 and a substrate second side 342. The substrate first side 340 and the substrate second side 342 may be the opposite surfaces of the substrate 330 facing away from each other. The first substrate side 340 and the second substrate side 342 may be substantially parallel to each other.

The substrate 330 may include a substrate thickness 550. The substrate thickness 550 may be measured as a distance between the substrate first side 340 and the substrate second side 342. Generally, the planar dimensions (such as width or diameter) of the first side 340 and the second side 342 of the substrate may be greater than the substrate thickness 550.

The substrate 330 may include the through substrate through holes 332. The through-substrate vias 332 extend from one surface of the substrate 330 to the opposite surface of the substrate. For example, the through-substrate vias 332 may extend between the substrate first side 340 and the substrate second side 342.

As an example, the through-substrate vias 332 may be formed of a conductive material containing a metal, such as elemental copper, silver, or gold, or a metal alloy, such as a copper alloy, a silver alloy, or a gold alloy. For illustrative purposes, the through-substrate through-holes 332 are shown as being connected to the contact pads 322, however, it should be understood that the contact pads 322 are as needed and may be on the substrate first side 340, the substrate second The through substrate through holes 332 are directly exposed at the side 342 or a combination thereof. If necessary, the exposed portions of the through substrate through holes 332 on the substrate first side 340, the substrate second side 342, or a combination thereof may be coplanar with the substrate first side 340 or the substrate second side 342, respectively.

The number, pattern, location, pitch, diameter, and size of these through-substrate vias 332 are shown for illustrative purposes and are not drawn to scale. For example, the substrate 330 may include the through holes 332 having a pitch in the range of 10 to hundreds of micrometers. As another example, the diameter of the through holes 332 can be measured on a scale of several tens of micrometers.

Referring now to the sixth figure, there is shown a substrate 330 on which the conductive traces 660 are formed. The conductive traces 660 are part of an electrical routing system. More specifically, the conductive traces 660 may be a single layer of the trace trace 210 of the second figure. For example, the conductive traces 660 may be a single layer of a larger electrical routing system. As a specific example, the conductive traces 660 may be formed as part of a single-layered trace 210.

The conductive traces 660 can be formed via a trace formation process that can be a multi-stage process to pattern and form the conductive traces 660. For example, the trace formation process may include a mask phase, a seeding phase, a deposition phase, a planarization phase, and a mask removal phase.

The conductive traces 660 may be formed of a conductive material that may include a metal, such as elemental copper, silver, or gold, or a metal alloy, such as a copper alloy, a silver alloy, or a gold alloy. As a specific example, the conductive traces 660 may be formed of a material that is the same as or similar to the material of the through substrate vias 332 of the third figure.

Generally, the conductive traces 660 can be formed on a two-dimensional plane, such as a plane or surface parallel to the first side 340 of the substrate, the second side 342 of the substrate, or a combination thereof.

The conductive traces 660 may be formed to include a trace plane portion 314, a trace interconnect portion 316, or a combination thereof. For example, a first implementation of the trace formation process may be performed to form a trace plane portion 314, and a subsequent implementation of the trace formation process may be performed to form a trace interconnect on the trace plane portion 314 Section 316.

The trace plane portion 314 may include a plane portion thickness 662. The trace interconnecting portion 316 may include an interconnecting portion thickness 664. Both the thickness of the planar portion 662 and the thickness of the interconnect portion 664 can be linear dimensions of the vertical first substrate 340 or the second substrate 342. Generally, the thickness of the planar portion 662 may be greater than the thickness 664 of the interconnect portion. The sum of the thickness of the planar portion 662 and the thickness of the interconnect portion 664 may be the thickness of the conductive trace, which may be the same as or similar to the redistribution layer thickness 324 of the third figure of the corresponding example of the redistribution layer 320.

Such conductive traces 660 may be formed on the substrate 330. For example, the conductive traces 660 can be formed directly on the first side 340 or the second side 342 of the substrate. The conductive traces 660 may be formed to be electrically connected to the through substrate vias 332. The conductive traces 660 can be formed through a variety of different processes. For example, the conductive traces 660 can be formed by an electrolytic deposition process. Each of these conductive traces 660 may be formed to have a different geometric pattern and size, as illustrated in the second figure.

For illustrative purposes, a trace formation process for directly forming the conductive traces 660 on the surface of the substrate 330 is described in the drawings. It should be understood, however, that the trace formation process described herein may be performed to form the conductive traces 660 on other surfaces, such as the surfaces of the redistribution layers 320 of the third figure.

Referring now to the seventh figure, the structure of the sixth figure when the polymer layer 770 is formed is shown. The polymer layers 770 are formed as a polymer material layer covering the conductive traces 660. The polymer layer 770 may be an electrically insulating material that may cover portions of the conductive traces 660 and electrically insulate each instance of the conductive traces 660.

Generally, each such polymer layer 770 may be formed via a polymer formation process. As an example, the polymer formation process may include an application stage and a curing stage. During the application phase of the polymer growth process, all or a portion of the conductive traces 660 may be covered by applying a liquid dielectric precursor material (not shown).

The liquid dielectric precursor material may be an organic solution or an organic suspension. For example, the liquid dielectric material may be a solution of monomer or oligomer molecules for a polymer suspended or dissolved in a solvent. The liquid dielectric precursor material may be a solution containing monomer or oligomer molecules as a precursor for one of a plurality of different polymer materials. For example, the liquid dielectric precursor material may be a precursor for a polyimide-based polymer, an epoxy-based polymer, or another type of polymer. As a specific example, the liquid dielectric precursor material may include monomer or oligomer molecules capable of polymerizing via a concentration reaction. In yet another specific example, the liquid dielectric precursor material may include cross-linked or end-cap monomer units that can participate in cross-linking in a subsequent curing stage.

These end cap monomer units are molecules that can stop or end the polymerization reaction of a specific molecule. More specifically, once each end of the linear polymer molecule or a polymer molecule that does not include a branched polymer chain has reacted with one of the end cap monomer molecules, the polymer molecule can no longer be Reacts with another non-terminally capped monomer or oligomer molecule. In other words, once each end of the polymer molecule has reacted with the end cap molecule, the polymer molecule can no longer increase the molecular weight beyond the crosslinking reaction, which will be discussed in detail below.

The liquid dielectric precursor material can be applied in a variety of ways. For example, the liquid dielectric precursor material may be applied via a spin-coating process to cover the portions of the conductive traces 660. As another example, the liquid dielectric precursor material can be applied by a method that can provide a uniform distribution and thickness of the liquid dielectric precursor material over the entire substrate 330.

After the application phase, the polymer formation process may proceed to the curing phase. In the curing stage, the liquid dielectric precursor material may be heated to form examples of the polymer layers 770. Generally, the liquid dielectric precursor material can be heated to a polymerization temperature for a period of time to promote the growth of polymer molecular chains from such monomer or oligomer molecules. However, the polymerization temperature is different from the cross-linking temperature, which is the temperature at which cross-linking occurs between the end cap or cross-linking monomer molecules. More specifically, the polymerization temperature may be a temperature lower than the crosslinking temperature of the end cap or the cross-linking monomer molecule. The polymer molecules of the polymer layer 770 may be formed to have a length or molecular weight that is statistically proportional to the number of monomer units and the end cap units in the liquid dielectric precursor material.

Optionally, the curing stage may include a volatile removal or degassing stage to remove volatile components in the liquid dielectric precursor material. As an example, the volatile components may include evaporated solvent molecules or molecules formed during the polymerization of the liquid dielectric precursor material. The optional volatile removal stage may include a gradual temperature increase to or maintained at a temperature close to the boiling point of the solvent of the liquid dielectric precursor material. The optional volatile removal stage may include agitating the liquid dielectric precursor material via vibration (such as ultrasonic vibration) to facilitate removal of volatile components. This volatile removal stage can prevent the formation of pores due to gas trapped in the polymer layers 770 and at the interface between the conductive traces 660 and the polymer layers 770.

Each of these polymer layers 770 may include a polymer layer thickness 772. The polymer layer thickness 772 of each of these polymer layers 770 may be determined after this curing stage. As an example, since the polymer layers 770 are transparent, an optical thickness measurement method can be used to determine the polymer layer thickness 772 of each of the polymer layers 770. Each such polymer layer 770 may have a different value for the polymer layer thickness 772. For example, the polymer layer thickness 772 of each such polymer layer 770 may be in the range of 1 micrometer to 20 micrometers. As a specific example, the polymer layer thickness 772 of each of the polymer layers 770 may be in a range of 1 micrometer to 5 micrometers. Generally, the polymer layer thickness 772 of each of the polymer layers 770 may be less than the thickness of the conductive traces 770.

The polymer layers 770 may be formed by repeatedly performing the polymer formation process sequence. Except for the examples of the polymer layers 770 formed on the substrate 330, each of the polymer layers 770 may be directly formed on the previously formed examples of the polymer layers 770 until the Up to conductive traces 660. For example, a first instance of the polymer layers 770 may surround and cover one of the sides of the trace planar portion 314 of the conductive trace. To continue the example, the second instance of the polymer layers 770 formed directly on the first instance of the polymer layers 770 may cover the remaining exposed portions of the trace planar portion 314 and the conductive traces One of these sides of the interconnecting portion 316 of the trace of 660. To further illustrate this example, the third instance of the polymer layers 770 formed directly on the second instance of the polymer layers 770 may cover the remaining exposed portion of the interconnect portion 316 of the trace.

For illustrative purposes, the structure of the seventh figure is shown as three examples with the polymer layers 770 formed to cover the conductive traces (as indicated by the dotted lines). However, it should be understood that different numbers of the polymer layers 770 may be formed to cover the conductive traces 330.

Referring now to the eighth figure, the structure of the seventh figure when one of the redistribution layers 320 is formed is shown. Examples of the redistribution layers 320 that can be formed from the structure of the seventh figure include the conductive traces 660 embedded in the plurality of polymer layers 770 of the seventh figure.

Examples of the redistribution layers 770 may be formed by removing a portion of the outermost instance of the polymer layers 770 to expose the conductive traces 770. For example, portions of the surface of the polymer layer 770 that are formed furthest away from the instance of the substrate 330 may be removed until the trace interconnecting portions 316 of the conductive traces 660 are exposed. The surface of the polymer layer 770 facing away from the substrate 330 may be planarized to be coplanar with the portions of the conductive traces 660 exposed from the outermost instance of the polymer layers 770.

The portions of the polymer layer 770 may be removed to expose the conductive traces 660 through a variety of different processes. For example, the removal process may include chemical polishing, chemical polishing, mechanical polishing, mechanical polishing, or a combination thereof.

As an example, the redistribution layers 320 may be formed to have a redistribution layer thickness 324 in a range of 10 μm to 60 μm or more. In the example illustrated in the eighth figure, from the interface between the substrate 330 and the instances of the redistribution layer 320 (such as the first side of the substrate 340) to the surface of the instance where the redistribution layer 320 faces away from the substrate 330 The thickness of the redistribution layers 320 is measured.

Referring now to the ninth figure, the structure of the eighth figure when the redistribution platform 106 of the first figure is formed is shown. The cross-sectional view depicts the redistribution platform 106 formed after the plural redistribution layers 320 are sequentially formed. For example, another example of the conductive traces 660 may be directly formed on the contact surface of the previously formed redistribution layer 320. To continue the example, additional examples of the polymer layers 770 of the seventh figure may be formed to cover yet another example of the conductive traces 660 and the previously formed examples of the redistribution layers 320. This process can be repeated to form a plurality of these redistribution layers 320 as depicted in the ninth figure.

After the final instance of the redistribution layers 320 is formed, the plurality of polymer layers 770 of the redistribution layers 320 may be further processed to form a homogeneous dielectric structure 212. For example, the homogeneous dielectric structure 212 may be a homogeneous polymer structure that does not contain any interstitial material (such as fiber reinforcement). Based on these properties of the dielectric material used to form the homogeneous dielectric structure 212, the absence or absence of interstitial or embedded substances enables the homogeneous dielectric structure 212 to be translucent or transparent.

A homogeneous dielectric structure 212 may be formed through crosslinking between the polymer layers 770 of the redistribution layers 320. More specifically, the homogeneous dielectric structure 212 may be formed by heating the polymer layer 770 to a cross-linking temperature, or heating to promote or promote the end caps in the entire polymer layer 770 and the proximity of the polymer layer 770. The temperature at which a chemical bond is formed at the interface between the instances to form a single continuous structure. The crosslinking temperature may be different from the temperature of the polymer molecules forming the polymer layers 770 as illustrated in the seventh figure. Generally, the crosslinking temperature is higher than the polymerization temperature of the liquid dielectric precursor material of the seventh figure. The cross-linking temperature may vary based on the end cap units used to form the cross-linking bonds between the polymer molecules.

It has been ascertained that a homogeneous dielectric structure 212 formed by cross-linking of polymer molecules between the redistribution layers 320 does not require a bonding material therebetween. More specifically, forming the cross-linked chemical bonds between the polymer molecules in the adjacent instances of the polymer layer 770 can form a homogeneous dielectric structure 212 without the need for an adhesive or a bonding material.

The traces 210 may be exposed from a surface of the homogeneous dielectric structure 212 facing away from the substrate 330. If necessary, the exposed portions of the traces 210 may be further processed to be covered with contact pads 322 to provide electrical connections to other test devices (such as the probe card 108 of the first figure). The routing traces 210 may extend through the homogeneous dielectric structure 212 and be connected to the through holes 332 on the first side of the substrate 330. The traces 210 embedded within the homogeneous dielectric structure 212 may provide an interlocking function.

The base plate 330 may provide additional rigid support for the redistribution platform 106. More specifically, the substrate 330 may provide structural support and rigidity for the homogeneous dielectric structure 212 and the traces 210. For electrical connection to other devices (such as the printed circuit board 104 of the first figure), the through substrate through holes 332 at the second side 342 of the substrate may be processed.

Referring now to the tenth figure, there is shown a schematic side view of the redistribution system 100 of the second figure in yet another embodiment. The redistribution system 100 can be implemented as a package substrate in this further embodiment. In this example, the redistribution system 100 may include the redistribution platform 106 of the first figure, a die 1012, a die attach adhesive 1016, electrical interconnects 1020, and a semiconductor cover 1022.

In this example, the die 1022 may be a semiconductor die, an integrated circuit, an optical device, or a combination thereof. The die 1012 may be directly attached to the semiconductor cover 1022 using a die attach adhesive 1016. In this example, the semiconductor cover 1012 may be a heat sink, a hermetically sealed packaging material, a radio frequency shield, or a combination thereof.

The electrical interconnect 1020 can be provided by providing electrical connections between electrical components (such as circuits, integrated circuits, logic, integrated logic, and electrical connections on one side of the redistribution platform 106) fabricated on the die 1012. Electrical connection between the die 1012 and the redistribution platform 106. As an example, the electrical interconnects 1020 may be solder balls or solder bumps.

The electrical interconnect 1020 can be placed on the second side of the redistribution platform 106, and provides the redistribution platform 106 and external devices (such as the probe card 108 in the first picture, the printed circuit board 104 in the first picture, or a combination thereof). ).

Referring now to FIG. 11, there is shown a flowchart of a method 1100 for manufacturing a redistribution system 100 in a specific embodiment of the present invention. The method 1100 includes: providing a substrate in a block 1102; forming a plurality of redistribution layers on the substrate in a block 1104, including: forming a conductive trace including a trace thickness in a block 1106; and A plurality of polymer layers are formed in a block 1008 without interstitial material and enclosing the conductive traces, wherein the polymer layer thickness of each of the polymer layers is less than the trace thickness of the conductive traces.

The resulting method, process, equipment, device, product, and / or system is simple, cost-effective, uncomplicated, highly versatile, accurate, sensitive, and effective, and can be manufactured, applied, and utilized for ready, effective, and economical use Adapt to known components. Another important aspect of the embodiments of the present invention is the historical trend of valuable support and maintenance to reduce costs, simplify systems, and improve performance.

Therefore, these and other valuable aspects of the specific embodiments of the present invention further advance the state of the technology to at least the next level.

Although the present invention has been described in connection with specific best modes, it should be understood that many alternatives, modifications, and variations will be apparent to those skilled in the art from the foregoing description. Accordingly, it is intended to cover all such alternatives, modifications, and variations that fall within the scope of the included patent applications. Everything explained in the translation or shown in the attached drawings is to be interpreted in an exemplary and non-limiting sense.

Claims (15)

    A redistribution system includes: a substrate; a plurality of redistribution layers on the substrate, comprising conductive traces and a plurality of polymer layers surrounding the conductive traces, wherein: one of each of these polymer layers The thickness of the polymer layer is less than the thickness of one of the conductive traces; and the polymer layers are free of interstitial substances.         For example, the redistribution system of the scope of patent application, wherein the polymer layers are attached to each other without intervening substances.         For example, the redistribution system according to the first patent application range, wherein the polymer layer has a thickness of 1 micrometer to 15 micrometers.         For example, the redistribution system according to the first patent application range, wherein the trace thickness is 5 micrometers to 15 micrometers.         For example, the redistribution system according to item 1 of the patent application range, wherein each of the plurality of redistribution layers includes a thickness of one of the redistribution layers of 10 micrometers to 30 micrometers.         A redistribution system includes a substrate including a through substrate through hole in the substrate, and a plurality of redistribution layers on the substrate including conductive traces and a plurality of polymer layers covering the conductive traces, wherein : The thickness of one polymer layer of each such polymer layer is less than the thickness of one of the conductive traces; and the polymer layers are attached to each other without intervening substances.         For example, the redistribution system under the scope of patent application No. 6, wherein the conductive traces include a trace interconnecting portion, which connects the conductive traces in one of the redistribution layers to the redistribution layers The conductive traces of an adjacent instance.         For example, the redistribution system under the scope of patent application No. 6 wherein the conductive traces are electrically connected to the substrate through holes.         For example, the redistribution system according to item 6 of the patent application, wherein the polymer layers are a polyimide polymer material.         For example, the redistribution system of claim 6 in which the substrate includes a ceramic substrate.         A method for manufacturing a redistribution system includes: providing a substrate; forming a plurality of redistribution layers on the substrate, including: forming a conductive trace including a trace thickness; and forming a gap-free substance and encapsulating the conductive traces A plurality of polymer layers of the wire, wherein the polymer layer thickness of each of the polymer layers is less than the trace thickness of the conductive traces.         For example, the method of claim 11, wherein forming the redistribution layers includes forming the redistribution layers with the polymer layers attached to each other without intervening substances.         The method of claim 11, wherein forming the polymer layers includes forming the polymer layers at a polymer layer thickness of 1 micrometer to 15 micrometers.         The method of claim 11, wherein forming the conductive traces includes forming the conductive traces with a trace thickness of 5 μm to 15 μm.         For example, the method of claim 11, wherein forming the redistribution layers includes forming the redistribution layers at a thickness of one of the redistribution layer from 10 microns to 30 microns.