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TW201944474A - Wafer processing method capable of appropriately dividing a wafer to form a plurality of flash memory chips - Google Patents

Wafer processing method capable of appropriately dividing a wafer to form a plurality of flash memory chips Download PDF

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TW201944474A
TW201944474A TW108113018A TW108113018A TW201944474A TW 201944474 A TW201944474 A TW 201944474A TW 108113018 A TW108113018 A TW 108113018A TW 108113018 A TW108113018 A TW 108113018A TW 201944474 A TW201944474 A TW 201944474A
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wafer
layer
flash memory
semiconductor substrate
cutting groove
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TW108113018A
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TWI825091B (en
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杉谷哲一
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日商迪思科股份有限公司
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    • H10P54/00
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/38Removing material by boring or cutting
    • H10P72/0428
    • H10W10/00
    • H10W10/01

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Laser Beam Processing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

[課題]提供可以適當地分割形成有複數快閃記憶體晶片之晶圓的晶圓之加工方法。
[解決手段]晶圓之加工方法至少由下述工程構成:切削溝形成工程,其係以切削刀(28)切削分割預定線(14)而在該第二記憶層(10)形成切削溝(30);改質層形成工程,其係將相對於半導體基板(4)具有穿透性之波長之雷射光線(LB)之聚光點定位在與分割預定線(14)對應之半導體基板(4)之內部而對半導體基板(4)照射雷射光線(LB),形成改質層(42);分割工程,其係研削半導體基板(4)之背面使裂紋(60)從改質層(42)生長而將晶圓(2)分割成各個快閃記憶體晶片(12);及DAF分割工程,其係在被分割成各個快閃記憶體晶片(12)之晶圓(2)的背面(2b)配設DAF62並擴張支持DAF62的支持膠帶(66)而將DAF62分割成每個快閃記憶體晶片(12)。
[Problem] To provide a method for processing a wafer capable of appropriately dividing a wafer on which a plurality of flash memory wafers are formed.
[Solution] A method for processing a wafer is composed of at least the following process: a cutting groove forming process, which is performed by cutting a predetermined division line (14) with a cutter (28) and forming a cutting groove (2) in the second memory layer (10). 30); the reforming layer forming process is to position the light-condensing point of the laser light (LB) with a wavelength penetrating to the semiconductor substrate (4) on the semiconductor substrate corresponding to the planned division line (14) ( 4), the semiconductor substrate (4) is irradiated with laser light (LB) to form a modified layer (42); the division process is to grind the back surface of the semiconductor substrate (4) to make cracks (60) from the modified layer ( 42) Grow and divide the wafer (2) into individual flash memory chips (12); and DAF division process, which is on the back of the wafer (2) that is divided into individual flash memory chips (12) (2b) The DAF62 is provided and the support tape (66) supporting the DAF62 is expanded to divide the DAF62 into each flash memory chip (12).

Description

晶圓之加工方法Processing method of wafer

本發明係關於一種晶圓之加工方法,其係將連結在半導體基板之表面交替疊層複數金屬膜和絕緣膜之第一記憶層,和在該第一記憶層將絕緣層作為結合層而交替疊層複數金屬膜和絕緣膜之第二記憶層而構成的複數快閃記憶體晶片藉由分割預定線而被區劃的晶圓,分割成各個快閃記憶體晶片。The invention relates to a method for processing a wafer, which comprises alternately stacking a first memory layer on a surface of a semiconductor substrate with a plurality of metal films and insulating films, and alternately using the insulating layer as a bonding layer on the first memory layer. A plurality of flash memory wafers formed by stacking a plurality of metal films and a second memory layer of an insulating film are divided into individual flash memory wafers by dividing a wafer divided by a predetermined line.

IC、LSI、快閃記憶體等之裝置係被疊層在矽等之半導體基板之表面,同時藉由分割預定線被區劃而以晶圓之型態被生成。而且,晶圓係藉由雷射加工裝置、切割裝置等之加工裝置而被分割成各個裝置,被分割之各裝置被利用於行動電話、個人電腦等之電器。Devices such as ICs, LSIs, and flash memories are laminated on the surface of a semiconductor substrate such as silicon, and are generated in the form of a wafer by dividing a predetermined line to be divided. The wafer is divided into various devices by processing devices such as a laser processing device and a dicing device, and the divided devices are used in appliances such as mobile phones and personal computers.

再者,提案有將相對於半導體基板具有穿透性之波長之雷射光線之聚光點定位在半導體基板之內部而對半導體基板照射雷射光線,沿著分割預定線而在半導體基板之內部形成改質層,之後,研削半導體基板之背面使其薄化,並且使裂紋從改質層生長而將晶圓分割成各個裝置的技術(參照例如專利文獻1)。
[先前技術文獻]
[專利文獻]
Furthermore, a proposal has been made to locate a light-condensing point of laser light having a wavelength penetrating to the semiconductor substrate inside the semiconductor substrate, and irradiate the semiconductor substrate with the laser light, along the predetermined division line, inside the semiconductor substrate. After the modified layer is formed, the back surface of the semiconductor substrate is ground to be thinned, and a crack is grown from the modified layer to divide the wafer into individual devices (see, for example, Patent Document 1).
[Prior technical literature]
[Patent Literature]

[專利文獻1]日本特開2014-7330號公報[Patent Document 1] Japanese Patent Laid-Open No. 2014-7330

[發明所欲解決之課題][Problems to be Solved by the Invention]

上述技術有藉由在被分割成各個裝置之晶圓之背面,配設被稱為DAF(晶粒黏接膜之黏接片)而進行擴張,將DAF分割成對應於裝置之大小的優點。The above-mentioned technology has the advantage of expanding the DAF (Die Adhesive Sheet of Adhesive Film) on the backside of the wafer divided into various devices, and dividing the DAF into the size corresponding to the device.

但是,在將連結在半導體基板之表面交替疊層複數金屬膜和絕緣膜之第一記憶層,和在該第一記憶層之上面將絕緣層作為結合層而交替疊層複數金屬膜和絕緣膜之第二記憶層而構成的複數快閃記憶體晶片藉由分割預定線而被區劃的晶圓,分割成各個快閃記憶體晶片的時候,當使用上述技術時,有從改質層生長之裂紋在結合層曲折而到達至第二記憶層,損傷第二記憶層,無法將晶圓適當地分割成各個快閃記憶體晶片之問題。However, a first memory layer in which a plurality of metal films and an insulating film are alternately laminated on a surface of a semiconductor substrate, and a plurality of metal films and insulating films are alternately laminated on the first memory layer with the insulating layer as a bonding layer. When a plurality of flash memory chips composed of a second memory layer are divided by dividing a predetermined line and divided into individual flash memory chips, when using the above technology, there are some The crack zigzags in the bonding layer to reach the second memory layer, damages the second memory layer, and fails to properly divide the wafer into individual flash memory wafers.

鑒於上述事實而創作出的本發明之課題在於提供一種晶圓之加工方法,其係可以適當地分割形成有複數快閃記憶體晶片的晶圓。

[用以解決課題之手段]
An object of the present invention, which was created in view of the above-mentioned facts, is to provide a wafer processing method that can appropriately divide a wafer formed with a plurality of flash memory wafers.

[Means to solve the problem]

為了解決上述課題,本發明提供以下的晶圓之加工方法。即是一種晶圓之加工方法,其係將連結在半導體基板之表面交替疊層複數金屬膜和絕緣膜之第一記憶層,和在該第一記憶層之上面將絕緣層作為結合層而交替疊層複數金屬膜和絕緣膜之第二記憶層而構成的複數快閃記憶體晶片藉由分割預定線而被區劃的晶圓,分割成各個快閃記憶體晶片,該晶圓之加工方法之特徵在於,至少由下述工程構成:切削溝形成工程,其係以切削刀切削分割預定線而在該第二記憶層形成切削溝;
改質層形成工程,其係將相對於半導體基板具有穿透性之波長之雷射光線之聚光點定位在與分割預定線對應之半導體基板之內部而對半導體基板照射雷射光線,形成改質層;分割工程,其係研削半導體基板之背面使裂紋從改質層生長而將晶圓分割成各個快閃記憶體晶片;及DAF分割工程,其係在被分割成各個快閃記憶體晶片之晶圓的背面配設DAF並擴張支持DAF的支持膠帶而將DAF分割成每個快閃記憶體晶片。
In order to solve the above problems, the present invention provides the following wafer processing method. That is, a wafer processing method, in which a first memory layer connected to a surface of a semiconductor substrate and alternately laminated with a plurality of metal films and insulating films, and alternately using an insulating layer as a bonding layer on the first memory layer A plurality of flash memory wafers formed by stacking a plurality of metal films and a second memory layer of an insulating film are divided into predetermined flash memory wafers by dividing a predetermined line, and the wafer is processed by It is characterized in that it is composed of at least the following process: a cutting groove forming process that uses a cutter to cut a predetermined division line to form a cutting groove in the second memory layer;
The reforming layer forming process is to position the light-condensing point of laser light with a wavelength penetrating to the semiconductor substrate within the semiconductor substrate corresponding to the predetermined division line, and irradiate the semiconductor substrate with laser light to form a reforming layer. Mass layer; segmentation process, which involves grinding the back of a semiconductor substrate to grow cracks from the reformer layer, and divide the wafer into individual flash memory chips; and DAF segmentation process, which involves dividing the wafer into individual flash memory chips The back of the wafer is equipped with DAF and the DAF support tape is expanded to divide the DAF into each flash memory chip.

在該切削溝形成工程中,以切削溝到達至該結合層為佳。

[發明效果]
In the cutting groove forming process, it is preferable that the cutting groove reaches the bonding layer.

[Inventive effect]

因本發明提供之晶圓之加工方法至少由下述工程構成:切削溝形成工程,其係以切削刀切削分割預定線而在該第二記憶層形成切削溝;改質層形成工程,其係將相對於半導體基板具有穿透性之波長之雷射光線之聚光點定位在與分割預定線對應之半導體基板之內部而對半導體基板照射雷射光線,形成改質層;及分割工程,其係研削半導體基板之背面使裂紋從改質層生長而將晶圓分割成各個快閃記憶體晶片;及DAF分割工程,其係在被分割成各個快閃記憶體晶片之晶圓的背面配設DAF並擴張支持DAF的支持膠帶而將DAF分割成每個快閃記憶體晶片,故從改質層生長的裂紋不會曲折地被引導至切削溝,可以將晶圓適當地分割成各個快閃記憶體晶片。The method for processing a wafer provided by the present invention is composed of at least the following processes: a cutting groove forming process that uses a cutter to cut a predetermined dividing line to form a cutting groove in the second memory layer; a reforming layer forming process that is The light-condensing point of the laser light having a wavelength penetrating to the semiconductor substrate is positioned inside the semiconductor substrate corresponding to the predetermined division line, and the semiconductor substrate is irradiated with the laser light to form a modified layer; and a division process, which It is to grind the back of the semiconductor substrate to grow cracks from the reforming layer to divide the wafer into individual flash memory wafers; and DAF division process, which is arranged on the back of the wafer that is divided into individual flash memory wafers DAF expands the DAF support tape and divides the DAF into each flash memory chip, so the cracks grown from the reformed layer are not tortuously guided to the cutting groove, and the wafer can be appropriately divided into individual flash memories. Memory chip.

以下,針對本發明之晶圓之加工方法之實施型態邊參照圖面邊進行說明。Hereinafter, the implementation mode of the wafer processing method of the present invention will be described with reference to the drawings.

在圖1中,表示藉由本發明之晶圓之加工方法能被施予加工的晶圓2。圓盤狀之晶圓2具有複數快閃記憶體晶片12,其係連結在半導體基板4之表面交替疊層複數金屬膜和絕緣膜之第一記憶層6、在第一記憶層6上面將絕緣層作為結合層8而交替疊層複數金屬膜和絕緣膜之第二記憶層10而構成。該些複數快閃記憶體晶片12藉由格子狀之分割預定線14被區劃。FIG. 1 shows a wafer 2 that can be processed by the wafer processing method of the present invention. The disc-shaped wafer 2 has a plurality of flash memory wafers 12, which are connected to the surface of the semiconductor substrate 4 by a first memory layer 6 in which a plurality of metal films and insulating films are alternately laminated, and the first memory layer 6 is insulated on the first memory layer 6. The second memory layer 10 is a layer in which a plurality of metal films and an insulating film are alternately laminated as a bonding layer 8. The plurality of flash memory chips 12 are partitioned by a grid-like dividing line 14.

作為晶圓2之半導體基板4,可以使用例如厚度400μm左右的矽基板。作為第一記憶層6及第二記憶層10,以交替疊層金屬膜和絕緣膜合計48層的厚度10μm左右者,或交替疊層金屬膜和絕緣膜合計32層的厚度8μm左右者為佳。再者,作為結合層8,可以使用厚度1μm左右之氮化膜或SiO2 膜等。As the semiconductor substrate 4 of the wafer 2, for example, a silicon substrate having a thickness of about 400 μm can be used. As the first memory layer 6 and the second memory layer 10, it is preferable to alternately stack a total of 48 layers of a metal film and an insulating film with a thickness of about 10 μm, or alternately stack a total of 32 layers of a metal film and an insulating film to have a thickness of about 8 μm. . As the bonding layer 8, a nitride film, a SiO 2 film, or the like having a thickness of about 1 μm can be used.

在圖示之實施型態中,首先實施以切削刀切削分割預定線14,在第二記憶層10形成切削溝的切削溝形成工程。切削溝形成工程例如可以使用在圖1及圖2表示一部分的切割裝置16而予以實施。切割裝置16具備吸引保持晶圓2之挾盤載置台18,和切削被吸引保持在挾盤載置台18之晶圓2的切削手段20(參照圖2)。In the embodiment shown in the figure, a cutting groove forming process is first performed by cutting a predetermined dividing line 14 with a cutter and forming a cutting groove in the second memory layer 10. The cutting groove formation process can be performed using, for example, a part of the cutting device 16 shown in FIGS. 1 and 2. The dicing apparatus 16 includes a reel mounting table 18 that sucks and holds the wafer 2, and a cutting means 20 (see FIG. 2) that cuts the wafer 2 that is sucked and held on the reel table 18.

如圖1所示般,在挾盤載置台18之上端部分,配置被連接於吸引手段(無圖示)之多孔質之圓形的吸附挾盤22,在挾盤載置台18,以吸引手段在吸附挾盤22之上面生成吸引力,使吸引保持被載置於上面的晶圓2。再者,挾盤載置台18係以在上下方向延伸之軸線為中心而藉由挾盤載置台用馬達(未圖示)而被旋轉,並且藉由X軸進給手段(未圖示)在圖1中以箭號X表示之X軸方向進退。As shown in FIG. 1, a porous circular suction pan 22 connected to a suction means (not shown) is arranged on the upper end portion of the pan mounting base 18, and the suction unit 18 is arranged on the pan mounting base 18. A suction force is generated on the suction pad 22, and the suction is performed to hold the wafer 2 placed thereon. In addition, the disk mounting table 18 is rotated around the axis extending in the vertical direction by a disk mounting table motor (not shown), and is rotated by an X-axis feed means (not shown). Advance and retreat in the X-axis direction indicated by the arrow X in FIG. 1.

如同圖2所示般,切削手段20包含在與X軸方向正交之Y軸方向(在圖2中以箭號Y表示的方向)延伸之轉軸套24,和以Y軸方向為軸心旋轉自如地被支持在轉軸套24的轉軸26,和使轉軸26旋轉之轉軸用馬達(未圖示),和被安裝於轉軸26之前端的環狀之切削刀28。轉軸套24係藉由Y軸進給手段(未圖示)在Y軸方向進退,藉由升降手段(未圖示)在上下方向升降。另外,X軸方向及Y軸方向規定的平面實質上水平。As shown in FIG. 2, the cutting means 20 includes a rotating shaft sleeve 24 extending in a Y-axis direction (a direction indicated by an arrow Y in FIG. 2) orthogonal to the X-axis direction, and a rotation centered on the Y-axis direction. The shaft 26 is freely supported by a shaft 26 of the shaft sleeve 24, a shaft motor (not shown) for rotating the shaft 26, and a ring-shaped cutter 28 attached to the front end of the shaft 26. The rotating shaft sleeve 24 is moved forward and backward in the Y-axis direction by a Y-axis feeding means (not shown), and is moved up and down in a vertical direction by a lifting means (not shown). The planes defined by the X-axis direction and the Y-axis direction are substantially horizontal.

如同圖1(a)所示般,在切削溝形成工程中,首先使晶圓2之表面2a朝上,在挾盤載置台18之上面吸引保持晶圓2。接著,以切割裝置16之攝像手段(未圖示)從上方攝像晶圓2,根據以攝像手段攝像到之晶圓2之畫像,使分割預定線14對準於X軸方向,並且將切削刀28定位於對準於X軸方向之分割預定線14的上方。接著,使切削刀28在圖2中以箭號A表示的方向旋轉。接著,使轉軸套24下降,使切削刀28之刀尖切入至對準於X軸方向之分割預定線14,並且使挾盤載置台18對切削手段20以特定進給速度相對性地在X軸方向進行加工進給,依此施予沿著分割預定線14而在第二記憶層10形成切削溝30的切削加工。該切削溝30之寬度例如20μm左右。再者,切削溝30之深度設為至少與第二記憶層10之厚度相同的深度(例如,8μm程度或10μm程度),以設為到達至結合層8之深度(例如9μm程度或11μm程度)為佳。或是如同圖3所示般,切削溝30即使超越結合層8而到達至第一記憶層6亦可。As shown in FIG. 1 (a), in the cutting groove forming process, first, the surface 2 a of the wafer 2 is directed upward, and the wafer 2 is attracted and held on the upper surface of the disk mounting table 18. Next, the imaging device (not shown) of the dicing device 16 is used to image the wafer 2 from above. Based on the image of the wafer 2 imaged by the imaging device, the planned division line 14 is aligned in the X-axis direction, and the cutting blade is aligned. 28 is positioned above a predetermined division line 14 aligned in the X-axis direction. Next, the cutter 28 is rotated in a direction indicated by an arrow A in FIG. 2. Next, the rotary shaft sleeve 24 is lowered, the tip of the cutter 28 is cut to a predetermined division line 14 aligned with the X-axis direction, and the disk mounting table 18 is relatively opposed to the cutting means 20 at a specific feed speed at X A machining feed is performed in the axial direction, and a cutting process for forming a cutting groove 30 in the second memory layer 10 along the predetermined division line 14 is performed accordingly. The width of the cutting groove 30 is, for example, about 20 μm. The depth of the cutting groove 30 is at least the same as the thickness of the second memory layer 10 (for example, about 8 μm or about 10 μm), and the depth to the bonding layer 8 (for example, about 9 μm or about 11 μm). Better. Alternatively, as shown in FIG. 3, the cutting groove 30 may reach the first memory layer 6 beyond the bonding layer 8.

接著,僅以分割預定線14之Y軸方向之間隔的部分,使轉軸套24對挾盤載置台18相對性地在Y軸方向進行分度進給。而且,藉由交替重複切削加工和分度進給,在X軸方向沿著所有對準後之分割預定線14而形成切削溝30。再者,使挾盤載置台18旋轉90度之後,藉由交替重複切削加工和分度進給,沿著與先前形成有切削溝30之分割預定線14正交的所有分割預定線14而形成切削溝30。如此一來,實施切削溝形成工程,沿著格子狀的分割預定線14而格子狀地形成切削溝30。Next, the rotary shaft sleeve 24 is relatively indexed in the Y-axis direction with respect to the disk mounting table 18 only at the portion in the Y-axis direction that divides the predetermined line 14. Further, the cutting groove 30 is formed by repeating the cutting process and the index feed alternately along all the planned division lines 14 after the alignment in the X-axis direction. In addition, after rotating the disk mounting table 18 by 90 degrees, it is formed by alternately repeating cutting processing and indexing feed along all planned division lines 14 orthogonal to the planned division line 14 where the cutting groove 30 was previously formed. Cutting groove 30. In this way, a cutting groove forming process is performed, and the cutting grooves 30 are formed in a grid pattern along the grid-like planned division lines 14.

於實施切削溝形成工程之後,實施改質層形成工程,該改質層形成工程係將相對於半導體基板4具有穿透性之波長之雷射光線之聚光點定位在與分割預定線14對應之半導體基板4之內部而對半導體基板4照射雷射光線,形成改質層。改質層形成工程例如可以使用在圖4及圖5表示一部分的雷射加工裝置32而予以實施。雷射加工裝置32具備吸引保持晶圓2之挾盤載置台34,和對被吸引保持在挾盤載置台34之晶圓2照射雷射脈衝光線LB的聚光器36(參照圖5)。如同圖4所示般,在挾盤載置台34之上端部分,配置有被連接於吸引手段(未圖示)之多孔質之圓形之吸附挾盤38。再者,挾盤載置台34被構成旋轉自如,並且被構成在X軸方向及Y軸方向進退自如。After the cutting groove forming process is performed, a modified layer forming process is performed. The modified layer forming process locates the light-condensing point of the laser light having a wavelength penetrating to the semiconductor substrate 4 so as to correspond to the planned division line 14 The semiconductor substrate 4 is irradiated with laser light inside the semiconductor substrate 4 to form a modified layer. The modified layer forming process can be performed using, for example, a laser processing device 32 which is partially shown in FIGS. 4 and 5. The laser processing apparatus 32 includes a disk mounting table 34 that sucks and holds the wafer 2, and a condenser 36 (see FIG. 5) that irradiates the laser pulse light LB to the wafer 2 that is sucked and held on the disk table 34. As shown in FIG. 4, at the upper end portion of the disk mounting table 34, a porous circular suction disk 38 connected to a suction means (not shown) is arranged. In addition, the disk mounting table 34 is configured to be rotatable and configured to move forward and backward in the X-axis direction and the Y-axis direction.

當參照圖4繼續說明時,在改質層形成工程中,首先在格子狀地形成切削溝30之晶圓2的表面2a,黏貼配設保護快閃記憶體晶片12之圓形的保護膠帶40。接著,使晶圓2之背面2b朝上,在挾盤載置台34之上面吸引保持晶圓2。接著,以雷射加工裝置32之攝像手段(未圖示)從上方攝像晶圓2,根據以攝像手段攝像到之晶圓2之畫像,使分割預定線14對準於X軸方向,並且將聚光器36定位在對準於X軸方向之分割預定線14的上方。此時,雖然晶圓2之背面2b朝上,形成有分割預定線14之表面2a朝下,但是藉由雷射加工裝置32之攝像手段包含對晶圓2照射紅外線之紅外線照射手段,和捕獲藉由紅外線照射手段被照射的紅外線之光學系統,和輸出與光學系統捕獲之紅外線對應之電訊號的攝像元件(紅外線CCD),可以從晶圓2之背面2b透過而攝像表面2a之分割預定線14。When continuing the description with reference to FIG. 4, in the modified layer forming process, first, a surface 2 a of the wafer 2 in which the cutting grooves 30 are formed in a grid pattern is attached with a circular protective tape 40 for protecting the flash memory wafer 12. . Next, the back surface 2b of the wafer 2 is directed upward, and the wafer 2 is sucked and held on the upper surface of the disk mounting table 34. Next, the imaging device (not shown) of the laser processing device 32 is used to image the wafer 2 from above. Based on the image of the wafer 2 imaged by the imaging device, the planned division line 14 is aligned with the X-axis direction, and The condenser 36 is positioned above a predetermined division line 14 aligned in the X-axis direction. At this time, although the back surface 2b of the wafer 2 faces upward and the surface 2a on which the planned division line 14 is formed faces downward, the imaging means by the laser processing device 32 includes an infrared irradiation means for irradiating the wafer 2 with infrared rays, and capture The optical system of infrared rays irradiated by the infrared irradiation means, and an imaging element (infrared CCD) that outputs an electric signal corresponding to the infrared rays captured by the optical system can pass through the back surface 2b of the wafer 2 and the predetermined division line of the imaging surface 2a 14.

接著,以雷射加工裝置32之聚光點位置調整手段(未圖示)使聚光器36升降,將脈衝雷射光線LB之聚光點定位在與分割預定線14對應之半導體基板4之內部。接著,如同圖5所示般,一面使挾盤載置台34對聚光器36以特定進給速度相對性地在X軸方向進行加工進給,一面從聚光器36照射相對於半導體基板4具有穿透性之波長的脈衝雷設光線LB,依此施予沿著分割預定線14而在半導體基板4之內部形成改質層42之改質層形成加工。另外,雖然改質層42被形成在半導體基板4之內部,實質上不會出現在背面,但是以鏈線表現圖像。改質層42係其強度較周圍小,再者,如同圖6所示般,在半導體基板4之厚度方向延伸。接著,僅以分割預定線14之Y軸方向之間隔的部分,使挾盤載置台34對聚光器36相對性地在Y軸方向進行分度進給。而且,藉由交替重複切削加工和分度進給,沿著對準於X軸方向之所有分割預定線14而在半導體基板4之內部形成改質層42。再者,使挾盤載置台34旋轉90度之後,藉由交替重複改質層形成加工和分度進給,沿著與先前形成有改質層42之分割預定線14正交的所有分割預定線14而在半導體基板4之內部形成改質層42。如此一來,實施改質層形成工程,沿著格子狀的分割預定線14而在半導體基板4之內部格子狀地形成改質層42。如此之改質層形成工程可以以例如以下之加工條件實施。
脈衝雷射光線之波長:1064nm
重覆頻率:80kHz
平均輸出:1.0W
進給速度:400mm/s
Next, the condenser 36 is raised and lowered by means of a focusing point position adjusting means (not shown) of the laser processing device 32 to position the focusing point of the pulsed laser beam LB on the semiconductor substrate 4 corresponding to the planned division line 14. internal. Next, as shown in FIG. 5, while the disk mounting table 34 relatively feeds the condenser 36 in the X-axis direction at a specific feed rate, the condenser 36 is irradiated with respect to the semiconductor substrate 4. A pulsed set light LB having a penetrating wavelength is subjected to a modified layer forming process for forming a modified layer 42 inside the semiconductor substrate 4 along a predetermined division line 14. In addition, although the modified layer 42 is formed inside the semiconductor substrate 4 and does not substantially appear on the back surface, the image is represented by a chain line. The modified layer 42 has a lower strength than the surroundings, and further extends in the thickness direction of the semiconductor substrate 4 as shown in FIG. 6. Next, only the part which divides the space | interval in the Y-axis direction of the predetermined line 14, the disk mounting table 34 relatively feeds the condenser 36 in the Y-axis direction relatively. Further, the modified layer 42 is formed inside the semiconductor substrate 4 by repeating the cutting process and the index feed alternately along all the planned division lines 14 aligned in the X-axis direction. In addition, after rotating the disk mounting table 34 by 90 degrees, by repeating the reforming layer forming process and indexing feed alternately, all division plans are orthogonal to the dividing plan line 14 on which the reforming layer 42 was previously formed. The wire 14 forms a modified layer 42 inside the semiconductor substrate 4. In this way, a modified layer forming process is performed, and the modified layer 42 is formed in a grid pattern inside the semiconductor substrate 4 along the grid-like planned division line 14. Such a modified layer forming process can be performed under the following processing conditions, for example.
Wavelength of pulsed laser light: 1064nm
Repeated frequency: 80kHz
Average output: 1.0W
Feed speed: 400mm / s

於實施改質層形成工程之後,實施分割工程,該分割工程係研削半導體基板4之背面(晶圓2之背面2b)使裂紋從改質層42生長而將晶圓2分割成各個快閃記憶體晶片12。分割工程例如可以使用圖7表示一部分的研削裝置44而予以實施。研削裝置44具備吸引保持晶圓2之挾盤載置台46,和研削被吸引保持在挾盤載置台46之晶圓2的研削手段48。After the modification layer formation process is performed, a division process is performed. The division process is to grind the back surface of the semiconductor substrate 4 (the back surface 2b of the wafer 2) to grow cracks from the modification layer 42 to divide the wafer 2 into flash memories. Body wafer 12. The division process can be performed using, for example, a part of the grinding device 44 shown in FIG. 7. The grinding device 44 includes a reel mounting table 46 that sucks and holds the wafer 2, and a grinding means 48 that grinds the wafer 2 that is sucked and held on the reel mounting table 46.

挾盤載置台46被構成在上面吸引保持晶圓2,並且旋轉自如。研削手段48包含被連結於轉軸用馬達(未圖示),並且在上下方向延伸之轉軸50,和被固定於轉軸50之下端的圓板狀之滾輪支架52。在滾輪支架52之下面,藉由螺栓54固定環狀之研削輪56。在研削輪56之下面之外周緣部,固定有在圓周方向隔著間隔被配置成環狀之複數研削磨石58。The chuck mounting table 46 is configured to attract and hold the wafer 2 on the upper surface and rotate freely. The grinding means 48 includes a rotating shaft 50 connected to a rotating shaft motor (not shown) and extending in the up-down direction, and a disk-shaped roller bracket 52 fixed to the lower end of the rotating shaft 50. Below the roller bracket 52, a ring-shaped grinding wheel 56 is fixed by a bolt 54. A plurality of grinding grinding stones 58 arranged in a ring shape at intervals in the circumferential direction are fixed to the outer peripheral portion below the grinding wheel 56.

當參照圖7繼續說明時,在分割工程中,首先使晶圓2之背面2a朝上,在挾盤載置台46之上面吸引保持晶圓2。接著,從上方觀看使挾盤載置台46以特定旋轉速度(例如300rpm)逆時鐘方向旋轉。再者,從上方觀看使挾盤載置台50以特定旋轉速度(例如6000rpm)逆時鐘方向旋轉。接著,以研削裝置44之升降手段(未圖示)使轉軸50下降,使研削磨石58接觸於晶圓2之背面2b。之後,以特定的研削進給速度(例如,1.0μm/s)使轉軸50下降。依此,可以研削晶圓2之背面2b,將晶圓2修飾成特定厚度(例如,100μm左右)。When the description is continued with reference to FIG. 7, in the singulation process, first, the back surface 2 a of the wafer 2 is directed upward, and the wafer 2 is attracted and held on the upper surface of the disk mounting table 46. Next, when viewed from above, the disk mounting table 46 is rotated counterclockwise at a specific rotation speed (for example, 300 rpm). In addition, when viewed from above, the disk mounting table 50 is rotated counterclockwise at a specific rotation speed (for example, 6000 rpm). Next, the rotating shaft 50 is lowered by the raising and lowering means (not shown) of the grinding device 44, and the grinding grindstone 58 is brought into contact with the back surface 2 b of the wafer 2. After that, the rotating shaft 50 is lowered at a specific grinding feed rate (for example, 1.0 μm / s). According to this, the back surface 2b of the wafer 2 can be ground, and the wafer 2 can be modified to a specific thickness (for example, about 100 μm).

再者,晶圓2之研削時,因研削進給所致的特定推壓力作用於晶圓2,故裂紋60從被形成在半導體基板4之內部的改質層42朝晶圓2之厚度方向生長。在同圖示之實施型態中,如同圖8(b)所示般,在切削溝形成工程中,因形成超越結合層8而到達至第一記憶層6之切削溝30,故從改質層42生長而到達至第一記憶層6的裂紋60不曲折地被引導致切削溝30。因此,如同圖8(a)所示般,以從被形成格子狀之改質層42生長的格子狀之裂紋60作為分割起點,可以將晶圓2沿著分割預定線14適當地分割成各個快閃記憶體晶片12。再者,因以從改質層42生長之裂紋60為分割起點,故鄰接的快閃記憶體晶片12彼此之間隔時質上為零。另外,切削溝30之深度若為至少與第二記憶層10之厚度相同的深度時,從改質層42生長之裂紋60則不會在結合層8曲折。再者,在圖示之實施型態中,雖然表示藉由研削除去改質層42之例,但是即使改質層42不被除去而分割起點包含改質層42亦可。Furthermore, during the grinding of the wafer 2, a specific pushing force due to the grinding feed acts on the wafer 2, so that the crack 60 goes from the modified layer 42 formed inside the semiconductor substrate 4 toward the thickness direction of the wafer 2. Grow. In the embodiment shown in the figure, as shown in FIG. 8 (b), in the cutting groove forming process, the cutting groove 30 that reaches the first memory layer 6 is formed because it passes beyond the bonding layer 8, so it is modified from The crack 60 that the layer 42 grows to reach the first memory layer 6 is not zigzagged and leads to a cutting groove 30. Therefore, as shown in FIG. 8 (a), using the lattice-shaped cracks 60 grown from the lattice-shaped modified layer 42 as a starting point of division, the wafer 2 can be appropriately divided into individual pieces along the predetermined division line 14. Flash memory chip 12. In addition, since the crack 60 growing from the modified layer 42 is used as a starting point for division, the interval between adjacent flash memory wafers 12 is substantially zero in quality. In addition, if the depth of the cutting groove 30 is at least the same as the thickness of the second memory layer 10, the crack 60 grown from the modified layer 42 will not bend in the bonding layer 8. In the illustrated embodiment, the modified layer 42 is removed by grinding, but the modified layer 42 may include the modified layer 42 even if the modified layer 42 is not removed.

於實施分割工程之後,實施DAF分割工程,其係在被分割成各個快閃記憶體晶片12之晶圓2之背面2b配設DAF,擴張支持DAF之支持膠帶而將DAF分割成每個快閃記憶體晶片12。在DAF分割工程中,首先,準備具有與晶圓2相同直徑之圓形的DAF62。在圖示之實施型態中,如同圖9所示般,DAF62被支撐於固定在周緣為環狀之框架64之圓形的支持膠帶66之中央部分。而且,在被分割成各個快閃記憶體晶片12之晶圓2之背面2b黏貼並配設DAF62。此時,雖然晶圓2被分割成各個快閃記憶體晶片12,但是藉由保護膠帶40維持圓盤狀之晶圓2的型態。接著,如同圖10所示般,從被分割成各個快閃記憶體晶片12之晶圓2的表面2a除去保護膠帶40。另外,在圖10中以符號68表示從切削溝30或裂紋60等構成的分割線。After the segmentation project is implemented, the DAF segmentation project is implemented. The DAF is configured on the back surface 2b of the wafer 2 that is divided into individual flash memory chips 12. The DAF support tape is expanded to divide the DAF into each flash. RAM chip 12. In the DAF division process, first, a DAF62 having a circular shape having the same diameter as that of the wafer 2 is prepared. In the illustrated embodiment, as shown in FIG. 9, the DAF 62 is supported on a central portion of a circular support tape 66 fixed to a frame 64 having a ring-shaped periphery. Further, a DAF 62 is attached to the back surface 2 b of the wafer 2 divided into the flash memory chips 12 and disposed thereon. At this time, although the wafer 2 is divided into individual flash memory wafers 12, the shape of the disc-shaped wafer 2 is maintained by the protective tape 40. Next, as shown in FIG. 10, the protective tape 40 is removed from the surface 2 a of the wafer 2 divided into the individual flash memory wafers 12. Note that, in FIG. 10, a dividing line formed from the cutting groove 30 or the crack 60 is indicated by a reference numeral 68.

接著,擴張支持DAF62之支持膠帶66而將DAF62分割成每個快閃記憶體晶片12。該DAF62之分割可以使用例如在圖11中表示一部分之擴張裝置70來實施。擴張裝置70包含圓筒狀之擴張鼓筒72,和升降自如地被配置在擴張鼓筒72之徑向外方的環狀之保持構件74,和在圓周方向隔著間隔附設在保持構件74之上端外周緣的複數挾具76。擴張鼓筒72之直徑大於晶圓2之直徑,並且小於框架64之內徑。再者,保持構件74之內徑及外徑對應於框架64之內徑及外徑而形成,成為可以在保持構件74之上面載置框架64。Then, the support tape 66 supporting the DAF62 is expanded to divide the DAF62 into each flash memory chip 12. The division of the DAF 62 can be performed using, for example, a part of the expansion device 70 shown in FIG. 11. The expansion device 70 includes a cylindrical expansion drum 72, a ring-shaped holding member 74 that is freely arranged radially outward of the expansion drum 72, and a holding member 74 that is attached to the holding member 74 at intervals in the circumferential direction. The upper outer periphery has a plurality of tools 76. The diameter of the expansion drum 72 is larger than the diameter of the wafer 2 and smaller than the inner diameter of the frame 64. In addition, the inner diameter and outer diameter of the holding member 74 are formed corresponding to the inner diameter and outer diameter of the frame 64 so that the frame 64 can be placed on the upper surface of the holding member 74.

當參照圖11繼續說明時,首先,將被分割成各個快閃記憶體晶片12之晶圓2朝上,將框架64載置於保持構件74之上面。此時,保持構件74之上面,被定位在與在圖11中以實線表示之擴張鼓筒72之上端幾乎相同的高度。接著,以複數挾具76固定框架64。接著,藉由汽缸等之升降手段(未圖示)使保持構件74下降。如此一來,因框架64與保持構件74一起下降,故被固定在框架64之支持膠帶66藉由相對性地上升之擴張鼓筒72而被擴張,成為在支持膠帶66作用放射狀張力。依此,如同在圖11以二點鏈線表示般,鄰接的快閃記憶體晶片12彼此之間隔變寬,並且被配設在被分割之晶圓2之背面2b的DAF62追隨著各個快閃記憶體晶片12,沿著各個快閃記憶體晶片12之周緣而適當地(工整地)被分割。而且,在背面安裝DAF62之各個快閃記憶體晶片12係經由黏接片亦即DAF62而被安裝於印刷基板(未圖示)等。When continuing the description with reference to FIG. 11, first, the wafer 2 divided into the flash memory wafers 12 faces upward, and the frame 64 is placed on the holding member 74. At this time, the upper surface of the holding member 74 is positioned at almost the same height as the upper end of the expansion drum 72 shown by a solid line in FIG. 11. Next, the frame 64 is fixed with a plurality of fixtures 76. Next, the holding member 74 is lowered by a lifting means (not shown) such as a cylinder. In this way, since the frame 64 is lowered together with the holding member 74, the support tape 66 fixed to the frame 64 is expanded by the expansion drum 72 which is relatively raised, and a radial tension acts on the support tape 66. Accordingly, as indicated by a two-dot chain line in FIG. 11, the distance between adjacent flash memory chips 12 is widened, and the DAF62 arranged on the back surface 2 b of the divided wafer 2 follows each flash. The memory chip 12 is appropriately (neatly) divided along the periphery of each of the flash memory chips 12. Further, each of the flash memory chips 12 on which the DAF62 is mounted on the back is mounted on a printed circuit board (not shown) or the like via an adhesive sheet, that is, the DAF62.

如同上述般,在圖示之實施形態中,在分割工程中,因從改質層42生長之裂紋60不會曲折地被引導至切削溝30,故可以將晶圓2沿著分割預定線14適當地分割成各個快閃記憶體晶片12。再者,在圖示之實施型態中,因以從改質層42生長之裂紋60作為分割起點,故可以將鄰接之快閃記憶體晶片12彼此之間隔設成實質上為零並且,在圖示之實施型態中,在DAF分割工程中,可以沿著各個快閃記憶體晶片12之周緣適當地(工整地)分割DAF62。As described above, in the embodiment shown in the figure, during the division process, the crack 60 grown from the modified layer 42 is not guided to the cutting groove 30 in a meandering manner, so the wafer 2 can be guided along the planned division line 14 It is appropriately divided into individual flash memory chips 12. Furthermore, in the embodiment shown in the figure, since the crack 60 growing from the modified layer 42 is used as a starting point for division, the interval between adjacent flash memory chips 12 can be set to substantially zero, and In the embodiment shown in the figure, in the DAF division process, the DAF 62 can be appropriately (neatly) divided along the periphery of each flash memory chip 12.

另外,於實施切削溝形成工程之前,因在晶圓2之背面2b配設DAF62,且考慮到在切削溝形成工程中不僅第二記憶層10,DAF62也與第一記憶層6及半導體基板4一起切削之點,而在晶圓2之背面2b配設DAF62之狀態下,於切削之時,晶圓2藉由DAF62之黏接層的彈性而搖晃,故在晶圓2之背面2b側,於晶圓2之內部產生裂紋,有對快閃記憶體晶片12之品質產生壞影響之虞。但是,在圖示之實施型態中,因在切削溝形成工程於晶圓2之背面2b不配設DAF62,並且在第二記憶層10形成切削溝30,故在晶圓2之背面2b側,於晶圓2之內部不產生裂紋。In addition, before the cutting groove formation process is performed, DAF62 is arranged on the back surface 2b of the wafer 2 and it is considered that not only the second memory layer 10, DAF62, but also the first memory layer 6 and the semiconductor substrate 4 are used in the cutting groove formation process. Point of cutting together, and in the state where the back surface 2b of wafer 2 is equipped with DAF62, at the time of cutting, wafer 2 is shaken by the elasticity of the adhesive layer of DAF62, so it is on the back surface 2b side of wafer 2, A crack is generated inside the wafer 2, which may have a bad influence on the quality of the flash memory chip 12. However, in the illustrated embodiment, the DAF 62 is not provided on the back surface 2 b of the wafer 2 in the cutting groove formation process, and the cutting groove 30 is formed on the second memory layer 10. No crack is generated inside the wafer 2.

2‧‧‧晶圓2‧‧‧ wafer

4‧‧‧半導體基板 4‧‧‧ semiconductor substrate

6‧‧‧第一記憶層 6‧‧‧ the first memory layer

8‧‧‧結合層 8‧‧‧Combination layer

10‧‧‧第二記憶層 10‧‧‧Second memory layer

12‧‧‧快閃記憶體晶片 12‧‧‧Flash Memory Chip

30‧‧‧切削溝 30‧‧‧ cutting groove

42‧‧‧改質層 42‧‧‧ Reformed floor

60‧‧‧裂紋 60‧‧‧ Crack

62‧‧‧DAF 62‧‧‧DAF

圖1(a)表示在切割裝置之挾盤載置台載置晶圓之狀態的斜視圖,(b)為晶圓之剖面圖。FIG. 1 (a) is a perspective view showing a state where a wafer is placed on a reel mounting table of a dicing apparatus, and (b) is a sectional view of the wafer.

圖2為表示實施有切削溝形成工程之狀態的斜視圖。 FIG. 2 is a perspective view showing a state where a cutting groove forming process is performed.

圖3為形成切削溝之晶圓的剖面圖。 FIG. 3 is a cross-sectional view of a wafer forming a cutting groove.

圖4為在晶圓之表面配設保護膠帶,在雷射加工裝置之挾盤載置台載置晶圓之狀態的斜視圖。 FIG. 4 is a perspective view of a state in which a protective tape is disposed on a surface of a wafer, and a wafer is placed on a disk mounting table of a laser processing apparatus.

圖5為表示實施有改質層形成工程之狀態的斜視圖。 FIG. 5 is a perspective view showing a state where a modified layer forming process is performed.

圖6為形成切削溝及改質層之晶圓的剖面圖。 FIG. 6 is a cross-sectional view of a wafer forming a cutting groove and a reforming layer.

圖7為表示實施有分割工程之狀態的斜視圖。 FIG. 7 is a perspective view showing a state where a division process is performed.

圖8(a)為被分割成各個快閃記憶體晶片之晶圓的斜視圖,(b)為被分割成各個快閃記憶體晶片之晶圓的剖面圖。 FIG. 8 (a) is a perspective view of a wafer divided into individual flash memory chips, and (b) is a cross-sectional view of a wafer divided into individual flash memory chips.

圖9為在被分割成各個快閃記憶體晶片之晶圓的背面,配設DAF之狀態的斜視圖。 FIG. 9 is a perspective view of a state where a DAF is disposed on a back surface of a wafer divided into individual flash memory chips.

圖10為表示保護膠帶從被分割成各個快閃記憶體晶片之晶圓之表面被除去之狀態的斜視圖。 FIG. 10 is a perspective view showing a state where a protective tape is removed from a surface of a wafer divided into individual flash memory chips.

圖11為表示DAF被分割成每個快閃記憶體晶片之狀態的斜視圖。 FIG. 11 is a perspective view showing a state in which the DAF is divided into each flash memory chip.

Claims (2)

一種晶圓之加工方法,其係將連結在半導體基板之表面交替疊層複數金屬膜和絕緣膜之第一記憶層,和在該第一記憶層之上面將絕緣層作為結合層而交替疊層複數金屬膜和絕緣膜之第二記憶層而構成的複數快閃記憶體晶片藉由分割預定線而被區劃的晶圓,分割成各個快閃記憶體晶片,該晶圓之加工方法之特徵在於,至少由下述工程構成: 切削溝形成工程,其係以切削刀切削分割預定線而在該第二記憶層形成切削溝; 改質層形成工程,其係將相對於半導體基板具有穿透性之波長之雷射光線之聚光點定位在與分割預定線對應之半導體基板之內部而對半導體基板照射雷射光線,形成改質層;及 分割工程,其係研削半導體基板之背面使裂紋從改質層生長而將晶圓分割成各個快閃記憶體晶片;及 DAF分割工程,其係在被分割成各個快閃記憶體晶片之晶圓的背面配設DAF並擴張支持DAF的支持膠帶而將DAF分割成每個快閃記憶體晶片。A wafer processing method comprising alternately stacking a first memory layer connected to a surface of a semiconductor substrate with a plurality of metal films and insulating films, and alternately stacking the insulating layer as a bonding layer on the first memory layer. A plurality of flash memory chips composed of a plurality of metal films and a second memory layer of an insulating film are divided into predetermined flash memory wafers by dividing a predetermined line, and the wafer processing method is characterized in that: Consisting of at least the following projects: A cutting groove forming process is to form a cutting groove in the second memory layer by cutting a predetermined dividing line with a cutter; The reforming layer forming process is to position the light-condensing point of laser light with a wavelength penetrating to the semiconductor substrate within the semiconductor substrate corresponding to the predetermined division line, and irradiate the semiconductor substrate with laser light to form a reform Stratum corneum; and Dividing process involves grinding the back surface of a semiconductor substrate to grow cracks from the reforming layer and dividing the wafer into individual flash memory wafers; and In the DAF division process, a DAF is arranged on the back of a wafer that is divided into individual flash memory chips, and a DAF-supporting tape is expanded to divide the DAF into each flash memory chip. 如請求項1記載之晶圓之加工方法,其中 在該切削溝形成工程中,切削溝到達至該結合層。The method of processing a wafer as described in claim 1, wherein In the cutting groove forming process, the cutting groove reaches the bonding layer.
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