TW201929617A - Flexible substrate - Google Patents
Flexible substrate Download PDFInfo
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- TW201929617A TW201929617A TW106143555A TW106143555A TW201929617A TW 201929617 A TW201929617 A TW 201929617A TW 106143555 A TW106143555 A TW 106143555A TW 106143555 A TW106143555 A TW 106143555A TW 201929617 A TW201929617 A TW 201929617A
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- 239000000758 substrate Substances 0.000 title claims abstract description 144
- 239000000463 material Substances 0.000 claims description 49
- 238000000034 method Methods 0.000 claims description 44
- 239000002184 metal Substances 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 238000004519 manufacturing process Methods 0.000 claims description 18
- 239000003989 dielectric material Substances 0.000 claims description 15
- 150000001875 compounds Chemical class 0.000 claims description 13
- 230000000149 penetrating effect Effects 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 211
- 230000008569 process Effects 0.000 description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 14
- 229910052802 copper Inorganic materials 0.000 description 13
- 239000010949 copper Substances 0.000 description 13
- 230000001681 protective effect Effects 0.000 description 13
- 239000004020 conductor Substances 0.000 description 12
- 239000012792 core layer Substances 0.000 description 12
- 239000004593 Epoxy Substances 0.000 description 11
- 239000003822 epoxy resin Substances 0.000 description 11
- 238000005530 etching Methods 0.000 description 11
- 229920000647 polyepoxide Polymers 0.000 description 11
- 238000013461 design Methods 0.000 description 9
- 239000003292 glue Substances 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 8
- 239000007769 metal material Substances 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 7
- 239000000945 filler Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 238000000576 coating method Methods 0.000 description 5
- 238000005553 drilling Methods 0.000 description 5
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- 238000000465 moulding Methods 0.000 description 5
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- 238000003825 pressing Methods 0.000 description 4
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- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000003973 paint Substances 0.000 description 3
- 239000002335 surface treatment layer Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
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- 150000001879 copper Chemical class 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- 229920006336 epoxy molding compound Polymers 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
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Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
本發明係有關一種封裝基板,尤指一種可撓式基板。 The invention relates to a package substrate, in particular to a flexible substrate.
軟硬結合電路板目前廣泛應用於智慧型手機板、光電板、互補式金屬氧化物半導體(Complementary Metal-Oxide-Semiconductor,簡稱CMOS)、電池模組和穿戴裝置。 Soft and hard combined circuit boards are widely used in smart phone boards, photovoltaic boards, Complementary Metal-Oxide-Semiconductor (CMOS), battery modules and wearable devices.
傳統軟硬結合板係將軟板結構包覆於硬板結構內,僅露出需撓折的部分,並以層間互連取代傳統的表面焊接,故不僅能節省機構空間與簡化組裝流程,也能有效降低訊號從軟板結構傳遞到硬板結構的雜訊問題。 The traditional soft and hard bonding board coats the soft board structure in the hard board structure, reveals only the parts to be flexed, and replaces the traditional surface welding with interlayer interconnection, so it can not only save the mechanism space and simplify the assembly process, but also Effectively reduce the noise of signals transmitted from the soft board structure to the hard board structure.
因此,藉由其良好的可靠性、組裝方便性、雜訊抑制等優點,使得軟硬結合板在目前電子產品的使用比例上快速地成長,並特別適用於需要輕、薄、短、小的行動裝置與穿戴式裝置。 Therefore, the advantages of good reliability, ease of assembly, noise suppression, etc., make the soft and hard bonding board grow rapidly in the current use ratio of electronic products, and are particularly suitable for being light, thin, short, and small. Mobile devices and wearable devices.
第1A至1D圖係為習知軟硬結合型封裝基板1之第一製法之剖面示意圖。 1A to 1D are schematic cross-sectional views showing a first method of the conventional soft-hard bonding type package substrate 1.
如第1A至1B圖所示,於一具有撓折段A之軟板10之相對兩側上分別貼合一具有穿孔110之硬板11,且該些 穿孔110對應該撓折段A,使該撓折段A對應外露於該些穿孔110。 As shown in FIGS. 1A to 1B, a hard board 11 having perforations 110 is attached to opposite sides of a flexible board 10 having a flexible section A, and The through hole 110 corresponds to the flexible segment A, so that the flexible segment A is correspondingly exposed to the through holes 110.
所述之軟板10具有一核心層10a、設於該核心層10a相對兩側之第一線路層10b、包覆該第一線路層10b之覆蓋膠層(Coverly Adhesives)10c、及遮蓋該覆蓋膠層10c之覆蓋保護膜10d。例如,以銅箔基板(copper clad laminate,簡稱CCL)製作該核心層10a與該第一線路層10b。 The soft board 10 has a core layer 10a, a first circuit layer 10b disposed on opposite sides of the core layer 10a, a cover layer 10c covering the first circuit layer 10b, and covering the cover. The adhesive layer 10c covers the protective film 10d. For example, the core layer 10a and the first wiring layer 10b are formed by a copper clad laminate (CCL).
所述之硬板11具有一硬質基材11a、設於該硬質基材11a其中一側之金屬層11b及設於該硬質基材11a另一側之純膠材11c,且該硬板11以機械鑽孔方式貫穿該硬質基材11a、金屬層11b與純膠材11c而形成該穿孔110,再以其純膠材11c黏貼於該軟板10之覆蓋保護膜10d上。 The hard board 11 has a hard base material 11a, a metal layer 11b disposed on one side of the hard base material 11a, and a pure rubber material 11c disposed on the other side of the hard base material 11a, and the hard board 11 is The mechanical drilling method penetrates the hard substrate 11a, the metal layer 11b, and the pure rubber material 11c to form the through hole 110, and then adheres to the cover protective film 10d of the soft board 10 with the pure rubber material 11c.
如第1C圖所示,以機械鑽孔或雷射燒灼方式貫穿該軟板10與該硬板11,以形成複數通孔100。 As shown in FIG. 1C, the soft board 10 and the hard board 11 are penetrated by mechanical drilling or laser cauterization to form a plurality of through holes 100.
如第1D圖所示,藉由該金屬層11b電鍍導電材12a於整層該金屬層11b上及該些通孔100之孔壁上,再經圖案化蝕刻該金屬層11b與該導電材12a,以於該硬質基材11a上形成第二線路層12,且於該些通孔100中形成中空型導電通孔13,以令該導電通孔13電性連接該些第一線路層10b之電性接觸墊101與第二線路層12。之後,於該硬質基材11a與該第二線路層12上及於該導電通孔13中形成外露部分該第二線路層12之防焊層14(如油墨或綠漆),但該防焊層14未形成於該穿孔110中。 As shown in FIG. 1D, the metal layer 11b is plated with the conductive material 12a on the entire metal layer 11b and the hole walls of the through holes 100, and the metal layer 11b and the conductive material 12a are patterned and etched. The second circuit layer 12 is formed on the hard substrate 11a, and the hollow conductive vias 13 are formed in the through holes 100 to electrically connect the conductive vias 13 to the first circuit layers 10b. The electrical contact pad 101 and the second circuit layer 12. Thereafter, a solder resist layer 14 (such as ink or green paint) of the second circuit layer 12 is exposed on the hard substrate 11a and the second circuit layer 12 and in the conductive via 13 , but the solder resist is formed. Layer 14 is not formed in the perforations 110.
因此,習知軟硬結合型封裝基板1係藉由該撓折段A 與該穿孔110之設計以進行撓曲動作。 Therefore, the conventional soft-hard-bond type package substrate 1 is by the flexible segment A The perforation 110 is designed to perform a flexing action.
惟,習知軟硬結合型封裝基板1中,因該軟板10之層間尺寸變異較大,且受到貼合製程限制,導致該軟板10與該硬板11的層間對位精度不佳(該純膠材11c容易使該硬板11偏位,致使該軟板10與該硬板11的層間對位精度約+/-100um),故需增加該軟板10之電性接觸墊101的面積,以避免孔位偏移而使該導電通孔13無法連接該電性接觸墊101,但也因此減少該第一線路層10b之其它功能線路之佈線面積,導致需增大該軟板10之寬度或減少該軟板10之線路功能。然而,若不增加該電性接觸墊101之面積,則需增加該電性接觸墊101與其周圍線路之間的距離t,以避免因孔位偏移而錯接所導致之電路短路之問題,但也因此無法符合細間距的需求。 However, in the conventional soft-hard-bonding type package substrate 1, since the interlayer size variation of the flexible board 10 is large and the bonding process is limited, the interlayer alignment accuracy of the flexible board 10 and the hard board 11 is not good ( The pure rubber material 11c easily biases the hard plate 11 so that the interlayer alignment accuracy of the soft plate 10 and the hard plate 11 is about +/- 100 um), so it is necessary to increase the electrical contact pad 101 of the soft plate 10. The area is prevented from being displaced by the hole position, so that the conductive via hole 13 cannot be connected to the electrical contact pad 101, but the wiring area of the other functional lines of the first circuit layer 10b is also reduced, resulting in the need to increase the soft board 10 The width or the line function of the soft board 10 is reduced. However, if the area of the electrical contact pad 101 is not increased, the distance t between the electrical contact pad 101 and its surrounding lines needs to be increased to avoid the short circuit of the circuit caused by the misalignment of the hole position. However, it is therefore impossible to meet the requirements of fine pitch.
再者,由於該硬板11以其純膠材11c黏貼於該軟板10上,致使該軟板10與該硬板11的交接處會產生溢膠e(如第1B圖所示之穿孔110角落處受該硬質基材11a之壓迫)、缺膠、板邊凹陷等問題,進而影響後續組裝貼合與撓折能力。 Moreover, since the hard board 11 is adhered to the soft board 10 with its pure rubber material 11c, an overflow e is generated at the intersection of the soft board 10 and the hard board 11 (such as the perforation 110 shown in FIG. 1B). The corner is subjected to the pressing of the hard substrate 11a, the lack of glue, the edge of the plate, and the like, thereby affecting the subsequent assembly and flexing ability.
又,該封裝基板1受限於該軟板10之核心層10a、該硬板11之厚度(一定的厚度才能提供所需之硬度)與雙面增層(上下兩側之第二線路層12)之設計,故該封裝基板1之厚度H難以降到0.3mm以下,因而難以符合薄化之需求。 Moreover, the package substrate 1 is limited by the core layer 10a of the flexible board 10, the thickness of the hard board 11 (a certain thickness to provide a desired hardness), and the double-sided layering (the second circuit layer 12 on the upper and lower sides) The design of the package substrate 1 is difficult to reduce to a thickness of 0.3 mm or less, and thus it is difficult to meet the demand for thinning.
第2A至2D圖係為習知軟硬結合型封裝基板2之第二 製法之剖面示意圖。 2A to 2D are the second of the conventional soft and hard type package substrate 2 Schematic diagram of the process.
如第2A至2B圖所示,於一具有撓折段A之軟板20之相對兩側上分別壓合一具有穿孔210之介電層21,且該些穿孔210對應該撓折段A,使該撓折段A對應外露於該些穿孔210。接著,於該些介電層21、該穿孔210之孔壁與該撓折段A上形成如銅材之金屬層21b。 As shown in FIG. 2A to FIG. 2B, a dielectric layer 21 having a through hole 210 is respectively pressed on opposite sides of a flexible board 20 having a flexible segment A, and the through holes 210 correspond to the flexible segment A, The flexible segment A is correspondingly exposed to the through holes 210. Next, a metal layer 21b such as a copper material is formed on the dielectric layer 21, the hole wall of the through hole 210, and the flexible segment A.
所述之軟板20具有一核心層20a、設於該核心層20a相對兩側之第一線路層20b、形成於該撓折段A上之覆蓋膠層20c、及遮蓋該覆蓋膠層20c之覆蓋保護膜20d。例如,以銅箔基板(CCL)製作該核心層20a與該第一線路層20b。 The soft board 20 has a core layer 20a, a first circuit layer 20b disposed on opposite sides of the core layer 20a, a cover layer 20c formed on the flexure segment A, and a cover layer 20c. The protective film 20d is covered. For example, the core layer 20a and the first wiring layer 20b are formed of a copper foil substrate (CCL).
所述之介電層21係為預浸材(prepreg,簡稱PP),並以機械鑽孔方式貫穿該介電層21而形成該穿孔210,且該介電層21結合該軟板20之核心層20a、第一線路層20b與部分覆蓋保護膜20d。 The dielectric layer 21 is a prepreg (PP), and the through hole 210 is formed through the dielectric layer 21 by mechanical drilling, and the dielectric layer 21 is combined with the core of the soft board 20 . The layer 20a, the first wiring layer 20b and a portion of the protective film 20d are covered.
如第2C圖所示,以機械鑽孔或雷射燒灼方式貫穿該軟板20、該介電層21與該金屬層21b,以形成複數通孔200。 As shown in FIG. 2C, the flexible board 20, the dielectric layer 21 and the metal layer 21b are penetrated by mechanical drilling or laser cauterization to form a plurality of through holes 200.
如第2D圖所示,藉由該金屬層21b電鍍導電材22a於該金屬層21b上及該些通孔200之孔壁上,再經圖案化蝕刻該金屬層21b與該導電材22a,以於該介電層21上形成第二線路層22,且於該些通孔200中形成中空型導電通孔23,以令該導電通孔23電性連接該第一線路層20b之電性接觸墊201與該第二線路層22。之後,於該介電層21與該第二線路層22上及於該導電通孔23中形成外露部分 該第二線路層22之防焊層24(如油墨或綠漆),但該防焊層24未形成於該穿孔210中。 As shown in FIG. 2D, the metal layer 21b is plated with the conductive material 22a on the metal layer 21b and the hole walls of the through holes 200, and then the metal layer 21b and the conductive material 22a are patterned and etched to A second circuit layer 22 is formed on the dielectric layer 21, and a hollow conductive via 23 is formed in the via holes 200 to electrically connect the conductive vias 23 to the first circuit layer 20b. Pad 201 and the second circuit layer 22. Thereafter, an exposed portion is formed on the dielectric layer 21 and the second circuit layer 22 and in the conductive via 23 The solder resist layer 24 (such as ink or green paint) of the second wiring layer 22, but the solder resist layer 24 is not formed in the through hole 210.
因此,習知軟硬結合型封裝基板2係藉由該撓折段A與該穿孔210之設計以進行撓曲動作。 Therefore, the conventional soft-bonded package substrate 2 is designed to perform a flexing operation by the design of the flexible segment A and the through hole 210.
惟,習知軟硬結合型封裝基板2中,因該軟板20之層間尺寸變異較大,且於壓合製程中,需以高溫高壓結合不同材料的介電層21,導致該封裝基板2容易產生不規則變形,且該軟板20與該介電層21的層間對位精度不佳(約+/-100um),故需增加該軟板20之電性接觸墊201的面積,以避免孔位偏移而使該導電通孔23無法連接該電性接觸墊201,但也因此減少該第一線路層20b之其它功能線路之佈線面積,導致需增大該軟板20之寬度或減少該軟板20之線路功能。然而,若不增加該電性接觸墊201之面積,則需增加該電性接觸墊201與其周圍線路之間的距離t,以避免因孔位偏移而錯接所導致之電路短路之問題,但也因此無法符合細間距的需求。 However, in the conventional soft-hard-bond type package substrate 2, since the interlayer size of the soft board 20 varies greatly, and in the press-bonding process, the dielectric layer 21 of different materials is required to be combined with high temperature and high pressure, resulting in the package substrate 2 Irregular deformation is easy to occur, and the interlayer alignment accuracy of the flexible board 20 and the dielectric layer 21 is not good (about +/- 100 um), so the area of the electrical contact pad 201 of the flexible board 20 needs to be increased to avoid The hole position is offset such that the conductive via 23 cannot be connected to the electrical contact pad 201, but the wiring area of the other functional lines of the first circuit layer 20b is also reduced, resulting in an increase in the width or reduction of the flexible board 20. The line function of the soft board 20. However, if the area of the electrical contact pad 201 is not increased, the distance t between the electrical contact pad 201 and its surrounding lines needs to be increased to avoid the short circuit of the circuit caused by the misalignment of the hole position. However, it is therefore impossible to meet the requirements of fine pitch.
再者,因該封裝基板2之軟硬交接處同時有如預浸材(PP)之介電層21與該覆蓋保護膜20d等兩種材質,故於壓合該介電層21後,此處容易發生隆起,進而影響後續組裝貼合與撓折能力。 Furthermore, since the soft and hard junction of the package substrate 2 has two materials such as a dielectric layer 21 of a prepreg (PP) and the cover protective film 20d, after pressing the dielectric layer 21, here It is prone to bulging, which in turn affects the ability of subsequent assembly and flexing.
又,該封裝基板2受限於該軟板20之核心層20a與該覆蓋保護膜20d之厚度(一定的厚度才不會因撓曲而碎裂)、該介電層21之厚度(一定的厚度才能提供所需之硬度)及雙面增層(上下兩側之第二線路層22)之設計,故 該封裝基板2之厚度h難以降到0.25mm以下,因而難以符合薄化之需求。 Moreover, the package substrate 2 is limited by the thickness of the core layer 20a of the flexible board 20 and the cover protective film 20d (the thickness is not broken due to deflection), and the thickness of the dielectric layer 21 (constant) The thickness can provide the required hardness) and the design of the double-sided layer (the second circuit layer 22 on the upper and lower sides), so The thickness h of the package substrate 2 is hard to fall below 0.25 mm, and thus it is difficult to meet the demand for thinning.
第3A至3E圖係為習知軟硬結合型封裝基板3之第三製法之剖面示意圖。 3A to 3E are schematic cross-sectional views showing a third method of the conventional soft-hard bonding type package substrate 3.
如第3A圖所示,提供一具有開口311之硬板31,其包含一硬質基材31a及設於該硬質基材31a相對兩側上之內部線路層31c。例如,以銅箔基板(CCL)製作該硬質基材31a與該內部線路層31c,並以機械鑽孔方式貫穿該硬質基材31a而形成該開口311。 As shown in FIG. 3A, a hard plate 31 having an opening 311 is provided which includes a hard substrate 31a and an inner wiring layer 31c provided on opposite sides of the hard substrate 31a. For example, the hard substrate 31a and the internal wiring layer 31c are formed by a copper foil substrate (CCL), and the opening 311 is formed by mechanically drilling the hard substrate 31a.
如第3B圖所示,於該開口311中設置一具有撓折段A之軟板30,其具有一核心層30a、設於該核心層30a相對兩側之第一線路層30b、形成於該撓折段A上之覆蓋膠層30c、及遮蓋該覆蓋膠層30c之覆蓋保護膜30d。 As shown in FIG. 3B, a soft board 30 having a flexible section A is disposed in the opening 311, and has a core layer 30a, and a first circuit layer 30b disposed on opposite sides of the core layer 30a. The cover layer 30c on the flexible segment A and the cover protective film 30d covering the cover layer 30c.
如第3C圖所示,於該硬板31與該軟板30之相對兩側上分別壓合一具有穿孔310之介電層31d,且該些穿孔310對應該撓折段A,使該撓折段A對應外露於該些穿孔310。接著,於該些介電層31d、該穿孔310之孔壁與該撓折段A上形成如銅材之金屬層31b。之後,貫穿該硬板31、該介電層31d與該金屬層31b以形成複數通孔300,且貫穿該介電層31d與該金屬層31b以形成複數外露部分該第一線路層30b之盲孔301。 As shown in FIG. 3C, a dielectric layer 31d having a through hole 310 is respectively pressed on opposite sides of the hard board 31 and the soft board 30, and the through holes 310 correspond to the flexible section A, so that the The segment A is correspondingly exposed to the perforations 310. Next, a metal layer 31b such as a copper material is formed on the dielectric layer 31d, the hole wall of the through hole 310, and the flexible segment A. Thereafter, the hard board 31, the dielectric layer 31d and the metal layer 31b are formed to form a plurality of via holes 300, and the dielectric layer 31d and the metal layer 31b are formed to form a plurality of exposed portions of the first circuit layer 30b. Hole 301.
所述之介電層31d係為預浸材(prepreg,簡稱PP),且該介電層31d結合該硬板31、該軟板30之部分第一線路層30b與部分覆蓋保護膜30d。 The dielectric layer 31d is a prepreg (PP for short), and the dielectric layer 31d is combined with the hard board 31, a portion of the first circuit layer 30b of the soft board 30, and a portion of the protective film 30d.
如第3D圖所示,藉由該金屬層31b電鍍導電材32a於整層該金屬層31b上、該些通孔300之孔壁上及該些盲孔300中,再經圖案化蝕刻該金屬層31b與該導電材32a,以於該介電層31d上形成第二線路層32,且於該些通孔300中形成用以電性連接該些內部線路層31c與第二線路層32之導電通孔33,並於該些盲孔301中形成用以電性連接該些第一與第二線路層30b,32之導電盲孔320。之後,於該介電層31d上形成一用以電性連接該第二線路層32之增層線路結構35,且該增層線路結構35上形成有一外露部分該增層線路結構35之防焊層34(如油墨或綠漆)。 As shown in FIG. 3D, the metal layer 31b is plated with the conductive material 32a on the entire metal layer 31b, the hole walls of the through holes 300, and the blind holes 300, and then patterned and etched. The layer 31b and the conductive material 32a are formed on the dielectric layer 31d to form a second circuit layer 32, and are formed in the through holes 300 for electrically connecting the internal circuit layer 31c and the second circuit layer 32. The conductive vias 33 are formed, and the conductive vias 320 for electrically connecting the first and second circuit layers 30b, 32 are formed in the blind vias 301. Then, a build-up line structure 35 for electrically connecting the second circuit layer 32 is formed on the dielectric layer 31d, and an exposed portion of the build-up line structure 35 is formed with an anti-welding portion of the build-up line structure 35. Layer 34 (such as ink or green paint).
如第3E圖所示,以機械切除方式移除對應該穿孔310上方之材質(即該增層線路結構35、該導電材32a與該金屬層31b),以外露該撓折段A(即外露該覆蓋保護膜30d)。 As shown in FIG. 3E, the material corresponding to the upper side of the through hole 310 (ie, the build-up line structure 35, the conductive material 32a and the metal layer 31b) is removed by mechanical ablation, and the flexible segment A is exposed (ie, exposed) This covers the protective film 30d).
因此,習知軟硬結合型封裝基板3係藉由該撓折段A之設計以進行撓曲動作。 Therefore, the conventional soft-bonded package substrate 3 is designed to perform a flexing operation by the design of the flexible segment A.
惟,習知軟硬結合型封裝基板3中,因該第二線路層32使用減層法製作(即經由蝕刻該金屬層31b與該導電材32a),故受限於線路製程之能力,該第二線路層32之線寬/線距(L/S)僅能呈現大於或等於40/40um,並無法小於40/40um。 However, in the conventional soft-bond type package substrate 3, since the second wiring layer 32 is formed by a subtractive layer method (that is, by etching the metal layer 31b and the conductive material 32a), it is limited by the capability of the line process. The line width/line spacing (L/S) of the second circuit layer 32 can only be greater than or equal to 40/40 um and cannot be less than 40/40 um.
再者,因該封裝基板3之軟硬交接處同時有介電層31d與該覆蓋保護膜30d等兩種材質,故於壓合該介電層31d後,此處容易發生該軟板30之邊緣突起、PP溢膠等問題,進而影響後續組裝貼合與撓折能力。 Furthermore, since the soft and hard interface of the package substrate 3 has both the dielectric layer 31d and the cover protective film 30d, the soft board 30 is likely to occur after the dielectric layer 31d is pressed. Problems such as edge protrusions, PP overflow, etc., which in turn affect the subsequent assembly fit and flexing ability.
又,由於該硬板31之厚度需配合該軟板30之厚度(該軟板30需具有一定的厚度,才不會因撓曲而碎裂),故該封裝基板3之厚度L難以降到0.25mm以下,因而難以符合薄化之需求。 Moreover, since the thickness of the hard board 31 needs to match the thickness of the soft board 30 (the soft board 30 needs to have a certain thickness, it does not break due to deflection), so the thickness L of the package substrate 3 is hard to fall to Below 0.25mm, it is difficult to meet the demand for thinning.
第4圖係為習知軟硬結合型封裝基板4之第四製法之剖面示意圖。 Fig. 4 is a schematic cross-sectional view showing a fourth method of the conventional soft-hard bonded package substrate 4.
如第4圖所示,於一核心板9之相對兩側上壓合具有撓折段A之線路板40,其具有線路層40b、軟質部40c及第一介電層40d,且該線路層40b壓合於該核心板9上,並使該第一介電層40d具有對應該撓折段A之開口400,以令該軟質部40c外露於該開口400。接著,依需求壓合一具有穿孔410之第二介電層41及保護膜90。 As shown in FIG. 4, a circuit board 40 having a flexible segment A having a wiring layer 40b, a soft portion 40c and a first dielectric layer 40d is laminated on opposite sides of a core board 9, and the circuit layer is 40b is pressed against the core plate 9, and the first dielectric layer 40d has an opening 400 corresponding to the flexible segment A to expose the soft portion 40c to the opening 400. Next, a second dielectric layer 41 having a via 410 and a protective film 90 are pressed as needed.
因此,習知軟硬結合型封裝基板4係藉由該開口400、穿孔410與撓折段A之設計以進行撓曲動作,且該線路層40b不受限減層法之線路製作能力。 Therefore, the conventional soft-hard-bonding type package substrate 4 is designed to perform a flexing operation by the opening 400, the through-hole 410 and the flexible segment A, and the circuit layer 40b is not limited to the circuit-making capability of the subtractive layer method.
惟,習知軟硬結合型封裝基板4中,因該封裝基板4之軟硬交接處同時有軟質部40c及第一介電層40d等兩種材質,故於壓合該第二介電層41後,此處容易因應力分佈不均而發生該開口400(或該穿孔410)之角落邊緣突起的問題,進而影響後續組裝貼合與撓折能力。 However, in the conventional soft-hard-bonding type package substrate 4, since the soft and hard junction of the package substrate 4 has both the soft portion 40c and the first dielectric layer 40d, the second dielectric layer is pressed. After 41, the problem of the corner edge protrusion of the opening 400 (or the perforation 410) is likely to occur due to uneven stress distribution, thereby affecting the subsequent assembly and flexing ability.
再者,該封裝基板4需設有該核心板9,使其厚度能夠縮減之幅度有限,因而不利於薄化需求。 Furthermore, the package substrate 4 needs to be provided with the core plate 9, so that the thickness thereof can be reduced to a limited extent, which is disadvantageous for thinning requirements.
因此,如何克服習知技術中之種種問題,實已成目前亟欲解決的課題。 Therefore, how to overcome various problems in the prior art has become a problem that is currently being solved.
鑑於上述習知技術之缺失,本發明提供一種可撓式基板,係包括:基板本體,係為無核心形式,並具有撓折段及至少一介電層,且形成該介電層之材料係為鑄模化合物或底層塗料;以及增設件,係形成於該基板本體上,且具有穿孔,以令該撓折段外露於該穿孔。 In view of the above-mentioned deficiencies of the prior art, the present invention provides a flexible substrate, comprising: a substrate body having a coreless form, having a flexure segment and at least one dielectric layer, and forming a material layer of the dielectric layer a mold compound or a primer; and an additive member formed on the substrate body and having perforations to expose the flexible segment to the perforation.
本發明復提供一種可撓式基板之製法,係包括:提供一基板本體,其中,該基板本體係為無核心形式且具有撓折段,並包含至少一介電層,且形成該介電層之材料係為鑄模化合物或底層塗料;於該基板本體上形成增設件,其中,該增設件係包含絕緣層、嵌埋於該絕緣層中之導電柱及貫通該增層結構之擋塊;以及移除該擋塊,使該增設件形成有穿孔,以供該撓折段外露於該穿孔。 The invention provides a method for manufacturing a flexible substrate, comprising: providing a substrate body, wherein the substrate is in a coreless form and has a flexible segment, and comprises at least one dielectric layer, and the dielectric layer is formed The material is a mold compound or a primer; an add-on is formed on the substrate body, wherein the add-on component comprises an insulating layer, a conductive pillar embedded in the insulating layer, and a stopper penetrating the build-up structure; The stopper is removed such that the extension is formed with a perforation for the flexure to be exposed to the perforation.
前述之可撓式基板及製法中,該增設件係包含絕緣層及嵌埋於該絕緣層中之導電柱。例如,形成該絕緣層之材質係為介電材料,其係為鑄模化合物或底層塗料。 In the above flexible substrate and method, the extension comprises an insulating layer and a conductive pillar embedded in the insulating layer. For example, the material forming the insulating layer is a dielectric material which is a mold compound or a primer.
本發明亦提供一種可撓式基板之製法,係包括:於一承載板上形成基板本體,其中,該基板本體係為無核心形式,並具有撓折段及至少一介電層,且形成該介電層之材料係為鑄模化合物或底層塗料;以及移除該承載板之部分材質,以形成貫通該承載板之穿孔而令該具有穿孔之承載板作為增設件,並供該撓折段外露於該穿孔。 The invention also provides a method for manufacturing a flexible substrate, comprising: forming a substrate body on a carrier board, wherein the substrate system is in a coreless form, and has a flexible segment and at least one dielectric layer, and the The material of the dielectric layer is a mold compound or a primer; and a part of the material of the carrier plate is removed to form a through hole penetrating the carrier plate, and the perforated carrier plate is used as an extension member, and the flexible segment is exposed In the perforation.
前述之可撓式基板及製法中,該增設件係為金屬板材。 In the above flexible substrate and method of manufacture, the extension is a metal plate.
前述之可撓式基板及兩種製法中,該基板本體更包含結合該介電層之線路結構。 In the above flexible substrate and the two methods, the substrate body further comprises a line structure combined with the dielectric layer.
由上可知,本發明之可撓式基板及兩種製法中,係採用不同於習知技術的增層材料與產品結構,以大幅提高軟硬結合板結構的電路密度與降低整體基板之厚度,特別適用於需薄型化與電路複雜化(或多功能)的高階行動裝置產品。 It can be seen from the above that in the flexible substrate and the two manufacturing methods of the present invention, a build-up material and a product structure different from the prior art are used to greatly increase the circuit density of the soft and hard bonded plate structure and reduce the thickness of the whole substrate. It is especially suitable for high-end mobile device products that require thinning and circuit complexity (or multi-function).
1,2,3,4‧‧‧封裝基板 1,2,3,4‧‧‧Package substrate
10,20,30‧‧‧軟板 10,20,30‧‧‧soft board
10a,20a,30a‧‧‧核心層 10a, 20a, 30a‧‧‧ core layer
10b,20b,30b‧‧‧第一線路層 10b, 20b, 30b‧‧‧ first line layer
10c,20c,30c‧‧‧覆蓋膠層 10c, 20c, 30c‧‧ ‧ cover layer
10d,20d,30d‧‧‧覆蓋保護膜 10d, 20d, 30d‧‧‧ covered protective film
100,200,300‧‧‧通孔 100,200,300‧‧‧through holes
101,201‧‧‧電性接觸墊 101,201‧‧‧Electrical contact pads
11,31‧‧‧硬板 11,31‧‧‧hard board
11a,31a‧‧‧硬質基材 11a, 31a‧‧‧hard substrate
11b,21b,31b‧‧‧金屬層 11b, 21b, 31b‧‧‧ metal layer
11c‧‧‧純膠材 11c‧‧‧ pure rubber
110,210,310,410,640,700‧‧‧穿孔 110,210,310,410,640,700‧‧‧Perforation
12,22,32‧‧‧第二線路層 12,22,32‧‧‧second circuit layer
12a,22a,32a‧‧‧導電材 12a, 22a, 32a‧‧‧ Conductive materials
13,23,33‧‧‧導電通孔 13,23,33‧‧‧Electrical through holes
14,24,34‧‧‧防焊層 14,24,34‧‧‧ solder mask
21,31d,550‧‧‧介電層 21, 31d, 550‧‧‧ dielectric layer
301‧‧‧盲孔 301‧‧‧Blind hole
31c‧‧‧內部線路層 31c‧‧‧Internal circuit layer
311,400‧‧‧開口 311,400‧‧‧ openings
320‧‧‧導電盲孔 320‧‧‧ Conductive blind holes
35‧‧‧增層線路結構 35‧‧‧Additional line structure
40‧‧‧線路板 40‧‧‧ circuit board
40b,551‧‧‧線路層 40b, 551‧‧‧ circuit layer
40c‧‧‧軟質部 40c‧‧‧Soft Department
40d‧‧‧第一介電層 40d‧‧‧First dielectric layer
41‧‧‧第二介電層 41‧‧‧Second dielectric layer
5,6,7‧‧‧可撓式基板 5,6,7‧‧‧flexible substrate
5a,5b,60,70‧‧‧增設件 5a, 5b, 60, 70‧‧‧Additional pieces
50‧‧‧承載板 50‧‧‧Loading board
51‧‧‧第一導電柱 51‧‧‧First Conductive Column
52‧‧‧第二導電柱 52‧‧‧Second conductive column
53‧‧‧第一絕緣層 53‧‧‧First insulation
530‧‧‧第一穿孔 530‧‧‧First perforation
54‧‧‧第二絕緣層 54‧‧‧Second insulation
540‧‧‧第二穿孔 540‧‧‧Second perforation
55‧‧‧基板本體 55‧‧‧Substrate body
552‧‧‧導電體 552‧‧‧Electrical conductor
56‧‧‧表面處理層 56‧‧‧Surface treatment layer
59a,59b,69‧‧‧擋塊 59a, 59b, 69‧‧ ‧ blocks
62‧‧‧導電柱 62‧‧‧conductive column
64‧‧‧絕緣層 64‧‧‧Insulation
651‧‧‧電磁屏蔽層 651‧‧‧Electromagnetic shielding
77‧‧‧絕緣保護層 77‧‧‧Insulating protective layer
770‧‧‧開口區 770‧‧‧Open area
771‧‧‧開孔 771‧‧‧ openings
9‧‧‧核心板 9‧‧‧ core board
90‧‧‧保護膜 90‧‧‧Protective film
A,F‧‧‧撓折段 A, F‧‧‧stening section
H,h,L,D,d,R‧‧‧厚度 H, h, L, D, d, R‧‧‧ thickness
e‧‧‧距離 E‧‧‧distance
t‧‧‧溢膠 t‧‧‧Overflow
第1A至1D圖係為習知軟硬結合型封裝基板之第一製法之剖面示意圖;第2A至2D圖係為習知軟硬結合型封裝基板之第二製法之剖面示意圖;第3A至3E圖係為習知軟硬結合型封裝基板之第三製法之剖面示意圖;第4圖係為習知軟硬結合型封裝基板之第四製法之剖面示意圖;第5A至5F圖係為本發明之可撓式基板之製法之第一實施例的剖視示意圖;第6A至6C圖係為本發明之可撓式基板之製法之第二實施例的剖視示意圖;以及第7A至7B圖係為本發明之可撓式基板之製法之第三實施例的剖視示意圖。 1A to 1D are schematic cross-sectional views showing a first method of a conventional soft-hard bonded package substrate; and FIGS. 2A to 2D are cross-sectional views showing a second method of a conventional soft-hard bonded package substrate; 3A to 3E The figure is a schematic cross-sectional view of a third method of a conventional soft-hard bonded package substrate; FIG. 4 is a cross-sectional view of a fourth method of a conventional soft-hard bonded package substrate; FIGS. 5A to 5F are diagrams of the present invention A schematic cross-sectional view of a first embodiment of a method for producing a flexible substrate; and FIGS. 6A to 6C are schematic cross-sectional views showing a second embodiment of a method for manufacturing a flexible substrate of the present invention; and FIGS. 7A to 7B are diagrams A schematic cross-sectional view of a third embodiment of the method of making a flexible substrate of the present invention.
以下藉由特定的具體實施例說明本發明之實施方 式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The embodiments of the present invention are described below by way of specific embodiments. Other advantages and effects of the present invention will be readily apparent to those skilled in the art from this disclosure.
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”、“下”、“第一”、“第二”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "lower", "first", "second" and "one" are used in the description for convenience of description, and are not intended to limit the invention. Changes in the scope of implementation, changes or adjustments in their relative relationship, are considered to be within the scope of the present invention.
第5A至5F圖係為本發明之可撓式基板5之製法之第一實施例的剖視示意圖。 5A to 5F are schematic cross-sectional views showing a first embodiment of the manufacturing method of the flexible substrate 5 of the present invention.
如第5A圖所示,藉由圖案化製程形成複數第一導電柱51與擋塊59a於一承載板50上。 As shown in FIG. 5A, a plurality of first conductive pillars 51 and stoppers 59a are formed on a carrier plate 50 by a patterning process.
於本實施例中,該承載板50係為金屬基材、半導體基材或絕緣基材,並無特別限制。 In the present embodiment, the carrier 50 is a metal substrate, a semiconductor substrate or an insulating substrate, and is not particularly limited.
再者,該第一導電柱51與該擋塊59a係為金屬材,如銅材,且兩者之材質可相同或不相同。 Furthermore, the first conductive pillar 51 and the stopper 59a are made of a metal material such as a copper material, and the materials of the two may be the same or different.
如第5B圖所示,形成一第一絕緣層53於該承載板50上以包覆該些第一導電柱51與擋塊59a,且該些第一導電柱51之表面與該擋塊59a之表面係齊平於該第一絕緣層 53之表面,使該些第一導電柱51與該擋塊59a外露於該第一絕緣層53,且該擋塊59a貫通該第一絕緣層53。 As shown in FIG. 5B, a first insulating layer 53 is formed on the carrier 50 to cover the first conductive pillars 51 and the stoppers 59a, and the surfaces of the first conductive pillars 51 and the stoppers 59a are formed. The surface is flush with the first insulating layer The surface of the first conductive pillar 51 and the stopper 59a are exposed to the first insulating layer 53, and the stopper 59a penetrates the first insulating layer 53.
於本實施例中,該第一絕緣層53係作為硬質部,其以鑄模方式、塗佈方式或壓合方式形成於該承載板50上,且形成該第一絕緣層53之材質係為介電材料,其可為環氧樹脂(Epoxy),且該環氧樹脂更包含鑄模化合物(Molding Compound)或底層塗料(Primer),如環氧模壓樹脂(Epoxy Molding Compound,簡稱EMC),其中,該環氧模壓樹脂係含有充填物(filler),且該充填物之含量為70至90wt%。 In this embodiment, the first insulating layer 53 is formed as a hard portion on the carrier plate 50 by a molding method, a coating method, or a pressing method, and the material of the first insulating layer 53 is formed. An electric material, which may be an epoxy resin (Epoxy), and further comprises a molding compound or a primer, such as an epoxy resin (Epoxy Molding Compound, EMC for short), wherein The epoxy molded resin contains a filler, and the content of the filler is 70 to 90% by weight.
如第5C圖所示,形成一基板本體55於該第一絕緣層53上,且該基板本體55電性連接該些第一導電柱51。 As shown in FIG. 5C, a substrate body 55 is formed on the first insulating layer 53, and the substrate body 55 is electrically connected to the first conductive pillars 51.
於本實施例中,該基板本體55係為無核心(coreless)形式,其可採用線路增層製程方式製作,故該基板本體55包含至少一以塗佈方式製作之介電層550、結合該介電層550之線路層551、及複數設於該介電層550中並電性連接該線路層551之盲孔型導電體552。 In this embodiment, the substrate body 55 is in a coreless form, which can be fabricated by a line build-up process. Therefore, the substrate body 55 includes at least one dielectric layer 550 formed by coating. A circuit layer 551 of the dielectric layer 550 and a plurality of blind via conductors 552 disposed in the dielectric layer 550 and electrically connected to the circuit layer 551.
再者,於其它實施例中,該基板本體55亦可採用鑄模製程方式製作,例如,先形成一線路層551於該第一絕緣層53上,再形成導電柱於該線路層551上,之後以鑄模方式形成該介電層550以包覆該線路層551與該導電柱,使該導電柱作為該導電體552,且可依上述步驟增加層數。 In another embodiment, the substrate body 55 can also be fabricated by a molding process. For example, a circuit layer 551 is formed on the first insulating layer 53 to form a conductive pillar on the circuit layer 551. The dielectric layer 550 is formed by molding to cover the wiring layer 551 and the conductive pillars, so that the conductive pillars serve as the electrical conductors 552, and the number of layers can be increased according to the above steps.
又,該介電層550係為軟質部,但該介電層550之材質與該第一絕緣層53之材質可相同或不相同,例如,該介電層550可為環氧樹脂之其中一種類型,而該第一絕緣層 53可為環氧樹脂之另一種類型或同類型。 Moreover, the dielectric layer 550 is a soft portion, but the material of the dielectric layer 550 and the material of the first insulating layer 53 may be the same or different. For example, the dielectric layer 550 may be one of epoxy resins. Type while the first insulating layer 53 can be another type or the same type of epoxy resin.
如第5D圖所示,形成複數第二導電柱52與擋塊59b於該基板本體55上,且形成一第二絕緣層54於該基板本體55上以包覆該些第二導電柱52與擋塊59b,且該些第二導電柱52之表面與該擋塊59b之表面係齊平於該第二絕緣層54之表面,使該些第二導電柱52與該擋塊59b外露於該第二絕緣層54,且該擋塊59b貫通該第二絕緣層54。 As shown in FIG. 5D, a plurality of second conductive pillars 52 and stops 59b are formed on the substrate body 55, and a second insulating layer 54 is formed on the substrate body 55 to cover the second conductive pillars 52. a stopper 59b, and the surface of the second conductive post 52 is flush with the surface of the stopper 59b on the surface of the second insulating layer 54, so that the second conductive post 52 and the stopper 59b are exposed to the surface The second insulating layer 54 and the stopper 59b penetrate the second insulating layer 54.
於本實施例中,該第二導電柱52與該擋塊59b係為金屬材,如銅材,且兩者之材質可相同或不相同。 In this embodiment, the second conductive post 52 and the stopper 59b are made of a metal material, such as a copper material, and the materials of the two may be the same or different.
再者,該第二絕緣層54係作為硬質部,其以鑄模方式、塗佈方式或壓合方式形成者,且形成該第二絕緣層54之材質係為介電材料,其可為環氧樹脂,且該環氧樹脂更包括鑄模化合物或底層塗料,如環氧模壓樹脂,其中,該環氧模壓樹脂係含有充填物,其中,該充填物之含量為70~90wt%。 Furthermore, the second insulating layer 54 is formed as a hard portion, which is formed by a mold, a coating method or a press-bonding method, and the material forming the second insulating layer 54 is a dielectric material, which may be epoxy. A resin, and the epoxy resin further comprises a mold compound or a primer such as an epoxy molded resin, wherein the epoxy molded resin contains a filler, wherein the filler is contained in an amount of 70 to 90% by weight.
另外,該第二絕緣層54之材質與該第一絕緣層53之材質可相同或不相同,且該第二絕緣層54之材質與該介電層550之材質可相同或不相同。 In addition, the material of the second insulating layer 54 and the material of the first insulating layer 53 may be the same or different, and the material of the second insulating layer 54 may be the same as or different from the material of the dielectric layer 550.
如第5E及5F圖所示,以剝離方式移除該承載板50,再以蝕刻方式移除該些擋塊59a,59b,以於該第一絕緣層53上形成第一穿孔530,且於該第二絕緣層54上形成第二穿孔540,使該基板本體55外露於該第一與第二穿孔530,540,以作為撓折段F,且該些第一導電柱51與該第一絕緣層53可視為一增設件5a,而該些第二導電柱52與該 第二絕緣層54可視為另一增設件5b。 As shown in FIGS. 5E and 5F, the carrier plate 50 is removed in a peeling manner, and the stoppers 59a, 59b are removed by etching to form a first through hole 530 on the first insulating layer 53 and A second through hole 540 is formed on the second insulating layer 54 to expose the substrate body 55 to the first and second through holes 530, 540 as the flexible segment F, and the first conductive pillars 51 and the first insulating layer 53 can be regarded as an add-on 5a, and the second conductive pillars 52 and the The second insulating layer 54 can be regarded as another extension 5b.
於本實施例中,當移除該擋塊59a時,可依需求一併移除該基板本體55之部分材質,使該第一穿孔530延伸至該基板本體55中。同理地,該第二穿孔540亦可依需求延伸至該基板本體55中。 In this embodiment, when the stopper 59a is removed, part of the material of the substrate body 55 may be removed as needed to extend the first through hole 530 into the substrate body 55. Similarly, the second through hole 540 can also extend into the substrate body 55 as needed.
再者,於後續製程中,該增設件5a,5b可依需求於該第一與第二導電柱51,52上形成表面處理層56。 Moreover, in the subsequent process, the add-on members 5a, 5b can form the surface treatment layer 56 on the first and second conductive posts 51, 52 as needed.
因此,本發明之可撓式基板5係直接於該第一絕緣層53上製作該基板本體55(即塗佈該介電層550),以取代習知壓合或貼合增層材,故本發明之軟硬交接處為介電材直接結合(例如,兩層環氧樹脂直接結合),因而可完全消除習知軟硬結合板在軟硬交接區所產生之缺點,亦即本發明之軟硬交接區沒有如習知技術之溢膠、缺膠、突起等問題,且可將層間對位精度提高至+/-25um(習知軟硬結合板的層間對位精度為+/-100um)。 Therefore, the flexible substrate 5 of the present invention directly forms the substrate body 55 on the first insulating layer 53 (that is, the dielectric layer 550 is coated), instead of pressing or bonding the build-up material, The soft and hard interface of the present invention is a direct bonding of the dielectric material (for example, direct bonding of two layers of epoxy resin), thereby completely eliminating the disadvantages of the conventional soft and hard bonding board in the soft and hard junction area, that is, the invention The soft and hard junction area has no problems such as glue overflow, lack of glue, protrusion, etc., and the interlayer alignment accuracy can be improved to +/-25um (the interlayer alignment accuracy of the conventional soft and hard board is +/-100um). ).
再者,該基板本體55係為無核心形式,故可大幅降低該可撓式基板5之總厚度,例如,四層板形式之厚度D可小於0.2mm,如0.16mm,其小於習知技術之四層板形式之厚度(約0.25mm)。 Furthermore, the substrate body 55 is in a coreless form, so that the total thickness of the flexible substrate 5 can be greatly reduced. For example, the thickness D of the four-layer plate form can be less than 0.2 mm, such as 0.16 mm, which is smaller than the prior art. The thickness of the four-layer plate form (about 0.25 mm).
又,該基板本體55因其線路層551使用半加成法製作(即直接電鍍出該線路層551)而無需蝕刻金屬材,故該線路層551之邊緣呈平直狀,而無蝕刻製程所產生的殘足問題,因而利於阻抗控制,且該線路層551之線寬/線距可降至20/20um(習知減層法所製作之線路之線寬/線距最小 為40/40um)。 Moreover, the substrate body 55 is formed by a semi-additive method using the wiring layer 551 (that is, the wiring layer 551 is directly plated) without etching the metal material, so that the edge of the wiring layer 551 is flat, and the etching process is not performed. The resulting residual problem is beneficial to impedance control, and the line width/line spacing of the circuit layer 551 can be reduced to 20/20 um (the line width/line spacing of the line produced by the conventional subtractive method is the smallest) 40/40um).
另外,本發明之連結位置(即該撓折段F)係以影像轉移方式配合圖案化電鍍厚銅(該些擋塊59a,59b)及蝕刻移除厚銅(該些擋塊59a,59b)等方式製作,故該撓折段F之形狀、尺寸與精度不受習知機械加工之限制,因而可提高機構設計之自由度(例如,可同時製作多組任意形狀之撓折段F),且因該些擋塊59a,59b可與該第一與第二導電柱51,52一起製作而能減少加工成本。 In addition, the joint position (ie, the flexure F) of the present invention is patterned and transferred to form thick copper (the stoppers 59a, 59b) and the thick copper is removed by etching (the stoppers 59a, 59b). The shape, size and precision of the flexible segment F are not limited by conventional machining, so that the degree of freedom of the mechanism design can be improved (for example, multiple sets of flexible segments F of any shape can be simultaneously produced). Moreover, since the stoppers 59a, 59b can be fabricated together with the first and second conductive posts 51, 52, the processing cost can be reduced.
此外,本發明之可撓式基板5之最外側(即硬板區之外層)接觸墊係製作成銅柱形式(即該第一與第二導電柱51,52),並藉由介電材(該第一與第二絕緣層53,54)取代習知防焊層,故本發明能強化接觸墊(該第一與第二導電柱51,52)與介電材(該第一與第二絕緣層53,54)之間的結合力,並提高後續打線製程之打線強度,因而可提高產品可靠度與封裝能力。 In addition, the outermost (ie, outer layer of the hard plate region) contact pads of the flexible substrate 5 of the present invention are formed in the form of copper pillars (ie, the first and second conductive pillars 51, 52), and are made of dielectric materials. (The first and second insulating layers 53, 54) replace the conventional solder resist layer, so the present invention can strengthen the contact pads (the first and second conductive pillars 51, 52) and the dielectric material (the first and the first The bonding force between the two insulating layers 53, 54) improves the wire bonding strength of the subsequent wire bonding process, thereby improving product reliability and packaging capability.
第6A至6C圖係為本發明之可撓式基板6之製法之第二實施例的剖視示意圖。本實施例與第一實施例之差異在於穿孔之數量,其它製程大致相同,故以下僅說明相異處,而不再贅述相同處。 6A to 6C are schematic cross-sectional views showing a second embodiment of the manufacturing method of the flexible substrate 6 of the present invention. The difference between this embodiment and the first embodiment lies in the number of perforations, and the other processes are substantially the same, so only the differences will be described below, and the same points will not be described again.
如第6A圖所示,形成該基板本體55於該承載板50上,且該些介電層550係作為軟質部,並以塗佈方式將該介電層550形成於該承載板50上。 As shown in FIG. 6A, the substrate body 55 is formed on the carrier 50, and the dielectric layers 550 are formed as soft portions, and the dielectric layer 550 is formed on the carrier 50 by coating.
如第6B圖所示,形成複數導電柱62與擋塊69於該基板本體55上,且形成一絕緣層64於該基板本體55上以包 覆該些導電柱62與擋塊69,且該些導電柱62之表面與該擋塊69之表面係齊平於該絕緣層64之表面,使該些導電柱62與該擋塊69外露於該絕緣層64。 As shown in FIG. 6B, a plurality of conductive pillars 62 and a stopper 69 are formed on the substrate body 55, and an insulating layer 64 is formed on the substrate body 55 to be packaged. The conductive pillars 62 and the stoppers 69 are covered, and the surfaces of the conductive pillars 62 are flush with the surface of the stoppers 69 on the surface of the insulating layer 64, so that the conductive pillars 62 and the stoppers 69 are exposed. The insulating layer 64.
於本實施例中,該導電柱62與該擋塊69係為金屬材,如銅材,且兩者之材質可相同或不相同。 In this embodiment, the conductive post 62 and the stopper 69 are made of a metal material, such as a copper material, and the materials of the two may be the same or different.
再者,該絕緣層64係作為硬質部,其以鑄模方式、塗佈方式或壓合方式形成者,且形成該絕緣層64之材質係為介電材料,其可為環氧樹脂,且該環氧樹脂更包括鑄模化合物或底層塗料,如環氧模壓樹脂,其中,該環氧模壓樹脂係含有充填物,其中,該充填物之含量為70~90wt%。 Further, the insulating layer 64 is formed as a hard portion, which is formed by a molding method, a coating method, or a press bonding method, and the material forming the insulating layer 64 is a dielectric material, which may be an epoxy resin, and the epoxy layer may be an epoxy resin. The epoxy resin further includes a mold compound or a primer such as an epoxy molded resin, wherein the epoxy molded resin contains a filler, wherein the filler is contained in an amount of 70 to 90% by weight.
又,該介電層550之材質與該絕緣層64之材質可相同或不相同,例如,該介電層550可為環氧樹脂(Epoxy)之其中一種類型,而該絕緣層64可為環氧樹脂(Epoxy)之另一種類型或同類型。 Moreover, the material of the dielectric layer 550 and the material of the insulating layer 64 may be the same or different. For example, the dielectric layer 550 may be one of epoxy type (Epoxy), and the insulating layer 64 may be a ring. Another type or type of epoxy resin (Epoxy).
如第6C圖所示,蝕刻移除該擋塊69,以於該絕緣層64上形成穿孔640,使該基板本體55外露於該穿孔640,以令該基板本體55外露於該穿孔640之部分作為撓折段F。之後,移除該承載板50,且該些導電柱62與該絕緣層64可視為增設件60。 As shown in FIG. 6C, the stopper 69 is removed by etching to form a through hole 640 on the insulating layer 64 to expose the substrate body 55 to the through hole 640 to expose the substrate body 55 to the portion of the through hole 640. As the flexing segment F. Thereafter, the carrier plate 50 is removed, and the conductive pillars 62 and the insulating layer 64 can be regarded as an extension 60.
於本實施例中,當蝕刻移除該擋塊69時,會一併移除部分該導電柱62之外露材質,使該導電柱62之端面高度低於該絕緣層64之表面,且可依需求一併移除該基板本體55之部分金屬材質,以增加該穿孔640之深度。 In this embodiment, when the stopper 69 is removed by etching, a portion of the conductive pillar 62 is removed from the exposed material, so that the height of the end surface of the conductive pillar 62 is lower than the surface of the insulating layer 64, and It is required to remove part of the metal material of the substrate body 55 to increase the depth of the through holes 640.
再者,當移除該承載板50時,可保留軟板部(該基板 本體55)於外露側之電鍍銅層(部分該線路層551),以作為電磁屏蔽層651,而無須額外貼覆銀膠導電膜作為電磁屏蔽。 Furthermore, when the carrier 50 is removed, the soft board portion can be retained (the substrate The body 55) is an electroplated copper layer (partially the wiring layer 551) on the exposed side as the electromagnetic shielding layer 651 without additionally attaching a silver paste conductive film as an electromagnetic shield.
又,於後續製程中,可依需求形成表面處理層(圖略)於該些導電柱62上。 Moreover, in the subsequent process, a surface treatment layer (not shown) may be formed on the conductive pillars 62 as needed.
因此,本發明之可撓式基板6係於該承載板50的單一側上直接製作該基板本體55,使軟板部(該介電層550)或硬板部(該絕緣層64)之層數可任意選擇,而不受如習知技術之核心層兩側設計之對稱式增層限制。 Therefore, the flexible substrate 6 of the present invention is directly formed on the single side of the carrier 50 to form the substrate body 55 such that the soft plate portion (the dielectric layer 550) or the hard plate portion (the insulating layer 64) is layered. The number can be arbitrarily chosen without being limited by the symmetrical buildup of the design on both sides of the core layer as in the prior art.
再者,本發明之可撓式基板6僅於該基板本體55之單一側具有軟硬交接處,且該處係為兩層環氧樹脂(該介電層550與該絕緣層64)直接結合,因而可完全消除習知軟硬結合板在軟硬交接區所產生之缺點,亦即本發明之軟硬交接區沒有如習知技術之溢膠、缺膠、突起等問題,且可減少撓折變異。 Furthermore, the flexible substrate 6 of the present invention has a soft and hard interface only on a single side of the substrate body 55, and is directly bonded to the two layers of epoxy resin (the dielectric layer 550 and the insulating layer 64). Therefore, the shortcomings of the conventional soft and hard bonding board in the soft and hard junction area can be completely eliminated, that is, the soft and hard junction area of the present invention has no problems such as overflowing glue, lack of glue, protrusion, etc. as in the prior art, and can reduce scratching. Fold variation.
又,該基板本體55係為無核心形式,故可大幅降低該可撓式基板6之總厚度,例如,四層板形式之厚度d可小於0.2mm,其遠小於習知四層板形式之厚度。 Moreover, the substrate body 55 is in a coreless form, so that the total thickness of the flexible substrate 6 can be greatly reduced. For example, the thickness d of the four-layer plate form can be less than 0.2 mm, which is much smaller than the conventional four-layer plate form. thickness.
另外,本發明之可撓式基板6之最外側(即硬板區之外層)接觸墊係製作成銅柱形式(即該導電柱62),並藉由介電材(該絕緣層64)取代習知防焊層,故本發明能強化接觸墊(該導電柱62)與介電材(該絕緣層64)之間的結合力,並提高後續打線製程之打線強度,因而可提高產品可靠度與封裝能力。 In addition, the outermost (ie, outer layer of the hard plate region) contact pad of the flexible substrate 6 of the present invention is formed in the form of a copper pillar (ie, the conductive pillar 62), and is replaced by a dielectric material (the insulating layer 64). The solder resist layer is conventionally used, so that the present invention can strengthen the bonding force between the contact pad (the conductive post 62) and the dielectric material (the insulating layer 64), and improve the wire bonding strength of the subsequent wire bonding process, thereby improving product reliability. With packaging capabilities.
此外,本發明之連結位置(即該撓折段F)係以影像轉移方式配合圖案化電鍍厚銅(該擋塊69)及蝕刻移除厚銅(該擋塊69)等方式製作,故該撓折段F之形狀、尺寸與精度不受習知機械加工之限制,因而可提高機構設計之自由度(例如,可同時製作多組任意形狀之撓折段F),且因該些擋塊69可與該導電柱62一起製作而能減少加工成本。 In addition, the connection position (ie, the flexible segment F) of the present invention is formed by image transfer and patterning of thick copper (the stopper 69) and etching to remove thick copper (the stopper 69). The shape, size and precision of the flexure segment F are not limited by conventional machining, so that the degree of freedom of the mechanism design can be improved (for example, multiple sets of flexure segments F of any shape can be simultaneously produced), and because of these stops 69 can be fabricated with the conductive post 62 to reduce processing costs.
第7A至7B圖係為本發明之可撓式基板7之製法之第三實施例的剖視示意圖。本實施例與第二實施例之差異在於穿孔之製作方式,其它製程大致相同,故以下僅說明相異處,而不再贅述相同處。 7A to 7B are schematic cross-sectional views showing a third embodiment of the manufacturing method of the flexible substrate 7 of the present invention. The difference between this embodiment and the second embodiment lies in the manner in which the perforations are made. The other processes are substantially the same, so only the differences will be described below, and the same points will not be described again.
如第7A圖所示,接續第6A圖之製程,係於該基板本體55上形成一絕緣保護層77,其具有複數外露該線路層551之開孔771與至少一外露該介電層550之開口區770,且於本實施例中,該承載板50係為金屬板。 As shown in FIG. 7A, the process of the sixth embodiment is performed on the substrate body 55 to form an insulating protective layer 77 having a plurality of openings 771 exposing the circuit layer 551 and at least one exposed dielectric layer 550. The opening area 770, and in the embodiment, the carrier board 50 is a metal board.
如第7B圖所示,對應該開口區770之位置蝕刻移除該承載板50之部分材質,以於該承載板50上對應該開口區770之處形成一貫通該承載板50之穿孔700,使該基板本體55外露於該穿孔700,以令該具有該穿孔700之承載板50作為增設件70(可視為硬質部),且令該基板本體55外露於該穿孔700之部分作為撓折段F。 As shown in FIG. 7B, a portion of the material of the carrier plate 50 is etched away from the position of the opening region 770, so that a hole 700 passing through the carrier plate 50 is formed on the carrier plate 50 corresponding to the opening region 770. The substrate body 55 is exposed to the through hole 700, so that the carrier plate 50 having the through hole 700 is used as an extension member 70 (which can be regarded as a hard portion), and the portion of the substrate body 55 exposed to the through hole 700 is used as a flexible portion. F.
因此,本發明之可撓式基板7係採用金屬板材作為該承載板50以於其上進行增層製程,並保留部分該承載板50以作為該增設件70,俾供作為硬板區之支撐與散熱之 用。 Therefore, the flexible substrate 7 of the present invention uses a metal plate as the carrier plate 50 to perform a build-up process thereon, and retains part of the carrier plate 50 as the extension member 70 for supporting the hard plate region. With heat dissipation use.
再者,本發明之可撓式基板7僅於該基板本體55之單一側具有軟硬交接處,且該處係為介電材(該介電層550)與金屬材(該承載板50)直接結合,再蝕刻移除該承載板50之部分材質,以形成該貫通該承載板50之穿孔700,因而可完全消除習知軟硬結合板在軟硬交接區所產生之缺點,亦即本發明之軟硬交接區沒有如習知技術之溢膠、缺膠、突起等問題。 Furthermore, the flexible substrate 7 of the present invention has a soft and hard interface only on a single side of the substrate body 55, and is a dielectric material (the dielectric layer 550) and a metal material (the carrier plate 50). The material of the carrier plate 50 is directly etched and removed to form the through hole 700 penetrating the carrier plate 50, thereby completely eliminating the disadvantages of the conventional soft and hard bonding plate in the soft and hard junction area, that is, The soft and hard interface of the invention has no problems such as glue overflow, lack of glue, protrusion, etc. as in the prior art.
又,本發明之連結位置(即該撓折段F)係以蝕刻金屬(該承載板50之部分材質)之方式製作,故該撓折段F之形狀、尺寸與精度不受習知機械加工之限制,因而可提高機構設計之自由度,例如,可同時製作多組任意形狀之撓折段F。 Moreover, the joint position (ie, the flexure F) of the present invention is made by etching metal (part material of the carrier plate 50), so the shape, size and precision of the flexure F are not subject to conventional machining. The limitation of the mechanism design can be increased, for example, a plurality of sets of flexible segments F of any shape can be simultaneously produced.
另外,該基板本體55係為無核心形式,故可大幅降低該可撓式基板7之總厚度,例如,四層板形式之厚度R可小於0.2mm,其遠小於習知四層板形式之厚度。 In addition, the substrate body 55 is in a coreless form, so that the total thickness of the flexible substrate 7 can be greatly reduced. For example, the thickness R of the four-layer plate form can be less than 0.2 mm, which is much smaller than the conventional four-layer plate form. thickness.
本發明提供一種可撓式基板5,6,7,係包括:一基板本體55以及至少一增設件5a,5b,60,70。 The invention provides a flexible substrate 5, 6, 7 comprising a substrate body 55 and at least one extension 5a, 5b, 60, 70.
所述之基板本體55係為無核心形式且具有至少一撓折段F。 The substrate body 55 is in a coreless form and has at least one flexure segment F.
所述之增設件5a,5b,60,70係形成於該基板本體55上,且該增設件5a,5b,60,70具有穿孔640,700(該第一與第二穿孔530,540),以令該撓折段F外露於該穿孔640,700(該第一與第二穿孔530,540)。 The extensions 5a, 5b, 60, 70 are formed on the substrate body 55, and the extensions 5a, 5b, 60, 70 have perforations 640, 700 (the first and second perforations 530, 540) to make the The segment F is exposed to the perforations 640, 700 (the first and second perforations 530, 540).
於一實施例中,該基板本體55係包含至少一介電層550及結合該介電層550之線路結構(例如,該線路層551及/或該導電體552)。 In one embodiment, the substrate body 55 includes at least one dielectric layer 550 and a wiring structure (eg, the wiring layer 551 and/or the conductive body 552) in combination with the dielectric layer 550.
於一實施例中,該增設件5a,5b,60係包含絕緣層64(該第一與第二絕緣層53,54)及嵌埋於該絕緣層64中之導電柱62(該第一與第二導電柱51,52)。例如,形成該絕緣層64(該第一與第二絕緣層53,54)之材質係為介電材料,其為鑄模化合物或底層塗料。 In one embodiment, the extensions 5a, 5b, 60 comprise an insulating layer 64 (the first and second insulating layers 53, 54) and a conductive pillar 62 embedded in the insulating layer 64 (the first Second conductive pillars 51, 52). For example, the material forming the insulating layer 64 (the first and second insulating layers 53, 54) is a dielectric material which is a mold compound or a primer.
於一實施例中,該增設件70係為金屬板材。 In an embodiment, the extension member 70 is a metal plate.
綜上所述,本發明之可撓式基板及其製法,係藉由該基板本體為無核心形式,以降低該可撓式基板之總厚度,故能符合薄化之需求。 In summary, the flexible substrate of the present invention and the method for manufacturing the same are provided in a coreless form of the substrate body to reduce the total thickness of the flexible substrate, thereby meeting the requirements of thinning.
再者,藉由軟硬交接處為介電材直接結合增設件,以於軟硬交接區不會產生如溢膠、缺膠、突起等習知問題,且能提升層間對位精度提高。 Moreover, the soft-hard junction is directly combined with the additional component for the dielectric material, so that the soft and hard junction area does not have conventional problems such as overflow glue, lack of glue, protrusion, and the like, and the alignment precision between the layers can be improved.
又,該基板本體因其線路層使用半加成法製作而無需蝕刻金屬材,以利於阻抗控制,且能縮小線寬/線距,故能符合細間距/細線路之需求。 Moreover, the substrate body is fabricated by a semi-additive method using a circuit layer without etching the metal material to facilitate impedance control, and the line width/line distance can be reduced, so that the requirements of the fine pitch/fine line can be met.
另外,藉由蝕刻金屬材之方式定義出該撓折段,故該撓折段之形狀、尺寸與精度不受習知機械加工之限制,因而能提高機構設計之自由度。 In addition, since the flexure segment is defined by etching the metal material, the shape, size and precision of the flexure segment are not limited by conventional machining, and thus the degree of freedom in mechanism design can be improved.
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修 改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Anyone skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. change. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.
Claims (13)
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| TWI890389B (en) * | 2024-03-28 | 2025-07-11 | 大陸商宏啟勝精密電子(秦皇島)有限公司 | Foldable circuit board and method of manufacturing the same |
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| TWI448229B (en) * | 2012-06-29 | 2014-08-01 | Zhen Ding Technology Co Ltd | Rigid-flexible printed circuit board and method for manufacturing same |
| TW201448688A (en) * | 2013-06-03 | 2014-12-16 | Mutual Tek Ind Co Ltd | Combined circuit board and method of manufacturing the same |
| CN104320908A (en) * | 2014-11-14 | 2015-01-28 | 镇江华印电路板有限公司 | Heat dissipating type multilayer soft and hardness combined printing plate |
| TWI554169B (en) * | 2014-12-03 | 2016-10-11 | 恆勁科技股份有限公司 | Interposer substrate and method of fabricating the same |
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| TWI890389B (en) * | 2024-03-28 | 2025-07-11 | 大陸商宏啟勝精密電子(秦皇島)有限公司 | Foldable circuit board and method of manufacturing the same |
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