TW201927101A - Multilayer printed circuit board and method for manufacturing a multilayer printed circuit board - Google Patents

Abstract

A multilayer printed circuit board includes an inner circuit layer, a first outer circuit layer, a second outer circuit layer, a via, and a layer of high dielectric dissipation solder resist ink. The first outer circuit layer includes a first trace, and the first trace transmits a high frequency signal. The inner circuit layer includes a second trace. The first outer circuit layer is disposed at one side of the inner circuit layer, and the second outer circuit layer is disposed at another side of the inner circuit layer. The via passes through from the first outer circuit layer to the second outer circuit layer, and is coupled to the first trace and the second trace. The second trace is coupled to the first trace through the via for transmitting the high frequency signal. The layer of high dielectric dissipation solder resist ink is disposed on a terminal of the open stub of the via exposed outside of the second outer circuit layer.

Description

Multilayer printed circuit board and method of manufacturing multilayer printed circuit board

The present invention relates to a multilayer printed circuit board, and more particularly to a multilayer printed circuit board capable of reducing high speed signal distortion.

In the prior art, multilayer printed circuit boards often use vias to connect wires between different layers. In general, the vias may include through hole vias, blind holes (Blind holes). ) and Buried hole and other different forms, in which the way of making the connecting column by blind hole and buried hole is less expensive in practice, and the most common connecting column is still in the form of through hole. Most of the implementation. In this case, if the wire to be connected is a stripline, that is, the wire is in the inner circuit layer in the multilayer printed circuit board, an open via stub is inevitably left on the connecting column. However, the resonance effect of the open stub often causes serious high-speed signal distortion problems.

In order to solve the signal distortion problem caused by the open circuit segment, the prior art often adopts the technique of back-drilling, that is, in the manufacturing process of the multilayer printed circuit, the open end of the connected column can be broken by the mechanical drill bit from the bottom up. Segment removal. However, the use of back-drilling not only increases the complexity of the process, but also because the mechanical tolerances of the back-drilling limit the drilling depth of the back-drill, so in areas with high density of connected columns (such as under the central processor), Back-drilling also does not completely remove the open stub, making the problem of high-speed signal distortion difficult to solve.

One embodiment of the present invention provides a multilayer printed circuit board comprising a first outer circuit layer, an inner circuit layer, a second outer circuit layer, a connecting post, and a high dielectric loss solder resist ink layer.

The first outer circuit layer includes a first wire, and the first wire transmits a high frequency signal. The inner circuit layer includes a second wire. The first outer circuit layer is disposed on one side of the inner circuit layer, and the second outer circuit layer is disposed on the other side of the inner circuit layer.

The connecting post extends from the first outer circuit layer to the second outer circuit layer and is coupled to the first wire and the second wire. The second wire is coupled to the first wire via the connecting post to transmit the high frequency signal. The high dielectric loss solder resist ink layer is disposed on the open stub end of the connecting post exposed outside the second outer circuit layer.

Another embodiment of the present invention provides a method of making a multilayer printed circuit board. A method of fabricating a multilayer printed circuit board includes disposing a first outer circuit layer including a first wire, providing an inner circuit layer including a second wire, and providing a second outer circuit layer, wherein the inner circuit layer is disposed on the first outer circuit layer And between the second outer circuit layers. The connecting column is disposed such that the connecting column penetrates from the first outer circuit layer to the second outer circuit layer and is coupled to the first wire and the second wire, and is disposed at an open stub end of the connecting column exposed outside the second outer circuit layer High dielectric loss solder mask ink layer.

1 is a schematic view of a multilayer printed circuit board 100 in accordance with an embodiment of the present invention. The multilayer printed circuit board 100 includes an inner circuit layer first outer circuit layer 110, a second outer circuit layer 120, an inner circuit layer 130, a first wire 140A, a second wire 140B, a connecting pillar 150, and a high dielectric loss solder resist ink layer. 160.

The first outer circuit layer 110 may be disposed on one side of the inner circuit layer 130, and the second outer circuit layer 120 may be disposed on the other side of the inner circuit layer 130. In some embodiments of the present invention, the first outer circuit layer 110 may be, for example, an outer circuit layer that is in contact with an external component, and the second outer circuit layer may be, for example, soldered to the outer side of a main circuit board or other circuit. The circuit layer, however, the present invention does not limit the object to which the first outer circuit layer 110 and the second outer circuit layer 120 are to be coupled.

In addition, in FIG. 1, the multilayer printed circuit board 100 may further include inner circuit layers 132, 134, and 136, wherein the inner circuit layer 132 may be, for example, a power supply layer and the inner circuit layer 136 may be, for example, a ground layer, that is, multi-layer printing. The circuit board 100 can be a six-layer board. However, the present invention is not limited thereto. In other embodiments of the present invention, the multi-layer printed circuit board 100 may further include a larger number of circuit layers, and the inner circuit layer 130 may also Other locations between the first outer circuit layer 110 and the second outer circuit layer 120.

In the multilayer printed circuit board 100, the circuit layer may be disposed on the inner layer board. For example, the first outer circuit layer 110 and the inner circuit layer 132 may be disposed on both sides of the inner layer 180, and the inner circuit layers 130 and 134 may be They are disposed on both sides of the inner layer plate 182. In addition, the circuit layers disposed on the different inner layers may be joined by a dielectric layer or a prepreg. For example, the inner circuit layers 132 and 130 can be joined by a prepreg 184. However, the present invention is not limited thereto. In other embodiments of the present invention, the user may select other materials or processes to fabricate the multilayer printed circuit board 100 according to requirements.

The first outer circuit layer 110 may include a first wire 140A, and the first wire 140A may transmit a high frequency signal SIG _A . The inner circuit layer 130 can include a second wire 140B. The connecting post 150 can be formed by a through hole and can be penetrated from the first outer circuit layer 110 to the second outer circuit layer 120 and coupled to the first wire 140A and the second wire 140B. In other words, the second wire 140B can be coupled to the first wire 140A via the communication post 150 to transmit the high frequency signal SIG _A .

In this embodiment, the connecting post 150 is not coupled to the other wires other than the first wire 140A and the second wire 140B, and thus the connecting post 150 from the inner circuit layer 130 to the exposed outer outer circuit layer 120 It can be regarded as an open via stub.

In order to prevent the high frequency signal SIG _{A from} entering the open circuit segment and then rebounding into the first wire 140A and the second wire 140B, causing interference and degrading the signal quality, in the embodiment of FIG. 1, the multilayer printed circuit board 100 can The high dielectric loss solder resist ink layer 160 is disposed on the open stub end 150T of the communication post 150 exposed outside the second outer circuit layer 130. Since the high dielectric loss solder resist layer 160 has high loss characteristics, the high frequency signal SIG _A bounce can be reduced, and the transmission quality of the high frequency signal can be improved without back drilling of the open stub.

However, in order to prevent other lines in the second outer circuit layer 120 from degrading the signal quality due to contact with the high dielectric loss solder resist layer 160, in the embodiment of FIG. 1, the multilayer printed circuit board 100 may further comprise a low pass. Electrically loss solder resist ink layer 170. The low dielectric loss solder resist ink layer 170 may cover the second outer circuit layer 120 and the high dielectric loss solder resist ink layer 160 to protect the lines on the second outer circuit layer 120.

In some embodiments of the present invention, the low dielectric loss solder resist ink layer 170 may be, for example, a solder resist ink commonly known as green lacquer, and the high dielectric loss solder resist ink layer 160 corresponds to a loss factor of a high frequency frequency ( The dissipation factor, Df) is much larger than the loss factor (Df) of the low dielectric loss solder resist ink layer 170 corresponding to the same frequency, and the difference between the two can be more than one hundred times. For example, in general, the low dielectric loss solder resist ink layer 170 may have a loss factor of 0.03 or less corresponding to a 10G Hz signal, and the high dielectric loss solder resist ink layer 160 may correspond to a loss factor of a 10G Hz signal. It is 3 or more.

In addition, in general, the low dielectric loss solder resist ink layer 170 has a dielectric constant (Dk) corresponding to a 10G Hz signal of 3.5 to 4.5, and the high dielectric loss solder resist ink layer 160 corresponds to a 10G Hz signal. The dielectric constant can be 100.

In the embodiment of FIG. 1, the high dielectric loss solder resist ink layer 160 has a thickness similar to that of the low dielectric loss solder resist ink layer 170, both of which may be 1 to 2 mils. However, in some embodiments of the present invention, in order to ensure that the high dielectric loss solder resist layer 160 can effectively reduce the effect of signal bounce, the thickness of the high dielectric loss solder resist layer 160 can also be increased, for example, high dielectric. The loss solder resist ink layer 160 has a thickness of up to 3 mils, although the invention is not limited thereto.

2 is a flow chart of a method 200 of fabricating a multilayer printed circuit board 100 in accordance with an embodiment of the present invention. Method 200 can include steps S210 through S260, but is not limited to the following order.

S210: The first outer circuit layer 110 including the first wire 140A is disposed;

S220: setting a circuit layer 130 including the second wire 140B;

S230: The second outer circuit layer 120 is disposed, wherein the inner circuit layer 130 is disposed between the first outer circuit layer 110 and the second outer circuit layer 120;

S240: The connecting column 150 is disposed, wherein the connecting post 150 can be penetrated from the first outer circuit layer 110 to the second outer circuit layer 120 and coupled to the first wire 140A and the second wire 140B;

S250: providing a high dielectric loss solder resist ink layer 160 on the open stub end 150T of the interconnecting pillar 150 exposed outside the second outer circuit layer 120;

S260: A low dielectric loss solder resist ink layer 170 is disposed to cover the second outer circuit layer 120 and the high dielectric loss solder resist ink layer 160.

In step S210, the method 200 may, for example, be plated with a conductive material, such as a copper foil, on the inner layer plate 180, and form a line required for the first outer circuit layer 110, such as the first wire 140A, by reticle etching. Steps S220 and S230 can also be performed in a manner similar to that described above. Moreover, in some embodiments of the invention, the method 200 may further include utilizing a prepreg to bond the circuit layers disposed on the dissimilar inner layers.

In step S250, the user can use the mask to apply the high dielectric loss solder resist ink layer 160 only at the desired position, that is, the open stub end 150T of the communication post 150 exposed outside the second outer circuit layer 120. Above, in step S260, the low dielectric loss solder resist ink layer 170 is applied to the second outer circuit layer 120 and the high dielectric loss solder resist ink layer 160.

The multilayer printed circuit board 100 can be fabricated by the method 200, and a high dielectric loss solder resist ink layer 160 is disposed on the open stub end 150T of the communication post 150 to reduce the high frequency signal SIG _A entering the open stub of the communication column 150. The latter is reflected to the first wire 140A and the second wire 140B, thereby improving the transmission quality of the high frequency signal on the first wire 140A and the second wire 140B.

In summary, the multilayer printed circuit board of the present invention and the method for fabricating the multilayer printed circuit board can provide a high dielectric loss solder resist layer on the open stub end of the connecting post, so that the high frequency signal entering the open stub can be Loss and reduce the reflection of high-frequency signals to improve the transmission quality of high-frequency signals. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧Multilayer printed circuit board

110‧‧‧First outer circuit layer

120‧‧‧Second outer circuit layer

Circuit layers within 130, 132, 134, 136‧‧

140A‧‧‧First wire

140B‧‧‧second wire

150‧‧‧Connected column

150T‧‧‧Connected column open end

160‧‧‧High dielectric loss solder mask ink layer

170‧‧‧Low dielectric loss solder mask ink layer

180, 182‧‧‧ inner board

184‧‧‧ semi-cured board

SIGA‧‧‧ high frequency signal

200‧‧‧ method

Steps S210 to S260‧‧

1 is a schematic view of a multilayer printed circuit board according to an embodiment of the present invention. Fig. 2 is a flow chart showing a method of manufacturing the multilayer printed circuit board of Fig. 1.

Claims (10)

A multilayer printed circuit board comprising: a first outer circuit layer comprising a first wire, the first wire for transmitting a high frequency signal; and an inner circuit layer comprising a second wire, wherein the first outer circuit a layer is disposed on one side of the inner circuit layer; a second outer circuit layer is disposed on the other side of the inner circuit layer; a connecting post extends from the first outer circuit layer to the second outer circuit layer, The first wire and the second wire are coupled to the first wire via the connecting post to transmit the high frequency signal; and a high dielectric loss solder resist layer is disposed on the first wire The connecting post is exposed to an open stub end outside the second outer circuit layer. The multilayer printed circuit board of claim 1, further comprising: a low dielectric loss solder resist ink layer covering the second outer circuit layer and the high dielectric loss solder resist ink layer. The multilayer printed circuit board of claim 2, wherein a dissipation factor of the high dielectric loss solder resist ink layer is substantially equal to the low dielectric loss solder resist ink layer corresponding to a high frequency. One hundred times the loss factor. The multilayer printed circuit board of claim 1, wherein the high dielectric loss solder resist ink layer has a thickness of 1 mil or more. The multilayer printed circuit board of claim 1, wherein a dielectric constant of the high dielectric loss solder resist ink layer is substantially greater than 100 or more corresponding to a high frequency. A method for fabricating a multilayer printed circuit board, comprising: providing a first outer circuit layer, the first outer circuit layer comprising a first wire; an inner circuit layer, the inner circuit layer comprising a second wire; a second outer circuit layer, wherein the inner circuit layer is disposed between the first outer circuit layer and the second outer circuit layer; and a connecting post is disposed, the connecting post penetrating from the first outer circuit layer to the second outer layer The circuit layer is coupled to the first wire and the second wire; and a high dielectric loss solder resist layer is disposed on an open stub end of the connecting pillar exposed outside the second outer circuit layer. The method of fabricating a multilayer printed circuit board according to claim 6, further comprising: providing a low dielectric loss solder resist ink layer to cover the second outer circuit layer and the high dielectric loss solder resist ink layer. The method for fabricating a multilayer printed circuit board according to claim 7, wherein a dissipation factor of the high dielectric loss solder resist ink layer is substantially equal to the low dielectric loss corresponding to a high frequency. One hundred times the loss factor of one of the solder resist ink layers. The method of producing a multilayer printed circuit board according to claim 6, wherein the high dielectric loss solder resist ink layer has a thickness of 1 mil or more. A method of fabricating a multilayer printed circuit board according to claim 6, wherein a dielectric constant of the high dielectric loss solder resist ink layer is substantially greater than 100 or more corresponding to a high frequency.