TW201916060A - Memory bit repair method capable of reducing the amount of redundant memory bits used for repairing - Google Patents

Abstract

The present invention provides a memory bit repair method, including the following steps: providing all of a plurality of memory bytes in a memory, wherein each memory byte contains M bits and M is a positive integer; adding a repair byte to the memory byte, wherein the repair byte contains N repair bits for repair, N is also a positive integer, and N is less than M; checking if any of the memory bytes and the repair bytes has bad bits; if not, ending the repair of the memory; if so, for all the memory bytes and repair bytes having bad bits, replacing all bad bits in the memory bytes with non-bad bits in the repair bytes by an amount equal to the amount of the bad bits in the memory bytes, so as to complete the repair of each memory byte and repair byte in the memory. The present invention provides a method for easily and quickly repairing memory bits, which can reduce the amount of redundant memory bits used for repairing.

Description

Memory bit level repair method

The present invention relates to a repair method for a poor storage element, and more particularly to a repair method for a memory bit level.

In the current chip design, for various types of memory, such as random access memory (RAM), read-only memory (ROM), non-volatile memory (Non-Volatile Memory, NVRAM) The demand for chip memory such as Dynamic Random Access Memory (DRAM), Embedded Flash (Embedded Flash) or Embedded DRAM (Embedded DRAM) is increasing, regardless of the product, quality, Reliability or cost maintenance is an important knowledge for manufacturers. Repeated and reliable detection and repair of memory components in the chip must be performed in the chip memory to improve the reliability of the product. Degree, as well as improving the quality and competitiveness of the wafer.

In traditional repair methods, such as Error-Correcting Code (ECC) or Redundancy, there are too many correction error bits or bits for replacement. For example, in error correction, there is a method. It is the Hamming Code. In 2 ⁿ memory bits, you need n+1 bits to repair a bit. Assume that in 128 bits, it is 2 to the 7th power. It is necessary to have 7+1 repair bits, so that a total of 128+8 bits need to be generated, so that this repair method requires too many bit numbers, and the newly added bit number accounts for 6.25% of the original number of bits. In addition, another BCH repair method (Bose-Chaudhuri-Hocquenghem Code), in 2 ⁿ memory bits, requires 2*n+1 bits for repairing two bits. The BCH repair method will quickly increase the repairable bit when the number of bits to be repaired increases. Therefore, both methods of error correction require a large number of modified error elements or bits for replacement. In the repair method, in addition to the huge amount of bits used for repair, because the bit address used for comparison and the fuse array are used to store the address of the defect, the number of repair groups is usually small. However, the bit density used in the number of repaired groups is too large, and it may often be a bit damage. It is necessary to replace all the bits of the entire set, so that this repair method will also consume too many bits.

Therefore, in view of the above problems, the present invention proposes a simple repair method, and by using the memory bit repair method, it is possible to reduce the provision of excessive repair bits.

The main object of the present invention is to provide a memory bit level repair method, and provide a simple repair method. When a memory byte is formed, a repair bit for repair is added at the same time, and the set is used for repair. The number of repaired bits provides a simpler repair bit than the conventional repair method, and the number of additional repair bits is also lower than the conventional repair method.

Another object of the present invention is to provide a memory bit level repair method. When manufacturing a memory byte, in order to avoid some bits being poor, a minimum number of repair bits are added. When there are poor bits, The repair bit can be used to replace the missing number of poor bits, so that the memory byte can operate smoothly.

In order to achieve the above purpose, the bit line and word line patching methods can be used on the memory to repair the bit line and word line level defects and can not be burned or written to the third level other than the memory state 0 or 1. The state bit level defect, the present invention provides a memory bit level repair method, firstly providing all complex memory bit groups in the memory, each memory byte has M bits, and M is a positive integer, relative The memory byte is appended with a repair byte having N repair bits for repair, N is a positive integer, and N is less than M, detecting whether all memory bytes and repair bytes have poor positions Yuan, to end the repair of all memory bytes, or to all memory bytes and repair bytes with poor bits, corresponding to the number of poor bits of the memory byte to repair the byte A non-poor bit is used as a substitute to complete the repair of all of the memory bytes in the memory.

In the present invention, before the repair byte replaces the memory bit byte, the memory bit is not burned or the memory bit is burned to the third state other than the memory state 0 or 1. The bad bits in the repair byte are also marked first by burning the bad bit or writing it to the third state other than the memory state 0 or 1.

In the present invention, the number of poor bits of all memory bytes does not exceed N.

In the present invention, all memory bytes and repair bytes are detected by internal read, write, and disturb and external temperature, magnetic field, and electric field disturbances to detect whether there are poor bits.

In the present invention, after all memory bytes are repaired, the bits in each of the restored memory bytes are rearranged.

In the present invention, the repaired memory byte and each repair byte are used for data bits, and can also be used for parity bits used by the Error-Correction Code (ECC). Bit) is used to improve the reliability in use.

In the present invention, each memory byte and each repair byte can be used in conjunction with the bit line and word line repair methods to repair defectes containing bit line level and word line level and cannot be burned or A memory byte and a repair byte of a third state bit-level defect other than the memory state 0 or 1 are written to achieve excellent repair efficiency.

The purpose, technical contents, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments and the accompanying drawings.

The invention utilizes additional additional repairing bits instead of the burden of using the algorithm to bring unnecessary repairing bits, and does not need to replace the bits stored in the entire position because a poor bit is very convenient and simple. It is also possible to reduce the production cost of the memory byte.

First, referring to the first figure of the present invention, a memory byte 10 includes M bits 12 and a repair byte 20 includes N repair bits 14 for repair, and both M and N are positive. An integer, and the number of N is less than M, for example, M is equal to 64 bits, and N is equal to 8 bits. The present invention is not limited by the invention as the description of the embodiments. In addition, the restored memory byte and repair byte, in addition to the data bit, can also be used for the parity bit used by the Error-Correction Code (ECC). To improve the reliability in use.

Next, please refer to the second to second second and third figures of the present invention, and please refer to the first figure at the same time to explain in detail how the memory bit level repair method of the present invention is performed. First, as shown in step S10, and referring to the second a diagram at the same time, a memory byte 10 is provided first, and there are M bits in the memory byte 10. As shown in step S12, and referring to the second b-picture at the same time, the repair byte 20 is additionally attached, and there are N repair bits 14 in the repair byte 20 for repair. As shown in step S14, and referring to the second c-picture, it is detected whether all the memory bit groups 10 and the repair byte groups 20 have poor bits 16, which are internally read, written, and disturbed in this embodiment. (disturb) and external temperature, magnetic field, electric field disturbances are detected by all memory byte 10 and repair byte 20, for example, memory level 0 and repair byte 20 are tested for memory states 0 and 1, If the bad bit 16 is detected in the memory byte 10 and the repair byte 20, the process proceeds to step S16. As shown in step S16, after the detection, it is found that among the M bits 12 of the memory byte 10, there are Q poor bits 16, and the poor bit 16 corresponding to the quantity Q, from the repair byte 20 The poor repairing bit 14 in Central Africa replaces the Q poor bit 16 and burns the Q poor bit 16 or writes it to the third state other than the memory state 0 or 1 before the substitute. First, all the bad repair bits 14 in the repair byte 20 are marked by burning the bad bit or writing it to the third state other than the memory state 0 or 1, to complete the memory. Repair of the voxel 10. The above-described post-test repair steps are repeated to complete the poor bit repair and repair of the poor bit of the memory bit in the memory. Thereafter, as shown in step S18, and referring to the second d-picture at the same time, when the memory bit group 10 completes the repair, the memory bit group 10 is re-arranged to become the memory bit group 10'. If no bad bits are found after the detection, the process proceeds to step S20. As shown in step S20, the repair of the memory byte 10 is ended.

In the present invention, the number of the above-mentioned poor bits is not limited, and the number of the bad bits is mainly not more than N, meaning that in the memory byte, the number of poor bits should be Below the number of repair bits, simple and effective repair work can be performed regardless of the memory byte. However, the number of Ns disclosed in the present invention is also lower than the number of conventional repairing bits, and the value of N determines the rate of poorness from the memory. For example, when M=128, the unsatisfactory rate is about 10%, then it can be used. N=13~16, and it will not exceed the number of bits in the memory byte. If the memory byte currently has too many bad bits, for example, more than the number of repair bits, the memory byte is not simply repaired by the repair method of the present invention, and there are more production factors. Among them, non-general memory repair or compensation can be adjusted. Therefore, the repairing method provided by the present invention can be used under general production conditions, in which only a few memory poor bits can be effectively replaced by the repairing bits, and even the repairing bits are not replaced. It can also be left in the memory byte and used when there is a bit loss in the future. Bit line and word line patching methods can be patched for bit line and word line level defects and for failure to burn or write to a third state bit level defect other than memory state 0 or 1, thus memory When using the present invention, bit line and word line patching methods can be used in combination to achieve excellent repair efficiency.

The embodiments described above are merely illustrative of the technical spirit and the features of the present invention, and the objects of the present invention can be understood by those skilled in the art, and the scope of the present invention cannot be limited thereto. That is, the equivalent variations or modifications made by the spirit of the present invention should still be covered by the scope of the present invention.

10, 10’‧‧‧ Memory Bits

12‧‧‧ bits

14‧‧‧Repair Bits

16‧‧‧bad bits

20‧‧‧Repairing tuples

The first figure is a schematic diagram of an application architecture of a method for repairing a memory bit level of the present invention. The second to second graphs are diagrams showing the steps of the method for repairing the memory bit level of the present invention. The third figure is a flow chart of the steps of the method for repairing the memory bit level of the present invention.

Claims (7)

A memory bit level repair method includes the following steps: providing a memory in which a plurality of memory byte groups have M bits, and the M system is a positive integer; and each of the memory byte groups is attached with a repair a byte having N repair bits for repair, N is a positive integer, and N is less than M; and detecting whether all memory bytes in the memory and the repair byte have poor bits : if not, ending the repair of the memory; and if so, the memory byte and the repair byte having any of the poor bits, corresponding to the poor bit of the memory byte The number is replaced by an equal number of non-poor repair bits from the repair byte to all of the poor bits of the memory byte to complete each of the memory bytes in the memory Fix and mark the bad bit in the repair byte. The method for repairing a memory bit level according to claim 1, wherein the memory is replaced from the non-poor repair bit in the repair byte to the poor bit of the memory byte. The poor bit of the body block is burned or written to a third state other than the memory state 0 or 1, and the bad bit in the repair byte is also marked first by the repair The bad bit in the byte burns or writes it to a third state other than memory state 0 or 1. The method for repairing a memory bit level according to claim 1, wherein the number of the poor bits of the memory byte does not exceed N. The method for repairing a memory bit level according to claim 1, wherein each of the memory byte and the repair byte is disturbed by internal read, write, and disturb, and external temperature, magnetic field, and electric field. To detect if there is such a bad bit. The method for repairing a memory bit level according to claim 1, wherein after all the memory bit groups are repaired, the bits in each of the restored memory bit groups are rearranged. The method for repairing a memory bit level according to claim 1, wherein the restored memory bit group and each of the repair bit groups are used for data bits, and may also be used for correcting bits (Error -Correction Code, ECC) Use the parity bit to improve reliability during use. The method for repairing a memory bit level according to claim 1, wherein each of the memory byte groups and each of the repair byte groups can repair the bit line by using a bit line and a word line patching method. Level and word line level defects and memory byte and repair byte that cannot be burned or written to a third state bit level defect other than memory state 0 or 1 for excellent repair efficiency .