TW201724453A - Electronic package and its manufacturing method - Google Patents

Abstract

Provided is an electronic package, including an insulating layer, an electronic element embedded in the insulating layer and exposed from the surface of the insulating layer, a circuit structure formed on the insulating layer and the electronic element, a conductor embedded in the insulating layer, and a conductive layer formed on the insulating layer while being in contact with the conductor, thereby using the conductor and the conductive layer as shielding structures for covering the outer peripherals of the electronic element in order to avoid electromagnetic interference. The invention further provides a method for fabricating the electronic package as described above.

Description

Electronic package and its manufacturing method

The invention relates to a method for manufacturing an electronic package, in particular to an electronic package having a shielding structure and a method for manufacturing the same.

With the rapid development of the electronics industry, electronic products are gradually moving towards multi-functional and high-performance trends. In order to meet the packaging requirements of miniaturization of electronic packages, Wafer Level Packaging (WLP) technology has been developed.

1A to 1E are schematic cross-sectional views showing the fabrication of a conventional wafer level semiconductor package 1.

As shown in FIG. 1A, a thermal release tape 11 is formed on a carrier 10.

Next, a plurality of semiconductor elements 12 are disposed on the thermalizing release layer 11, the semiconductor elements 12 having opposite active surfaces 12a and inactive surfaces 12b, each of which has a plurality of electrode pads 120 thereon, and Each of the active faces 12a is adhered to the heated release layer 11.

As shown in FIG. 1B, an encapsulant 13 is formed on the thermal release layer 11 to coat the semiconductor element 12.

Baking the encapsulant 13 to harden the thermalization as shown in FIG. 1C The adhesive layer 11 removes the heated release layer 11 and the carrier 10 to expose the active surface 12a of the semiconductor component 12.

As shown in FIG. 1D, a wiring structure 14 is formed on the encapsulant 13 and the active surface 12a of the semiconductor component 12, so that the wiring structure 14 is electrically connected to the electrode pad 120 of the semiconductor component 12. Next, an insulating protective layer 15 is formed on the wiring structure 14, and the insulating protective layer 15 exposes a part of the surface of the wiring structure 14 for bonding the conductive elements 16 such as solder balls.

As shown in FIG. 1E, a singulation process is performed along the dicing path L as shown in FIG. 1D to obtain a plurality of semiconductor packages 1.

However, the conventional semiconductor package 1 is susceptible to electromagnetic interference (EMI) from the outside because it does not have an electromagnetic interference (EMI) shielding structure during operation, resulting in the semiconductor package 1 The electrical operation function is abnormal, thus affecting the overall electrical performance of the semiconductor package 1.

Therefore, how to overcome the various problems of the above-mentioned prior art has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides an electronic package comprising: an insulating layer having opposite first and second surfaces; electronic components embedded in the insulating layer and exposed a first surface of the insulating layer; a line structure formed on the first surface of the insulating layer and electrically connected to the electronic component; the electrical conductor embedded in the insulating layer and exposed to the insulating a second surface of the layer; and a conductive layer formed on the second surface of the insulating layer and contacting the electrical conductor to The conductor and the conductive layer are used as a shielding structure.

The invention provides a method for manufacturing an electronic package, comprising: providing an insulating layer embedded with electronic components, wherein the insulating layer has opposite first and second surfaces, and the electronic component is exposed to the insulating layer a first surface; a line structure is formed on the first surface of the insulating layer and the electronic component to electrically connect the circuit structure to the electronic component; a through hole is formed on the second surface of the insulating layer; And forming a conductive layer on the second surface of the insulating layer such that the conductive layer contacts the conductive body, and the conductive body and the conductive layer serve as a shielding structure.

In the foregoing electronic package and method of manufacturing the same, the electronic component has an opposite active surface and a non-active surface, and the electronic component is electrically connected to the wiring structure by an active surface thereof. Moreover, the conductive layer is in contact with the inactive surface of the electronic component.

In the foregoing electronic package and the method of manufacturing the same, the conductive system is an electroplated metal, a filler material or a conductive paste.

In the above electronic package and method of manufacturing the same, the conductor has an interface with the conductive layer.

In the above electronic package and method of manufacturing the same, the electrical conductor communicates with the first and second surfaces of the insulating layer.

In the foregoing electronic package and method of manufacturing the same, the electrical conductor is electrically connected to the line structure.

As can be seen from the above, the electronic package of the present invention and the method for manufacturing the same are characterized in that the periphery of the electronic component is covered with a shielding structure, so that when the electronic package is operated, the electronic component is not Will suffer from external electromagnetic interference, so the electronic package of the present invention is compared with the prior art. The electrical operation function is functioning properly, and the electrical performance of the electronic package is not affected.

1‧‧‧Semiconductor package

10,20‧‧‧Carrier

11‧‧‧heating release layer

12‧‧‧Semiconductor components

12a, 22a‧‧‧ active surface

12b, 22b‧‧‧ inactive surface

120,220‧‧‧electrode pads

13‧‧‧Package colloid

14,24‧‧‧Line structure

15,222‧‧‧Insulating protective layer

16,26‧‧‧ conductive elements

2,2’,3,3’‧‧‧electronic packages

2a‧‧‧Shielding structure

21‧‧‧Fractal layer

22‧‧‧Electronic components

221‧‧‧Electrical bumps

23‧‧‧Insulation

23a‧‧‧ first surface

23b‧‧‧ second surface

230‧‧‧Perforation

240‧‧‧ dielectric layer

241‧‧‧Line layer

242‧‧‧ Conductive blind holes

243‧‧‧ Metal layer under the bump

27‧‧‧Electrical conductor

28‧‧‧ Conductive layer

L‧‧‧ cutting path

S‧‧‧ interface

1A to 1E are schematic cross-sectional views showing a method of fabricating a conventional semiconductor package; FIGS. 2A to 2F are schematic cross-sectional views showing a method of manufacturing an electronic package of the present invention; wherein 2A' and 2A' are diagrams of FIG. 2A In another embodiment, FIG. 2B′ is another embodiment of FIG. 2B, and FIG. 2F′ is another embodiment of FIG. 2F; and FIGS. 3 and 3′ are another embodiment of the electronic package of the present invention. Example.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "first", "second", "one" and "the" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments in their relative relationship, which are also considered to be The scope of the invention can be implemented.

2A to 2F are schematic cross-sectional views showing the manufacturing method of the electronic package 2 of the present invention.

As shown in FIG. 2A, a carrier 20 having a release layer 21 is provided, and a plurality of electronic components 22 are disposed on the carrier 20.

In this embodiment, the electronic component 22 is an active component, a passive component, or a combination thereof, and the active component is, for example, a semiconductor wafer, and the passive component is, for example, a resistor, a capacitor, and an inductor. For example, the electronic component 22 is an active component having an opposite active surface 22a and an inactive surface 22b, and is disposed on the release layer 21 with its inactive surface 22b, and the active surface 22a has a plurality of electrode pads 220. .

Further, as shown in FIG. 2A', the electrode pad 220 is formed with a conductive bump 221 such as a copper post or a solder ball, and the active surface 22a is provided with an insulating protective layer 222 to make the insulating protective layer 222. The electrode pads 220 and the conductive bumps 221 are covered. Alternatively, as shown in FIG. 2A, the conductive bump 221 may be exposed to the insulating protective layer 222. For example, the end surface of the conductive bump 221 is flush with the surface of the insulating protective layer 222.

As shown in FIG. 2B, following the process of FIG. 2A, an insulating layer 23 is formed on the carrier 20, and the insulating layer 23 covers the periphery of the electronic component 22.

In the present embodiment, the material forming the insulating layer 23 is a molding compound, a dry film, a line build-up material or a photoresist, for example, the dry film system It is formed in a bonding manner, and the photoresist is formed by coating.

Furthermore, the insulating layer 23 has a first surface 23a and a second surface 23b opposite thereto, and the insulating layer 23 is bonded to the release layer 21 by the second surface 23b thereof, and the active surface 22a of the electronic component 22 is exposed. The first surface 23a of the insulating layer 23.

Further, if the process of FIG. 2A is continued, as shown in FIG. 2B', after the insulating layer 23 is formed, the insulating layer 23 is coated with the electronic component 22, and the insulating process is performed by a leveling process. The layer 222 and the conductive bump 221 are exposed on the first surface 23a of the insulating layer 23. Specifically, the leveling process removes a portion of the material of the insulating layer 23 and a portion of the material of the insulating protective layer 222 by grinding (a portion of the conductive bump 221 may be removed as needed).

It should be understood that, if the process of the 2A" is continued, part of the material of the insulating protective layer 222 is removed, so that the conductive bumps 221 are exposed on the first surface 23a of the insulating layer 23 (on request, A portion of the material of the insulating protective layer 222 and a portion of the conductive bump 221 are removed, as shown in FIG. 2B'.

As shown in FIG. 2C, a redistribution layer (RDL) process is performed to form a line structure 24 on the first surface 23a of the insulating layer 23 and the active surface 22a of the electronic component 22, and the The line structure 24 is electrically connected to the electronic component 22. Next, the carrier 20 and the release layer 21 are removed, and the second surface 23b of the insulating layer 23 and the inactive surface 22b of the electronic component 22 are exposed.

In this embodiment, the circuit structure 24 includes at least one dielectric layer 240, a circuit layer 241 disposed on the dielectric layer 240, and a dielectric layer disposed on the dielectric layer The plurality of conductive blind vias 242 are electrically connected to the circuit layer 241. The innermost circuit layer 241 is electrically connected to the electrode pads 220, and has a bump under metal layer on the outermost circuit layer 241 (Under Bump) Metallurgy (UBM) 243 for other external components in subsequent processes.

As shown in FIG. 2D, a plurality of through holes 230 are formed on the second surface 23b of the insulating layer 23 by a laser process so that the through holes 230 communicate with the first surface 23a and the second surface 23b of the insulating layer 23.

As shown in FIG. 2E, a plurality of electrical conductors 27 are formed in the plurality of vias 230, wherein the electrical conductors 27 are columnar.

In this embodiment, the electrical conductor 27 is a plating metal, a filling material or a conductive adhesive, and the electrical conductor 27 can be electrically connected or not electrically connected to the wiring layer 241.

As shown in FIG. 2F, a conductive layer 28 is formed on the second surface 23b of the insulating layer 23 and the conductive body 27, so that the conductive body 27 and the conductive layer 28 serve as a shield for the electronic component 22. Structure 2a. Next, a singulation process is performed along the dicing path L as shown in FIG. 2E to form a plurality of electronic packages 2. In addition, a plurality of conductive elements 26 including solder materials or metal bumps may be formed on the under bump metal layer 243 of the circuit structure 24 for the electronic package 2 to be connected to other such as a circuit board, a package substrate or a lead frame. Electronic device (figure omitted).

In this embodiment, the conductive layer 28 is formed by electroplating, sputtering, or metal sheeting, and the conductive material is made of metal or non-metal (such as graphite), and the conductive body 27 is Conductive layer 28 is respectively Manufactured by two different processes, an interface S is created between the conductor 27 and the conductive layer 28.

Moreover, the conductive layer 28 contacts the conductive body 27 and the inactive surface 22b of the electronic component 22. Preferably, the conductive layer 28 covers all of the inactive faces 22b of the electronic component 22.

Further, when the process of Fig. 2B' is continued, the electronic package 2' as shown in Fig. 2F' will be obtained.

Additionally, in other embodiments, as shown in Figures 3 and 3', the single electronic package 3, 3' includes a plurality of electronic components 22. It should be understood that each of the electronic components 22 may be separated by at least one electrical conductor 27 as shown in Fig. 3'.

The method of the present invention forms the conductive body 27 and the conductive layer 28 such that the periphery of the electronic component 22 is covered with the shielding structure 2a, so when the electronic package 2, 2', 3, 3' is in operation, the electronic component 22 will not be subjected to external electromagnetic interference (EMI), so that the electrical operation function of the electronic package 2, 2', 3, 3' is normal, and thus does not affect the overall electronic package 2, 2', 3, 3' electrical performance.

Furthermore, the shielding structure 2a is grounded via the wiring layer 241 of the wiring structure 24, the conductive blind vias 242, and the conductive elements 26. Alternatively, after the electronic package 2, 2', 3, 3' is placed on an electronic device (not shown) such as a circuit board, a package substrate or a lead frame, the shielding structure 2a is connected by a wire (not shown) Ground to the electronic device.

The invention further provides an electronic package 2, 2', 3, 3' comprising an insulating layer 23, at least one electronic component 22, a wiring structure 24, a plurality of electrical conductors 27, and a conductive layer 28.

The insulating layer 23 has opposite first and second surfaces 23a, 23b.

The electronic component 22 is embedded in the insulating layer 23 and exposed on the first surface 23a of the insulating layer 23.

The circuit structure 24 is formed on the first surface 23a of the insulating layer 23 and the electronic component 22 and electrically connected to the electronic component 22.

The conductor 27 is embedded in the insulating layer 23 and exposed on the second surface 23b of the insulating layer 23.

The conductive layer 28 is formed on the second surface 23b of the insulating layer 23 and contacts each of the conductive bodies 27 such that the conductive body 27 and the conductive layer 28 serve as the shielding structure 2a.

In one embodiment, the electronic component 22 has an opposite active surface 22a and an inactive surface 22b, and the electronic component 22 is electrically connected to the wiring structure 24 by its active surface 22a, and the conductive layer 28 is in contact with the electronic component. The inactive surface 22b of the element 22.

In one embodiment, the electrical conductor 27 is an electroplated metal, a filler material, or a conductive paste.

In an embodiment, each of the conductors 27 and the conductive layer 28 has an interface S.

In summary, the electronic package of the present invention and the manufacturing method thereof mainly use the conductive body and the conductive layer as a shielding structure to prevent the electronic component from being subjected to external electromagnetic interference when the electronic package is operated. The electrical operation function of the electronic package is functioning normally, and the electrical performance of the electronic package is not affected.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

2‧‧‧Electronic package

2a‧‧‧Shielding structure

22‧‧‧Electronic components

22b‧‧‧Inactive surface

23‧‧‧Insulation

23a‧‧‧ first surface

23b‧‧‧ second surface

24‧‧‧Line structure

243‧‧‧ Metal layer under the bump

26‧‧‧Conductive components

27‧‧‧Electrical conductor

28‧‧‧ Conductive layer

S‧‧‧ interface

Claims (14)

An electronic package comprising: an insulating layer having opposite first and second surfaces; an electronic component embedded in the insulating layer and exposed on the first surface of the insulating layer; the line structure is formed And electrically connecting the electronic component to the first surface of the insulating layer; the electrical conductor is embedded in the insulating layer and exposed on the second surface of the insulating layer; and the conductive layer is formed on the conductive layer The second surface of the insulating layer contacts the conductive body to make the conductive body and the conductive layer serve as a shielding structure. The electronic package of claim 1, wherein the electronic component has an opposite active surface and a non-active surface, and the electronic component is electrically connected to the wiring structure by an active surface thereof. The electronic package of claim 2, wherein the conductive layer is in contact with the inactive surface of the electronic component. The electronic package of claim 1, wherein the conductive system is a plated metal, a filler material or a conductive paste. The electronic package of claim 1, wherein the electrical conductor has an interface with the conductive layer. The electronic package of claim 1, wherein the electrical conductor communicates with the first and second surfaces of the insulating layer. The electronic package of claim 1, wherein the electrical conductor is electrically connected to the circuit structure. An electronic package manufacturing method includes: providing an insulating layer embedded with electronic components, wherein the insulating layer has opposite first and second surfaces, and the electronic component is exposed on the first surface of the insulating layer Forming a line structure on the first surface of the insulating layer and the electronic component to electrically connect the circuit structure to the electronic component; forming a via on the second surface of the insulating layer; forming an electrical conductor in the through hole; And forming a conductive layer on the second surface of the insulating layer, so that the conductive layer contacts the conductive body, and the conductive body and the conductive layer serve as a shielding structure. The method of manufacturing an electronic package according to claim 8, wherein the electronic component has an opposite active surface and a non-active surface, and the electronic component is electrically connected to the wiring structure by an active surface thereof. The method of manufacturing an electronic package according to claim 9, wherein the conductive layer is in contact with the inactive surface of the electronic component. The method of manufacturing an electronic package according to claim 8, wherein the conductive system is a plating metal, a filler material or a conductive paste. The method of manufacturing an electronic package according to claim 8, wherein the conductive body and the conductive layer have an interface. The method of manufacturing an electronic package according to claim 8, wherein the electrical conductor communicates with the first and second surfaces of the insulating layer. The method of manufacturing an electronic package according to claim 8, wherein the electrical conductor is electrically connected to the circuit structure.