TW201715092A - Annealing treatment improving the electrical quality and yield rate of the circuit layer - Google Patents

Abstract

This invention discloses an annealing treatment comprising: preparing an electroplating solution; carrying out electroplating treatment by using the electroplating solution to form a metal conducting layer on a substrate, and retaining produced impurities in a crystal boundary of the metal conducting layer; preparing a heated hydrothermal solution; contacting the metal conducting layer with the hydrothermal solution for annealation to rearrange and assemble metal lattices, and to discharge the impurities in the metal conducting layer, so that the lattice defects of the metal conducting layer are reduced; and carrying out drying treatment of the substrate having the metal conducting layer. Because the hydrothermal solution has a relatively uniform heating characteristic, the annealing effect can be greatly improved, lattice defects can be avoided, and the electrical function is not affected by cracks or breakages caused by excessive fretting at the lattice defects when a circuit layer is formed by subsequent etching treatment of the metal conducting layer, so that the electrical quality and yield rate of the circuit layer are improved.

Description

Annealing

The invention relates to an annealing treatment, in particular to annealing a metal conductive layer by using a hot liquid to remove impurities in the metal conductive layer, reducing lattice defects of the metal conductive layer, and preventing the metal conductive layer from being subsequently etched. The circuit layer is cracked or broken.

The circuit board has a circuit pattern for arranging various electronic components, and is an important device for electronic related products, including hard circuit boards and flexible circuit boards. With the increasingly powerful functions of electronic products, especially portable products, such as mobile phones, the requirements for light, thin, short, and small are becoming more and more strict, so that hard circuit boards or flexible circuit boards also need to be oriented toward reduction. The specific circuit pattern in the circuit layer must also minimize the line width/line spacing, such as less than 10um.

Conventionally, in the production of a wiring board, an electroplated copper layer is usually formed on the substrate by electroplating, and then an etching process is performed to form a wiring layer having a specific circuit pattern. Since the electroplating solution used in the electroplating method has impurities generated during the electroplating process, it is attached to the electroplated copper layer together during electroplating, that is, the grain boundary of the electroplated copper layer, thus causing lattice defects in the etching process. During the process, a pinhole-like void is left in the grain boundary. Therefore, the wiring layer of the electroplated copper layer is caused by pinhole-like voids, which affects electrical characteristics, and even when a plurality of pinholes are arranged in series, the circuit layer may be broken and cracked.

Therefore, conventional techniques must utilize an annealing heat treatment to make the grain boundaries smaller and to exclude impurities, thereby preventing the problem of cracking and cracking of the wiring layer. Generally, it is used in a high-temperature furnace and maintained at 180 ° C for at least 1 hour. However, the heat of the high-temperature furnace is not uniform, which affects the effect of the grain boundary becoming small, and the heating temperature is too high, especially the heating time is quite long, and the productivity cannot be greatly improved. .

Therefore, a new type of annealing treatment is highly needed, and the metal conductive layer is annealed by a hot liquid to remove impurities in the metal conductive layer, and the grain boundary of the metal conductive layer is made smaller, thereby preventing the metal conductive layer from being subsequently etched. The circuit layer is cracked or broken, thus Solve all the problems of the above-mentioned conventional technology.

The main object of the present invention is to provide an annealing treatment for improving electrical quality and yield and preventing cracks or breaks in the wiring layer formed by subsequent etching treatment. Specifically, the annealing treatment of the present invention is mainly to prepare a plating solution, and the plating solution contains at least a solvent, a metal ion, and an additive. Next, the substrate is subjected to a plating treatment using a plating solution, thereby forming a metal conductive layer on the substrate, and impurities generated in the plating solution due to the cracking reaction remain in the grain boundaries of the metal conductive layer. Then, a hot liquid having a heating temperature is prepared, and the hot liquid may include an inorganic solvent and/or an organic solvent.

The substrate having the metal conductive layer is then contacted with the hot liquid for annealing, and impurities in the metal conductive layer are removed, so that the grain boundaries of the metal conductive layer become small. Finally, the substrate having the metal conductive layer is subjected to a drying process.

The above metal conductive layer can be subjected to subsequent etching treatment to form a circuit layer having a specific circuit pattern, especially a line of a thin line width/line line, and since the hot liquid itself is in a liquid state, it has a relatively uniform heating characteristic and can be greatly The annealing effect on the metal conductive layer is improved to make the grain boundary small, so that pinhole-like voids are not left after the impurities are removed. Therefore, the circuit layer does not crack or break due to pinhole-shaped voids, thereby affecting electrical functions, thereby improving the electrical quality and yield of the circuit layer.

S10~S50‧‧‧Steps

The first figure shows a schematic diagram of an annealing process in accordance with an embodiment of the present invention.

The embodiments of the present invention will be described in more detail below with reference to the drawings and the reference numerals, which can be implemented by those skilled in the art after having studied this specification.

Referring to the first figure, a schematic diagram of an annealing process of an embodiment of the present invention. As shown in the first figure, the annealing process of the embodiment of the present invention mainly includes steps S10, S20, S30, S40, and S50 sequentially performed to improve electrical quality and yield.

Specifically, the annealing treatment of the present invention starts from step S10 to prepare a plating solution, wherein the plating solution may contain at least a solvent, a metal ion, and an additive. Preferably, the metal ion can be a copper ion and the additive can be a copper plating additive.

Next, in step S20, the substrate is subjected to a plating treatment using a plating solution, so that the metal ions are reduced to a metal or an alloy such as a metal copper layer or a copper-containing alloy layer, thereby forming a metal conductive layer on the substrate. It is to be noted that the metal conductive layer is composed of a plurality of metal crystals and gradually grows upon formation, thereby forming grain boundaries between adjacent metal crystals. Since the additive undergoes a cracking reaction in the plating treatment to generate impurities, the impurities remain in the grain boundaries of the metal conductive layer.

The substrate may include epoxy resin, polyphenylene ether resin (PPO), polyimide (PI) or polypropylene (PP).

The hot liquid is prepared in step S30, wherein the heating temperature of the hot liquid may be between 40 and 250 ° C, and the hot liquid may include an inorganic solvent and/or an organic solvent. Further, the hydrothermal fluid may further contain an inorganic salt.

Then, proceeding to step S40, the substrate having the metal conductive layer is brought into contact with the hot liquid prepared in step S30 for annealing, and at this time, the metal crystal of the metal conductive layer is energized and rearranged by the heating effect of the hot liquid. In order to achieve thermal stability, and in the rearrangement, the adjacent metal crystals will gradually close together, so that the impurities in the grain boundary of the metal conductive layer are pushed out and removed, and the grain boundary of the metal conductive layer It will become smaller. More specifically, the hot liquid can contact the metal conductive layer of the substrate by means of immersion, for example, the tank is filled with hot liquid, and the substrate is directly immersed in the hot liquid. Alternatively, it is also possible to use a spray method such as using a spray head to uniformly spray the hot liquid onto the metal conductive layer of the substrate. Also. The time the circuit board contacts the hot liquid is between 10 seconds and 30 minutes.

Finally, proceeding to step S50, the substrate having the metal conductive layer is subjected to a drying treatment to remove any liquid on the metal conductive layer, thereby completing the annealing treatment of the present invention. Further, the temperature of the drying treatment may be between 80 and 150 °C.

Since the hydrothermal liquid itself is in a liquid state and has relatively uniform heating characteristics, the annealing effect on the metal conductive layer can be greatly improved, so that the metal conductive layer which is annealed by the present invention has a small grain boundary, especially on the removed grain boundary. Impurities, ideal for subsequent etching processes, to form high electrical quality wiring layers, especially for thin line width/line distance lines, such as line widths/line spacings less than 10um. Furthermore, since the metal conductive layer of the present invention has a small grain boundary and the grain boundary does not contain impurities, the crystal grain boundary does not generate pinhole-shaped voids in the subsequent etching treatment, and thus the etching The circuit layer formed by the engraving process does not crack or break due to pinhole-shaped voids, affecting electrical functions, and thereby improving the overall electrical quality and yield of the circuit layer.

In summary, the main feature of the present invention is that it can meet the requirements of increasing line width/line spacing of the circuit layer on the market. Furthermore, the annealing process of the present invention can provide a metal conductive layer with a reduced grain boundary. The pinhole-shaped voids, which do not have the conventional technology, can avoid the gaps being connected together and cause the subsequent circuit layer to break the circuit pattern, which is quite favorable for market competition.

Since the technology of the present invention is not found in published publications, periodicals, magazines, media, exhibition venues, and thus is novel, and can be implemented by breaking through the current technical bottlenecks, it is indeed progressive. In addition, the present invention can solve the problems of the conventional technology, improve the overall use efficiency, and can achieve the value of industrial utilization.

The above is only a preferred embodiment for explaining the present invention, and is not intended to limit the present invention in any way, and any modifications or alterations to the present invention made in the spirit of the same invention. All should still be included in the scope of the intention of the present invention.

S10~S50‧‧‧Steps

Claims (8)

An annealing treatment comprising the steps of: preparing a plating solution, wherein the plating solution comprises at least a solvent, a metal ion and an additive; and using a plating solution, performing a plating treatment on a substrate to reduce the metal ions into a metal or alloy to form a metal conductive layer on the substrate; preparing a hot liquid having a heating temperature; contacting the metal conductive layer with the hot liquid to anneal the metal conductive layer; and having the metal conductive layer The substrate is subjected to a drying process, wherein the hot liquid comprises an inorganic solvent and/or an organic solvent. According to the annealing treatment of claim 1, wherein the metal ion of the plating solution is copper ion, and the additive is a copper plating additive. The annealing treatment according to claim 1 of the patent application, wherein the substrate comprises an epoxy resin, a polyphenylene ether resin (PPO), a polyimine (PI) or a polypropylene (PP). The annealing treatment according to the first aspect of the patent application, wherein the hot liquid is in a soaking manner such that the metal conductive layer of the substrate contacts the hot liquid. The annealing treatment according to the first aspect of the patent application, wherein the hot liquid is sprayed such that the metal conductive layer of the substrate contacts the hot liquid. The annealing treatment according to the first aspect of the patent application, wherein the hot liquid is heated at a temperature between 40 and 250 °C. According to the annealing treatment of claim 1, the circuit board contacts the hot liquid for a period of 10 seconds to 30 minutes. The annealing treatment according to the first aspect of the patent application, wherein the temperature of the drying treatment is between 80 and 150 °C.