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TW201613030A - Package substrate and method for manufacturing the same - Google Patents

Package substrate and method for manufacturing the same

Info

Publication number
TW201613030A
TW201613030A TW103134044A TW103134044A TW201613030A TW 201613030 A TW201613030 A TW 201613030A TW 103134044 A TW103134044 A TW 103134044A TW 103134044 A TW103134044 A TW 103134044A TW 201613030 A TW201613030 A TW 201613030A
Authority
TW
Taiwan
Prior art keywords
package substrate
conductive posts
circuit layer
high conductive
manufacturing
Prior art date
Application number
TW103134044A
Other languages
Chinese (zh)
Other versions
TWI569365B (en
Inventor
Chun-Ting Lin
Shun-Hsiang Liang
Original Assignee
Unimicron Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unimicron Technology Corp filed Critical Unimicron Technology Corp
Priority to TW103134044A priority Critical patent/TWI569365B/en
Publication of TW201613030A publication Critical patent/TW201613030A/en
Application granted granted Critical
Publication of TWI569365B publication Critical patent/TWI569365B/en

Links

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A method for forming a package substrate is provided. First, a package substrate structure is provided, in which the package substrate structure includes a dielectric layer, a first circuit layer and a second circuit layer respectively disposed on two sides of the dielectric layer, and a plurality of conductive posts disposed in the dielectric layer and electrically connected to the first circuit layer and the second circuit layer. Then, a plurality of lower parts of high conductive posts are formed on the first circuit layer, and a plurality of upper parts of the high conductive posts are formed on the lower parts of the high conductive posts, in which a diameter of the lower parts of the high conductive posts is greater than a diameter of the uppers parts of the high conductive posts.
TW103134044A 2014-09-30 2014-09-30 Package substrate and method for manufacturing the same TWI569365B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW103134044A TWI569365B (en) 2014-09-30 2014-09-30 Package substrate and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW103134044A TWI569365B (en) 2014-09-30 2014-09-30 Package substrate and method for manufacturing the same

Publications (2)

Publication Number Publication Date
TW201613030A true TW201613030A (en) 2016-04-01
TWI569365B TWI569365B (en) 2017-02-01

Family

ID=56360943

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103134044A TWI569365B (en) 2014-09-30 2014-09-30 Package substrate and method for manufacturing the same

Country Status (1)

Country Link
TW (1) TWI569365B (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7468545B2 (en) * 2005-05-06 2008-12-23 Megica Corporation Post passivation structure for a semiconductor device and packaging process for same
TWM433634U (en) * 2012-03-23 2012-07-11 Unimicron Technology Corp Semiconductor substrate

Also Published As

Publication number Publication date
TWI569365B (en) 2017-02-01

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