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TW201507194A - Electrode contact structure of light emitting diode - Google Patents

Electrode contact structure of light emitting diode Download PDF

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Publication number
TW201507194A
TW201507194A TW102129111A TW102129111A TW201507194A TW 201507194 A TW201507194 A TW 201507194A TW 102129111 A TW102129111 A TW 102129111A TW 102129111 A TW102129111 A TW 102129111A TW 201507194 A TW201507194 A TW 201507194A
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TW
Taiwan
Prior art keywords
semiconductor layer
type semiconductor
layer
type
emitting diode
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TW102129111A
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Chinese (zh)
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TWI523259B (en
Inventor
li-ping Zhou
Fu-Bang Chen
zhi-song Zhang
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High Power Optoelectronics Inc
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Priority to TW102129111A priority Critical patent/TWI523259B/en
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Publication of TWI523259B publication Critical patent/TWI523259B/en

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Abstract

This disclosure relates to an electrode contact structure of LED (light emitting diode) applied to a LED. The LED includes a plurality N-type electrodes, an N-type semiconductor layer, a light emitting layer, a P-type semiconductor layer, a reflection layer, a buffer layer, a combination layer, a permanent substrate, and a P-type electrode stacked in order. The N-type semiconductor layer is formed with an irregular surface and a plurality of contact platforms. The plurality of contact platforms have a pattern distribution disposed on the N-type semiconductor layer. The irregular surface is formed at a region of the N-type semiconductor layer having no plural contact platforms. The plurality of N-type electrodes is respectively formed on the plurality of contact platforms. The roughness of the plurality of contact platforms is from 0.01μm to 0.1μm. Accordingly, since the plurality of contact platforms provide interfaces having proper roughness, the plurality of N-type electrodes do not produce clearances, have good adhesion while forming on the plurality of contact platforms. It could avoid molecule spin to confine carriers and peel-off. Therefore, it could retain good electrical contacts to further improving luminous efficiency.

Description

發光二極體的電極接觸結構Electrode contact structure of light emitting diode

本創作係有關發光二極體,特別是指發光二極體的電極接觸結構。
This creation relates to a light-emitting diode, and in particular to an electrode contact structure of a light-emitting diode.

發光二極體(Light Emitting Diode;LED),具有輕薄短小、省電等特性,已廣泛的應用於照明、交通號誌、廣告招牌等等,其主要由半導體材料多重磊晶堆疊而成,以藍光發光二極體為例,其主要是氮化鎵基(GaN-based)磊晶薄膜組成。
請參閱「圖1A」與「圖1B」所示,為一種習知垂直式發光二極體,其包含組成三明治結構的一N型半導體層1、一發光層2與一P型半導體層3,該P型半導體層3之下依序設置一反射層4(Mirror layer)、一緩衝層5(buffer layer)、一結合層6、一矽基板7與一P型電極8,而該N型半導體層1的表面可以粗化處理以增加光出射率,並供設置一N型電極9,據此於該N型電極9與該P型電極8施予電壓後,該N型半導體層1提供電子,而該P型半導體層3提供電洞,該電子與該電洞於該發光層2結合後即可產生光。
為了增加光取出率,該N型半導體層1的表面會粗化處理而形成一不規則表面1A,而該N型電極9為直接形成於該不規則表面1A上,又該N型電極9一般為使用如濺鍍、蒸鍍等薄膜製程形成,因此該N型電極9與該N型半導體層1之間,在進行薄膜製程之時,會於該不規則表面1A的死角處形成空隙1B(void),其不但造成接觸不良而增加接觸阻抗,且製作不規則表面時易導致其分子產生旋鍵而拘限載子,而導致發光效率低落。
又如美國公告第US20100078659所述,其於N型半導體層(103)上製作不規則表面前,已先沉積N型金屬電極(101),因此可以避免N型半導體層(103)與N型金屬電極(101)之間有空隙(void)產生,然而其N型金屬電極(101)與N型半導體層(103)之間為平坦的表面,雖然可避免空隙現象,但其會有附著力不足而剝離的問題。
Light Emitting Diode (LED), which has the characteristics of lightness, thinness, power saving, etc., has been widely used in lighting, traffic signs, advertising signs, etc., which is mainly composed of multiple epitaxial stacking of semiconductor materials. For example, a blue light-emitting diode is mainly composed of a gallium nitride-based (GaN-based) epitaxial film.
Referring to FIG. 1A and FIG. 1B, a conventional vertical light-emitting diode includes an N-type semiconductor layer 1, a light-emitting layer 2 and a P-type semiconductor layer 3 which constitute a sandwich structure. A Mirror layer, a buffer layer, a bonding layer 6, a germanium substrate 7 and a P-type electrode 8 are disposed under the P-type semiconductor layer 3, and the N-type semiconductor is provided. The surface of the layer 1 may be roughened to increase the light emission rate, and an N-type electrode 9 is provided, whereby the N-type semiconductor layer 1 provides electrons after the N-type electrode 9 and the P-type electrode 8 are applied with a voltage. The P-type semiconductor layer 3 provides a hole, and the electrons are combined with the hole in the light-emitting layer 2 to generate light.
In order to increase the light extraction rate, the surface of the N-type semiconductor layer 1 is roughened to form an irregular surface 1A, and the N-type electrode 9 is formed directly on the irregular surface 1A, and the N-type electrode 9 is generally In order to form a thin film process such as sputtering or vapor deposition, a void 1B is formed between the N-type electrode 9 and the N-type semiconductor layer 1 at a blind spot of the irregular surface 1A during the film processing. Void), which not only causes poor contact, but also increases the contact resistance, and when the irregular surface is made, it is easy to cause the molecules to generate a spin key and restrain the carrier, resulting in low luminous efficiency.
Further, as described in US Pat. No. 20,100,078,659, the N-type metal electrode (101) is deposited before the irregular surface is formed on the N-type semiconductor layer (103), so that the N-type semiconductor layer (103) and the N-type metal can be avoided. There is a void between the electrodes (101), but a flat surface between the N-type metal electrode (101) and the N-type semiconductor layer (103), although the void phenomenon can be avoided, it has insufficient adhesion. And the problem of stripping.

本創作之主要目的在於揭露一種發光二極體的電極接觸結構,可避免電極與半導體之間產生空隙與剝離的問題,進而提高發光效率及穩定性。
本創作為一種發光二極體的電極接觸結構,應用於一發光二極體,該發光二極體含依序堆疊的複數N型電極、一N型半導體層、一發光層、一P型半導體層、一反射層、一緩衝層、一結合層、一永久基板與一P型電極,且該N型半導體層形成有一不規則表面。
本創作的技術特徵為,於該N型半導體層形成複數接觸平台,該複數接觸平台具一圖案分佈的設置於該N型半導體層上,且該不規則表面形成於該N型半導體層不具該複數接觸平台之區域,並該複數N型電極分別形成於該複數接觸平台上,該複數接觸平台的粗糙度為0.01微米~0.1微米。
據此,本創作讓該複數N型電極形成於該複數接觸平台上,以藉由該複數接觸平台提供適當粗糙度的介面,其利用薄膜製程形成該N型電極時,不會形成空隙且可具有良好的附著力,同時可避免製作不規則表面時易導致其分子產生旋鍵而拘限載子與剝離的問題,因此可讓該N型電極與該接觸平台維持良好的電性接觸,又N型電極製作於適當粗糙度的複數接觸平台上,因而N型電極表面也形成適當的粗糙度,粗糙度為0.01微米~0.1微米,此一特性可增加導線與N型電極打線墊(N-PAD)的接觸面的穩定性,進而提高發光效率與穩定性。
The main purpose of the present invention is to disclose an electrode contact structure of a light-emitting diode, which can avoid the problem of voids and peeling between the electrode and the semiconductor, thereby improving luminous efficiency and stability.
The present invention is an electrode contact structure of a light-emitting diode, which is applied to a light-emitting diode comprising a plurality of N-type electrodes, an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor stacked in sequence. a layer, a reflective layer, a buffer layer, a bonding layer, a permanent substrate and a P-type electrode, and the N-type semiconductor layer is formed with an irregular surface.
The technical feature of the present invention is that a plurality of contact platforms are formed on the N-type semiconductor layer, and the plurality of contact pads are disposed on the N-type semiconductor layer with a pattern distribution, and the irregular surface is formed on the N-type semiconductor layer. A plurality of regions contacting the platform, and the plurality of N-type electrodes are respectively formed on the plurality of contact platforms, and the plurality of contact platforms have a roughness of 0.01 micrometers to 0.1 micrometers.
Accordingly, the present invention allows the plurality of N-type electrodes to be formed on the plurality of contact platforms to provide a suitable roughness interface by the plurality of contact platforms, and the N-type electrodes are formed by the thin film process without forming voids. It has good adhesion, and avoids the problem that the irregular surface is easy to cause the molecules to generate a spin bond and the carrier and the peeling are restrained, so that the N-type electrode can maintain good electrical contact with the contact platform, and The N-type electrode is fabricated on a complex contact platform of appropriate roughness, so that the surface of the N-type electrode is also formed with appropriate roughness, and the roughness is 0.01 micrometer to 0.1 micrometer. This characteristic can increase the wire and the N-type electrode wire pad (N- The stability of the contact surface of PAD), in turn, improves luminous efficiency and stability.

圖1A,為習知發光二極體結構圖。
圖1B,為習知發光二極體空隙結構圖。
圖2,為本創作二極體結構圖。
圖3A~圖3F,為本創作二極體結構製造流程圖。
圖4,為本創作接觸平台表面的電子顯微鏡圖。
圖5,為本創作不規則表面的電子顯微鏡圖。
FIG. 1A is a structural diagram of a conventional light emitting diode.
FIG. 1B is a diagram showing the structure of a conventional light-emitting diode void.
Figure 2 is a structural diagram of the creation diode.
FIG. 3A to FIG. 3F are flowcharts showing the fabrication of the creation diode structure.
Figure 4 is an electron micrograph of the surface of the created contact platform.
Figure 5 is an electron micrograph of the irregular surface of the creation.

茲有關本創作的詳細內容及技術說明,現以實施例來作進一步說明,但應瞭解的是,該等實施例僅為例示說明之用,而不應被解釋為本創作實施之限制。
請再參閱「圖2」所示,為本創作的實施例,本創作為一種發光二極體的電極接觸結構,應用於一發光二極體100,該發光二極體100包含依序堆疊的複數N型電極10、一N型半導體層20、一發光層30、一P型半導體層40、一反射層50、一緩衝層60、一結合層70、一永久基板80與一P型電極90,且該N型半導體層20形成有一不規則表面201。
本創作讓該N型半導體層20一體形成複數接觸平台202,該複數接觸平台202為具一圖案分佈的設置於該N型半導體層20上,且該不規則表面201形成於該N型半導體層20不具該複數接觸平台202之區域,並該複數N型電極10分別形成於該複數接觸平台202上,該複數接觸平台202的粗糙度為0.01微米(um)~0.1微米,且該N型電極10表面也形成0.01微米~0.1微米的粗糙度,並該不規則表面201的粗糙度為0.5微米~1微米。
請再一併參閱「圖3A」~「圖3F」所示,為本創作的製造示意圖。
首先,如「圖3A」所示,本創作為先製成依序堆疊的一N型半導體層20、一發光層30、一P型半導體層40、一反射層50、一緩衝層60、一結合層70、一永久基板80與一P型電極90,且該N型半導體層20可以包含一第一N型半導體層21與一第二N型半導體層22。且其中該緩衝層60可以為選自鈦、鎢、鉑、鎳、鋁與鉻所組成的群組製成。該結合層70可以為選自金錫合金、金銦合金與金鉛合金的任一種製成。該永久基板80可以為選自矽基板、銅基板、銅鎢基板、氮化鋁基板與氮化鈦基板的任一種製成。該反射層50可以為選自鋁、鎳、銀與鈦所組成的群組製成。
接著,如「圖3B」所示,利用粗化製程,於該N型半導體層20(亦即於第一N型半導體層21)形成一粗糙度為0.01微米~0.1微米之間的附著表面203,該附著表面203可以利用物理方法,如電漿衝擊等方式形成。
接著,如「圖3C」所示,利用如蒸鍍的薄膜製程,於該N型半導體層20的附著表面203 (亦即於第一N型半導體層21)上形成圖案化的複數蝕刻保護層11。
接下來,如「圖3D」所示,利用粗化製程,於該N型半導體層20(亦即於第一N型半導體層21)上,不具有該複數蝕刻保護層11的附著表面203,繼續粗化以形成有一不規則表面201,且藉由該複數蝕刻保護層11的遮蔽,會於該N型半導體層20(亦即於第一N型半導體層21)上形成該複數接觸平台202,同樣的該不規則表面201可以利用物理方法,如電漿衝擊等方式進行粗化。
接下來,如「圖3E」所示,利用蝕刻製程(etching process)或浮離製程(lift off process),去除該蝕刻保護層11,則顯露出該具有粗糙度為0.01微米(um)~0.1微米複數接觸平台202。
最後,如「圖3F」所示,利用如蒸鍍的薄膜製程,於該複數接觸平台202上,形成與複數接觸平台202之圖型相應的N型電極10,由於N型電極10形成於具有粗糙度為0.01微米(um)~0.1微米複數接觸平台202上,因此N型電極10表面也形成0.01微米~0.1微米適當的粗糙度,即完成本創作的結構。
請再一併參閱「圖4」與「圖5」所示,為本創作實際實施例的電子顯微鏡圖,其中「圖4」為接觸平台202表面(即附著表面203)的電子顯微鏡圖,其粗糙度約為0.1微米,其蒸鍍該複數N型電極10,不會產生空隙且具有良好的附著力,而「圖5」為不規則表面201的金相圖,其粗糙度約為1微米,可提供良好的光散射效果。
如上所述,本創作可以讓該複數N型電極10形成於該複數接觸平台202上而與該N型半導體層20接觸,由於該複數接觸平台202的粗糙度為0.01微米~0.1微米,可提供適當粗糙度的介面,因而其利用薄膜製程形成該N型電極10時,不會形成空隙且可提供良好的附著力,同時可避免製作不規則表面201時易導致其分子產生旋鍵而拘限載子與剝離的問題,所以本創作的結構可以確保該N型電極10與該接觸平台202之間維持良好的電性接觸,進而提高發光效率。
The detailed description of the present invention and the technical description thereof are now described in the following examples, but it should be understood that these examples are for illustrative purposes only and are not to be construed as limiting.
Please refer to FIG. 2 again. In the embodiment of the present invention, the present invention is an electrode contact structure of a light-emitting diode, which is applied to a light-emitting diode 100, and the light-emitting diode 100 includes stacked sequentially. The plurality of N-type electrodes 10, an N-type semiconductor layer 20, a light-emitting layer 30, a P-type semiconductor layer 40, a reflective layer 50, a buffer layer 60, a bonding layer 70, a permanent substrate 80 and a P-type electrode 90 And the N-type semiconductor layer 20 is formed with an irregular surface 201.
The N-type semiconductor layer 20 is integrally formed with a plurality of contact platforms 202. The plurality of contact pads 202 are disposed on the N-type semiconductor layer 20 with a pattern distribution, and the irregular surface 201 is formed on the N-type semiconductor layer. 20 is not in the region of the plurality of contact platforms 202, and the plurality of N-type electrodes 10 are respectively formed on the plurality of contact platforms 202. The roughness of the plurality of contact platforms 202 is 0.01 micrometers (um) to 0.1 micrometers, and the N-type electrodes The surface of 10 also forms a roughness of 0.01 μm to 0.1 μm, and the roughness of the irregular surface 201 is 0.5 μm to 1 μm.
Please refer to "Figure 3A" ~ "Figure 3F" for a schematic view of the manufacturing of this creation.
First, as shown in FIG. 3A, the present invention is an N-type semiconductor layer 20, a light-emitting layer 30, a P-type semiconductor layer 40, a reflective layer 50, a buffer layer 60, and a first stacked semiconductor layer. The bonding layer 70, a permanent substrate 80 and a P-type electrode 90, and the N-type semiconductor layer 20 may include a first N-type semiconductor layer 21 and a second N-type semiconductor layer 22. And wherein the buffer layer 60 may be made of a group selected from the group consisting of titanium, tungsten, platinum, nickel, aluminum, and chromium. The bonding layer 70 may be made of any one selected from the group consisting of a gold-tin alloy, a gold-indium alloy, and a gold-lead alloy. The permanent substrate 80 may be made of any one selected from the group consisting of a tantalum substrate, a copper substrate, a copper tungsten substrate, an aluminum nitride substrate, and a titanium nitride substrate. The reflective layer 50 may be made of a group selected from the group consisting of aluminum, nickel, silver, and titanium.
Next, as shown in FIG. 3B, an adhesion surface 203 having a roughness of between 0.01 μm and 0.1 μm is formed on the N-type semiconductor layer 20 (that is, in the first N-type semiconductor layer 21) by a roughening process. The attachment surface 203 can be formed by a physical method such as plasma impact.
Next, as shown in FIG. 3C, a patterned etched protective layer is formed on the adhesion surface 203 of the N-type semiconductor layer 20 (that is, on the first N-type semiconductor layer 21) by a thin film process such as vapor deposition. 11.
Next, as shown in FIG. 3D, the adhesion surface 203 of the complex etching protection layer 11 is not provided on the N-type semiconductor layer 20 (that is, on the first N-type semiconductor layer 21) by the roughening process. The roughening is continued to form an irregular surface 201, and the plurality of contact pads 202 are formed on the N-type semiconductor layer 20 (that is, on the first N-type semiconductor layer 21) by the masking of the plurality of etching protection layers 11. The same irregular surface 201 can be roughened by physical methods such as plasma impact.
Next, as shown in FIG. 3E, the etching protection layer 11 is removed by an etching process or a lift off process, and the roughness is found to be 0.01 micrometers (um) to 0.1. The micron plurality contacts the platform 202.
Finally, as shown in FIG. 3F, an N-type electrode 10 corresponding to the pattern of the plurality of contact platforms 202 is formed on the plurality of contact platforms 202 by a thin film process such as evaporation, since the N-type electrodes 10 are formed The roughness is from 0.01 micrometers (um) to 0.1 micrometers on the plurality of contact platforms 202. Therefore, the surface of the N-type electrode 10 also forms an appropriate roughness of 0.01 micrometers to 0.1 micrometers, that is, the structure of the present invention is completed.
Please refer to FIG. 4 and FIG. 5 again for an electron micrograph of the actual embodiment of the present invention, wherein "FIG. 4" is an electron microscope image of the surface of the contact platform 202 (ie, the attachment surface 203). The roughness is about 0.1 micrometer, which vapor-deposits the plurality of N-type electrodes 10, does not generate voids and has good adhesion, and "Fig. 5" is a metallographic diagram of the irregular surface 201, and the roughness thereof is about 1 micrometer. Provides good light scattering.
As described above, the present invention can form the plurality of N-type electrodes 10 on the plurality of contact platforms 202 to be in contact with the N-type semiconductor layer 20, since the roughness of the plurality of contact platforms 202 is 0.01 micrometers to 0.1 micrometers, The interface of the appropriate roughness, so that when the N-type electrode 10 is formed by the thin film process, voids are not formed and good adhesion can be provided, and at the same time, the irregular surface 201 can be prevented from causing the molecules to generate a spin bond and being trapped. The problem of carrier and peeling, so the structure of the present invention can ensure good electrical contact between the N-type electrode 10 and the contact platform 202, thereby improving luminous efficiency.

習知
1‧‧‧N型半導體層
1A‧‧‧不規則表面
1B‧‧‧空隙
2‧‧‧發光層
3‧‧‧P型半導體層
4‧‧‧反射層
5‧‧‧緩衝層
6‧‧‧結合層
7‧‧‧矽基板
8‧‧‧P型電極
9‧‧‧N型電極
本創作
100‧‧‧發光二極體
10‧‧‧N型電極
11‧‧‧蝕刻保護層
20‧‧‧N型半導體層
201‧‧‧不規則表面
202‧‧‧複數接觸平台
203‧‧‧附著表面
21‧‧‧第一N型半導體層
22‧‧‧第二N型半導體層
30‧‧‧發光層
40‧‧‧P型半導體層
50‧‧‧反射層
60‧‧‧緩衝層
70‧‧‧結合層
80‧‧‧永久基板
90‧‧‧P型電極
Conventional knowledge
1‧‧‧N-type semiconductor layer
1A‧‧‧ Irregular surface
1B‧‧‧ gap
2‧‧‧Lighting layer
3‧‧‧P type semiconductor layer
4‧‧‧reflective layer
5‧‧‧buffer layer
6‧‧‧Combination layer
7‧‧‧矽 substrate
8‧‧‧P type electrode
9‧‧‧N-type electrode creation
100‧‧‧Lighting diode
10‧‧‧N type electrode
11‧‧‧ etching protection layer
20‧‧‧N-type semiconductor layer
201‧‧‧ Irregular surface
202‧‧‧Multiple contact platforms
203‧‧‧ Attachment surface
21‧‧‧First N-type semiconductor layer
22‧‧‧Second N-type semiconductor layer
30‧‧‧Lighting layer
40‧‧‧P type semiconductor layer
50‧‧‧reflective layer
60‧‧‧buffer layer
70‧‧‧Combination layer
80‧‧‧Permanent substrate
90‧‧‧P type electrode

 

100‧‧‧發光二極體 100‧‧‧Lighting diode

10‧‧‧N型電極 10‧‧‧N type electrode

20‧‧‧N型半導體層 20‧‧‧N type semiconductor layer

201‧‧‧不規則表面 201‧‧‧ Irregular surface

202‧‧‧複數接觸平台 202‧‧‧Multiple contact platforms

203‧‧‧附著表面 203‧‧‧ Attachment surface

21‧‧‧第一N型半導體層 21‧‧‧First N-type semiconductor layer

22‧‧‧第二N型半導體層 22‧‧‧Second N-type semiconductor layer

30‧‧‧發光層 30‧‧‧Lighting layer

40‧‧‧P型半導體層 40‧‧‧P type semiconductor layer

50‧‧‧反射層 50‧‧‧reflective layer

60‧‧‧緩衝層 60‧‧‧buffer layer

70‧‧‧結合層 70‧‧‧Combination layer

80‧‧‧永久基板 80‧‧‧Permanent substrate

90‧‧‧P型電極 90‧‧‧P type electrode

Claims (7)

一種發光二極體的電極接觸結構,應用於一發光二極體,該發光二極體包含依序堆疊的複數N型電極、一N型半導體層、一發光層、一P型半導體層、一反射層、一緩衝層、一結合層、一永久基板與一P型電極,且該N型半導體層形成有一不規則表面,其特徵在於:
該N型半導體層形成複數接觸平台,該複數接觸平台具一圖案分佈的設置於該N型半導體層上,且該不規則表面形成於該N型半導體層不具該複數接觸平台之區域,並該複數N型電極分別形成於該複數接觸平台上,該複數接觸平台的粗糙度為0.01微米~0.1微米,且該N型電極表面相應於該複數接觸平台表面形成相應的粗糙度0.01微米~0.1微米。
An electrode contact structure of a light-emitting diode is applied to a light-emitting diode comprising a plurality of N-type electrodes, an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, and a plurality of sequentially stacked semiconductor electrodes a reflective layer, a buffer layer, a bonding layer, a permanent substrate and a P-type electrode, and the N-type semiconductor layer is formed with an irregular surface, wherein:
The N-type semiconductor layer forms a plurality of contact platforms, and the plurality of contact pads are disposed on the N-type semiconductor layer with a pattern distribution, and the irregular surface is formed in a region where the N-type semiconductor layer does not have the complex contact platform, and the A plurality of N-type electrodes are respectively formed on the plurality of contact platforms, and the plurality of contact platforms have a roughness of 0.01 μm to 0.1 μm, and the surface of the N-type electrode forms a corresponding roughness of 0.01 μm to 0.1 μm corresponding to the surface of the plurality of contact platforms. .
如申請專利範圍第1項之發光二極體的電極接觸結構,其中該不規則表面的粗糙度為0.5微米~1微米。The electrode contact structure of the light-emitting diode of claim 1, wherein the irregular surface has a roughness of 0.5 μm to 1 μm. 如申請專利範圍第1項之發光二極體的電極接觸結構,其中該N型半導體層包含一第一N型半導體層與一第二N型半導體層,該複數接觸平台形成於該第一N型半導體層上。The electrode contact structure of the light-emitting diode of claim 1, wherein the N-type semiconductor layer comprises a first N-type semiconductor layer and a second N-type semiconductor layer, and the plurality of contact platforms are formed on the first N On the semiconductor layer. 如申請專利範圍第1項之發光二極體的電極接觸結構,其中該緩衝層為選自鈦、鎢、鉑、鎳、鋁與鉻所組成的群組製成。The electrode contact structure of the light-emitting diode of claim 1, wherein the buffer layer is made of a group selected from the group consisting of titanium, tungsten, platinum, nickel, aluminum and chromium. 如申請專利範圍第1項之發光二極體的電極接觸結構,其中該結合層為選自金錫合金、金銦合金與金鉛合金的任一種製成。The electrode contact structure of the light-emitting diode of claim 1, wherein the bonding layer is made of any one selected from the group consisting of a gold-tin alloy, a gold-indium alloy, and a gold-lead alloy. 如申請專利範圍第1項之發光二極體的電極接觸結構,其中該永久基板為選自矽基板、銅基板、銅鎢基板、氮化鋁基板與氮化鈦基板的任一種製成。The electrode contact structure of the light-emitting diode according to the first aspect of the invention, wherein the permanent substrate is made of any one selected from the group consisting of a germanium substrate, a copper substrate, a copper tungsten substrate, an aluminum nitride substrate, and a titanium nitride substrate. 如申請專利範圍第1項之發光二極體的電極接觸結構,其中該反射層為選自鋁、鎳、銀與鈦所組成的群組製成。The electrode contact structure of the light-emitting diode of claim 1, wherein the reflective layer is made of a group selected from the group consisting of aluminum, nickel, silver and titanium.
TW102129111A 2013-08-14 2013-08-14 The electrode contact structure of the light emitting diode TWI523259B (en)

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TWI884669B (en) * 2023-12-29 2025-05-21 台亞半導體股份有限公司 Light emitting diode structure

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TWI810139B (en) * 2023-04-11 2023-07-21 聯勝光電股份有限公司 Light-emitting diode with multiple P-type and N-type junctions and its manufacturing method

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* Cited by examiner, † Cited by third party
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TWI884669B (en) * 2023-12-29 2025-05-21 台亞半導體股份有限公司 Light emitting diode structure

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